Abstract: Provided is a flow rate ratio control device that even in change periods during which the actual flow rates of component gases change along with a change in the target total flow rate or target mixing ratio of mixed gas, can keep the actual total flow rate or actual mixing ratio of the mixed gas constant. Target flow rates set in flow rate control devices have continuous change periods during which target flow rate values continuously change from pre-change to post-change target flow rate values, respectively and correspondingly; and the time lengths of the continuous change periods are set to at least a followable time during which a flow rate control device of which a response speed to an actual component fluid flow rate is lowest allows the actual component fluid flow rate to substantially follow the target flow rate in the continuous change periods.

Abstract: A fluid regulating unit includes a body, a pressure regulator, and a control valve. The body has an inlet, an outlet configured to output a regulated flow of fluid, and a flow path defined between the inlet and the outlet. The body integrates a pressure regulator and a control valve, each of which is disposed in the flow path. The pressure regulator has a regulator body, a control assembly configured to control a fluid flow through the regulator body, a sensor operatively coupled to the control assembly to control a position of the control element, and a bonnet movably coupled to the regulator body. The regulator body and the bonnet define a reference chamber disposed in the flow path. The reference chamber is configured to apply a reference force to the sensor to control the fluid flow through the regulator body.

Abstract: A pressure reducer, comprising an outer cylinder with a first air supply connector on a first end side of the outer cylinder and a second air supply connector on a second end side of the outer cylinder is provided. A piston can be guided movably in the outer cylinder. A first air chamber is arranged between the first air supply connector of the outer cylinder and the first front surface of the piston, and a second air chamber is arranged between the second air supply connector of the outer cylinder and a second front surface of the piston. The surface areas of the two front surfaces of the piston are of different size. The pressure reducer is suitable for reducing a second air pressure which prevails in the second air chamber in a pulsed manner proportionally to a first air pressure which prevails in the first air chamber, by a first air connection.

Abstract: Provided is system including a temperature regulator including at least on regulation component in communication with a semiconductor within a converter, and a peak detector in communication with the semiconductor within the converter configured to identify a maximum temperature of each semiconductor. Also provided is a method for regulating temperature change of semiconductor components including measuring a semiconductor temperature, determining a reference temperature when the semiconductor is energized, summing the first semiconductor temperature and the reference temperature to generate a first temperature sum, comparing the first temperature sum to a coolant temperature to generate a first temperature difference. The method also circulates a fluid configured within the system such that the first temperature difference is adjusted.

Abstract: Methods, systems and apparatus for securing user input to a terminal such as a self-service terminal. The temperature of one or more keys pressed by a user when entering user information into a terminal (e.g., user PIN) is determined. The change in temperature on the keys' surface from the user touching the keys reflects a heat signature that can be identified by thermal imaging devices. A desired temperature for the keys that will mask the heat signature is determined. The temperature of the keys is adjusted (e.g., raised or lowered) to the desired temperature.

Abstract: A smart register is described. For example, one embodiment of the smart register apparatus comprises: a set of dampers which enable or restrict airflow from an heating, ventilation, air conditioning (HVAC) system when opened and closed, respectively; a motor to control the opening and closing of the dampers; a battery to provide power to the motor; and register control logic to determine a threshold temperature based on a desired temperature set by a user and to read a current temperature from a temperature sensor, the control logic to automatically open or close the dampers to enable or restrict airflow from the HVAC system based on differences between the threshold temperature and the current temperature.

Abstract: A method for characterizing buildings, including retrieving a plurality of baseline energy use data sets for the buildings from a baseline data stores; generating energy use data sets for each of the buildings, each of the energy use data sets comprising energy consumption values along with corresponding time and outside temperature values, where the energy consumption values within each of the sets are shifted by one of a plurality of lag values relative to the corresponding time and outside temperature values, and where each of the plurality of lag values is different from other ones of the plurality of lag values; performing a regression analysis on the each of the plurality of energy use data sets to yield corresponding regression model parameters and a corresponding residual; determining a least valued residual from all residuals yielded by the regression engine, the least valued residual indicating a corresponding energy lag for the each of the buildings; and categorizing the buildings into types accord

Abstract: A semiconductor device including an input terminal to which a power source, for which the time until a voltage equal or greater than a predetermined voltage value is output fluctuates according to an external environment, is connected, a power source section to which the input terminal supplies power from the power source, a power source supply terminal that supplies power to a driven semiconductor device, a switch that controls a connection between the power source section and the power source supply terminal, and a voltage regulator to which the input terminal supplies power from the power source, and that supplies a voltage to the power source supply terminal is provided.

Abstract: The present invention relates in one aspect to a DC linear voltage regulator circuit for generating a regulated DC output voltage based on a DC input voltage. The DC linear voltage regulator circuit comprises a DMOS pass transistor comprising drain, gate, source and bulk terminals wherein the drain terminal is connected to a regulator output which is configured to supply the regulated DC output voltage and the source terminal is connected to a regulator input for receipt of the DC input voltage. The DC linear voltage regulator circuit comprises a switchable leakage prevention circuit, connected to the bulk terminal of the DMOS pass transistor, and configured to automatically detect and interrupt a flow of leakage current from the regulator output to the bulk terminal.

Abstract: In one embodiment, a low-dropout regulator comprises a pass transistor having a first terminal to receive an input voltage, a second terminal to provide an output voltage, and a gate terminal. A feedback circuit is coupled between the second terminal of the pass transistor and ground to generate a feedback voltage in response to the output voltage. A comparator has an output to generate a control voltage in response to the feedback voltage and a reference voltage. A switch is coupled between the output of the charge pump and the gate terminal of the pass transistor to selectively provide the control voltage to the gate terminal.

Abstract: Embodiments described herein present a new LDO design that eliminates the need for the sleep bias circuitry included in other systems. Further, the new LDO design can be biased with a small fraction of the operating current enabling the LDO to wake up substantially faster than previous LDO designs that include separate sleep circuitry. In some cases, the LDO can instantly (or faster than other LDOs) transition from a sleep mode to an operating mode enabling improved operation compared to prior LDOs. Furthermore, the new LDO design maintains a non-breakdown voltage across the transistors reducing the need to enter sleep mode to prevent transistors of the LDO from entering a breakdown region.

Abstract: An electronic apparatus comprises several series-connected loads powered by a high voltage power source. To provide voltage regulation for each load, a ladder circuit is described. To automatically balance the voltage at output, one or more voltage-control-oscillators are included.

Abstract: A method for characterizing buildings, including generating energy use data sets for each of the buildings, each of the energy use data sets comprising energy consumption values along with corresponding time and outside temperature values, where the energy consumption values within each of the sets are shifted by one of a plurality of lag values relative to the corresponding time and outside temperature values, and where each of the plurality of lag values is different from other ones of the plurality of lag values; performing a regression analysis on the each of the plurality of energy use data sets to yield corresponding regression model parameters and a corresponding residual; determining a least valued residual from all residuals yielded by the regression engine, the least valued residual indicating a corresponding energy lag for the each of the buildings; and categorizing the buildings into types according to similar energy lags.

Abstract: A method for dispatching buildings in a demand response program event including generating data sets for each of the buildings, each set having energy consumption values along with corresponding time and outside temperature values, where the energy consumption values within each set are shifted by one of a plurality of lag values relative to the corresponding time and outside temperature values, and where each of the plurality of lag values is different from other ones of the plurality of lag values; performing a regression analysis on each set to yield regression model parameters and a residual; determining a least valued residual from all residuals yielded, the least valued residual indicating a corresponding energy lag for the each of the buildings; and using energy lags for all of the buildings to generate a dispatch schedule for the demand response program event according to a prioritization of the energy lags.

Abstract: A method for dispatching buildings participating in a demand response program including retrieving a plurality of baseline energy use data sets for the buildings from a baseline data stores; generating data sets for each of the buildings, each having energy consumption values along with corresponding time and outside temperature values, where the energy consumption values within each set are shifted by one of a plurality of lag values relative to the corresponding time and outside temperature values, and where each lag value; performing a regression analysis on each set to yield corresponding regression model parameters and a corresponding residual; determining a least valued indicating a corresponding energy lag for each of the buildings; and using outside temperatures, regression model parameters, and energy lags for all of the buildings to estimate a cumulative energy consumption for the buildings, and to predict a dispatch order reception time for a demand response program event.

Abstract: An under voltage detection circuit and method of operating an IC including the same is disclosed. In one embodiment, an IC includes an under voltage protection circuit having first and second comparators configured to compare a supply voltage to first and second voltage thresholds, respectively, with the second voltage threshold being greater than the first. A logic circuit is coupled to receive signals from the first and second comparators. During operation in a high performance state by a corresponding functional circuit, the logic circuit is configured to cause assertion of a throttling signal responsive to an indication that the supply voltage has fallen below the first threshold. A clock signal provided to the functional circuit may be throttled responsive to the indication. If the supply voltage subsequently rises to a level above the second threshold, the throttling signal may be de-asserted.

Abstract: A semiconductor device for controlling a display device includes a generation unit configured to generate a reference voltage, a booster unit configured to boost the reference voltage to generate a bias voltage, and a conversion unit. The conversion unit receives a status signal generated from a power supply voltage and is configured to boost a voltage level of the status signal to that of the bias voltage for controlling drive of the display device. A control unit is configured to stop operation of at least one of the generation unit and the booster unit when one of a value of the power supply voltage and a value of a power supply current flowing from a power supply that generates the power supply voltage is lower than a predetermined threshold.

Abstract: A control system for a power converter includes a digital reference signal generator, a first proportional-integral (PI) controller, a second PI controller, and a diode. The digital reference signal generator is configured to operate in a maximum peak power tracking (MPPT) mode of operation and an output voltage control mode of operation. In the MPPT mode of operation, the digital reference signal generator is configured to receive an input voltage and an input current provided to the power converter and provide an input voltage reference signal based on the input voltage and the input current. In the output voltage control mode of operation, the digital reference signal generator is configured to provide a constant input voltage reference signal.

Abstract: A semiconductor device includes a substrate; a first through-electrode penetrating the substrate and connected to a power source or a reference potential point; a second through-electrode penetrating the substrate; a power section connected between the substrate and the second through-electrode and configured to output a DC voltage between the substrate and the second through-electrode; a voltage control section configured to control the DC voltage to be output by the power section; and a measurement section connected to the first through-electrode and configured to measure a power impedance of the first through-electrode, wherein the voltage control section is configured to control a value of the DC voltage output by the power section, such that the power impedance of the first through-electrode measured by the measurement section is equal to or less than a predetermined value within a predetermined frequency range including a frequency of noise occurring in the first through-electrode.

Abstract: A charge pump includes a capacitor, a first transistor that is electrically connected between a first terminal of the first capacitor and ground, and a second transistor that is electrically connected between a second terminal of the first capacitor and an output node. During a first operation mode of the charge pump, a voltage that is boosted using the capacitor is output through the output node, and during a second operation mode of the charge pump, the first transistor and the second transistor are maintained in an ON state.

Abstract: A semiconductor system may include a first semiconductor device and a second semiconductor device. The first semiconductor device may output a training entry signal and a transmission signal. The second semiconductor device may generate selection codes and a control signal in response to the training entry signal. The second semiconductor device may adjust a level of a reference voltage signal for buffering the transmission signal in response to the selection codes and control a capacitance of an internal node. The reference voltage signal may be outputted from the internal node in response to the control signal.

Abstract: A voltage regulator includes a power stage configured to produce an output voltage from an input voltage at an input voltage terminal, a shunt resistor connected in series between the input voltage terminal and the power stage, a first level shifting resistor connected in series between a first terminal of the shunt resistor and a first sense pin of the controller, and a second level shifting resistor connected in series between a second terminal of the shunt resistor and a second sense pin of the controller. The input current of the regulator is sensed as a function of the voltage across the shunt resistor, as shifted down by the level shifting resistors and measured across the sense pins. The input voltage of the regulator is sensed as a function of the current flowing through either one of the level shifting resistors, as measured at one of the sense pins.

Abstract: In an operation input device, a supporting part supports an operation part to be displaceable with respect to the base part, and a reaction force generating part generates reaction force in an axial direction coaxial with the displacement direction in response to the displacement. The supporting part includes: a support member having: one end connected to the base part and another end protruded from the base part; and a plurality of plate springs respectively having a plate surface perpendicular to a center axis of the support member, arranged radially around the center axis, and a tip in a radial direction connected to the operation part. The reaction force generating part includes: an electromagnet generating magnetic force in an axial direction parallel to the center axis of the support member; and a magnetic member arranged opposite to the electromagnet to receive magnetic force to apply reaction force to the operation part.

Abstract: Methods and systems for manufacturing optical computing elements, including a method for correcting element layer thickness measurements during manufacturing that includes depositing an element layer on a glass substrate or a previously deposited layer, illuminating the deposited layer and sampling reflected or transmitted light produced by said illuminating, detecting and measuring an actual magnitude of the sampled light as a function of wavelength, and modeling the sampled light to produce a predicted magnitude of the sampled light. The method further includes determining a discrepancy between the actual and predicted magnitudes, adjusting the actual magnitude based on said discrepancy, calculating the thickness of the deposited layer based upon the adjusted actual magnitude of the sampled light, and adjusting the deposited layer's thickness if the calculated thickness is not within a tolerance range of a target thickness.

Abstract: A clock is distributed to a processor-side base mode clocked transceiver and to a memory-side base mode clocked transceiver, interfacing respective ends of a data lane between a processor and the memory, for duplex communicating over the data lane. Concurrent with the duplex communicating, a bandwidth mode switches between a base bandwidth mode and a scale-up mode. The scale-up mode enables scale-up clock lines that distribute the clock to a processor-side scale-up transceiver and to a memory-side scale-up transceiver, interfacing respective ends of a scale-up data lane between the processor and the memory, for additional duplex communicating over the scale-up data lane. The base bandwidth mode disables the scale-up clock lines, which disables communicating over the scale-up data lane.

Abstract: An information handling system (IHS) includes a modularly-constructed chassis for receiving varying sizes of snap-in compute components for assembly of the IHS. The modularly-constructed chassis includes a base panel having a chassis surface that includes more than one engagement feature formed within the chassis surface and a selected at least one of a first tray that is sized to receive a first compute component of a first size and a second tray that is sized to receive a second compute component of a second size. The first and second trays have a bottom surface with more than one complementary engagement feature formed within the bottom surface to snap-in corresponding engagement features of the base panel. The IHS includes one or more connecting cabling interconnecting the at least two compute components.

Abstract: An electronic device and hinge assembly includes an electronic device body including a base and a main unit, and hinge devices pivotally connecting the base and the main unit for allowing adjustment of the angular position of the main unit relative to the base step by step in a series of angles. Each hinge device includes a casing affixed to one of the base and the main unit, a pivot shaft connected to the base and the main unit and rotatably inserted through the casing and secured by a retaining ring, and a friction wheel set and a damper mounted on the pivot shaft. The friction wheel set includes a first friction wheel and having recessed portions equiangularly spaced at one side thereof, and a second friction wheel rotatable with the pivot shaft relative to the first friction wheel and having raised portions respectively engageable into the recessed portions.

Abstract: Techniques are described for implementing and using a portable computing device that may include at least some computing components embedded in or otherwise affixed to or inserted in a belt or other strap that is worn or carried by a user, such as in one or more flaps or other enclosures of the strap, and in some situations includes some components in or otherwise interacts with a wrist-mounted device that includes various display capabilities and/or other user input/output capabilities. The computing components of the portable computing device may be inter-connected before being affixed to or inserted in a strap, or the inter-connections may be provided as part of a communication mechanism that is embedded in or otherwise affixed to the strap. If a wrist-mounted device is in use, the interactions between the portable computing device and the wrist-mounted device may occur in a wireless or wired/cabled manner.

Abstract: The present invention discloses a wearable electronic device and a display method thereof, and the wearable electronic device includes a sensor module, a processor, a display controller, and a display, where the sensor is configured to: collect data, generate a sensor signal that represents a feature of data of currently collected data, and send the sensor signal to the processor; the processor is configured to: determine, according to the received sensor signal, a manner to display that is corresponding to the feature of data represented by the sensor signal and is of the display, generate a display control signal, and send the display control signal to the display controller; and the display controller is configured to control, according to the display control signal, the display to display.

Abstract: An electronic device accessory is provided in accordance with an aspect of the present disclosure. The electronic device accessory comprises an elongated member including at least one port and a releasable attachment mechanism embedded in the elongated member to couple an electronic device to a portion of the elongated member. The electronic device accessory further includes a top cover extending from a first edge of the elongated member to cover a first side of the electronic device and a bottom cover extending from a second edge of the elongated member to cover a second side of the electronic device.

Abstract: A display device includes a substrate and a connector. The substrate includes a display area, a first pad area, and a second pad area. The display area has a plurality of pixels. The first pad area and the second pad area are adjacent respective sides of the display area and are connected to different ones of the pixels. The connector connects the first pad area and the second pad area when the substrate is bent.

Abstract: A flexible electronic computing device is described. In one embodiment, a flexible display is formed on a flexible substrate. A plurality of electronic components are attached to the flexible substrate. A plurality of conductive signal lines are formed on the flexible substrate, the signal lines electrically coupling the electronic components to the flexible display.

Abstract: An electronic device may include: a foldable body transitionable between an unfolded state and a folded state; a flexible display device disposed on a front face of the body, the flexible display being foldable together with the body; and a cover that enclosing at least a portion of a rear face of the body, the cover being foldable together with the body. The flexible display may include an exposed region that remains visible when the foldable body is in the folded state.

Abstract: A protective enclosure is provided for securing portable electronic devices within the enclosure. The enclosure generally includes a front structure, a back structure, and at least one bracket. The front structure defines at least one aperture for permitting access to a display of the computing device. The back structure is configured to couple to the front structure. The front structure and back structure are configured to cooperate to substantially enclose at least four corners of the portable computing device. The at least one bracket is configured to engage the front and back structures, and includes a tamper-resistant fastener configured to secure the front and back structures together on the portable computing device.

Abstract: A base deck of a storage drive forms a cavity that is designed to contain storage circuitry. The storage drive base deck is designed to mimic features of a storage drive carrier by providing: graspable portions located on a front face of the storage drive base deck; and insertion guide portions located on opposing sides of the storage drive base deck.

Abstract: An Information Handling System (IHS) includes a chassis having a base panel, a selected modular cover, and a latching structure. The base panel has an upper chassis surface to receive selected compute components and infrastructure components that vary in height desired for the fully assembled IHS or rack in which the IHS will be inserted. The selected modular cover can have peripheral sides of a vertical height to complement a vertical height of the lateral guides of the base panel to create either a first height enclosure of a first height to house compute components of less than the first height or a second height enclosure of a second height to house compute components of less than the second height but greater than the first height. The latching structure is formed between the peripheral sides of the selected one of the first and second modular cover and the lateral guides of the base panel.

Abstract: An information handling system (IHS) includes user selectable compute components including a storage drive. A chassis includes a base panel having an upper chassis surface. At least one resilient component is coupled to the upper chassis surface. An upwardly presented adhesive surface on one or more of the at least one resilient component can fixedly engage and provide vibration damping for a vibration-susceptible compute component that is inserted during provisioning or later modification or repair of the IHS.

Abstract: A storage apparatus of an electronic device, the storage apparatus includes: a plurality of chassis each configured to store a plurality of electronic devices, at an interval in which at least one electronic device is capable of being disposed; and a fixing portion configured to fix the plurality of chassis, wherein at least one of the plurality of chassis is formed such that in the interval of the electronic devices stored in the at least one of the plurality of chassis, at least one of the electronic devices stored in another chassis among the plurality of chassis is disposed.

Abstract: A method and apparatus discloses a tray configured to house a hard-disk drive (“HDD”) using at least one semi-flexible anchoring strip. An HDD assembly device, in one aspect, includes a tray, a U-shaped semi-flexible anchoring frame, and an HDD. The tray has a base, a front panel, a first side panel, and a second side panel, wherein the first side panel and the second side panel includes tracks along longitudinal edges of the first and the second side panels. The U-shaped semi-flexible anchoring frame includes a front piece, a first strip, and a second strip, wherein the first strip is configured to fit in the track of the first side panel allowing the first strip to slide along the track of the first side panel. The HDD has at least two mounting holes on each side and able to seat in the U-shaped semi-flexible anchoring frame.

Abstract: An electric cabinet provided with an interconnection system for devices such as computers received in the cabinet. The interconnection system includes at least one waveguide forming part of the frame of the cabinet. The waveguide is provided with openings disposed facing housings for receiving the aforementioned devices. The openings being dimensioned to form a barrier to the passage of radio-frequency wireless communication waves to be transmitted through the waveguide and to form a barrier to external waves.

Abstract: A cooling structure integrated all-in-one computer includes a display device including a hollow frame having retaining members located therein, a first electric connector mounted in the hollow frame and a display module mounted in the hollow frame, and a mainframe including an aluminum extruded casing slidably inserted into a back opening of the hollow frame, engaging members located in the casing for engaging the retaining members upon insertion of the casing into the hollow frame, and a motherboard mounted in a recessed accommodation chamber in the casing with heat-emitting sources thereof abutted against respective heat-transferring bearing blocks of the casing for quick dissipation of heat and a second electric connector thereof connected to the first electric connector.

Abstract: A modular super-calculation architecture comprises a plurality of electronic calculation modules communicating with each other in a network and liquid cooled. Each electronic calculation module includes a calculation node, one or more autonomous liquid cooling devices, an electric power device, a box-like container that encloses and protects inside it at least the calculation node, the electric power device, and the one or more liquid cooling devices. Each electronic calculation module is independent hydraulically, electrically, in terms of network communication and mechanically at least from the other electronic calculation modules, and can be inserted and/or removed or substituted hot from said architecture.

Abstract: Cooled electronic board (10) for supercomputing comprising: a printed electronic circuit (11) whereon at least a electronic component (12) is fixed; a heat exchanger (13) of the roll bond type thermally connected with the electronic component (12) to absorb, in use, a thermal flow generated by the latter.

Abstract: Thermal management in a portable computing device differentiates between a temperature increase caused by a steady workload and a temperature increase caused by an instantaneous workload. If it is determined that a detected temperature increase is caused by a steady workload, then a configuration of thermal parameters is applied that optimizes thermal performance for a steady workload. If it is determined that a temperature increase is caused by an instantaneous workload increase, then a configuration of thermal parameters is applied that optimizes thermal performance for an instantaneous workload.

Abstract: A system management controller may include a thermal table, a host agent, and a thermal control system. The thermal table may comprise identifying parameters for supported remote temperature sensors external to an information handling system. The host agent may be configured to receive temperature sensor data of a remote temperature sensor. The thermal control system may be configured to provide thermal control of at least one of the information handling system and a chassis in which it is disposed by determining, based on an entry of the thermal table associated with the remote temperature sensor, a local input identifier of the system management controller that defines a virtual thermal input of the information handling system associated with the remote temperature sensor, and controlling thermal properties of at least one of the information handling system and the chassis based on the virtual thermal input and a temperature value associated therewith.

Abstract: The present disclosure discloses a method and system for non-uniform intensity mapping using a high performance enterprise computing system with enhanced precision cooling, enabling extended over-clocking and over-voltage operation. A Kalman filter embedded in the processor predicts and corrects the input data flux for real-time use by taking care of over-clocking and over-voltage.

Abstract: A method for allocating power within an information handling system (IHS) includes: monitoring power consumed by components within the IHS; monitoring thermal state of the components; evaluating power demand and cooling demand for each of the components; and adjusting power allocated to at least one of a computing resource and system cooling according to results of the evaluating. An information handling system (IHS) and a controller that both perform similar processes are disclosed.

Abstract: A computer includes a power button, a south bridge chip, a switch module, a mode setting module and a control module. The power button transmits a power off signal in response to a power off operation. The south bridge chip controls the computer to shutdown in response to the power off signal. The switch module controls whether the power off signal is transmitted to the south bridge chip. The mode setting module provides modes for setting the mode of the computer. The provided modes include a preventing power off mode. The control module controls the switch module to disconnect to prevent the power off signal from transmitting to the south bridge chip on the basis of the power off signal when the mode of the computer is set as the preventing power off mode. The disclosure also provides a method for preventing error shutdown of the computer.

Abstract: A semiconductor device includes a plurality of chips including first and second chips, each of the first and second chips including a first input terminal receiving a first token input signal, a first output terminal outputting a first token output signal, a second input terminal receiving a second token input signal, and a second output terminal outputting a second token output signal. The first and second chips are coupled to each other in a bi-directional ring structure such that the first output terminal of the first chip is coupled to the first input terminal of the second chip and the second output terminal of the second chip is coupled to the second input terminal of the first chip. Each of the first and second chips performs a corresponding peak zone operation according to the first token input signal and the second token input signal.

Abstract: A power distribution system for a data center includes a transformer that transforms three-phase source power to three-phase operating power. The phase-to-neutral operating voltage for each phase is at least about 260 volts. Power distribution units are coupled to the transformer. The power distribution units supply operating power from the transformer to computer systems in the data center.