Abstract: Power leveling a system under test (SUT). An input signal is provided at an initial power level to the SUT. Multiple iterations are performed, each including measuring, over a specified measuring interval, power of a signal produced by the SUT in response to the input signal, and dynamically adjusting the power of the input signal in response. The measuring interval is increased over the iterations, thereby increasing accuracy of the measuring over the iterations while converging the signal to a specified power level. An initial power leveling operation may be performed for the SUT to establish a specified power level, after which the SUT is tested, during which multiple power leveling operations are performed, each including measuring power of a signal from the SUT over a specified measuring interval, and adjusting the input signal in response, thereby maintaining the specified power level during the testing while correcting for thermal droop.

Abstract: A debug configuration tool for configuration of on-chip debug features comprises a database comprising predefined analysis points, each relating to a configurable chip entity, and comprising a configurable condition and a configurable action for the chip entity, a plurality of predefined analysis groups, each relating to a group of configurable chip entities, and comprising a configurable condition and a configurable action for the group of chip entities. The tool comprises a graphical user interface module arranged to display representations of at least some of the analysis points and the analysis groups on different levels of detail, and to receive input from a user to set the configurable conditions and/or actions for the displayed analysis points and the analysis groups. An application program interface module processes data received from the graphical user interface module to obtain debug settings and to communicate the debug settings to a debug target system configuration module.

Abstract: In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for implementing and using PSMI using at-speed scan capture. For example, in one embodiment, such a system includes an input signal capture device to capture input signals input to a silicon processor under test; a scan capture device to capture a scan snapshot representing a known state of a plurality of digital elements integrated within the silicon processor under test, each having state data for the silicon processor under test; a scan read-out device to communicate the captured scan snapshot to a storage point physically external from the silicon processor under test; and a model of the silicon processor under test to replay a subset of a test sequence for the silicon processor under test based at least in part on the captured input signals and the captured scan snapshot.

Abstract: One or more operators in a flow graph of a streaming application may include one or more triggers that indicate when action needs to be taken for the operator. A streams manager monitors performance of a streaming application and receives a notification when a trigger in an operator fires. In response to a trigger firing, the streams manager determines an appropriate action corresponding to the trigger. When the trigger indicates an adjustment of cloud resources are needed, the streams manager formulates a cloud resource request to a cloud manager. In response, the cloud manager adjusts the cloud resources for the operator to improve performance of the streaming application. A trigger may specify a trigger action for an operator, and may additionally specify a trigger action for one or more other affected operators. The firing of a trigger in one operator can therefore result in adjusting resources to multiple operators.

Abstract: Method for providing precise microprocessor performance counter readings including detecting a swap back to a monitored process executing in a microprocessor. In response to the detected swap back to the monitored process, if the value read from the performance counter does not exceed the defined overflow threshold, the value of the performance counter stored in the first memory location is restored to the performance counter. If the value read from the performance counter exceeds the defined overflow threshold, the performance counter is set to zero and the value of the performance counter stored in the first memory location is used to increment an overflow memory location. If the value read from the performance counter exceeds the defined overflow threshold, at least one performance counter reading instruction is detected and in response to the detected at least one performance counter reading instruction, setting the counter output register to zero.

Abstract: A method and apparatus are provided for facilitating performance monitoring of a large database system. The apparatus comprises a processor and a storage device communicatively coupled with the processor. The processor is programmed to (i) retrieve resource usage data points, (ii) calculate an outlier threshold value based upon values of data points, and (iii) determine if the value of each data point is outside of the threshold value. The processor is further programmed to (iv) plot the value of the data point in histogram with a first color when the data point value is determined to be outside of the threshold value, (v) plot the data point value in histogram with a second color when the data point value is determined to be not outside of the threshold value, and (vi) display the histogram containing plotted data point values of the first color and plotted data point values of the second color to enable a user to quickly and easily identify a potential skew condition.

Abstract: A system and method for monitoring the process resource consumption of massive parallel job executions is disclosed. The system uses byte code instrumentation to place sensors in methods that receive job execution requests. Those sensors detect start and end of job executions by the process they are deployed to and extract identification data from detected job execution requests that allow the monitor to identify the job request. This job identification data is used to tag resource utilization measures, which allows the monitor to assign measured resource consumptions to specific job executions. The job identification data that identifies the job execution that triggered the transaction is also used to tag transaction tracing data. The generated job specific measures and transaction traces may be used to identify resource intensive job executions and to identify the root cause of the resource consumption.

Abstract: A system and method for efficiently performing program instrumentation. A processor processes instructions stored in a memory. The processor allocates a memory region for the purpose of creating “random branches” in the computer code utilizing existing memory access instructions. When the processor processes a given instruction, the processor both accesses a first location in the memory region and may determine a condition is satisfied. In response, the processor generates an interrupt. The corresponding interrupt handler may transfer control flow from the computer program to instrumentation code. The condition may include a pointer storing an address pointing to locations within the memory region equals a given address after the point is updated. Alternatively, the condition may include an updated data value stored in a location pointed to by the given address equals a threshold value.

Abstract: Methods and systems for symbolic execution of software under test include the use of parametric states to losslessly represent a group of concrete execution states. Mathematical abstractions may represent differences between execution states and may define a parametric constraint for a parametric state. The parametric states may be usable for symbolic execution to reduce an amount of memory resources consumed and/or reduce a computational load during symbolic execution. Using parametric states, a larger state space and more program behaviors may be testable using symbolic execution.

Abstract: An information handling system, method, and computer-readable media for obfuscating debugging filenames during a software build are described. The system comprises one or more processors, a memory, and one or more program modules stored on the memory and executable by the one or more processors. The one or more program modules compile a source code file of a plurality of source code files into a program, generate a debugging file including debugging information for the program, utilize a one-way deterministic function to generate an obfuscated filename for the debugging file, and include a link to the debugging file in the program, the link including the obfuscated filename.

Abstract: Embodiments of the present invention provide a data synchronization method and apparatus. The method includes: scanning a code to capture a synchronization instruction; replacing the captured synchronization instruction with a trap instruction; and when the code runs to the trap instruction, trapping a code execution right into a distributed shared memory (DSM) unit, where the DSM unit implements a concurrent multi-write protocol, but implements a single-write protocol when executing the synchronization instruction, thereby supporting the concurrent multi-write protocol and solving the synchronization problem caused by the concurrent multi-write protocol.

Abstract: Methods, systems, and articles of manufacture for injecting faults at select execution points of distributed applications are provided herein. A method includes monitoring a run-time state of each of multiple components of a distributed application to determine one or more sequence of events that triggers a fault injection point at one of the multiple components; defining a fault injection scenario in a specification based on said monitoring, wherein said fault injection scenario comprises a description of one or more sequence of events during which an intended fault is to be injected to a target component of the multiple components at one selected event; and executing the fault injection defined in the specification to perform injection of the intended fault during run-time of the distributed application.

Abstract: A method may include detecting a change in a user repository that includes product code and test code. The product code and the test code may correspond to a software program. The change in the user repository may include a change in the product code with a corresponding changed portion of the product code. The method may also include generating, by a test tool, a test code update for the test code. The test code update may be generated based on detecting the change in the user repository and based on the changed portion of the product code. The method may further include communicating a pull request that requests that the user repository add the test code update to the user-managed repository.

Abstract: To provide a technique for generating, at a high speed, a smaller-sized set that satisfies an intended property such as, for example, being pair-wise, and includes many test cases that match a set of existing test cases given as an input, candidates to be used from a set of existing input test cases are determined in the following manner: for some parameters, values to be held by test case candidates are determined; test cases having the determined values, among those included in the set of input test cases, are selected as the candidates. A test case having the highest score among one or more test case candidates generated with the method of the related art and one or more test case candidates selected from the set of input test cases is added to a set of output test cases.

Abstract: The present invention proposes an information interaction testing device and method based on the associated testing case automatic generation. The associated testing case generation module in said device may automatically generate the associated testing case files corresponding to all associated information interactions which can be triggered by said reference information interaction based on the reference information interaction and the predefined rules determined by the application type provided by the system under test. The information interaction testing device and method based on the associated testing case automatic generation disclosed in the present invention have the higher testing speed and the higher testing usability as well as are low-cost.

Abstract: The techniques described herein provide for comparison of tree structures. In some examples, a system according to this disclosure may receive at least a first item including a first tree structure and a second item including a second tree structure. The system may compare the first item and the second item. In particular, in performing the comparison, the system may detect a sub-tree structure type in the first tree structure and in the second tree structure. In some examples, the sub-tree structure type is one of one or more sub-tree structure types that have corresponding matching processes. Once determined, the system described herein may perform the corresponding matching process of the detected sub-tree structure type for the first tree structure and the second tree structure.

Abstract: Some aspects of the disclosure provide a method comprising obtaining machine executable code of an application, the application operable to achieve a set of application states, pre-processing the machine executable code to generate reviewable code, identifying, from the reviewable code, a set of state access instructions configured to invoke or assist in invoking one of the set of application states of the application, the set of state access instructions indicating a first state access instruction configured to invoke a first state of the set of application states and a second state access instruction configured to invoke a second state of the set of application states that is different from the first state, each of the set of state access instructions including an application resource identifier referencing an application and indicating an operation for the application to perform, and storing the set of state access instructions.

Abstract: Processing automation scripts used for testing pages includes running the automation scripts using a processor, searching for an element on the page according to locating information in an instruction of the automation scripts, collecting element-related information of the element in response to finding of the element on the page according to the locating information, and associating the collected element-related information of the element with the instruction of the automation scripts. The element-related information associated with the instruction is saved.

Abstract: A method for storing graphical user interface (GUI) object properties includes: storing GUI object properties for each GUI object for a starting version of an application in an object map; associating the stored GUI object properties for each GUI object with a starting version identifier; determining that at least one of the GUI objects is changed; in response to determining that the at least one GUI object is changed, storing modifications of the GUI object properties for the at least one GUI object in the object map; and associating the modifications of the GUI object properties for the at least one GUI object with a new version identifier of the application. Over time, the object map contains multiple variants of the GUI objects. An automation test tool may use this object map to intelligently select appropriate GUI object version for recognition at script run time.

Abstract: According to one general aspect, a method may include monitoring the execution of at least a portion of a software application. The method may also include collecting subroutine call information regarding a plurality of subroutine calls included by the portion of the software application, wherein one or more of the subroutine calls is selected for detailed data recording. The method may further include pruning, as the software application is being executed, a subroutine call tree to include only the subroutine calls selected for detailed data recording and one or more parent subroutine calls of each subroutine calls selected for detailed data recording.

Abstract: Automating testing of a software product under system resource constraints. One or more SQAs are received and, for each SQA, a confidence level and an importance are received. For one or more system resources, an amount of each system resource available for testing is received. Each amount of system resource available for testing is apportioned to the SQAs, based on the confidence level and the importance of each SQA. Each test in a set of tests is prioritized, based on the number of SQAs associated with the test and any previous results of the test. For each SQA, a subset of the set of tests is selected, based on the test priorities, an expected consumption of system resources by each test, and the apportionment of the system resources to the SQA; the selected subset of tests is executed; and the test results for the selected subset of tests is updated.

Abstract: Technologies are described herein for performing experiments on a software application and identifying optimized experience configurations for the software application. An application experiment system receives an experiment configuration from a developer of the software application. Based on the experiment configuration, the application experiment system determines an experiment strategy and generates a set of experience configurations for testing. Users available to participate in the experiment are identified, and the set of experience configurations are allocated to user computing devices associated with the available users to configure instances of the software application executing on the user computing devices. Experiment data related to the execution of the instances of the software application are collected and analyzed by the application experiment system to identify the optimized experience configuration for the software application.

Abstract: In one embodiment, a computer-implemented method includes receiving a large frame area (LFAREA) request, including a request for a plurality of page frame table entries (PFTEs) to back a plurality of frames in an LFAREA of main memory. Each of the plurality of frames has one of a first size and a second size, where the second size is larger than the first size. The method further includes counting how many frames in the main memory have yet to be initialized and have one of the first size and the second size. A size needed for the plurality of PFTEs is calculated, based at least in part on the counting. A storage area is reserved for the plurality of PFTEs, by a computer processor, where a size of the storage area is the size calculated based at least in part on the counting.

Abstract: Methods for receiving data from a file system and storing it in a flash storage medium, wherein a bad block management process comprises queuing, at a bad block manager, one or more write requests, and receiving data associated with each of the one or more write requests and storing the received data in the bad block manager buffer; and performing cache management of data in the bad block manager buffer and subsequently returning a success status to the file system; and executing the one or more queued write requests in a separate task, wherein the executing comprises programming the received data to the flash storage medium during the bad block management process. Corresponding devices are also provided.

Abstract: A control apparatus includes a control unit configured to perform control in such a manner that in a case where data is to be written into a physical area, which is the unit in which an erasing operation is performed, subjected to processing in a first non-volatile memory in response to a write request and in a case where the end of the data does not match a boundary between physical regions, which are the smallest units in which a writing operation is performed, in the first non-volatile memory, first data having a size smaller than the smallest units is stored in a predetermined temporary storage area, and thereafter in a case where second data specified by the same logical address as the first data is requested to be written, the first data and the second data are combined and written into the physical area subjected to processing.

Abstract: Computer processor hardware receives notification that data stored in a region of storage cells in a non-volatile memory system stores invalid data. In response to the notification, the computer processor hardware marks the region as storing invalid data. The computer processor hardware controls the magnitude of erase dwell time (i.e., the amount of time that one or more cells are set to an erased state) associated with overwriting of the invalid data in the storage cells with replacement data. For example, to re-program respective storage cells, the data manager must erase the storage cells and then program the storage cells with replacement data. The data management logic can control the erase dwell time to be less than a threshold time value to enhance a life of the non-volatile memory system.

Abstract: A method begins by a processing module receiving data for storage and determining whether to partition the data in accordance with a data partitioning dispersed storage scheme. When the data is to be partitioned, the method continues with the processing module partitioning the data into a local data portion and a remaining data portion in accordance with the data partitioning dispersed storage scheme, dispersed storage encoding the local data portion to produce a plurality of local encoded data elements in accordance with dispersed storage encoding parameters, sending the plurality of local encoded data elements to an associated dispersed storage network (DSN) memory for storage therein, and sending the remaining data portion to another DS module.

Abstract: A binary memory image in system is modified. The system may or may not already have virtual memory management enabled. Virtual memory management is enabled and/or modified by inserting a sub-OS virtual memory management layer in the binary memory image. Part of the binary memory image may be compressed to make room for the sub-OS virtual memory management layer.

Abstract: Disclosed herein are systems and methods for paging to a direct segment maintained by a multiplexed TLB. The multiplexed TLB defines a direct segment to directly map a virtual address range to a physical address range, which increases the reach of the multiplexed TLB. A partition code is maintained in the multiplexed TLB to indicate usage of the direct segment by an associated process. A management process, such as a system pager, uses the unused part of the direct segment for storing paged data. As the process continues to use more of the direct segment, paged data stored in the previously unused part of the direct segment can be evicted from memory or moved elsewhere in memory so that the process can continue to use the direct segment.

Abstract: Embodiments of the present invention disclose a data processing method and apparatus. The method includes: first receiving an operation command, then searching, according to a memory address, a Cache memory in a Cache controller for data to be operated, and storing the operation command in a missed command buffer area in the Cache controller when the data to be operated is not found through searching in the Cache memory; then, storing data sent by an external memory in a data buffer area of the Cache controller after sending a read command to the external memory, and finally processing, according to a missed command, the data acquired from the external memory and the data carried in the missed command. The present invention applies to the field of computer systems.

Abstract: Systems and methods for improving caching mechanisms in a storage system are disclosed. The method includes storing data associated with a write input/output (I/O) request at a cache; determining an amount of dirty data stored in the cache, where the dirty data is data in the cache that has not yet been written to a persistent storage location managed by a storage system; determining if the amount of dirty data exceeds a threshold value; determining a cache flush rate based on the amount of dirty data stored at the cache, when the amount of dirty data exceeds the threshold value; and writing data from the cache at the determined cache flush rate to the persistent storage location.

Abstract: A technique for operating a memory system for a node includes interrogating, by a cache, an associated cache directory to determine whether a shared cache line to be installed in the cache is associated with an invalid global state in the cache. The invalid global state specifies that a version of the shared cache line has been intervened off-node. In response to the shared cache line being in the invalid global state the cache spawns a castout invalid global command for the shared cache line. The shared cache line is installed in the cache. A coherence state for the shared cache line is updated in the associated cache directory to indicate the shared cache line is shared.

Abstract: A method includes monitoring a number of read access requests to an address for data stored on a backing store. The method also includes comparing the number of read access requests to a read access threshold. The read access threshold includes a threshold number of read access requests for the address. The method also includes caching data corresponding to a write access request to the address in response to determining that the number of read access requests satisfies the read access threshold.

Abstract: Simplification of run-time program translation for emulating complex processor pipelines is disclosed. Dynamic pipeline states are moved into a cache lookup process leaving a code translation process to deal only with static pipeline states. With dynamic pipeline states removed from the translation process, translation becomes more simple and efficient like that of a non-pipelined processor.

Abstract: A microprocessor includes a first hardware data prefetcher that prefetches data into the microprocessor according to a first algorithm. The microprocessor also includes a second hardware data prefetcher that prefetches data into the microprocessor according to a second algorithm, wherein the first and second algorithms are different. The second prefetcher detects that it is prefetching data into the microprocessor according to the second algorithm in excess of a first predetermined rate and, in response, sends a throttle indication to the first prefetcher. The first prefetcher prefetches data into the microprocessor according to the first algorithm at below a second predetermined rate in response to receiving the throttle indication from the second prefetcher.

Abstract: Patterns of access and/or behavior can be analyzed and persisted for use in pre-fetching data from a physical storage device. In at least some embodiments, data can be aggregated across volumes, instances, users, applications, or other such entities, and that data can be analyzed to attempt to determine patterns for any of those entities. The patterns and/or analysis can be persisted such that the information is not lost in the event of a reboot or other such occurrence. Further, aspects such as load and availability across the network can be analyzed to determine where to send and/or store data that is pre-fetched from disk or other such storage in order to reduce latency while preventing bottlenecks or other such issues with resource availability.

Abstract: Various embodiments for initializing metadata in a computing storage environment by a processor. A Release Generation Number (RGN) is associated with a volume, and an RGN is associated with a metadata track. Upon a release of storage space in the volume, the RGN associated with the volume is incremented. Upon an initialization of the metadata track, the RGN associated with the metadata track is updated to be consistent in generation with the RGN associated with the volume. Upon an access of the metadata track, the RGN of the metadata track is compared against the RGN of the volume, and the metadata track is initialized if a match is not found.

Abstract: A load request is received to retrieve a piece of data from a location in memory and the load request follows one or more store requests in a set of instructions to store a piece of data in the location in memory. One or more possible locations in a cache for a piece of data corresponding to the location in memory is determined. Each possible location of the one or more possible locations in the cache is determined. It is then determined if at least one location of the one or more possible locations contains data to be stored in the location in memory. Data in one location of the at least one location is loaded, the data in the one location is from a store request of the one or more store requests and the store request is closest in the set of instructions to the load request.

Abstract: Provided are techniques for utilization based multi-buffer dynamic adjustment management. A sub-buffer is assigned to each entity of multiple entities. A percentage utilization is determined for each entity. Based on the percentage utilization, for each sub-buffer assigned to each entity, one of one of allocating at least one random data segment from a free list of data segments and removing at least one data segment to change a size of the sub-buffer is performed.

Abstract: According to one embodiment, a memory system includes a first memory, a second memory, a third memory, a data transmission controller, and a processing unit. The second memory is configured to store first management information to manage the first memory. The third memory is configured to be accessed at a speed higher than the second memory. The processing unit causes the data transmission controller to transmit second management information and third management information from the second memory to the third memory in a burst mode before a read process is performed on the first memory. The second management information and the third management information are related to the read process and are included in the first management information. The processing unit performs the read process on the first memory using the second management information and the third management information stored in the third memory.

Abstract: A device for and method of storing page table entries in a first cache. A first page table entry is received having a fragment field that contains address information for a requested first page and at least a second page logically adjacent to the first page. A second page table entry is generated from the first page table entry to be stored with the first page table entry. The second page table entry provides address information for the second page. The second page table entry has a configuration that is compatible with the first cache.

Abstract: At least one example embodiment discloses a method of controlling a nonvolatile memory device including a plurality of blocks, each block including a plurality of physical pages. The method includes receiving a plurality of logical pages associated with a first plurality of logical addresses, respectively, and writing the first plurality of logical pages to the plurality physical addresses according to an ascending order of the logical addresses of the first plurality of logical pages.

Abstract: Systems and methods for virtual machine live migration. An example method may comprise: identifying, by a first computer system executing a virtual machine undergoing live migration to a second computer system, a plurality of stable memory pages comprised by an execution state of the virtual machine, wherein the plurality of stable memory pages comprises memory pages that have not been modified within a defined period of time; transmitting the plurality of stable memory pages to the second computer system; determining that an amount of memory comprised by a plurality of unstable memory pages is below a threshold value, wherein the plurality of unstable memory pages comprises memory pages that have been modified within the defined period of time; and transmitting the plurality of unstable memory pages to the second computer system.

Abstract: An apparatus for managing a memory including a working region and a compression region is provided. The working region stores uncompressed data. The apparatus includes a management module and a compression/decompression module. According to a recent used index and a compression ratio of a set of target data stored in the working region, the management module determines whether to transfer the target data to the compression region. When the management module determines to transfer the target data to the compression region, the compression/decompression module compresses the target data and transfers the compressed target data to the compression region.

Abstract: A method of processor operation using an integrated circuit (IC) can include loading encrypted program code into the IC through a configuration port of the IC and decrypting the encrypted program code using configuration circuitry of the IC. Decryption of the encrypted program code can result in decrypted program code which can be provided to a target destination.

Abstract: A mobile electronic device (1) comprises a data store (11), a transceiver (13) for wireless data exchange with another electronic device (2), and a processor (12) connected to the transceiver (13) and the data store (11). The processor (12) is programmed to implement a virtual card reader (121) which is configured to communicate with a smart card module (122, 20) that is arranged in the mobile electronic device (1). The virtual card reader (121) is implemented as a program running on processor (12). At least one smart card module (122) is a virtual card implemented as a program running on the processor (12). The virtual card reader (121) makes it possible to access smart card modules which are implemented locally in the mobile electronic device as a virtual card, thereby enabling access to a smart card module, without requiring an external reader device.

Abstract: An information processing apparatus is configured to make access to a storage device via a first path. A virtualization control apparatus is configured to control access to a virtual storage device via a second path, where the virtual storage device is provided by virtualizing the storage device. The virtualization control apparatus sends an identifier of the storage device in response to a query from the information processing apparatus which requests information about a storage space that is accessible via the second path. The information processing apparatus incorporates the second path as an inactive standby path when the identifier received as a response to the query matches with an identifier of the storage device accessible via the first path.

Abstract: Method and apparatus for handling page protection faults in combination particularly with the dynamic conversion of binary code executable by a one computing platform into binary code executed instead by another computing platform. In one exemplary aspect, a page protection fault handling unit is used to detect memory accesses, to check page protection information relevant to the detected access by examining the contents of a page descriptor store, and to selectively allow the access or pass on page protection fault information in accordance with the page protection information.

Abstract: Methods for extensible device drivers and an extensible device driver Self-Service Terminal (SST) are provided. A SST includes an operating system (OS) having a communication port and an application having low-level commands that are specific to a hardware device, which is coupled to the SST; the low-level commands directly capable of being executed by the device. The communication port is operable to relay information and commands (including the low-level commands) between the device and the application. The application directly controls the device, with the low-level commands, and the low-level commands unrecognized by the OS.

Abstract: All steps required to create and operate a peripheral device of an electronic device can be performed without the need to plug in the peripheral device to the electronic device. Setup information for a peripheral device is extracted, modified and stored to fit to a physical existent peripheral device. The modified setup information is used to create a data structure that is passed to the peripheral bus driver. As the data structure contains a hot plug notification the reception causes the peripheral bus driver to initiate the setup process for the peripheral device. As the data structure is built from setup information that is available at the electronic device no additional user action is required. The invention also allows the creation of a device object for existing signed driver packets that may not be altered.