Abstract: The present disclosure relates generally to a dedicated memory structure (that is, hardware device) holding data for detecting available worker thread(s) and informing available worker thread(s) of task(s) to execute.

Abstract: In one embodiment, a computing system includes a cache having one or more memories and a cache manager. The cache manager is able to receive a request to write data to a first portion of the cache, write the data to the first portion of the cache, update a first map corresponding to the first portion of the cache, receive a request to read data from the first portion of the cache, read from a storage communicatively linked to the computing system data according to the first map, and update a second map corresponding to the first portion of the cache. The cache manager may also be able to write data to the storage according to the first map.

Abstract: A method of implementing a shared cache between a plurality of virtual machines may include maintaining the plurality of virtual machines on one or more physical machines. Each of the plurality of virtual machines may include a private cache. The method may also include determining portions of the private caches that are idle and maintaining a shared cache that comprises the portions of the private caches that are idle. The method may additionally include storing data associated with the plurality of virtual machines in the shared cache and load balancing use of the shared cache between the plurality of virtual machines.

Abstract: Efficient techniques are described for reducing cache pollution by use of a prefetch logic that recognizes exits from software loops or function returns to cancel any pending prefetch request operations. The prefetch logic includes a loop data address monitor to determine a data access stride based on repeated execution of a memory access instruction in a program loop. Data prefetch logic then speculatively issues prefetch requests according to the data access stride. A stop prefetch circuit is used to cancel pending prefetch requests in response to an identified loop exit. The prefetch logic may also recognize a return from a called function and cancel any pending prefetch request operations associated with the called function. When prefetch requests are canceled, demand requests, such as based on load instructions, are not canceled. This approach to reduce cache pollution uses program flow information to throttle data cache prefetching.

Abstract: A file reading method, storage device, and reading system, relating to the field of file reading. The method includes receiving, by a storage device, a first read request sent by a client, where to-be-read data requested by the first read request is a part of the file; reading, from a cache, data that is of the to-be-read data and located in the cache, and reading, from a first storage medium, data that is of the to-be-read data and not located in the cache; and pre-reading, from the first storage medium, data in at least one of the containers, and storing the pre-read data into the cache, where the pre-read container includes at least one unread file segment of the file.

Abstract: Cache lines of a data cache may be assigned to a specific page type or color. In addition, the computing system may monitor when a cache line assigned to the specific page color is allocated in the cache. As each cache line assigned to a particular page color is allocated, the computing system may compare a respective index associated with each of the cache lines to determine maximum and minimum indices for that page color. These indices define a block of the cache that stores the data assigned to the page color. Thus, when the data of a page color is evicted from the cache, instead of searching the entire cache to locate the cache lines, the computing system uses the maximum and minimum indices as upper and lower bounds to reduce the portion of the cache that is searched.

Abstract: Techniques are provided for managing caches in a system with multiple caches that may contain different copies of the same data item. Specifically, techniques are provided for coordinating the write-to-disk operations performed on such data items to ensure that older versions of the data item are not written over newer versions, and to reduce the amount of processing required to recover after a failure. Various approaches are provided in which a master is used to coordinate with the multiple caches to cause a data item to be written to persistent storage. Techniques are also provided for transferring data items and locks associated with the data items from one node to another.

Abstract: A method is used in managing global caches in data storage systems. A cache entry of a global cache of a data storage system is accessed upon receiving a request to perform an I/O operation on a storage object. The cache entry is associated with the storage object. Accessing the cache entry includes holding a reference to the cache entry. A determination is made as to whether the I/O operation is associated with a sequential access. Based on the determination, releasing the reference to the cache entry is delayed.

Abstract: A data manager may include a data opaque interface configured to provide, to an arbitrarily selected page-oriented access method, interface access to page data storage that includes latch-free access to the page data storage. In another aspect, a swap operation may be initiated, of a portion of a first page in cache layer storage to a location in secondary storage, based on initiating a prepending of a partial swap delta record to a page state associated with the first page, the partial swap delta record including a main memory address indicating a storage location of a flush delta record that indicates a location in secondary storage of a missing part of the first page. In another aspect, a page manager may initiate a flush operation of a first page in cache layer storage to a location in secondary storage, based on atomic operations with flush delta records.

Abstract: In general, in one aspect, the invention relates to a method for managing virtual memory (VM). The method includes receiving, from an application, a first access request comprising a first VM address identifying a VM location, obtaining a current VM location version value for the VM location, obtaining a first submitted VM location version value from the first VM address, and in response to a determination that the current VM location version value and the first submitted VM location version value match: servicing the first access request using the first VM address.

Abstract: A method for increasing storage space in a system containing a block data storage device, a memory, and a processor is provided. Generally, the processor is configured by the memory to tag metadata of a data block of the block storage device indicating the block as free, used, or semifree. The free tag indicates the data block is available to the system for storing data when needed, the used tag indicates the data block contains application data, and the semifree tag indicates the data block contains cache data and is available to the system for storing application data type if no blocks marked with the free tag are available to the system.

Abstract: An apparatus, system, and method are disclosed for solid-state storage as cache for high-capacity, non-volatile storage. The apparatus, system, and method are provided with a plurality of modules including a cache front-end module and a cache back-end module. The cache front-end module manages data transfers associated with a storage request. The data transfers between a requesting device and solid-state storage function as cache for one or more HCNV storage devices, and the data transfers may include one or more of data, metadata, and metadata indexes. The solid-state storage may include an array of non-volatile, solid-state data storage elements. The cache back-end module manages data transfers between the solid-state storage and the one or more HCNV storage devices.

Abstract: In one aspect, a method includes receiving a request to provision a resource in a data storage system, determining whether any one of a set of quotas will be exceeded if the resource is provisioned, denying the request to provision the resource if any one of a set of quotas is exceeded and enabling the resource to be provisioned if none of the set of quotas is exceeded.

Abstract: A method for controlling access of a processor to a resource, wherein the processor has an instruction set including a virtualization extension, may include executing a resource access instruction by the processor using the virtualization extension, whereby the resource access instruction conveys a virtual address (VA) and a virtual machine identifier. The method may also include translating the virtual address to a physical address based on the virtual machine identifier, and looking-up an access control rule table using the physical address as a search key. Each entry of the rule table includes a virtual machine identifier. The method further includes controlling access to the resource based on the output of the rule table and a match between the virtual machine identifier returned by the table and the virtual machine identifier conveyed in the resource access instruction.

Abstract: A communication apparatus and method based on shared memory are disclosed. The communication apparatus based on shared memory includes a data publication unit, a data subscription unit, and an access control unit. The data publication unit publishes data stored in a shared memory unit. The data subscription unit subscribes to the data stored in the shared memory unit. The access control unit controls the access of the data publication unit and the data subscription unit to the shared memory unit in response to locking operation instructions of the data publication unit and the data subscription unit with respect to the shared memory unit.

Abstract: A system includes a hard disk controller and a read/write channel. The hard disk controller is configured to transmit a first gate signal, a write clock signal, mode selection data, and first data to be stored on a storage medium, and receive a read clock signal and second data stored on the storage medium. The read/write channel is configured to receive the first gate signal, the write clock signal, the mode selection data, and the first data, transmit the read clock signal, transfer the second data from the storage medium to the hard disk controller based on the mode selection data and the read clock signal, and transfer the first data from the hard disk controller to the storage medium based on the mode selection data and the write clock signal.

Abstract: A memory location determining device determines memory locations for storing M pieces of compressed data each of which is compressed from one of M pieces of N-bit data. For each piece of compressed data, the memory location determining device performs a first arithmetic operation on an address value of a corresponding piece of N-bit data, and determines to store X bits of the piece of compressed data and a flag indicating whether or not the piece of compressed data exceeds X bits at a location indicated by the result value of the first arithmetic operation. When the piece of compressed data exceeds X bits, the memory location determining device further performs a second arithmetic operation on the address value of the corresponding piece of N-bit data and determines to store one or more bits of the piece of compressed data other than the X bits.

Abstract: Driver shimming techniques are described. In one or more implementations, an identification is made as to which interfaces and callbacks are utilized by a shim obtained for a driver of a computing device. The identified interfaces and callbacks are wrapped by the shim of the computing device such that calls to the wrapped interfaces and callbacks are intercepted by the shim.

Abstract: Data storage system and management method thereof are provided. The method, adopted by a data storage device coupled to a host device via a bus, includes: determining the data storage device requires to use a first temporary memory of the host device to access data in a second temporary memory of the data storage device; based on the determination, issuing a Device Bus Master (DBM) request message via the bus to the host to request for a right to control data transfer on the bus; in response to the DBM request message, detecting the bus to determine whether to receive a first DBM acknowledgement message from the host device; and if the first DBM acknowledgement message is received, then accessing the first temporary memory of the host device.

Abstract: This application discusses a system that can include a master device and a slave device coupled to the master device via an audio jack connector. In an example, the master device and the slave device can be configured to exchange information via a single conductive path of the audio jack connector using a digital communication protocol. The single conductive path can be configured to conduct audio signals of an audio transducer and the slave device can include a depletion-mode transistor to complete a circuit including the audio transducer and the single conductive path in a first state, and to isolate the audio transducer from the single conductive path in a second state.

Abstract: To accommodate multiple masters over bus architectures supporting a single master device, a mechanism is provided for an inactive master device to trigger an IRQ signal over a shared, single line IRQ bus. A current master then polls the other inactive master devices over a shared data bus to ascertain which inactive master device is asserting the IRQ signal. Upon identifying the asserting inactive master device, the current master device grants control of the data bus to the new master device, thereby making the inactive master the new active master device.

Abstract: Systems and methods for frequency control on a bus through superposition are disclosed. In one embodiment, instead of adding pins or increasing the operating frequency of the bus, three signals are placed on lines within the bus using superposition. In this fashion, three bits may be sent over two conductors, effectively obviating the need for an additional pin and effectively increasing the frequency of bit transmission without having to increase the clock speed.

Abstract: A multiprocessor computer system includes a plurality of processor nodes and at least a three-tier hierarchical network interconnecting the processor nodes. The hierarchical network includes a plurality of routers interconnected such that each router is connected to a subset of the plurality of processor nodes; the plurality of routers are arranged in a hierarchy of n?3 tiers (T1, . . . , Tn); the plurality of routers are partitioned into disjoint groups at the first tier T1, the groups at tier Ti being partitioned into disjoint groups (of complete Ti groups) at the next tier Ti+1 and a top tier Tn including a single group containing all of the plurality of routers; and for all tiers 1?i?n, each tier-Ti?1 subgroup within a tier Ti group is connected by at least one link to all other tier-Ti?1 subgroups within the same tier Ti group.

Abstract: A network switch, based on the PCI Express protocol, is disclosed. The switch is in communication with a processor, local memory and includes a plurality of non-transparent bridges and, optionally transparent bridges, leading to PCI Express endpoints. By configuring the non-transparent bridges appropriately, the network switch can facilitate simultaneous communication between any two sets of servers without needing to store any data in the local memory or FIFO resources of the switch. For example, the network switch may configure the non-transparent bridges so as to have access to the physical memory of every server attached to it. It can then move data from the memory of any server to the memory of any other server.

Abstract: In accordance with embodiments of the present disclosure, a system may include a chassis, one or more chassis management controllers housed in the chassis, and a switch management controller. The chassis may be configured to receive a plurality of modular information handling systems. The one or more chassis management controllers may be configured to receive a storage management command, encapsulate the storage management command in a first datagram, and communicate the first datagram to a switch management controller housed in the chassis. The switch management controller may be configured to extract the storage management command from the first datagram, identify a storage controller associated with the storage management command, and communicate an input/output control request to the storage controller based on the storage management command.

Abstract: PCI Express is a Bus or I/O interconnect standard for use inside the computer or embedded system enabling faster data transfers to and from peripheral devices. The standard is still evolving but has achieved a degree of stability such that other applications can be implemented using PCIE as basis. A PCIE based interconnect scheme to enable switching and inter-connection between multiple PCIE enabled systems each having its own PCIE root complex, such that the scalability of PCIE architecture can be applied to enable data transport between connected systems to form a cluster of systems, is proposed. These connected systems can be any computing, control, storage or embedded system. The scalability of the interconnect will allow the cluster to grow the bandwidth between the systems as they become necessary without changing to a different connection architecture.

Abstract: An on-package interface. A first set of single-ended transmitter circuits on a first die. The transmitter circuits are impedance matched and have no equalization. A first set of single-ended receiver circuits on a second die. The receiver circuits have no termination and no equalization. A plurality of conductive lines couple the first set of transmitter circuits and the first set of receiver circuits. The lengths of the plurality of conductive lines are matched.

Abstract: A system and method for reminding a user to dock a mobile device in a docking apparatus within a vehicle are provided. A docking apparatus includes: one or more sensors for determining whether an object is present in the docking apparatus; and at least one of speakers, a vibration mechanism, and one or more display indicators for reminding a user to place the mobile device in the docking apparatus when the one or more sensors determine that an object is not present in the docking apparatus. A system includes the docking apparatus and a mobile device. The method includes receiving an indication that the vehicle ignition is turned on; determining whether the mobile device is in a docking apparatus; and reminding the user to dock the mobile device in the docking apparatus.

Abstract: Methods and hardware data structures are provided for tracking ordered transactions in a multi-transactional hardware design using a counter and an indexed table. The data structure includes a counter that keeps track of the number of in-flight transactions; a table that keeps track of the age of each of the in-flight transactions using the counter; and control logic that verifies a transaction response has been received in the correct order (e.g. corresponds to the oldest in-flight transaction) based on the age information in the table.

Abstract: Disclosed is a digital communication control system having a serial bus buffer that includes a primary interface adapted to support serial communication over a primary bus, a buffered interface adapted to support serial communication over a buffered bus, and a controller coupled between the primary bus and the buffered bus. The primary bus is coupled to a first device and at least one second device and the buffered bus is coupled to at least one third device. The controller is adapted to receive a first data signal and a clock signal at the primary interface and replicate the first data signal and the clock signal at the buffered interface.

Abstract: A method for integrating interactions in an address book application that includes managing a plurality of contacts of an electronic address book, identifying a contact with a relationship to an interaction service, collecting dynamic information corresponding to the identified contact, and facilitating an interaction using the dynamic information.

Abstract: Some embodiments provide an optimized multi-hit caching technique that minimizes the performance impact associated with caching of long-tail content while retaining much of the efficiency and minimal overhead associated with first hit caching in determining when to cache content. The optimized multi-hit caching utilizes a modified bloom filter implementation that performs flushing and state rolling to delete indices representing stale content from a bit array used to track hit counts without affecting identification of other content that may be represented with indices overlapping with those representing the stale content. Specifically, a copy of the bit array is stored prior to flushing the bit array so as to avoid losing track of previously requested and cached content when flushing the bit arrays and the flushing is performed to remove the bit indices representing stale content from the bit array and to minimize the possibility of a false positive.

Abstract: A system includes a collection of central processing units, where each central processing unit is connected to at least one other central processing unit and a root path into at least 10 Tera Bytes of solid state memory resources. Each central processing unit directly accesses solid state memory resources without swapping solid state memory contents into main memory.

Abstract: Storage apparatus (20) includes a memory (30) and an encryption processor (28), which is configured to receive and encrypt data transmitted from one or more computers (24) for storage in the memory. A one-way link (32) couples the encryption processor to the memory so as to enable the encryption processor to write the encrypted data to the memory but not to read from the memory.

Abstract: A vector processor includes a plurality of execution units arranged in parallel, a register file, and a plurality of load units. The register file includes a plurality of registers coupled to the execution units. Each of the load units is configured to load, in a single transaction, a plurality of the registers with data retrieved from memory. The loaded registers corresponding to different execution units. Each of the load units is configured to distribute the data to the registers in accordance with an instruction selectable distribution. The instruction selectable distribution specifies one of plurality of distributions. Each of the distributions specifies a data sequence that differs from the sequence in which the data is stored in memory.

Abstract: A pairwise distance computation transforms first and second signals using an absolute distance preserving mapping, such that a k-norm distance between the first mapped signal and the second mapped signal represents an absolute distance between the first signal and the second signal. The absolute distance preserving mapping maps an element of a first or a second signal to a vector having a size equal to a cardinality of the finite alphabet of the signals. The absolute distance preserving mapping determines a position N of the element in an ordered sequence of symbols of the finite alphabet and determines values for each of N elements of the vector as a fractional power 1/k of positive increments in the finite alphabet. The values for subsequent elements of the vector are determined as zero.

Abstract: A data processing method is disclosed, including: twiddling input data, so as to obtain twiddled data; pre-rotating the twiddled data by using a symmetric rotate factor, where the rotate factor is a·W4L2p+1, p=0, . . . , L/2?1, and a is a constant; performing a Fast Fourier (Fast Fourier Transform, FFT) transform of L/2 point on the pre-rotated data, where L is the length of the input data; post-rotating the data that has undergone the FFT transform by using a symmetric rotate factor, where the rotate factor is b·W4L2q+1, q=0, . . . , L/2?1, and b is a constant; and obtaining output data.

Abstract: A first food ingredient may be received. The first food ingredient may comprise a first plurality of chemical constituents. A plurality of candidate food ingredient substitutes may be received. Each candidate food ingredient substitute may comprise a second plurality of chemical constituents. For each of the plurality of candidate food ingredient substitutes, a quantity of the second plurality of chemical constituents that match the first plurality of chemical constituents may be determined. One or more food ingredient substitutes may be identified based on at least the quantity of the second plurality of chemical constituents that match the first plurality of chemical constituents.

Abstract: Active content is deterministically rendered in a stable format that is independent of any particular targeted environment, which the active content may subsequently be rendered to. Environmental and dynamic dependencies are removed from a specification associated with the active content for purposes of producing a stable and consistent specification for the active content. The stable and static specification is used to subsequently render the active content into the stable format for any targeted or desired environment.

Abstract: The invention relates to electronic document processing. Embodiments of the present invention relate to a method and apparatus for copying a text format pattern. In one embodiment of the present invention there is a method for copying a text format pattern, including: receiving a selection of a sample object from a user, the sample object including multiple sample paragraphs of which at least two sample paragraphs have different format patterns; receiving a format copying instruction of from the user, the format copying instruction indicating reformatting a target object with the format pattern of the sample object, where the target object contains multiple target paragraphs; determining a corresponding relationship of the format pattern of the sample paragraphs with the target paragraphs; and applying the format pattern of the sample paragraphs to the target paragraphs in accordance with the corresponding relationship.

Abstract: An improved mechanism is provided for presenting and navigating bookmarks in a set of electronic reading material (ERM). In one implementation, when a portion of an ERM is displayed, a graphical element, which represents the contents of the ERM, is also displayed. A current location indicator and one or more bookmark indicators are further displayed on or within proximity of the graphical element to show where, within the ERM, the currently displayed portion is located and where bookmarks are located. This provides a useful graphical overview to a user. In addition, the mechanism may facilitate navigation to a bookmark by enabling a user to select one of the bookmark indicators to navigate directly to that bookmark. The mechanism may also enable a user to navigate sequentially from bookmark to bookmark using a previous bookmark control and/or a next bookmark control. With these capabilities, bookmark presentation and navigation are improved.

Abstract: Systems and methods for displaying, responsive to user-designation of a desired set of media object previews for view, the previews of the media objects of an electronic content work within a single view on a display of a computer system. The view presents those previews of the media objects of the electronic content work appropriate for one or more target rendering environments, according to user-specified display criteria. The previews may be images of the media objects captured when the subject media objects were rendered in a simulated target rendering environment. In some cases, these may be images of the media objects captured with the media objects were in desired states during rendering thereof in the simulated target rendering environment. The view may present the previews according to user-defined size criteria.

Abstract: Systems and methods are presented that process documents, identify fonts being used to reproduce the documents, and identify conflicts based on the identified fonts. The systems and methods may identify a font associated with a document, identify a conflict between the font and another font, determine a substitute font for the document, and then modify information of the substitute font and the document based on the conflict to prevent the identified conflict from causing the document to be incorrectly processed. The systems and methods may then allow the document to be further processed based on the modified information.

Abstract: Various embodiments utilize page scripting and parsing to identify the target destination of a hyperlink and provide a visual indication of the destination to the user without causing redirection to the target destination. In some embodiments, hyperlink color, highlighting, or icons are used to indicate the destination. Particular colors and/or icons selected to indicate the destination can, in some embodiments, be selected based on the domain hosting the target destination. In at least some embodiments, the destination of a link is determined by the page script run by a web browser on a user's device, while in other embodiments, information is transmitted to a web request handler on the server hosting the web site to determine the destination.

Abstract: A method of normalizing an extensible markup language schema definition (XSD) schema type may be used in encoding and/or decoding an extensible markup language (XML) document. The method may include receiving an XSD schema type including a state. The method may also include analyzing the state for a conflict. The conflict may include an event resulting from a local production and one or more events resulting from a foreign production. When the conflict is detected, the method may include ignoring the one or more events resulting from the foreign production and generating a modified grammar for the state including the event resulting from the local production.

Abstract: A method for generating a Simple Object Access Protocol (SOAP) message in XML during execution of a process in a SOA-based process engine apparatus and a corresponding process engine apparatus. The method includes: generating and storing an XML character string containing a fixed SOAP message skeleton; generating and storing an XML character string containing an instance-constant variable; generating an XML character string containing a dynamic variable; and concatenating the XML character string containing the fixed SOAP message skeleton and the XML character string containing the instance-constant variable as previously stored and the XML character string containing the dynamic variable by a character string concatenating operation to generate a SOAP message. A process engine apparatus including a message analyzer unit, a message pre-composer unit, a character string depository, and a message composer unit is also provided.

Abstract: Techniques are described for optimizing and consolidating style files for formatted pages of data such as web pages. Styles may be consolidated through the identification of common rules shared by multiple styles, and the common rules may be incorporated into a common style that has the style mappings and/or namespace of the source styles. Consolidation may enable minimal style information to be sent in response to a page request, the style information corresponding to a requesting browser type and/or version. Embodiments may also provide for global constants in style rules, with global constant resolution performed dynamically at runtime. Embodiments may also support file splitting for optimal browser performance, with the style file splitting performed dynamically at runtime.

Abstract: The technology disclosed relates to systems and methods for providing a CSS parser engineered for runtime usage to improve the maintainability of code that displays data to users. The technology disclosed also improves the performance and consistency of the code that delivers a user's experience.

Abstract: Resolving conflicting changes to structured data files. A method includes for a structured data file which has both a generic structure and dialects built on top of the generic structure, for which conflicting changes have been made, and where an original version of the structured data, a first version of the structured data and a second version of the structured data exist, determining a dialect of the structured data. The method further includes, based on the determined dialect performing at least one of merge or diff operations on the original version of the structured data, the first version of the structured data and the second version of the structured data.

Abstract: Annotating web content, in one aspect, may include detecting a request to navigate to a web site for content on a web browser. A component such as a web browser plugin, extension or the like transmits a uniform resource locator (URL) associated with the web site to a computer-implemented service that stores annotations to the content separate from the web site that is providing the content, and receives from the computer-implemented service one or more annotations to the content. The web browser plugin or the like renders the one or more annotations within the content from the web site. The content rendered with the annotations may be displayed within a display window of the web browser.