Patents Issued in January 3, 2017
  • Patent number: 9535668
    Abstract: A method, device and computer-readable storage medium for setting up runtime environment for an application are provided in the present disclosure. The method includes the following steps: determining whether the application is installed; when the application is determined being installed, creating a process of the application according to user's instruction; and providing an application platform interface for developing the application.
    Type: Grant
    Filed: July 4, 2014
    Date of Patent: January 3, 2017
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Qiang Tu, Wei Zhou, Wei-Yi Zeng
  • Patent number: 9535669
    Abstract: Systems and methods for dynamic development and/or deployment of computing applications including a development framework, a visual design subsystem, and a deployment subsystem, where at runtime the deployment subsystem is operable to dynamically deploy a computing application realized by a blueprint by sending a request at runtime for graphs and components instantiated by the blueprint.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: January 3, 2017
    Assignee: IMAGINE COMMUNICATIONS CORP.
    Inventors: Brick Eksten, Craig White, Scott Palmer, Frank Belme, Stephen Li, Cristian Saceanu
  • Patent number: 9535670
    Abstract: Embodiments of the present invention address deficiencies of the art in respect to modeling tools and provide a method, system and computer program product for extensible context based user interface simplification of modeling components for a modeling tool. In an embodiment of the invention, a method for extensible context based user interface simplification can be provided for a model driven development tool. The method can include detecting a context change to a new context in a model driven development tool, locating tool items mapped to the new context, and displaying the located tool items in the model driven development tool.
    Type: Grant
    Filed: November 22, 2015
    Date of Patent: January 3, 2017
    Assignee: International Business Machines Corporation
    Inventors: Maneesh Goyal, Christian M. Vogt
  • Patent number: 9535671
    Abstract: Parallelism of processing can be improved while existing software resources are utilized substantially as they are. A data processing apparatus includes a plurality of processing units configured to process packets each including data and extended identification information added to the data, the extended identification information including identification information for identifying the data and instruction information indicating one or more processing instructions to the data, each processing unit in the plurality of processing units including: an input/output unit configured to obtain, in the packets, only a packet whose address information indicates said each processing unit in the plurality of processing units, the address information determined in accordance with the extended identification information; and an operation unit configured to execute the processing instruction in the packet obtained by the input/output unit.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: January 3, 2017
    Assignee: Mush-A Co., Ltd.
    Inventor: Mitsuru Mushano
  • Patent number: 9535672
    Abstract: A method and compiling device are provided for compiling a software application to be executed on a virtual machine of a physical platform. The software application originally is in the form of a set of codes to be compiled. The method includes a phase of selectively compiling the set of codes to be compiled, outputting a compiled application including a first application part which is executed by the virtual machine using commands from the virtual machine, and a second application part including binary commands which can be executed directly on the physical platform.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: January 3, 2017
    Assignee: Google Inc.
    Inventors: Gilbert Cabillic, Jean-Philippe Lesot
  • Patent number: 9535673
    Abstract: A method for significantly reducing compilation time of an application program is provided for compiling the program using profile-directed feedback (PDF). The method applies an additional analysis process between a training run of the application program and a whole program compilation of the application. This analysis process examines a PDF profile file(s) produced during the training run and aggregates data from the PDF file to determine a maximum block counter associated with each source file of the application. Only those source files having maximum block counters in a specified top percent of all the source files of the application have their fat binaries included in the whole program compilation.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: January 3, 2017
    Assignee: International Business Machines Corporation
    Inventors: Shimin Cui, William G. O'Farrell, Graham K. Yiu
  • Patent number: 9535674
    Abstract: The method administers an enterprise computing system that includes a plurality of user mobile computing devices. The method includes selecting a pre-written application for inclusion in a menu of enterprise applications downloadable to a user computing device, allowing the user computing device to download the pre-written application, and interposing an application wrapper on the pre-written application before allowing the user computing device to download the pre-written application, the application wrapper being configured to control an operation of the pre-written application.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: January 3, 2017
    Assignee: BMC SOFTWARE, INC.
    Inventors: Adam Charles Cooper, George Thucydides, Geoffrey Ross Mair, Caleb Peter Buxton
  • Patent number: 9535675
    Abstract: Techniques for providing enrollment services for various types of electronic devices in a communication network is disclosed. The electronic devices may include devices associated with a user and headless devices not associated with any user. In certain embodiments, a device enrollment system is disclosed that controls the authentication and enrollment of both user devices and headless devices within a communication network. The device enrollment system detects a particular device within a communication network, identifies a type of enrollment policy to be applied to the device based on a type of the device, applies a set of enrollment rules to the device in accordance with the enrollment policy and enrolls the device if the device satisfies one or more criteria specified by the enrollment rules.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: January 3, 2017
    Assignee: Oracle International Corporation
    Inventors: Mohamad Raja Gani Mohamad Abdul, Bhagavati Kumar Jayanti Venkata, Harsh Maheshwari, Nagaraj Pattar, Ravi Verma
  • Patent number: 9535676
    Abstract: The present disclosure relates to remote feature activation. In an embodiment, a device may be manufactured having firmware configured to implement multiple unique features on the device. Features may be enabled and disabled on the device later or at a remote location. Enabled features may allow the device to perform corresponding functions, and disabled features may not allow the device to perform corresponding functions. Remote feature activation may include exchanging security information between an activation entity and the device.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: January 3, 2017
    Assignee: Seagate Technology LLC
    Inventors: Monty A Forehand, Manuel A. Offenberg, Anthony R Duran, Nino Wicaksono, David R Kaiser
  • Patent number: 9535677
    Abstract: A mechanism is provided for software discovery in an environment with heterogeneous machine groups may be provided. A group comprising computing systems that have similar software program installations is defined. A first scan procedure is performed by scanning each computing system of the group using a first software signature catalogue to identify installed programs. Software signatures of identified installed programs are added to a base installation software catalogue. A second scan procedure is performed by scanning the group of computing systems using the base installation software catalogue to identify installed software programs.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: January 3, 2017
    Assignee: International Business Machines Corporation
    Inventors: Marcin Gierlak, Bartlomiej T. Malecki, Slawomir T. Mezyk, Michal Paluch
  • Patent number: 9535678
    Abstract: Object serialization is used to communicate references regarding shim objects. Shim objects are instantiated on one or more ranks of a distributed software application. The shim objects store a registration object in a distributed object cache for each rank. The registration object includes a unique identifier for a distributed array object and a reference to a local portion of the distributed array. The shim objects are serialized for communication of the stored references from a master rank of the distributed application to one or more worker ranks of the distributed application. Upon serializing the shim objects, the shim object's stored references are communicated from the distributed object cache for that rank to the one or more worker ranks of the distributed application. The shim objects are subsequently removed so that references to the underlying distributed array object are also removed, and memory previously allocated to the unique identifier is recoverable.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: January 3, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Richard A. Warren, Sudarshan Raghunathan, Adam P. Jenkins
  • Patent number: 9535679
    Abstract: A deployment server can include a profile data store, a generic application data store, and an optimizer. The profile data store can contain a plurality of attributes for devices and associate different optimization parameters or optimization routines to each of the stored attributes. The generic application data store can contain at least one generic application written in a device independent fashion. The optimizer can receive application requests from an assortment of different requesting devices and can dynamically generate device-specific applications responsive to received requests. For each requesting device, the optimizer can determine attributes of a requesting device, utilize the profile data store to identify optimization parameters or optimization routines for the requesting device, and generate a device-specific application based upon data from the profile data store and based upon a generic application retrieved from the generic application data store.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: January 3, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Fernando Concha, David E. Reich
  • Patent number: 9535680
    Abstract: A system, method, and computer program product for a flashless optical network unit (ONU) in a Passive Optical Network (PON) are provided herein. The method includes the steps of synchronizing on a downstream signal of an optical line terminal (OLT), receiving a first software from the OLT for its operation on a reserved downstream channel of the OLT, and storing the received first software in a volatile memory. The ONU does not pre-store the first software in a non-volatile memory.
    Type: Grant
    Filed: March 29, 2013
    Date of Patent: January 3, 2017
    Assignee: Broadcom Corporation
    Inventors: Eli Elmoalem, David Avishai, Assaf Koren
  • Patent number: 9535681
    Abstract: Systems and methods are described that comprise receiving at a platform device data of client devices. The device data is stored in device files. The device files are replicated at multiple distribution platforms. The device file corresponding to each client device is downloaded to the device, and the downloading is performed from a distribution platform geographically closest to the client device. The downloaded device file is evaluated with the device data on the client device and a determination is made when a new device file is available for the client device. The new device file is downloaded from an update server when it is determined that the new device data file is available.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: January 3, 2017
    Assignee: QUALCOMM Incorporated
    Inventor: Adrian Chan
  • Patent number: 9535682
    Abstract: A method of determining whether a dialogue is displayable includes recording a previous software use state in a terminal which has been responded to an input operation to the terminal, comparing the recorded previous software use state with a current software use state in the terminal, and displaying an input operation dialogue according to a result of the comparison.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: January 3, 2017
    Assignee: HITACHI, LTD.
    Inventor: Takafumi Inoue
  • Patent number: 9535683
    Abstract: Notification of registration of a mobile device with femto coverage for firmware content management is provided. An attachment component that administers location of mobile devices or a femto access point (AP) conveys a notification to a network platform that manages firmware content updates when a mobile device for which firmware update is available hands off from wireless macro coverage onto femto coverage through the femto AP. The notification is triggered in response to firmware update notification received by the attachment component, or an update flag received by the femto AP. Upon reception of the notification, to exploit wireline bandwidth, the network platform delivers firmware content(s) update through backhaul link to the femto AP to which the mobile device is registered. Femto APs not provisioned to serve a mobile device can be incentivized to authorize the mobile device for coverage and thus facilitate firmware updates.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: January 3, 2017
    Assignee: AT&T Mobility II LLC
    Inventors: John Lewis, James Payne
  • Patent number: 9535684
    Abstract: An approach to managing software components in a datacenter having virtualized components includes maintaining a suitable data construct for representing the virtualized elements. In embodiments, virtualized elements include knowledge relating to instantiations of virtual machines. Management of software components includes traversing a data representation of the datacenter, and assessing the compatibility of the software component with components in the datacenter that relate to the target of the software component.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: January 3, 2017
    Assignee: VMware, Inc.
    Inventors: Daniel Kerry Hiltgen, Christopher P. Devine
  • Patent number: 9535685
    Abstract: A technique identifies a version of a software application for installation on computerized equipment. The technique involves receiving an electronic communication containing a software version database which identifies different versions of the software application. The technique further involves performing an update assessment operation based on the software version database to determine whether there exists newer versions of the software application available for installation on the computerized equipment. The technique further involves providing an electronic notification to a user of the computerized equipment in response to a result of the update assessment operation indicating that there exists newer versions of the software application available for installation on the computerized equipment.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: January 3, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: Yourong Wang, Eric Wu, Jackson B. Myers, Rob P. Munsell, Brian R. Tetreault, Daniel K. O'Reilly, Robert Kumlin
  • Patent number: 9535686
    Abstract: Provided are techniques for an OS to be modified on a running system such that running programs, including system services, so not have to be stopped and restarted for the modification to take effect. The techniques include detecting, by a processing thread, when the processing thread has entered a shared library; in response to the detecting, setting a thread flag corresponding to the thread in an operating system (OS); detecting an OS flag, set by the OS, indicating that the OS is updating the shared library; in response to detecting the OS flag, suspending processing by the processing thread and transferring control from the thread to the OS; resuming processing by the processing thread in response to detecting that the OS has completed the updating; and executing the shared library in response to the resuming.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 3, 2017
    Assignee: International Business Machines Corporation
    Inventor: Stephen B. Peckham
  • Patent number: 9535687
    Abstract: Embodiments of the present invention address deficiencies of the art in respect to software configuration management and provide a method, system and apparatus for producing audited builds based on separate class dependency records. In one embodiment, a software configuration management tool can be provided which can include build-audit logic programmed to produce separate configuration records for each target object in a build. Each configuration record can include a direct dependency reference for a corresponding target object. Moreover, each configuration record can include version information for a corresponding target object. Finally, the software configuration management tool can include a versioned object base storing different versions of source files and derived objects built from the source files.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: January 3, 2017
    Assignee: International Business Machines Corporation
    Inventors: Geoffrey M. Clemm, Bryan P. Douros, Steven T. Rehrauer
  • Patent number: 9535688
    Abstract: The deployment of application revisions and performing of application rollbacks across multiple application servers is streamlined by reducing the number of files that are communicated to the application servers to perform updates and rollbacks. An application service is provided by multiple application servers each executing a plurality of compiled code files associated with the application service. Each application server receives a compiled code file corresponding to an update for one of the plurality of compiled code files associated with the application service. The one compiled code file is replaced with the received compiled code file corresponding to the update. The application servers then provide an updated version of the application service by executing the plurality of compiled code files including the replacement compiled code file corresponding to the update. Application rollback is performed using compiled code files stored in a local repository of each application server.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: January 3, 2017
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Janak U. Dani, Krishna Reddy
  • Patent number: 9535689
    Abstract: Systems and methods for managing dependencies in a source control management system or revision control system are provided. A request to commit a first modified component of a software application may be received. The software application may include a plurality of components. In response to the request to commit the first modified component, a blocking condition may be identified. The blocking condition may be a dependency of the first modified component, in that the first modified component depends upon a second component of the software application. The second component may not satisfy the dependency. A request to commit a modified version of the second component may be received. A determination may be made that the modified version of the second component satisfies the dependency of the first modified component upon the second component. The first modified component and second modified component may then be committed.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: January 3, 2017
    Assignee: PayPal, Inc.
    Inventor: Jared Blitzstein
  • Patent number: 9535690
    Abstract: A user input initiating delivery of a first change set to a stream maintained by an artifact management application can be detected. A first set of elements and a first set of elements types associated with the first change set can be identified. A second set of element types that pertain to at least one unit of work identified for the first set of elements can be identified. A second set of elements that are involved in the same unit of work can be identified. A second change set modifying the second set of elements can be identified. A third change set modifying at least one element type can be identified. A change set group can be created and the first change set, the second change set and the third change set can be added to the change set group. The change set group can be delivered to the stream.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: January 3, 2017
    Assignee: International Business Machines Corporation
    Inventors: Muhtar B. Akbulut, Geoffrey M. Clemm, George P. DeCandio, Brian P. Steele
  • Patent number: 9535691
    Abstract: The method includes adjusting, by one or more computer processors, a JAVASCRIPT object notation structure to comprise a tag on at least one object and a tag on at least one array. The method further includes receiving, by one or more computer processors, data indicating a first set of at least one change to the JAVASCRIPT object notation structure. The method further includes adjusting, by one or more computer processors, the tags in the JAVASCRIPT object notation structure to include the first set of the at least one change in the JAVASCRIPT object notation structure. The method further includes receiving, by one or more computer processor, data indicating the first set of the at least one change to the JAVASCRIPT object notation structure is complete. The method further includes displaying the first set of the at least one change to the JAVASCRIPT object notation structure based upon the adjusted tags.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: January 3, 2017
    Assignee: International Business Machines Corporation
    Inventor: Amit P. Joglekar
  • Patent number: 9535692
    Abstract: Systems and methods are provided for managing, in a software development environment, related files that are used for generating an output presentation document. A software development environment discovers the related files for an application (e.g., web page) that is being authored, and the software development tool presents a visual indication (e.g., graphical tabs) of the discovered related files in a user interface. The software development tool further aids in managing the presentation of the related files by enabling any of the related files to be selectively displayed in a designated interface (e.g., window). That is, a designated interface may be provided in which the content of any selected related file may be alternately displayed in response to a user selecting a visual indication of a related file. In one embodiment, the designated interface is a textual source code view interface that is provided by the software development tool.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: January 3, 2017
    Assignee: Adobe Systems Incorporated
    Inventors: Randall Edmunds, Mitsuko Yoneyama, Christopher Bank
  • Patent number: 9535693
    Abstract: Provided is a signal processing circuit occupying a small circuit area. A common arithmetic operation element is shared between a plurality of arithmetic operation sequence control units. An arbitration circuit selects, when the plurality of arithmetic operation sequence control units simultaneously generate requests for arithmetic operations to use the common arithmetic operation element, the predetermined sequence control unit based on priority information about the plurality of arithmetic operation sequence control units, causes the common arithmetic operation element to execute the arithmetic operation requested from the selected arithmetic operation sequence control unit, and returns the result of the arithmetic operation to the selected arithmetic operation sequence control unit.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: January 3, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hiroyuki Yamasaki, Hideyuki Noda, Kan Murata
  • Patent number: 9535694
    Abstract: Embodiments relate to vector processing in an active memory device. An aspect includes a system for vector processing in an active memory device. The system includes memory in the active memory device and a processing element in the active memory device. The processing element is configured to perform a method including decoding an instruction with a plurality of sub-instructions to execute in parallel. An iteration count to repeat execution of the sub-instructions in parallel is determined. Execution of the sub-instructions is repeated in parallel for multiple iterations, by the processing element, based on the iteration count. Multiple locations in the memory are accessed in parallel based on the execution of the sub-instructions.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: January 3, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bruce M. Fleischer, Thomas W. Fox, Hans M. Jacobson, Ravi Nair, Daniel A. Prener
  • Patent number: 9535695
    Abstract: Techniques are disclosed relating to completion of load and store instructions in a weakly-ordered memory model. In one embodiment, a processor includes a load queue and a store queue and is configured to associate queue information with a load instruction in an instruction stream. In this embodiment, the queue information indicates a location of the load instruction in the load queue and one or more locations in the store queue that are associated with one or more store instructions that are older than the load instruction. The processor may determine, using the queue information, that the load instruction does not conflict with a store instruction in the store queue that is older than the load instruction. The processor may remove the load instruction from the load queue while the store instruction remains in the store queue. The queue information may include a wrap value for the load queue.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: January 3, 2017
    Assignee: Apple Inc.
    Inventors: John H. Mylius, Rajat Goel, Pradeep Kanapathipillai, Hari S. Kannan
  • Patent number: 9535696
    Abstract: Techniques relate to handling outstanding cache miss prefetches. A processor pipeline recognizes that a prefetch canceling instruction is being executed. In response to recognizing that the prefetch canceling instruction is being executed, all outstanding prefetches are evaluated according to a criterion as set forth by the prefetch canceling instruction in order to select qualified prefetches. In response to evaluating, a cache subsystem is communicated with to cause canceling of the qualified prefetches that fit the criterion. In response to successful canceling of the qualified prefetches, a local cache is prevented from being updated from the qualified prefetches.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: January 3, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael Karl Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum
  • Patent number: 9535697
    Abstract: The present embodiments provide a system that facilitates lazy register window fills in a processor. During program execution, when the system encounters a restore instruction for a register window, the system determines if the restore instruction causes an underflow condition that requires the register window to be filled from a stack in memory. If so, the system completes the restore instruction by updating state information for the register window to indicate that the restore instruction is complete without actually filling the individual registers that comprise the register window from the stack. During subsequent program execution, the system lazily fills registers in the register window from the stack as the registers are accessed by the program.
    Type: Grant
    Filed: July 1, 2013
    Date of Patent: January 3, 2017
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventor: Yuan C. Chou
  • Patent number: 9535698
    Abstract: A clock-less asynchronous processing circuit or system having a plurality of pipelined processing stages utilizes self-clocked generators to tune the delay needed in each of the processing stages to complete the processing cycle. Because different processing stages may require different amounts of time to complete processing or may require different delays depending on the processing required in a particular stage, the self-clocked generators may be tuned to each stage's necessary delay(s) or may be programmably configured.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: January 3, 2017
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Tao Huang, Qifan Zhang, Wuxian Shi, Yiqun Ge, Wen Tong
  • Patent number: 9535699
    Abstract: A processor includes: a first instruction processing unit that, in a first mode, receives a first input including instructions included in a first instruction set; a second instruction processing unit that, in a second mode, receives the first input, the second instruction processing unit having a simpler configuration than the first instruction processing unit; a third instruction processing unit that, in a third mode, receives a second input including instructions included in a second instruction set, the second instruction set including part of the instructions included in the first instruction set, the third instruction processing unit having a simpler configuration than the first instruction processing unit and the second instruction processing unit; a selection unit that selects, according to a mode, a result of decoding by one of the instruction processing units; and an instruction execution unit that executes an instruction according to the selected result of decoding.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: January 3, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Naoki Ochi
  • Patent number: 9535700
    Abstract: A data processing system includes an execution pipeline that includes one or more programmable execution stages which execute execution threads to execute instructions to perform data processing operations. Instructions to be executed by a group of execution threads are first fetched into an instruction cache and then read from the instruction cache for execution by the thread group. When an instruction to be executed by a thread group is present in a cache line in the instruction cache, or is to be fetched into an allocated cache line in the instruction cache, a pointer to the location of the instruction in the instruction cache is stored for the thread group. This stored pointer is then used to retrieve the instruction for execution by the thread group from the instruction cache.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: January 3, 2017
    Assignee: ARM LIMITED
    Inventors: Jorn Nystad, Andreas Engh-Halstvedt
  • Patent number: 9535701
    Abstract: A pipelined processor selects an instruction fetch mode from a number of fetch modes including an executed branch fetch mode, a predicted fetch mode, and a sequential fetch mode. Each branch instruction is associated with branch delay slots, the size of which can be greater than or equal to zero, and can vary from one branch instance to another. Branch prediction is used to fetch instructions, with the source of information for predictions deriving from a last instruction in the branch delay slots. When a prediction error occurs, the executed branch fetch mode uses an address from branch instruction evaluation to fetch a next instruction.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: January 3, 2017
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (publ)
    Inventors: Erik Rijshouwer, Ricky Nas
  • Patent number: 9535702
    Abstract: An asset management method implemented on an integrated circuit uses a keys memory storing keys, each key being associated with an asset identifier, and a data memory storing asset information. The method comprises: receiving an input command for an asset comprising an asset identifier and asset information, computing addresses to Keys memory from the asset identifier, the computing addresses comprising calculating hashes from the asset identifier, finding or allocating an entry in keys memory for the asset, based on the computed set of addresses, depending on the input command, computing a data address to the data memory for the asset from the address and position in the keys memory at which an entry has been found or allocated for the asset; reading data in the data memory at the computed data address; and executing the input command based on the data read in the data memory at the data address.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: January 3, 2017
    Assignee: ENYX SA
    Inventor: Edward Kodde
  • Patent number: 9535703
    Abstract: A predictor data structure is used for pipelined processing by a pipelined processor. The predictor data structure includes a predicted address to be used in return from execution of a selected instruction, and a predicted operating state associated with the predicted address. Based on determining a selected return instruction is to be executed, the predicted address to which processing is to be returned is obtained from the predictor data structure. Further, based on determining the selected return instruction is to be executed, a transitional operating state to be entered based on the predicted operating state stored in the predictor data structure is predicted, wherein at least one of the predicted address and the predicted transitional operating state are to be used to validate execution of the selected return instruction.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: January 3, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 9535704
    Abstract: A method to quantify a plurality of digital data sharing in a multi-threaded execution includes the steps of: providing at least one processor; providing a computer readable non-transitory storage medium including a computer readable multi-threaded executable code and a computer readable executable code to calculate a plurality of shared footprint values and an average shared footprint value; running the multi-threaded executable code on the at least one computer processor; running the computer readable executable code configured to calculate a plurality of shared footprint values and an average shared footprint value; calculating a plurality of shared footprint values by use of a linear-time process for a corresponding plurality of executable windows in time; and calculating and saving an average shared footprint value based on the plurality of shared footprint values to quantify by a metric the data sharing by the multi-threaded execution. A system to perform the method is also described.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: January 3, 2017
    Assignee: University of Rochester
    Inventors: Chen Ding, Hao Luo
  • Patent number: 9535705
    Abstract: In a typical embodiment, a parallel processor is provided that includes: A plurality of parallel processing units that are interconnected to provide a flexible hardware programmable, scalable and re-configurable parallel processor that executes different functions in a parallel processor space domain instead of a processor (serial processor) time domain. Each parallel processing unit includes a flexible processing engine with its inputs and outputs connected to MDDP-RAM blocks. The MDDP-RAM blocks provide the processing engine with different channels' data and coefficients. The processing engine and the MDDP-RAM blocks are controlled by a system processor (or other control scheme hardware) via the parameter blocks to enable high hardware flexibility and software programmability.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: January 3, 2017
    Inventor: Asher Hazanchuk
  • Patent number: 9535706
    Abstract: According to one embodiment, a processor includes an instruction decoder to receive an instruction to process a multiply-accumulate operation, the instruction having a first operand, a second operand, a third operand, and a fourth operand. The first operand is to specify a first storage location to store an accumulated value; the second operand is to specify a second storage location to store a first value and a second value; and the third operand is to specify a third storage location to store a third value. The processor further includes an execution unit coupled to the instruction decoder to perform the multiply-accumulate operation to multiply the first value with the second value to generate a multiply result and to accumulate the multiply result and at least a portion of a third value to an accumulated value based on the fourth operand.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: January 3, 2017
    Assignee: Intel Corporation
    Inventors: Vinodh Gopal, Erdinc Ozturk, James D. Guilford, Gilbert M. Wolrich
  • Patent number: 9535707
    Abstract: Stream applications may inefficiently use the hardware resources that execute the processing elements of the data stream. For example, a compute node may host four processing elements and execute each using a CPU. However, other CPUs on the compute node may sit idle. To take advantage of these available hardware resources, a stream programmer may identify one or more processing elements that may be cloned. The cloned processing elements may be used to generate a different execution path that is parallel to the execution path that includes the original processing elements. Because the cloned processing elements contain the same operators as the original processing elements, the data stream that was previously flowing through only the original processing element may be split and sent through both the original and cloned processing elements. In this manner, the parallel execution path may use underutilized hardware resources to increase the throughput of the data stream.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: January 3, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael J. Branson, Ryan K. Cradick, John M. Santosuosso, Brandon W. Schulz
  • Patent number: 9535708
    Abstract: In one embodiment, individual or groups of heat generating data processing operations are rate-controlled such that a component, a set of components, a board or line card, and/or an entire apparatus or any portion thereof stays within a corresponding heat budget. One or more heat price tags are associated with these data processing operations which are used to determine whether or not a corresponding data processing operation can be currently performed within one or more corresponding heat budgets. If so, the data procession operation proceeds. If not, the data processing operation is delayed. Examples of such data processing operations include, but are not limited to, data retrieval from memory, data storage in memory, lookup operations in memory, lookup operations in a binary or ternary content-addressable memory, regular expression processing, cryptographic processing, or data manipulation.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: January 3, 2017
    Assignee: CISCO TECHNOLOGY INC.
    Inventors: John H. W. Bettink, Doron Shoham, Shimon Listman
  • Patent number: 9535709
    Abstract: A booting system for a crashed motherboard includes a BIOS (Basic Input/Output System) chip, and a south bridge chip. The BIOS chip stores a plurality of boot procedures. The south bridge chip is coupled to the BIOS chip and includes a cache module. The cache module loads the plurality of boot procedures from the BIOS chip when the motherboard is powered on. When the motherboard crashes, the south bridge chip can load the plurality of boot procedures from the cache module to power on or repower the motherboard.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: January 3, 2017
    Assignees: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Meng-Liang Yang
  • Patent number: 9535710
    Abstract: A secure communication channel is established between a virtual trusted runtime basic input output system (BIOS) and a virtual machine that includes a virtual BIOS. The virtual trusted runtime BIOS communicates with the virtual machine according to a web-based protocol over the secure communication channel using a secure socket layer.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: January 3, 2017
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Valiuddin Y. Ali, Jose Paulo Xavier Pires, James M. Mann, Boris Balacheff, Chris I. Dalton
  • Patent number: 9535711
    Abstract: In some embodiments, a PPM interface for a computing platform may be provided with functionality to facilitate, to an OS through the PPM interface, firmware performance data.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: January 3, 2017
    Assignee: Intel Corporation
    Inventors: Michael Rothman, Robert Gough, Mark Doran
  • Patent number: 9535712
    Abstract: Embodiments of the present invention store data in read-protected storage for use by firmware and then transfer the data or data related to that stored data into a secure execution environment for use during normal platform operation. The read-protected storage is readable only between a time period after platform reset but before the read-protected storage is locked prior to the operating system being loaded. This read-protected storage is locked prior to executing any untrusted code in normal system memory so that the data in the read-protected storage is not exposed to malicious code execution.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: January 3, 2017
    Assignee: Insyde Software Corp.
    Inventor: Timothy Andrew Lewis
  • Patent number: 9535713
    Abstract: An exemplary system may allow new devices to be added. In one embodiment, upon receiving information associated with a device event, the system generates a first rule for a device based on the information and a system state. The system determines determine an updated system state based on the first rule. The system determines whether a second rule is required for the updated system state. Upon determining that the second rule is required for the updated system state, the system generates the second rule.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: January 3, 2017
    Assignee: Red Hat Israel, Ltd.
    Inventors: Igor Lvovsky, Eduardo Warszawski
  • Patent number: 9535714
    Abstract: Described is a technology by which movement of a shared network device (e.g., a printer or storage device) to a different network machine triggers an automatic reconfiguration of the device and/or the network machines, so that those machines remain able to share that device. Configuration data may be pushed to the network machines, pulled by the network machines, and/or provided to a server by which the network machines may access the confirmation data. Reconfiguration may include creating a system user account and modifying the permissions associated with the device so that the other machine has access permission to use the device via the created account.
    Type: Grant
    Filed: February 6, 2013
    Date of Patent: January 3, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Steve E. Olsson, Sundararajan Aravamudhan, Prathibha Kundavaram, Rajat Talwar, Kiran Kumar Chava, Dennis Scott Batchelder
  • Patent number: 9535715
    Abstract: The present invention extends to methods, systems, and computer program products for booting from a trusted network image. The image can be executed from a trusted source on a Wide Area Network (“WAN”) to perform a maintenance operation, such as, for example, malware scanning, operating system repair, factory reset, etc. at the computer system. Trust can be established using a Certificate Authority or an out of band communication channel (e.g., voice communication, text message, electronic mail, etc.) to retrieve a one-time pad (“OTP”). Using the OTP the computer can validate that it is connected to the trusted source. The trusted source can chain to additional images hosted on a third-party server. The additional images can provide a user with options for various different maintenance operations or various different implementations of the same maintenance operation. For example, the trusted source can link to multiple different malware scanners.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: January 3, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: William Daniel Pfeifer, Jr., Douglas Grayson Hill
  • Patent number: 9535716
    Abstract: Various exemplary embodiments relate to a method of configuring a device in a network, the method including loading one or more system configuration commands into an active memory; processing the one or more system configuration commands; loading one or more blocks of customer commands into an active memory; and processing each of the one or more blocks of customer commands, wherein each block is processed as soon as it is loaded into the active memory.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: January 3, 2017
    Assignee: Alcatel-Lucent USA Inc.
    Inventor: Vishnukumar S. Thumati
  • Patent number: 9535717
    Abstract: An apparatus, system, and computer readable medium are disclosed for booting a server from a shared storage system. The present invention teaches at least one server having at least one processor, a storage system having a plurality of storage drives and at least one boot volume corresponding to the at least one server, and a switch fabric having at least one switch; the switch fabric isolates boot traffic from storage traffic and enables communication between the server and the boot volume of the storage system. In some embodiments the switch fabric includes one or more partitionable switches that isolate boot traffic from storage traffic. The boot volumes may be a redundant array of storage devices. In certain embodiments, the present invention also includes devices external to the server, switch fabric, and storage system.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: January 3, 2017
    Assignee: International Business Machines Corporation
    Inventors: Shah M. R. Islam, Gregg S. Lucas