Abstract: Traditionally, providing parallel processing within a multi-core system has been very difficult. Here, however, a system is provided where serial source code is automatically converted into parallel source code, and a processing cluster is reconfigured “on the fly” to accommodate the parallelized code based on an allocation of memory and compute resources. Thus, the processing cluster and its corresponding system programming tool provide a system that can perform parallel processing from a serial program that is transparent to a user. Generally, a control node connected to the address and data leads of a host processor uses messages to control the processing of data in a processing cluster. The cluster includes nodes of parallel processors, shared function memory, a global load/store, and hardware accelerators all connected to the control node by message busses. A crossbar data interconnect routes data to the cluster circuits separate from the message busses.

Abstract: Methods, apparatus and systems for virtualization of a native instruction set are disclosed. Embodiments include a processor core executing the native instructions and a second core, or alternatively only the second processor core consuming less power while executing a second instruction set that excludes portions of the native instruction set. The second core's decoder detects invalid opcodes of the second instruction set. A microcode layer disassembler determines if opcodes should be translated. A translation runtime environment identifies an executable region containing an invalid opcode, other invalid opcodes and interjacent valid opcodes of the second instruction set. An analysis unit determines an initial machine state prior to execution of the invalid opcode. A partial translation of the executable region that includes encapsulations of the translations of invalid opcodes and state recoveries of the machine states is generated and saved to a translation cache memory.

Abstract: A system, method, and computer program product are provided for remapping registers based on a change in execution mode. A sequence of instructions is received for execution by a processor and a change in an execution mode from a first execution mode to a second execution mode within the sequence of instructions is identified, where a first register mapping is associated with the first execution mode and a second register mapping is associated with the second execution mode. Data stored in a set of registers within a processor is reorganized based on the first register mapping and the second register mapping in response to the change in the execution mode.

Abstract: A method is described that includes fetching an instruction. The method further includes decoding the instruction. The instruction specifies an operation, a first operand and a second operand. The method further includes fetching the first and second operands of the instruction. The first and second operands are each composed of a plurality of larger chunks having constituent elements. The method further includes performing the operation specified by the instruction including generating a resultant composed of a plurality of larger chunks having constituent elements. The generating of the resultant includes selecting for each element in the resultant a contiguous group of bits from a same positioned chunk of the first operand as the chunk of the element in the resultant, the contiguous group of bits being identified by a same positioned element of the second operand as the element in the resultant.

Abstract: A method is provided for operating a volatile memory device. The method includes performing a first initialization operation for the volatile memory device based on a boot code received from an external memory controller, storing the boot code in an internal register, reading the boot code stored in the internal register based on a first signal received from the external memory controller when the first initialization operation is not normally performed, and performing a second initialization operation for the volatile memory device based on the boot code read from the internal register.

Abstract: Performing a hot-swap of a storage device for a node in a virtualization environment having a plurality of storage devices, includes performing pass-thru of a storage manager managing the plurality of storage devices to a service virtual machine, such that the service virtual machine communicates with the plurality of storage devices without going through a storage software layer of its corresponding hypervisor, booting the hypervisor from a device other than the plurality of storage devices and performing the hot-swap of the storage device.

Abstract: Data to be rendered for a scrolling display is processed into an intermediate format. The intermediate format includes data that maps directly to the rendered, displayed format with little computation, yet is smaller in size than the rendered data. This intermediate format is cached, and is rendered on demand during scrolling. During idle times of the display, original data, likely to be accessed in response to scrolling the display, can be prefetched and transformed to the intermediate format.

Abstract: In one aspect, there is provided a system having a processor and a data storage device coupled to the processor. The data storage device stores instructions executable by the processor to receive a software module, the software module having an interface adapted to display a plurality of first graphemes in a first language, provide at least one look-up table having at least some of the first graphemes and a plurality of second graphemes in a second language associated therewith, said association being based on a phonetic similarly between the first and second graphemes when the first graphemes are vocalized in the first language and the second graphemes are vocalized in the second language, and replace at least one of the first graphemes in the interface with the associated second graphemes such that the interface is adapted to display the second graphemes in the second language, the second graphemes being understandable in the first language when the second graphemes are vocalized.

Abstract: Systems, methods, and machine-readable media are disclosed for automating setup of configuration data for an application program. In one embodiment, a method of automating setup of configuration data for an application program can comprise identifying a set of configuration data used by a first instance of the application program. The set of configuration data can contain data for substantially replicating a configuration for the first instance of the application program. The method can further include extracting the set of configuration data from the first instance of the application program. A manifest can be created identifying data in the set of configuration data. The set of configuration data can be saved in a portable format that includes the set of configuration data and the manifest.

Abstract: A virtual machine management system is used to instantiate, wake, move, sleep, and destroy individual operating environments in a cloud or cluster. In various embodiments, there is a method and system for transferring an operating environment from a first host to a second host. The first host contains an active environment, with a disk and memory. The disk is snapshotted while the operating environment on the first host is still live, and the snapshot is transferred to the second host. After the initial snapshot is transferred, a differential update using rsync or a similar mechanism can be used to transfer just the changes from the snapshot from the first to the second host. In a further embodiment, the contents of the memory are also transferred. This memory can be transferred as a snapshot after pausing the active environment, or by synchronizing the memory spaces between the two hosts.

Abstract: A host computer has a plurality of virtual machines executing therein under the control of a hypervisor, where the host also includes a physical network interface controller (NIC). An interrupt controller detects an interrupt generated by the physical NIC, where the interrupt corresponds to a virtual machine. If the virtual machine has exclusive affinity to one or more physical central processing units (CPUs), then the interrupt is forwarded to the virtual machine. If the virtual machine does not have exclusive affinity, then a process in the hypervisor is invoked to forward the interrupt to the virtual machine.

Abstract: Examples perform live migration of VMs from a source host to a destination host. The disclosure changes the storage environment, directly or through a vendor provider, to active/active synchronous and, during migration, migrates only data which is not already stored at the destination host. The source and destination VMs have concurrent access to storage disks during migration. After migration, the destination VM executes, with exclusive access to the storage disks, and the system is returned to the previous storage environment (e.g., active/active asynchronous).

Abstract: The disclosed network resource management system employs a hardware configuration management (HCM) information handling system (IHS) that may couple to a single administered IHS or to multiple administered IHSs via an administrative network. An HCM tool in the HCM IHS may generate, modify and store hardware configuration information, including physical network identifications (PNet IDs), in an HCM database and share the HCM database with the administered IHSs. The administered IHS may be a load balancing IHS. A load balancing tool may extract hardware configuration information, including PNet IDs, from the HCM database. The load balancing tool may utilize the hardware configuration information to enable the load balancing IHS to balance adapter loads in the load balancing IHS. The load balancing tool may also utilize the hardware configuration information to enable the load balancing IHS to failover from a failing adapter to other adapters in the load balancing IHS.

Abstract: A controller of a network control system for configuring several middlebox instances is described. The middlebox instances implement a middlebox in a distributed manner in several hosts. The controller configures, in a first host, a first middlebox instance to receive a notification from a migration module before a virtual machine (VM) running in the first host migrates to a second host and to send middlebox state related to the VM to the migration module.

Abstract: A methods and device for accessing virtual machine (VM) data are described. A computing device for accessing virtual machine comprises an access request process module, a data transfer proxy module and a virtual disk. The access request process module receives a data access request sent by a VM and adds the data access request to a request array. The data transfer proxy module obtains the data access request from the request array, maps the obtained data access request to a corresponding virtual storage unit, and maps the virtual storage unit to a corresponding physical storage unit of a distributed storage system. A corresponding data access operation may be performed based on a type of the data access request.

Abstract: A system and method for analyzing application execution of multi-threaded applications is disclosed. An exemplary system includes a portable inter-thread communication mechanism; a profiling module; and an external interpretation application. A communication mechanism may be used to implement communication among a plurality of application threads. Responsive to an indication that an application should be monitored, a profiling module may profile at least one of a plurality of application threads to monitor and measure the thread's communications. Profiling information may be logged and the log may be provided to the external interpretation application. The external interpretation application may then parse the log and produce a graphic representation of execution metrics based on the information parsed from the log. The graphic representation may allow an end-user to acquire information and determine several statistics regarding the application's execution.

Abstract: For experience-based dynamic sequencing of a set of process options, a first process option is executed at a first stage in a first sequence for a first set of members. The sequence includes several stages of executing a subset of the process options. An experience value is determined corresponding to executing the first process option. The experience value is normalized to calculate a normalized experience value corresponding to the first process option. Using the normalized experience value in a later stage from the plurality of stages, an evaluation is made whether a first trigger threshold is satisfied in a first activation function of a second process choice. When the first trigger threshold of the first activation function being satisfied, the second process choice is included in the first sequence at the later stage.

Abstract: A method, system, and computer program product for the prioritization of code execution. The method includes accessing a thread in a context containing a set of code instances stored in memory; identifying sections of the set of code instances that correspond to deferrable code tasks; executing the thread in the context; determining that the thread is idle; and executing at least one of the deferrable code tasks. The deferrable code task is executed within the context and in response to determining that the thread is idle.

Abstract: A method of capturing the state of a target program that is running within the environment of an operating system is provided. The method includes identifying threads associated with the target program, suspending threads associated with the target program, preserving data characterizing the threads, and preserving data accessible by the threads when in operation. A method of changing the state of a target program that is running within the environment of an operating system is also provided. This method includes identifying threads associated with the target program, suspending threads associated with the target program, replacing data characterizing the threads with previously preserved data, and replacing data accessible by the threads when in operation with previously preserved data. In either case, the threads are then resumed to allow the target program to continue operation.

Abstract: A data processing system with data transmit capability comprising an operating system for supporting processes, such that the process are associated with one or more resources and the operating system being arranged to police the accessing by processes of resources so as to inhibit a process from accessing resources with which it is not associated. Part of this system is an interface for interfacing between each process and the operating system and a memory for storing state information for at least one process. The interface may be arranged to analyze instructions from the processes to the operating system, and upon detecting an instruction to re-initialize a process cause state information corresponding to that pre-existing state information to be stored in the memory as state information for the re-initialized process and to be associated with the resource.

Abstract: A predictive order status system includes one or more processors to receive a request for a current order status of an order for a computing environment, the order having at least one task representing a segment of an order process for completing the order and the request associated with a unique order identifier, determine the current order status for the order for the computing environment, the current order status comprising a simulated percentage value that is based on an amount of elapsed time since the order was placed divided by a total order process time to complete the order, determine an exception status for the order for the computing environment, the exception status being one of on track to be completed within the total order process time to complete the order, possibly at risk for being completed within the total order process time to complete the order, and at risk for being completed within the total order process time, and send a graphical user interface representation of the current order st

Abstract: The present disclosure relates to systems and methods for context-aware adaptive computing. In one embodiment, the present disclosure includes a method comprising receiving a request at a first information handling system (IHS) to perform an application computation. The method also includes determining a user's context, the user operating the first IHS, and ascertaining a battery state of the first IHS. The method further includes allocating the application computation between the first IHS and a second IHS based at least on the user's context and the battery state of the first IHS. The present disclosure also includes associated systems and apparatuses.

Abstract: Technologies are generally described for systems, devices and methods effective to execute a first computing task by a processor of a data center. In some examples, the first computing task may be executed using an instruction set extension. Execution of the first computing task using the instruction set extension may require a first number of clock cycles. In other examples, execution of the first computing task without using the instruction set extension may require a second number of clock cycles. In some examples, a savings value may be determined. The savings value may represent a difference between the first number of clock cycles and the second number of clock cycles. An amount of processing time may be allocated on the processor to a second computing task. The amount of processing time may be based on the savings value. The second computing task may be different from the first computing task.

Abstract: Disclosed herein is a computer implemented method for scheduling a new task. The method comprises: receiving task data in respect of the new task, the task data comprising at least information enabling the new task to be uniquely identified and a target runtime for the new task; recording the received task data in a data structure and determining if a new job needs to be registered with an underlying job scheduler.

Abstract: A task allocating apparatus capable of improving task processing performance is provided. The task allocating apparatus measures a core usage of a plurality of tasks that are run in multiple cores, according to predetermined periods, estimates a core usage of each task for a following period based on the measured core usages, and allocates one or more tasks to the multiple cores based on the estimated core usage.

Abstract: Methods and apparatus for classification-based dynamic allocation of computing resources are described. A method comprises determining usage data sources corresponding to one or more clients of a computing infrastructure, and assigning values to client classification categories associated with a particular client based on metrics obtained from the particular client's usage data sources. The method includes generating a recommendation mapping between values of the client classification categories, and one or more resources of the infrastructure, based at least in part on resource classification information. The method further includes allocating at least a portion of the one or more resources to the particular client based at least in part on the recommendation mapping.

Abstract: A method provides a recommendation for a cloud configuration for deploying a service. In response to receiving a service request, a database is searched for a cloud configuration. The search is performed by acquiring a resource usage pattern for the service. The resource usage pattern is mapped to a multidimensional space, which is searched for a previously deployed cloud configuration having a similar resource usage pattern. In response to finding a previously deployed cloud configuration, the activity management is determined for the previously deployed cloud configuration. A recommendation is made based on the activity management.

Abstract: Systems and methods are disclosed for migrating a virtual machine from a source hypervisor to a destination hypervisor. An example method of migrating a virtual machine from a source hypervisor to a destination hypervisor includes receiving, by a source hypervisor running a virtual machine, an indication to migrate the virtual machine to a destination hypervisor. A guest runs on the virtual machine and is allocated guest memory. The method also includes reading, by the source hypervisor, a free value indicating whether a memory page in the guest memory is active. The method further includes transmitting the memory page to the destination hypervisor if the free value indicates that the memory page is active. The method also includes determining to not transmit the memory page to the destination hypervisor if the free value indicates that the memory page is inactive.

Abstract: An approach is provided for providing energy optimization in multi-level distributed computations. A distributed computation energy optimization platform determines energy availability information associated with at least one level of a computational architecture executing at least portion of one computation closure. The distributed computation energy optimization platform also determines energy consumption information associated with the at least portion of one computation closure. The distributed computation energy optimization platform further processes and/or facilitates a processing of the energy availability information, the energy consumption information, or a combination thereof to determine whether to migrate the at least portion of one computation closure to at least one other level of the computational architecture.

Abstract: A system is described for identifying key lock contention issues in computing devices. A computing device is executed and lock contention information relating to operations during execution of the computing device is recorded. The data is parsed and analyzed to determine blocking relationships between operations due to lock contention. Algorithms are implemented to analyze dependencies between operations based on the data and to identify key areas of optimization for performance improvement. Algorithms can be based on the Hyperlink-Induced Topic Search algorithm or the PageRank algorithm.

Abstract: A TASKS_RCU grace period is detected whose quiescent states comprise a task undergoing a voluntary context switch, a task running in user mode, and a task running in idle-mode. A list of all runnable tasks is built. The runnable task list is scanned in one or more scan passes. Each scan pass through the runnable task list searches to identify tasks that have passed through a quiescent state by either performing a voluntary context switch, running in user mode, or running in idle-mode. If found, such quiescent state tasks are removed from the runnable task list. Searching performed during a scan pass includes identifying quiescent state tickless user mode tasks that have been running continuously in user mode on tickless CPUs that have not received a scheduling clock interrupt since commencement of the TASKS_RCU grace period. If the runnable task list is empty, the TASKS_RCU grace period is ended.

Abstract: A system that validates an application programming interface (API) call is provided. A key and a value associated with the key are read from a test script containing a script. The key and the value are separated by a colon. The key is included in first double quotes, and the value is included in second double quotes. Whether the key matches a plurality of keys defined for an API call is determined. Based on the key matching the plurality of keys defined for the API call, the API call is configured using the key and the value without any of the colon, the first double quotes, or the second double quotes. The configured API call is executed.

Abstract: It is determined whether a data source can handle an event that an application that operates on an OS (Operating System) receives via a predetermined API. If it is determined that the data source cannot handle the event, the event necessary for the operation of the data source is acquired from the OS.

Abstract: A system and method for facilitating reuse of a portion of process logic by different processes. An example method includes providing a subprocess that is adapted to perform the process logic in a file accessible to a composite system, wherein the subprocess is adapted to be called by a first parent process via a subprocess extension to a business process language employed to encode the first parent process; using a call activity defined as part of the subprocess extension, and included in a scope of the first parent process to facilitate access to functionality of the subprocess by the parent process; and employing a business process engine to facilitate instantiating the subprocess, resulting in an instantiated subprocess in response thereto; and using a second parent process to share use of the instantiated subprocess with the first parent process.

Abstract: Web browsing environments are commonly used to facilitate user interaction with data over the Internet. A web browser is a tool used to view and interact with a webpage. A webpage may interface with a web service to provide remote functionality that the webpage does not locally provide. An effective method for specifying and consuming remote functionality that an application invokes outside of the web browser is disclosed herein. A webpage exposes remote functionality (e.g., web service) that a web browser and/or browser extensions may discover through browsing the webpage. A browser extension associated with an application determines whether the application is compatible with the remote functionality. Once a compatible application is determined, it may be executed so as to connect to and invoke the remote functionality outside of the web browser. The application may provide a more robust experience with the remote functionality compared to the web browsing environment.

Abstract: An information processing apparatus includes: processors each having a memories and a memory controller that controls the memories; a normality checker that checks whether the processors operate normally when started; a failure detector that finds any failed processor from a result of the check; a fallback unit that falls back a failed processor if any; a redundancy determiner that determines whether the memories are used in a redundancy configuration; a redundancy cancellation determiner that determines, when the memories are determined to be used in the redundant configuration, whether the redundancy configuration of the memories is to be cancelled; and a redundancy canceller that cancels, when the redundancy configuration of the memories is to be cancelled, the redundancy configuration of the memories in at least one processor operating normally.

Abstract: A distributed database system may implement log-structured distributed storage using a single log sequence number space. A log for a data volume may be maintained in a log-structured distributed storage system. The log may be segmented across multiple protection groups according to a partitioning of user data for the data volume. Updates to the log may be assigned a log sequence number from a log sequence number space for the data volume. A protection group may be determined for an update according to which partition of user data space the update pertains. Metadata to be included with the log record may indicate a previous log sequence number of a log record maintained at the protection group. The log record may be sent to the protection group and identified as committed based on acknowledgments received from storage nodes implementing the protection group.

Abstract: A method for detecting abnormal subsequences in data sequence includes constructing a hierarchical data structure of a target subsequence, each node in a bottommost layer of the data structure storing corresponding data of the target subsequence, and each node in a layer above the bottommost layer storing values based on data stored in corresponding nodes in a lower layer next to the layer above the bottommost layer; determining a second number of neighbors of the target subsequence based on the data structure of the target subsequence and of the first number of reference subsequences constructed in advance, the second number of neighbors having minimum Euclidean distances from the target subsequence; determining a third number of neighbors of each reference subsequence in the second number of reference subsequences, which have minimum Euclidean distances from each reference subsequence and determining whether the target subsequence is an abnormal subsequence.

Abstract: Systems and methods for correcting bit failures in a resistive memory device include dividing the memory device into a first memory bank and a second memory bank. A first single bit repair (SBR) array is stored in the second memory bank, wherein the first SBR array is configured to store a first indication of a failure in a first failed bit in a first row of the first memory bank. The first memory bank and the first SBR array are configured to be accessed in parallel during a memory access operation. Similarly, a second SBR array stored in the first memory bank can store indications of failures of bits in the second memory bank, wherein the second SBR array and the second memory bank can be accessed in parallel. Thus, bit failures in the first and second memory banks can be corrected in real time.

Abstract: The disclosed embodiments provide a system that manages access to an online user account. During operation, the system uses stored authentication credentials for a user to access the online user account of the user. Next, the system aggregates financial data for the user from the online user account. Upon detecting an error associated with aggregating the financial data, the system obtains error information describing the error from a web page associated with the error. Next, when the user subsequently accesses the aggregated financial data, the system displays the error information to the user to facilitate resolution of the error by the user.

Abstract: A portable memory device is interfaced to a SST and authenticated; a system application on the SST writes diagnostic data to the device. The portable memory device is subsequently interfaced to an enterprise system and the diagnostic data is pulled to the enterprise system for analysis. In an embodiment, the enterprise system pushes informational data regarding maintenance and support to the portable device when the portable device is subsequently interfaced to the SST; the informational data is pushed to the SST for presentation and viewing by a service engineer.

Abstract: Some embodiments are directed to a method, corresponding system, and corresponding apparatus for detecting unexpectedly high latency, due to excessive retries of a given storage device of a set of storage devices. Some embodiments may comprise a processor and associated memory. Some embodiments may monitor one or more completion time characteristics of one or more accesses between the given storage device and one or more host machines. Some embodiments may then compare the one or more completion time characteristics with a given threshold. As a result of the comparison, some embodiments may report, by the one or more host machines, at least one error associated with the given storage device. The error may be unreported by the set of storage devices.

Abstract: Systems, methods, and computer readable storage mediums for generating an alert on a failure of a storage subsystem to phone home to the cloud in a replication environment. A dataset is replicated from a first storage subsystem to a second storage subsystem. The first and second storage subsystems also phone home log data to the cloud on a periodic basis. In response to detecting a failure of the first storage subsystem to phone home, the cloud generates and sends an alert to the second storage subsystem. In response to receiving this alert, the second storage subsystem starts disaster recovery operations for the dataset.

Abstract: The disclosed computer-implemented method for troubleshooting computing tasks using log files may include (1) identifying multiple log files generated during successful executions of a computing task, (2) identifying an anomalous log file generated during an anomalous execution of the computing task, (3) creating a model of a successful log file for the computing task by (a) identifying invariants that represent matching sequences found in the same location within at least two successful log files and (b) storing each invariant in a node within the model, and (4) traversing, sequentially through the anomalous log file, matching sequences within the anomalous log file with nodes within the model until identifying at least one discrepancy between the anomalous log file and the model. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: Discovering a hardware failure in a processor is disclosed. When an operating system or application fails, a function containing the instruction that failed along with the register set of the CPU at the failure is recorded. The function is analyzed into its basic blocks. The failing instruction, the failing basic block, the definitions that reach the failing instruction, and the CPU register set at the failure provide information to determine whether the failure was caused by hardware or software. If, after a complete search of the definitions reaching the failing instruction, the search discovers a first definition defining the failing instruction and a second definition defining the first definition such that the second definition reaches the failing instruction and the first definition assigns a register value that does not match a register value in the failing instruction, then a hardware failure is the cause of the crash.

Abstract: Techniques for reading data from memory cells arranged along a common charge trapping layer. One example is in a 3D stacked non-volatile memory device. Memory cells on a word line layer WLLn can be disturbed by programming of memory cells on an adjacent word line layer WLLn+1, resulting in uncorrectable errors. The memory cells on WLLn are read in a data recovery read operation which applies an elevated pass voltage to WLLn+1. The elevated pass voltage decreases and narrows the threshold voltages on WLLn, which facilitates reading. The data recovery read operation compensates for the lower threshold voltages of the cells by lowering the control gate voltage, raising the source voltage or adjusting a sensing period, demarcation level or pre-charge level in sensing circuitry. The elevated pass voltage can be stepped up in repeated read attempts until there are no uncorrectable errors or a limit is reached.

Abstract: Certain exemplary aspects of the present disclosure are directed towards methods and apparatuses in which logic circuitry generates an error detection code based on user data received from a host, and further generates a first set of check bits, to be written to the non-volatile memory circuit in conjunction with the user data, by combining the error detection code with a hashed data address of the user data. In some embodiments, the check bits associated with the user data providing verification that the user data was written in the appropriate physical block address of the non-volatile memory circuit.

Abstract: A bit error in a flit transmitted over a link is determined to affect one or more particular bits of the flit based on a syndrome value associated with a cyclic redundancy check (CRC) value of the flit. The link includes a plurality of lanes. It is determined that the one or more particular bits were sent over one or more particular lanes of the link. The bit error is associated with the one or more particular lanes based on determining that the affected bits were transmitted over the particular lanes.

Abstract: Erasure encoded fragments are originally generated by applying an erasure encoding scheme to a data file. An erasure encoded fragment is subsequently generated directly from previously generated erasure encoded fragments or by reconstructing the original data file and then erasure encoding the reconstructed data file. The integrity or fidelity of such a subsequently generated erasure encoded fragment is verified by newly generating an error detection code, such as but not limited to a checksum, for the subsequently generated erasure encoded fragment, and comparing that subsequently error detection code against an error detection code previously generated for a previous or original version of the erasure encoded fragment. Each error detection code is preferably stored in association with its corresponding erasure encoded fragment and with one or more other erasure encoded fragments. Thus, each error detection code is saved in at least two locations.

Abstract: A memory device includes: a plurality of first lines; a plurality of second lines; a plurality of bank groups each including a predetermined number of banks; and a column signal transmission unit suitable for transmitting one or more column command signals and one or more column address signals to the bank groups through the first lines based on an odd-numbered column command, and transmitting the column command signals and the column address signals to the bank groups through the second lines based on an even-numbered column command.