Patents Issued in March 7, 2017
  • Patent number: 9588762
    Abstract: Processing of character data is facilitated. A Find Element Not Equal instruction is provided that compares data of multiple vectors for inequality and provides an indication of inequality, if inequality exists. An index associated with the unequal element is stored in a target vector register. Further, the same instruction, the Find Element Not Equal instruction, also searches a selected vector for null elements, also referred to as zero elements. A result of the instruction is dependent on whether the null search is provided, or just the compare.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: March 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jonathan D. Bradbury, Michael K. Gschwind, Eric M. Schwarz, Timothy J. Slegel
  • Patent number: 9588763
    Abstract: Processing of character data is facilitated. A Find Element Not Equal instruction is provided that compares data of multiple vectors for inequality and provides an indication of inequality, if inequality exists. An index associated with the unequal element is stored in a target vector register. Further, the same instruction, the Find Element Not Equal instruction, also searches a selected vector for null elements, also referred to as zero elements. A result of the instruction is dependent on whether the null search is provided, or just the compare.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: March 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jonathan D. Bradbury, Michael K. Gschwind, Eric M. Schwarz, Timothy J. Slegel
  • Patent number: 9588764
    Abstract: An apparatus is described that includes instruction execution circuitry to execute first, second, third, and fourth instructions, the first and second instructions select a first group of input vector elements from one of multiple first non-overlapping sections of respective first and second input vectors. Each of the multiple first non-overlapping sections have a same bit width as the first group. Both the third and fourth instructions select a second group of input vector elements from one of multiple second non overlapping sections of respective third and fourth input vectors. The second group has a second bit width that is larger than the first bit width. Each of multiple second non overlapping sections have a same bit width as the second group. The apparatus includes masking layer circuitry to mask the first and second groups at a first granularity and second granularity.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: March 7, 2017
    Assignee: Intel Corporation
    Inventors: Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal, Bret L. Toll, Mark J. Charney, Zeev Sperber, Amit Gradstein
  • Patent number: 9588765
    Abstract: A processor includes a front end with logic to identify a multiplier, multiplicand, and mathematical mode based upon an instruction. The processor also includes a multiplier circuit to apply Booth encoding to multiply the multiplier and multiplicand. The multiplier circuit includes circuitry to determine leftmost and rightmost partial products of multiplying the multiplier and multiplicand using Booth encoding. The circuitry includes a most significant bit (MSB) array and least significant bit (LSB) array corresponding to the multiplier. The multiplier circuit also includes logic to selectively enable selectors of the circuitry to find partial products based upon the mathematical mode of the instruction.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: March 7, 2017
    Assignee: Intel Corporation
    Inventor: Thomas D. Fletcher
  • Patent number: 9588766
    Abstract: A vector reduction instruction is executed by a processor to provide efficient reduction operations on an array of data elements. The processor includes vector registers. Each vector register is divided into a plurality of lanes, and each lane stores the same number of data elements. The processor also includes execution circuitry that receives the vector reduction instruction to reduce the array of data elements stored in a source operand into a result in a destination operand using a reduction operator. Each of the source operand and the destination operand is one of the vector registers. Responsive to the vector reduction instruction, the execution circuitry applies the reduction operator to two of the data elements in each lane, and shifts one or more remaining data elements when there is at least one of the data elements remaining in each lane.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: March 7, 2017
    Assignee: Intel Corporation
    Inventors: Paul Caprioli, Abhay S. Kanhere, Jeffrey J. Cook, Muawya M. Al-Otoom
  • Patent number: 9588767
    Abstract: An aspect includes receiving a write request that includes a memory address and write data. Stored data is read from a memory location at the memory address. Based on determining that the memory location was not previously modified, the stored data is compared to the write data. Based on the stored data matching the write data, the write request is completed without writing the write data to the memory and a corresponding silent store bit, in a silent store bitmap is set. Based on the stored data not matching the write data, the write data is written to the memory location, the silent store bit is reset and a corresponding modified bit is set. At least one of an application and an operating system is provided access to the silent store bitmap.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: March 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Pradip Bose, Chen-Yong Cher, Ravi Nair
  • Patent number: 9588768
    Abstract: An aspect includes receiving a write request that includes a memory address and write data. Stored data is read from a memory location at the memory address. Based on determining that the memory location was not previously modified, the stored data is compared to the write data. Based on the stored data matching the write data, the write request is completed without writing the write data to the memory and a corresponding silent store bit, in a silent store bitmap is set. Based on the stored data not matching the write data, the write data is written to the memory location, the silent store bit is reset and a corresponding modified bit is set. At least one of an application and an operating system is provided access to the silent store bitmap.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: March 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Pradip Bose, Chen-Yong Cher, Ravi Nair
  • Patent number: 9588769
    Abstract: A processor performs out-of-order execution of a first instruction and a second instruction after the first instruction in program order, the first instruction includes source and destination indicators, the source indicator specifies a source of data, the destination indicator specifies a destination of the data, the first instruction instructs the processor to move the data from the source to the destination, the second instruction specifies a source indicator that specifies a source of data. A rename unit updates the second instruction source indicator with the first instruction source indicator if there are no intervening instructions that write to the source or to the destination of the first instruction and the second instruction source indicator matches the first instruction destination indicator.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: March 7, 2017
    Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
    Inventors: Gerard M. Col, Matthew Daniel Day
  • Patent number: 9588770
    Abstract: Reconfiguring a register file using a rename table having a plurality of fields that indicate fracture information about a source register of an instruction for instructions which have narrow to wide dependencies.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 7, 2017
    Assignee: Samsung Electronics Co., LTD.
    Inventors: Bradley Gene Burgess, Ashraf Ahmed, Ravi Iyengar
  • Patent number: 9588771
    Abstract: In one embodiment, the present invention includes a method for directly communicating between an accelerator and an instruction sequencer coupled thereto, where the accelerator is a heterogeneous resource with respect to the instruction sequencer. An interface may be used to provide the communication between these resources. Via such a communication mechanism a user-level application may directly communicate with the accelerator without operating system support. Further, the instruction sequencer and the accelerator may perform operations in parallel. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: March 7, 2017
    Assignee: Intel Corporation
    Inventors: Hong Wang, John Shen, Hong Jiang, Richard Hankins, Per Hammarlund, Dion Rodgers, Gautham Chinya, Baiju Patel, Shiv Kaushik, Bryant Bigbee, Gad Sheaffer, Yoav Talgam, Yuval Yosef, James P. Held
  • Patent number: 9588772
    Abstract: According to one embodiment, a memory controller includes a decoder configured to perform approximate maximum likelihood decoding, the decoder including: an initial value generation unit configured to calculate first data on the basis of a received word read from a non-volatile memory; a storage unit configured to store the first data and a predetermined number of second data; an update unit configured to calculate new second data by using the predetermined number of second data stored and update the storage unit; an arithmetic unit configured to output an addition result of the first data and the latest second data as decoded word information; and a selection unit configured to select a decoded word with the maximum likelihood on the basis of a plurality of the decoded word information.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: March 7, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Daiki Watanabe, Daisuke Fujiwara, Ryo Yamaki
  • Patent number: 9588773
    Abstract: A processing device is provided. A cluster includes a plurality of groups of processing elements. A multi-word device is connected to the processing elements within the groups. Each processing element in a particular group is in communication with all other processing elements within the particular group, and only one of the processing elements within other groups in the cluster. Each processing element is limited to operations in which input bits can be processed and an output obtained without reference to other bits. The multi-word device is configured to cooperate with at least two other processing elements to perform processing that requires reference to other bits to obtain a result.
    Type: Grant
    Filed: January 7, 2014
    Date of Patent: March 7, 2017
    Assignee: Wave Computing, Inc.
    Inventors: Christopher John Nicol, Samit Chaudhuri, Radoslav Danilak
  • Patent number: 9588774
    Abstract: A common boot sequence facility is provided that enables a control utility (e.g., operating system, control program, or other standalone tool, as examples) to be booted in a plurality of configurations without changing the boot sequence. An operating system or other control utility uses the common boot sequence to be able to be booted in either a first architecture configuration that initializes in one architecture, e.g., ESA/390 and then switches to, for instance, another architecture, e.g., z/Architecture, for processing; or in a second architectural configuration that initializes and processes in the another architecture, e.g., z/Architecture.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: March 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Michael K. Gschwind
  • Patent number: 9588775
    Abstract: A multifunctional mobile telephone handset is connected to a PC using a Universal Serial Bus. During bus enumeration, a device class descriptor is returned by the handset to the PC. The PC's operating system receives information relating to one of the functions of the handset and assigns an appropriate device driver.
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: March 7, 2017
    Assignee: Nokia Technologies Oy
    Inventors: James Scales, Varley Bullard, Petri Syrjala
  • Patent number: 9588776
    Abstract: Disclosed herein is a processing device comprising a secured execution environment comprising means for bringing the processing device into a predetermined operational state; and a timer; a communication interface for data communication between the processing device and a remote device management system external to the processing device; wherein the secured execution environment is configured, responsive to an expiry of the timer, to bring the processing device into said predetermined operational state; and responsive to a receipt, from the remote device management system via said communications interface, of a predetermined signal, to restart the timer.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: March 7, 2017
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Bernard Smeets, Patrik Ekdahl
  • Patent number: 9588777
    Abstract: Knowledge transfer between users of a software application. At least some of the example embodiments are methods including: tracking steps performed by a plurality of users of a software application, and the tracking creates tracked steps; identifying a first task as a first series of steps of the tracked steps, and identifying a second task as a second series steps of the tracked steps, the second series of steps distinct from the first series of steps; and providing, on a display device associated with the software application, an indication of the first series of steps of the first task and the second series of steps of the second task, the providing to a later user interacting with the software application.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: March 7, 2017
    Assignee: LANDMARK GRAPHICS CORPORATION
    Inventors: Amit Kumar, Brian D. Davis
  • Patent number: 9588778
    Abstract: Embodiments of the present invention disclose a method, system, and computer program product for a JNI object access system. A computer receives a JNI reference and obtains the pointer data and call site of the referenced object. The computer determines whether a record of the object and call site exist and, if not, the respective records are created. The computer applies a heuristic analysis of the object and call site in which it determines whether the object is larger than a threshold size, whether the object is part of a particular region of the heap, whether the call site is associated with a read-only or a read-write function, and whether the object or call site has caused more non-moving garbage collections than a threshold number. Based on the heuristic, the computer either copies the object data or pins the object and any non-moving garbage collections are recorded.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: March 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Graham A. Chapman, Charles R. Gracie, Daniel J. Heidinga, Karl M. Taylor
  • Patent number: 9588779
    Abstract: A method, apparatus and computer program product that allows for maintaining correct states of all sub-components in a state machine, even as sub-components leave the state machine and later rejoin in some previous state. Preferably, this is achieved without requiring the system to remember the states of all sub-components or a log of every event that was fed into the state machine. Thus, the technique does not require any knowledge of the previous state of the sub-components nor the need to preserve a complete log of events that were fed into the state machine. The state machine may be used to enhance the operation of a technological process, such as a workload management environment.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: March 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Michael Gerard Fitzpatrick, Andrew Hilliard Arrowood, Jr., Gary Owen McAfee, Sue L. Huang
  • Patent number: 9588780
    Abstract: A method, apparatus and computer program product that allows for maintaining correct states of all sub-components in a state machine, even as sub-components leave the state machine and later rejoin in some previous state. Preferably, this is achieved without requiring the system to remember the states of all sub-components or a log of every event that was fed into the state machine. Thus, the technique does not require any knowledge of the previous state of the sub-components nor the need to preserve a complete log of events that were fed into the state machine. The state machine may be used to enhance the operation of a technological process, such as a workload management environment.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: March 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Michael Gerard Fitzpatrick, Andrew Hilliard Arrowood, Gary Owen McAfee, Sue L. Huang
  • Patent number: 9588781
    Abstract: The same command surface on a page may be associated with unrelated components and applications. Each of the components registers the commands associated with a shared command surface that they will be utilizing. Each component may utilize an arbitrary number of commands that are associated with the command surface. The command manager acts as a message broker between the components on the page and the command surfaces. When a command that is associated with a command surface is received, the command manager dispatches the command message to the appropriate components.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: March 7, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Josef Larsson, Eric Bailey, Tim McConnell
  • Patent number: 9588782
    Abstract: A method and a device for processing a window task are provided. The method includes: creating a thread class including a first member variable for representing whether a task processed currently has been cancelled and a first member function for initiating a backstage thread; creating a backstage thread object based on the thread class when a task that takes time needs to be processed, and initializing the first member variable in the backstage thread object as FALSE, invoking the first member function in the backstage thread object to initiate the backstage thread; in process of the backstage thread processing the task that takes time, if a close instruction for a current window is received, setting the first member variable in the backstage thread object as TRUE to release the memory space occupied by the backstage thread object and closing the current window.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: March 7, 2017
    Assignee: Tencent Technology (Shenzhen) Company Limited
    Inventors: Zifeng Shang, Xuemin Ma
  • Patent number: 9588783
    Abstract: References between three dimensional computer-generated virtual environments may be used to enable objects, activities, and Avatars to move between and within multiple virtual environments hosted by multiple different virtual environment servers/server systems. Links may be used to reference particular locations and orientations within target virtual environments. Vistas may also be created to allow a view into a target virtual environment to be presented to a user in a resident virtual environment. Links and vistas may be combined to create portals, whereby a user may be presented with a view of a target virtual environment in the resident virtual environment. The view of the target virtual environment may be caused to change as the user approaches the vista or moves relative to the vista to make it appear like the user is seeing into the target virtual environment. If the user goes through the vista the link may transport the user into the target virtual environment.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: March 7, 2017
    Assignee: Avaya Inc.
    Inventors: Dany Syvain, Nicholas Sauriol, Arn Hyndman
  • Patent number: 9588784
    Abstract: Methods and systems for providing content for webpages are disclosed. The disclosed method includes providing a plurality of selections to set webpage personalization settings and receiving a user selection chosen from one of the plurality of selections. The plurality of selections is provided for a graphic user interface to be defined on a webpage. After receiving a request for a second webpage made by a user through a user device, the content for the second webpage is selected based on the received user selection. The content selection for the second webpage includes identifying two or more content modules for presenting on the second webpage and at least one of the identified content modules includes an associated content indicator. The selected content for the second webpage is then forwarded to the user device for display.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: March 7, 2017
    Assignee: Yahoo! Inc.
    Inventors: Amit Motgi, Hrishi Mantri
  • Patent number: 9588785
    Abstract: Systems and methods are disclosed for configuring a web application based on a general property hierarchy. An application property scheme including one or more property hierarchy levels may be generated based on values within a system configuration file. Each level defines configuration values for various properties associated with the web application. A property retrieval subsystem of the general property hierarchy may be used to look up configuration values from the appropriate hierarchy level(s) of the application property scheme in order to configure one or more properties of the web application during its execution. The values in the system configuration file may be changed and the changes may be reflected dynamically in the application property scheme without substantial interruption to the execution of the web application.
    Type: Grant
    Filed: October 4, 2013
    Date of Patent: March 7, 2017
    Assignee: AOL Inc.
    Inventors: Brendan J. McGee, Jay Trevor McFarland
  • Patent number: 9588786
    Abstract: In an approach for managing user profiles, a computer identifies a first user profile and one or more additional user profiles, wherein the first user profile is active on a computing device. The computer receives streaming data. The computer receives a trigger wherein the received trigger includes biometric data. The computer identifies a second user profile from the identified one or more additional user profiles that is associated with the received trigger. The computer compares biometric data from the second user profile with the biometric data in the received trigger. The computer determines whether the biometric data matches, within a defined tolerance level, the biometric data in the second user profile.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: March 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Mauro Arcese, Fabio De Angelis, Nicola Milanese, Andrea Napoleoni, Stefano Sidoti
  • Patent number: 9588787
    Abstract: Methods and systems for managing execution of processes in virtual environments are disclosed. One method includes creating a virtual process from a process executing on a first virtual machine, and transferring the virtual process from the first virtual machine to a second virtual machine. The method also includes executing the virtual process on the second virtual machine, and, after the virtual process completes, removing the virtual process from the second virtual machine.
    Type: Grant
    Filed: August 6, 2014
    Date of Patent: March 7, 2017
    Assignee: Unisys Corporation
    Inventor: Sateesh Mandre
  • Patent number: 9588788
    Abstract: Communication between program components executing in different virtual machines on the same physical computer may be optimized utilizing various mechanisms. A virtual machine manager may be configured to route network communications between virtual machines on the same physical host through a memory buffer. The virtual machine manager might also be configured to provide a shared memory and/or a shared data structure for enabling data communication between program components executing in different virtual machines on the same physical computing device. Mechanisms might also be implemented in order to prevent inconsistent read and/or write operations from being performed on the shared memory and/or the shared data structure. Mechanisms might also be implemented to minimize copying of a memory buffer, shared memory, and/or shared data structure.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: March 7, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Harsha Ramalingam, Bhavnish H. Lathia, Michael James McInerny, Kyle Bradley Peterson, Leon Robert Warman
  • Patent number: 9588789
    Abstract: A management apparatus deploys, when loads of one or more first virtual machines deployed on a first system satisfy a first load condition, one or more second virtual machines on a second system, and distributes processing of a business operation across the first and second virtual machines. The management apparatus allows a different second virtual machine to be added to the second system when, after the second virtual machines are deployed, the loads of the first virtual machines satisfy the first load condition and loads of the second virtual machines satisfy a second load condition. The management apparatus restricts the addition of the different second virtual machine to the second system when, after the second virtual machines are deployed, the loads of the first virtual machines satisfy the first load condition but the loads of the second virtual machines do not satisfy the second load condition.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: March 7, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Kenichirou Shimogawa
  • Patent number: 9588790
    Abstract: A system for providing a stateful virtual compute system is provided. The system may be configured to maintain a plurality of virtual machine instances. The system may be further configured to receive a request to execute a program code and select a virtual machine instance to execute the program code on the selected virtual machine instance. The system may further associate the selected virtual machine instance with shared resources and allow program codes executed in the selected virtual machine instance to access the shared resources.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: March 7, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Timothy Allen Wagner, Sean Philip Reque
  • Patent number: 9588791
    Abstract: Techniques and mechanisms provide a flexible mapping for physical functions and virtual functions in an environment including virtual machines.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: March 7, 2017
    Assignee: Altera Corporation
    Inventors: Jiefan Zhang, Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis
  • Patent number: 9588792
    Abstract: An architecture for sorts and bucketizes alerts in a virtualization environment. A plurality of alerts associated with virtual machines in the virtualization environment is received. A plurality of attributes is identified for the virtual machines, and a plurality of buckets defined for each attribute, into which the received alerts are assigned. The buckets for each attribute are then sorted. The attributes may also be sorted based upon the distribution of alerts in the buckets of the attribute, allowing a system administrator or other personnel to more easily determine which attributes of the virtual machines are correlated with the received alerts, in order to identify potential causes and solutions for the alerts in the virtualization environment.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: March 7, 2017
    Assignee: Nutanix, Inc.
    Inventors: Kothuri Venkata Vamsi Krishna, Rajesh P. Bhatt
  • Patent number: 9588793
    Abstract: Systems and methods for creating new virtual machines based on post-boot virtual machine snapshots. An example method may include: receiving a request to create a new virtual machine, identifying, in view of the request, a virtual machine snapshot, the virtual machine snapshot including one or more elements of an initialized virtual machine, determining an update efficiency metric with respect to the virtual machine snapshot, and in response to a determination that the update efficiency metric reflects that updating the virtual machine snapshot is relatively more efficient than creating a new virtual machine in lieu of the virtual machine snapshot, creating the new virtual machine in view of the virtual machine snapshot.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: March 7, 2017
    Assignee: Red Hat Israel, Ltd.
    Inventors: Eduardo Warszawski, Yeela Kaplan
  • Patent number: 9588794
    Abstract: A method for managing software on a virtual machine in a cloud environment is provided. The method includes: a host transmits a software management request to a virtual machine; the host acquires a software management script from a shared storage server according to a request for the management script returned by the virtual machine after the software management request is received; and the host transmits the acquired software management script to the virtual machine and indicates the virtual machine to execute the software management script. a system and a device for managing software on the virtual machine in a cloud environment are also provided. By the schemes of the present invention, the operation of needing to configure an IP address to the virtual machine when the virtual machine software is managed is avoided. Meanwhile, the problem that the software of a virtual machine not configured with an IP address in a cloud environment cannot be managed is solved.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: March 7, 2017
    Assignee: ZTE Corporation
    Inventors: Gaiying Shen, Bo Liu, Beijie Shen
  • Patent number: 9588795
    Abstract: Various aspects of the disclosure relate to monitoring of resource usage in a virtualized environment, including usage of a physical processor that executes a virtual machine or an application of the virtualized environment. By monitoring physical computing resources (e.g., by number and type) that are used to execute a virtual machine or an application of the virtualized environment, a user may, for example, be informed as to when physical computing resources are used in excess or less than the limits set by the license. In some embodiments, additional actions may be taken to update the license to better satisfy the user's resource requirements or reduce the amount paid annually for ongoing technical services. To inform a user, or form the basis for the additional actions, a report may be generated that includes data describing how a virtual machine or application executed on the physical computing resources.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: March 7, 2017
    Assignee: Aspen Timber LLC
    Inventors: Kenneth L. McWilliams, Prasad Siddabathuni
  • Patent number: 9588796
    Abstract: Examples perform live migration of virtual machines (VM) from a source host to a destination host. The live migration performs time-consuming operations before the source host is stunned, reducing the downtime apparent to users. Some examples contemplate pre-copying memory from the source VM to the destination VM, and the opening of disks on the destination VM before stunning the source VM.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: March 7, 2017
    Assignee: VMware, Inc.
    Inventors: Gabriel Tarasuk-Levin, Patrick William Penzias Dirks, Haripriya Rajagopal, Sujay Shrikant Godbole, Derek Uluski
  • Patent number: 9588797
    Abstract: A method, system and computer program product for optimizing cloud resources in utilizing a pool of virtual machines to service user workloads. A writeable partition is created to store middleware and user activity associated with a virtual machine obtained from a pool of available virtual machines to be deployed. In response to the obtained virtual machine being terminated, the contents of the created writeable partition are erased so that the data generated by the middleware and user activity will not be available for subsequent users. The virtual machine is later returned to the pool of available virtual machines after resetting its password and network address to a default state. In this manner, fewer cloud resources are used since resource intensive activities that were required in provisioning a new virtual machine can be eliminated since previously terminated virtual machines can be utilized in the pool of available virtual machines.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: March 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Rohith K. Ashok, James K. Kochuba, Aaron J. Quirk
  • Patent number: 9588798
    Abstract: Provided is a software safe shutdown system, comprising: an OS anomalous shutdown detection unit, which detects that an operating system of a virtual machine which is executed by a computer system has had an anomalous shutdown due to a memory leak; a memory resource securing unit which secures, from among a usable memory resource within the computer system, a memory resource which is necessary to recover a console function of the anomalously shutdown virtual machine; and a console acquisition unit which allocates the secured memory resource to the anomalously shutdown virtual machine, and which, after recovering the console function, normally shuts down the virtual machine using the console function.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: March 7, 2017
    Assignee: NEC CORPORATION
    Inventor: Fumio Machida
  • Patent number: 9588799
    Abstract: Systems and methods are described for a storage processing service that processes multiple storage commands. The storage processing service uses tags from test storage commands to determine whether a test storage service is to be instantiated that reflects a corresponding production service. Test storage commands with the same tag are tested on that test service. Additionally, the storage processing service determines a strategy for testing processes on production services when the storage system is overloaded. In one embodiment, the test service manager can determine to stop testing processes for a period of time, and issue a shed command that queues or sheds test storage commands. Advantageously, a shed command, while active at a storage processing service, may alleviate the overload on production services. The test service manager can continue to monitor the storage system to determine whether the overload continues to exist.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: March 7, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Brian Todd Burruss, John Luther Guthrie, II, Marc Stephen Olson, Madhuvanesh Parthasarathy
  • Patent number: 9588800
    Abstract: The invention provides an enhanced two phase commit process to perform a transaction started by an application program and involving access to one or more resources managed by respective resource managers. The method comprises the steps of: enlisting the resource managers participating in the transaction, said enlisting step including associating a priority rank with each identified resource manager based on predefined priority rules; sending a prepare signal to said enlisted resource managers to begin the process of committing the transaction; and if a ready signal is received from all resource managers in response to the prepare signal, committing the resource managers in the order defined from the priority ranks associated with the resource managers.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: March 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Ehab El-Kersh, Mohamed Refaat Obide
  • Patent number: 9588801
    Abstract: An apparatus and method for improving the efficiency with which speculative critical sections are executed within a transactional memory architecture. For example, a method in accordance with one embodiment comprises: waiting to execute a speculative critical section of program code until a lock is freed by a current transaction; responsively executing the speculative critical section to completion upon detecting that the lock has been freed, regardless of whether the lock is held by another transaction during the execution of the speculative critical section; once execution of the speculative critical section is complete, determining whether the lock is taken; and if the lock is not taken, then committing the speculative critical section and, if the lock is taken, then aborting the speculative critical section.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: March 7, 2017
    Assignee: INTEL CORPORATION
    Inventors: Irina Calciu, Justin E Gottschlich, Tatiana Shpeisman, Gilles A Pokam
  • Patent number: 9588802
    Abstract: In one embodiment, a computer-implemented method includes producing one or more clean frames by clearing a batch of one or more frames for use in backing virtual memory pages. The producing the one or more clean frames may be performed asynchronously from a unit of work being performed by a processor. The one or more clean frames may be added to a clean frame queue, where the clean frame queue includes a plurality of clean frames that have been cleared. A first request may be received, from the processor, for a frame for use in backing a virtual memory page of the unit of work. A clean frame, of the one or more clean frames, may be removed from the clean frame queue, responsive to the first request. The clean frame may be delivered to the processor, responsive to the first request.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: March 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Miller, Jr., Steven M. Partlow, Thomas F. Rankin, Scott B. Tuttle, Elpida Tzortzatos
  • Patent number: 9588803
    Abstract: Techniques for leveraging legacy code to deploy native-code desktop applications over a network (e.g., the Web) are described herein. These techniques include executing an application written in native code within a memory region that hardware of a computing device enforces. For instance, page-protection hardware (e.g., a memory management unit) or segmentation hardware may protect this region of memory in which the application executes. The techniques may also provide a narrow system call interface out of this memory region by dynamically enforcing system calls made by the application. Furthermore, these techniques may enable a browser of the computing device to function as an operating system for the native-code application. These techniques thus allow for execution of native-code applications on a browser of a computing device and, hence, over the Web in a resource-efficient manner and without sacrificing security of the computing device.
    Type: Grant
    Filed: May 11, 2009
    Date of Patent: March 7, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Jonathan R. Howell, Jacob R. Lorch, Jeremy E. Elson, John R. Douceur
  • Patent number: 9588804
    Abstract: A portable computing device synchronously offloads tasks from a first processing resource to an alternative processing resource. Offload requests are centralized and communicated to a dispatch controller. The request defines the alternative processing resource and the location of items in a common or shared memory related to a thread that is desired to be transferred or dispatched from the primary processing resource to the identified alternative processing resource. The dispatch controller, in response to the request, creates a task dispatch packet that provides the information required to switch the context of the thread that was previously executing on the primary processing resource to the alternative processing resource. The common or shared memory space is leveraged to provide desired performance. Results generated by the alternative processing resource are available in the shared memory space upon return to the primary processing resource.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: March 7, 2017
    Assignee: QUALCOMM INCORPORATED
    Inventor: Benedict Rueben Gaster
  • Patent number: 9588805
    Abstract: The present disclosure provides a method which includes: generating an application list according to applications running in an operating system; traversing the identifiers in the application list; determining whether an application corresponding to a currently traversed identifier is a background application; determining whether a predetermined white list comprises the currently traversed identifier and whether the number of identifiers corresponding to background applications in the application list is greater than a predetermined threshold, if the application corresponding to the currently traversed identifier is a background application; selecting an identifier corresponding to a background application from the application list and closing the background application corresponding to the selected identifier, if the predetermined white list comprises the currently traversed identifier and the number is greater than the predetermined threshold; or closing the application corresponding to the currently traver
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: March 7, 2017
    Assignee: XIAOMI INC.
    Inventors: Jun Yuan, Minghao Li, Jinxiang Liang, Jiantao Tao
  • Patent number: 9588806
    Abstract: Methods and apparatus, including computer program products, are provided for transporting processes within a distributed computing system, such as a cluster. In one aspect, the computer-implemented method may receive an event at a first node. The event may correspond to a process instance for handling the received event. The process instance may be transported from a second node to the first node. The process instance may be transported from a persistence when the process instance is inactive and, when the process instance is active, the process instance may be persisted to enable transport to the first node. Related apparatus, systems, methods, and articles are also described.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: March 7, 2017
    Assignee: SAP SE
    Inventors: Thilo-Alexander Ginkel, Matthias Miltz, Sören Balko, Boris Klinker
  • Patent number: 9588807
    Abstract: An approach is provided in which a migration agent receives a message to migrate a virtual machine from a first system to a second system. The first system extracts hardware state data stored in a native format from a memory area located on first system's network adapter. The hardware state data is utilized by the first system's network adapter to process data packets generated by the virtual machine. Next, the virtual machine is migrated to the second system, which includes copying the extracted hardware state data from the first system to the second system. In turn, the second system configures a corresponding second network adapter by writing the copied hardware state data to a memory located on the second network adapter.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: March 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Francisco Jesus Alanis, Omar Cardona
  • Patent number: 9588808
    Abstract: A multi-core processing system includes a first processing core, a second processing core, a task manager coupled to the first and second processing cores. The task manager is operable to receive context information of a task from the first processing core and provide the context information to the second processing core. The second processing core continues executing the task using the context information.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: March 7, 2017
    Assignee: NXP USA, INC.
    Inventors: Zheng Xu, Tommi M. Jokinen, William C. Moyer
  • Patent number: 9588809
    Abstract: Resource-based scheduling of computer jobs is disclosed. A computer job is scheduled based on utilization of a resource and a utilization criterion that the computer job has pertaining to the resource, in accordance with an embodiment of the present invention.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: March 7, 2017
    Assignee: Invistasking LLC
    Inventors: Craig Jensen, Andrew Staffer, Basil Thomas, Richard Cadruvi
  • Patent number: 9588810
    Abstract: Parallelism-aware scheduling of memory requests of threads in shared memory controllers. Parallel scheduling is achieved by prioritizing threads that already have requests being serviced in the memory banks. A first algorithm prioritizes requests of the last-scheduled thread that is currently being serviced. This is accomplished by tracking the thread that generated the last-scheduled request (if the request is still being serviced), and then scheduling another request from the same thread if there is an outstanding ready request from the same thread. A second algorithm prioritizes the requests of all threads that are currently being serviced. This is accomplished by tracking threads that have at least one request currently being serviced in the banks, and assigning the highest priority to these threads in the scheduling decisions. If there are no outstanding requests from any thread having requests that are being serviced, the algorithm defaults back to a baseline scheduling algorithm.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: March 7, 2017
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Onur Mutlu, Thomas Moscibroda
  • Patent number: 9588811
    Abstract: A method for analysis of thread latency includes: determining a thread of interest; computing a summation of time periods in which the thread of interest stays in a run queue to determine a thread in-run-queue time; computing a summation of time periods in which the thread of interest is preempted by other threads to determine a thread preempted time; and evaluating thread latency of the thread of interest according to the thread preempted time to the thread in-run-queue time.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: March 7, 2017
    Assignee: MEDIATEK INC.
    Inventors: Yi-Hsuan Lin, Hsin-Hsien Huang