Patents Issued in April 11, 2017
  • Patent number: 9619339
    Abstract: A data storage system, according to certain aspects, automatically determines the accuracy of replication data when performing data backup operations. For instance, the system performs data backup using replication data rather than source data to reduce the processing load on the source system. The backup data is then associated with the source data as if the backup had been performed on the source data. If the replication system fails, then backing up replication data results in backup data that does not accurately reflect the source data. The system automatically determines the accuracy of replication data during data backup.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: April 11, 2017
    Assignee: Commvault Systems, Inc.
    Inventors: Paramasivam Kumarasamy, Brahmaiah Vallabhaneni, Ravi Thati
  • Patent number: 9619340
    Abstract: A computer-implemented method may comprise performing a disaster recovery restore process on a target computing device; accessing a backup server; and selecting a source backup from the backup server. The source backup may comprise one or more volumes, partitions, files and device drivers of a source computing device from which the source backup was created. The selected source backup may then be installed in an offline partition of the target computing device. One or more target device drivers may then be installed in the offline partition. To complete the disaster recovery restore process on the target computing device, the target computing device may then be rebooted. Both the backup of the source computing device and the active partition of the target device may comprise source computing device-dependent hardware device drivers. When carried out in a Windows® environment, Sysprep need not be used and the kernel need not be modified.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: April 11, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventor: Rajesh Mirkhelkar
  • Patent number: 9619341
    Abstract: The present invention relates to a method for performing an image level copy of an information store. The present invention comprises performing a snapshot of an information store that indexes the contents of the information store, retrieving data associated with the contents of the information store from a file allocation table, copying the contents of the information store to a storage device based on the snapshot, and associating the retrieved data with the copied contents to provide file system information for the copied contents.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: April 11, 2017
    Assignee: Commvault Systems, Inc.
    Inventors: Anand Prahlad, David Ngo, Prakash Varadharajan, Rahul S. Pawar, Avinash Kumar
  • Patent number: 9619342
    Abstract: Embodiments of the present invention provide efficient and cost-effective systems and methods for backing up and recovering a virtual machine and application data therein. Embodiments of the present invention can be used to satisfy near-zero RPOs by providing more recovery points for backups in virtual machine environments, while also providing increased granularity for recovery (i.e., single virtual disk, single file, etc.) and maintaining central management capabilities and back up efficiencies offered by virtual machine-level backups.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Zhengwen He, Mandeep K. Jandir, James P. Smith, Mark L. Yakushev, Christopher Zaremba
  • Patent number: 9619343
    Abstract: According to embodiments of the present invention, a metadata file is transferred from the first system to the second system and a database on the second system is initialized based on the metadata file. An image, including information of the first system to be restored, is transferred from the first system to the second system, and restoration of the information to the second system based on the image is initiated. Prior to completion of the restoration, one or more log files indicating actions performed on the first system relating to the information to be restored is transferred from the first system to the initialized database on the second system. In response to completion of the restoration, the actions of the log files are performed to synchronize the restored data on the second system with the first system.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Naresh K. Chainani, Kiran K. Chinta
  • Patent number: 9619344
    Abstract: According to embodiments of the present invention, a metadata file is transferred from the first system to the second system and a database on the second system is initialized based on the metadata file. An image, including information of the first system to be restored, is transferred from the first system to the second system, and restoration of the information to the second system based on the image is initiated. Prior to completion of the restoration, one or more log files indicating actions performed on the first system relating to the information to be restored is transferred from the first system to the initialized database on the second system. In response to completion of the restoration, the actions of the log files are performed to synchronize the restored data on the second system with the first system.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Naresh K. Chainani, Kiran K. Chinta
  • Patent number: 9619345
    Abstract: A processor core includes a transactional memory that stores information corresponding to a plurality of transactions executed by the processor core, and a transaction diagnostic register. The processor core retrieves context summary information from at least one register of the processor core. The processor core stores the context summary information of aborted transactions into the transactional memory or the transaction diagnostic register. The context summary information can be used for diagnosing the aborted transactions.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Harold W Cain, Bradly G Frey, Hung Q Le, Cathy May
  • Patent number: 9619346
    Abstract: Run-time, event-driven virtual machine introspection of the target guest virtual machine is facilitated as described herein. A component can specify events that are of interest to the component for introspection of a target guest virtual machine of a hypervisor. The hypervisor detects an introspection event generated by a target guest virtual machine and determines whether the introspection event is of interest for handling by a component coupled to the hypervisor. If so, the hypervisor alerts the component about the introspection event and provides information associated with the introspection event to the component. The component thereby receives notification of occurrence of the introspection event from the hypervisor and may obtain information associated with the introspection event.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: April 11, 2017
    Assignee: ASSURED INFORMATION SECURITY, INC.
    Inventor: Stephen Raymond Pape
  • Patent number: 9619347
    Abstract: An apparatus includes: a physical-layer device that distributes data to first lanes and performs data transfer to/from an external device by second lanes each of which has a number of the first lanes; and a transfer circuit that transfers data output by a central-processing unit performing arithmetic-processing to the physical-layer device and transfers the data received from the physical-layer device and received by the central-processing unit, the transfer circuit that comprises an information-acquisition unit that receives one of detection information of the first lanes which indicates that the physical-layer device has received data from the external device and error information of the first lanes which indicates that the data transferred to the physical-layer device from the external device has an error, from the physical-layer device, and a selection unit configured to specify the second lane to be degenerated based on one of the error information and the detection information.
    Type: Grant
    Filed: February 24, 2015
    Date of Patent: April 11, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Masahiro Maeda, Tomohiro Inoue, Shinya Hiramoto, Shun Ando, Koji Hosoe, Yuichiro Ajima
  • Patent number: 9619348
    Abstract: According to an aspect of an embodiment, an information processing apparatus includes a save unit, a stopping unit and a reserve power supply unit. The save unit saves, in a device including an uninterruptible power supply device, first information including information stored in a memory allocated to a virtual machine operated by the information processing apparatus and information stored in a register allocated to the virtual machine at a time of a power outage. The stopping unit stops the virtual machine when the save of the first information is completed. The reserve power supply unit supplies power needed for the processing performed by the save unit and the stopping unit at the time of the power outage.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: April 11, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Mikio Uehara
  • Patent number: 9619349
    Abstract: In computing systems that provide multiple computing domains configured to operate according to an active-standby model, techniques are provided for intentionally biasing the race to gain mastership between competing computing domains, which determines which computing domain operates in the active mode, in favor of a particular computer domain. The race to gain mastership may be biased in favor of a computing domain operating in a particular mode prior to the occurrence of the event that triggered the race to gain mastership. For example, in certain embodiments, the race to mastership may be biased in favor of the computing domain that was operating in the active mode prior to the occurrence of an event that triggered the race to gain mastership.
    Type: Grant
    Filed: October 14, 2014
    Date of Patent: April 11, 2017
    Assignee: Brocade Communications Systems, Inc.
    Inventors: Bill Jianqiang Zhou, William R. Mahoney
  • Patent number: 9619350
    Abstract: An information handling system may include a processor and a first storage management console comprising a program of executable instructions embodied in non-transitory computer-readable media accessible to the processor, and configured to, when read and executed by the processor: (i) manage input/output between an application and a primary physical storage controller to perform input/output between the application and a storage resource communicatively coupled to primary physical storage container; (ii) asynchronously mirror application-consistent snapshots of data associated with the application from the primary physical storage controller to a storage virtual controller configured to emulate a physical storage controller such that the storage virtual controller stores the snapshots to remote storage geographically remote from the information handling system; (iii) store metadata associated with the application and data stored to the storage resource and the remote storage; and (iv) copy the metadata to a s
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: April 11, 2017
    Assignee: Dell Products L.P.
    Inventors: Gopakumar Ambat, Yask Sharma
  • Patent number: 9619351
    Abstract: In one embodiment, a node of a cluster is coupled to a storage array of storage devices. The node executes a storage input/output (I/O) stack having a redundant array of independent disks (RAID) layer that organizes the storage devices within the storage array as a plurality of RAID groups. Configuration information is stored as a cluster database. The configuration information identifies the RAID groups associated with the storage devices. Each RAID group is associated with a plurality of segments and each segment has a different RAID configuration.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: April 11, 2017
    Assignee: NetApp, Inc.
    Inventors: Rajesh Sundaram, Bharat Baddepudi
  • Patent number: 9619352
    Abstract: One or more techniques and/or systems are provided for controlling restoration of a storage aggregate. For example, a local storage device, located at a first storage site, and a remote storage device, located at a second storage site, may be assigned to a first storage aggregate. Responsive to a disaster of the first storage site, a gate may be created for the local storage device. The gate may block automated reconstruction and/or automated synchronization that may otherwise occur with respect to the local storage device. Until the local storage device is restored, the remote storage device may be used to service I/O requests that were otherwise directed to the local storage device. Responsive to receiving a user restoration command, the gate may be removed from the local storage device. Synchronization between the local storage device and the remote storage device may then be facilitated.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: April 11, 2017
    Assignee: NetApp, Inc.
    Inventors: Chaitanya V. Patel, Laurent Nicolas Lambert, Linda Ann Riedle, Sandeep T. Nirmale
  • Patent number: 9619353
    Abstract: In one embodiment, a system includes a storage subsystem having an array of storage devices; a receiving component for receiving an error message; a determining component for determining that the error message indicates that a storage device has failed; a collecting component for collecting an array record having storage device characteristics of the failed storage device; a collating component for collating a candidate record having a plurality of candidate entries; a comparing component for comparing storage device characteristics of the failed storage device of the array record with the storage device characteristics of each of the candidate entries; and an identifying component for identifying a first candidate storage device having storage device characteristics that match the storage device characteristics of the failed storage device or a second candidate storage device having storage device characteristics most similar to the storage device characteristics of the failed storage device.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: April 11, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eric J. Bartlett, Matthew J. Fairhurst, William J. Scales
  • Patent number: 9619354
    Abstract: Diagnosing faults in a hardware appliance. Information is read by a hand-held reader from one or more contactless tags associated with one or more components in a hardware appliance. One or more component faults and/or issues are identified based on the read information. A query is formed based on the identified one or more component faults and/or issues. A diagnostic database in the hand-held reader is queried, based on the formed query, and one or more query results are displayed in a ranked order on a display of the hand-held reader. In one aspect of the embodiments, the information read from the one or more contactless tags includes a pointer to a datastore in one of the one or more components. An ad hoc wireless network connection is established with the hardware appliance, and information in the datastore is downloaded over the connection.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Ryan M. Basile, Dana L. Price, Aaron J. Quirk
  • Patent number: 9619355
    Abstract: A booting verification method for a computer and an electronic device are provided. The booting verification method includes the following steps. Whether a manufacturing mode indication is present is determined. The manufacturing mode indicator is established and the manufacturing mode indicator is set to a predetermined value if the manufacturing mode indicator is absent, where the predetermined value is greater than or equal to 1. Whether the manufacturing mode indicator is greater than 0 is determined if the manufacturing mode indicator is present. A manufacturing booting mode is entered and the manufacturing mode indicator is decreased if the manufacturing mode indicator is greater than 0. A normal booting mode is entered if the manufacturing mode indicator is not greater than 0.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: April 11, 2017
    Assignee: WISTRON CORPORATION
    Inventors: Cheng-Te Chen, Wei-Chiang Tsou
  • Patent number: 9619356
    Abstract: A method for detecting errors in hardware including running a transaction on a plurality of cores, wherein each of the cores runs a respective copy of the transaction, periodically synchronizing the transaction on the cores throughout execution of the transaction, comparing results of the transaction on the cores, and determining an error in one or more of the cores.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Harold W. Cain, III, David M. Daly, Kattamuri Ekanadham, Michael C. Huang, Jose E. Moreira, Mauricio J. Serrano
  • Patent number: 9619357
    Abstract: Systems for reducing power consumption and power leakage in hybrid storage clusters is provided. More specifically, the system is for allocating an appropriate server amongst a plurality of servers in a network by identifying an application to be executed in a network, wherein the network comprises a plurality of servers configured to execute the applications, and each server further comprising a hybrid memory system; based on the application to be executed, dynamically identifying resources to execute the application based on the hybrid memory system available and the power consumption for executing the application; and dynamically allocating the application to the identified resource for execution.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Bhushan P. Jain, Sri Ramanathan, Sandeep R. Patil, Abhinay R. Nagpal
  • Patent number: 9619358
    Abstract: Methods and systems for analyzing bus traffic in a target device, such as a system on-a-chip (SOC) comprises capturing a processor event and generating an interrupt based on a threshold associated with the processor event. Based on at least the interrupt, a instruction pointer associated with the processor event that generated the interrupt is identified. An instruction analyzer identifies a memory address of the instruction associated with the processor event that generated the interrupt. At least the processor event and a associated instruction information are collected by a sample collector and transferred to a host for performance profiling.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: April 11, 2017
    Assignee: Marvell International Ltd.
    Inventors: Wenwei Cai, Zhenhua Wu
  • Patent number: 9619359
    Abstract: A server and a signal analyzing device thereof are disclosed. The server includes a plurality of hard disk drive (HDDs), a plurality of indicators, at least a jumper, and a logic array. The logic array is coupled to the at least one jumper and includes a plurality of analyzing modules. The logic array selects one of the analyzing modules in response to the at least one jumper. The selected analyzing module analyzes an input signal and outputs a decoded signal. The indicators show the states of the HDDs according to the decoded signal.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: April 11, 2017
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventor: Yuan-Hui Guo
  • Patent number: 9619360
    Abstract: A method and system for creating a library method stub in source code form corresponding to an original library call in machine-executable form. The library method stub is created in a predefined programming language by use of a library method signature associated with the original library call, at least one idiom sentence, and a call invoking the original library call. Creating the library method stub includes composing source code of the library method stub by matching the at least one idiom sentence with idiom-stub mappings predefined for each basic idiom of at least one basic idiom. The original library call appears in sequential code. The library method signature specifies formal arguments of the original library call. The at least one idiom sentence summarizes memory operations performed by the original library call on the formal arguments. The created library method stub is stored in a database.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Shivali Agarwal, Monika Gupta, Naga Praveen Kumar Katta
  • Patent number: 9619361
    Abstract: A performance profiling apparatus includes: a plurality of counters provided for a routine included in a program; a storage section configured to store an instruction of the program and an identification information indicating the routine of the program; a processor configured to read the instruction from the storage section and to execute a process according to the instruction; and a counter controller configured to, at the time of reading the instruction of the processor, receive the identification information of the instruction which is output from the storage section with the instruction and to instruct a first counter designated by the identification information to count up.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: April 11, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Takatoshi Fukuda, Shuji Takada, Kenjiro Mori
  • Patent number: 9619362
    Abstract: According to an aspect of an embodiment, a method may include determining event sequences of an event-driven software application. The method may further include determining, for each event sequence, a distance with respect to each of one or more target conditions of the event-driven software application. The event sequence distance may indicate a degree to which execution of its corresponding event sequence satisfies a corresponding target condition. The method may also include prioritizing execution of the plurality of event sequences based on the event sequence distances. Further, the method may include exploring, according to the prioritization of execution, an event space that includes one or more of the event sequences and a dependent event that corresponds to the one or more target conditions.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: April 11, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Guodong Li, Indradeep Ghosh
  • Patent number: 9619363
    Abstract: Predicting software product quality. Real-time and historic software code metrics, software code defect data for the software product, and test case-related data for the software product are received. A feature predicted fallibility that estimates the number of code defects for a new feature of the software product, a product version projected fallibility that estimates the number of code defects for a new version of a software product, a test case related quality coefficient that estimates the likelihood of discovery of code defects in a new feature, a feature quality and a product quality indexes that are qualitative indications of quality of the new code of a feature and the new product version, are calculated. A report is then output that includes at least the calculated values, whereby developer resources are directed to features of the software product for which the calculated values indicate likelihoods of a high defect densities.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Poonam P. Chitale, Catherine M. Cox, Dario D'Angelo, Xiyao Jiang, Shahin Mohammadi-Rashedi, Thomas J. Pavela, Jeffrey S. Rhodes, Marian E. Sadowski
  • Patent number: 9619364
    Abstract: A method for analyzing race conditions between multiple threads of an application is disclosed. The method comprises accessing hazard records for an application under test. It further comprises creating a graph comprising a plurality of vertices and a plurality of edges using the hazard records, wherein each vertex of the graph comprises information about a code location of a hazard and wherein each edge of the graph comprises hazard information between one or more vertices. Additionally, it comprises assigning each edge with a weight, wherein the weight depends on a number and relative priority of hazards associated with a respective edge. Finally, it comprises traversing the graph to report an analysis record for each hazard represented in the graph.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: April 11, 2017
    Assignee: NVIDIA CORPORATION
    Inventor: Vyas Venkataraman
  • Patent number: 9619365
    Abstract: A streams manager monitors data tuples processed by a streaming application represented by an operator graph. The streams manager includes a tuple breakpoint mechanism that allows defining a tuple breakpoint that fires based on resource usage by the data tuple. When the tuple breakpoint fires, one or more operators in the operator graph are halted according to specified halt criteria. Information corresponding to the breakpoint that fired is then displayed. The tuple breakpoint mechanism thus provides a way to debug a streaming application based on resource usage by data tuples.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Eric L. Barsness, Michael J. Branson, John M. Santosuosso
  • Patent number: 9619366
    Abstract: According to example embodiments of the present invention, an object to be monitored is determined, the object being associated with a variable in a code snippet including a plurality of statements. The object is monitored in execution of the plurality of statements. If a plurality of updates of the object are detected in the execution of the plurality of statements, a snapshot associated with each of the updates of the object is created. The snapshot includes a current value of the object and a memory address for the current value of the object.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Ji Yong Huang, Bin Bin Li, Lin Lu, Jun Zhou
  • Patent number: 9619367
    Abstract: According to example embodiments of the present invention, an object to be monitored is determined, the object being associated with a variable in a code snippet including a plurality of statements. The object is monitored in execution of the plurality of statements. If a plurality of updates of the object are detected in the execution of the plurality of statements, a snapshot associated with each of the updates of the object is created. The snapshot includes a current value of the object and a memory address for the current value of the object.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Ji Yong Huang, Bin Bin Li, Lin Lu, Jun Zhou
  • Patent number: 9619368
    Abstract: A method of testing software uses a debugger and a breakpoint handler. The debugger inserts a breakpoint in a target application and enters at least one filtering condition associated with the breakpoint in a data structure. When during execution the target application encounters a breakpoint at an address, the target application transfers execution to the breakpoint handler. The breakpoint handler uses the address to retrieve filtering conditions from the data structure, executes code for evaluating the filtering condition, and transfers execution back to the target application if the filtering condition is not met.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: April 11, 2017
    Assignee: NXP USA, INC.
    Inventors: Dragos Miloiu, Alexandru Cosmin Gheorghe, Radu Theodor Lazarescu, Mihail-Marian Nistor
  • Patent number: 9619369
    Abstract: Disclosed aspects include identifying basic blocks of a program. For each basic block, the compiler inserts an identifier that includes the function name, and is coupled with a counter variable. In response to generating the identifier coupled with the counter variable, the program is compiled. During program execution, the counter value is incremented in response to a call of the basic block when executing the program. In response to incrementing the counter value, the counter value coupled with the identifier is displayed.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: April 11, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Cary L. Bates, Lee Helgeson, Justin K. King, Michelle A. Schlicht
  • Patent number: 9619370
    Abstract: Systems and method are provided for testing an infrastructure. The infrastructure may include one or more computers connected by a network. Moreover, each of the computers may include an agent. In one embodiment, the method includes receiving, at a controller, a test request to perform at least one of a plurality of predetermined tests, the predetermined test including one or more parameters associated with performing the predetermined test and one or more expected results from performing the predetermined test. The method further includes determining whether the predetermined test is available at one of the computers. The method also includes sending, by the controller, the predetermined test to one of the computers based on the results of the determining step, such that the agent at the computer performs the predetermined test sent by the controller. Furthermore, the method includes receiving, at the controller, one or more results of the predetermined test performed by the agent at the computer.
    Type: Grant
    Filed: September 9, 2013
    Date of Patent: April 11, 2017
    Assignee: FEDEREAL HOME LOAN MORTGAGE CORPORATION (FREDDIE MAC)
    Inventors: Gregory A. Gibson, Daniel V. Wood
  • Patent number: 9619371
    Abstract: A method for providing a plurality of customized remote environments for application performance testing is provided. The method may include identifying a plurality of client customizations associated with a client application. The method may also include identifying a plurality of client hardware configurations associated with the client application. The method may further include populating a plurality of upgraded versions of the client application. Additionally, the method may include provisioning at least one remote environment. The method may also include applying the plurality of client customizations of the client application to the plurality of upgraded versions of the at least one client application. The method may further include deploying the plurality of upgraded versions of the at least one client application on at least one environment, whereby the deployed plurality of upgraded versions has the applied identified plurality of client customizations of the at least one client application.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Darryl M. Adderly, Jonathan W. Jackson, Ajit Jariwala, Eric B. Libow
  • Patent number: 9619372
    Abstract: Embodiments of the present disclosure relate to methods and systems for hybrid testing, combining the optimization features of functional testing brought forth to security testing. One disclosed method may include receiving a list of input points associated with a software unit under test and assigning, by a processor, risk values to the input points based on one or more risk rating factors. The risk values may reflect security risk associated with the input points. The method may further include providing, to the software unit under test, input values indicative of a functional test for input points assigned values reflecting a low security risk and input values indicative of a security test for input points assigned values reflecting a high security risk. The method may further include executing a security test for the software unit under test using the input values.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: April 11, 2017
    Assignee: WIPRO LIMITED
    Inventor: Sourav Sam Bhattacharya
  • Patent number: 9619373
    Abstract: In order to provide an improved, less error prone method for testing codes of a software application the following steps are proposed: defining for each test case comprised of a predefined test suite a specific footprint according to its test property, wherein said test case footprint comprises references defining which code sections are tested by said test case, marking code sections of the software application to be tested, identifying a test case of the test suite using its footprint matching at least a part of the marked code of the software application, and applying the identified test case on the software application.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: April 11, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stefan Alexander, René Pietzsch, Sebastian Schaefer, Andreas Trinks, Henning Wilbert
  • Patent number: 9619375
    Abstract: An automatic software testing machine may be configured to provide an advanced symbolic execution approach to software testing that combines dynamic symbolic execution and static symbolic execution, leveraging the strengths of each and avoiding the vulnerabilities of each. One or more software testing machines within a software testing system may be configured to automatically and dynamically alternate between dynamic symbolic execution and static symbolic execution, based on partial control flow graphs of portions of the software code to be tested. In some example embodiments, a software testing machine begins with dynamic symbolic execution, but switches to static symbolic execution opportunistically. In static mode, instead of checking entire programs for verification, the software testing machine may only check one or more program fragments for testing purposes. Thus, the software testing machine may benefit from the strengths of both dynamic and static symbolic execution.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: April 11, 2017
    Assignee: Carnegie Mellon University
    Inventors: Thanassis Avgerinos, Alexandre Rebert, David Brumley
  • Patent number: 9619376
    Abstract: A deviance monitoring module is provided for examining various parameters of an operating system for deviance from a baseline behavior at specified intervals. A range of acceptable deviance values from a baseline behavior is set for parameters of an operating system. The parameters of the operating system are then monitored at specified intervals for deviance from the baseline behavior. In response to detecting that the deviance exceeds a predetermined threshold, the method triggers diagnostic data gathering on the parameters of the operating system according to an embodiment.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: April 11, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Arthur J. Bariska, Jr., Matthew T. Cousens, Eileen S. Kovalchick, Joel L. Masser, Kevin D. McKenzie, Eileen P. Tedesco
  • Patent number: 9619377
    Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: April 11, 2017
    Assignee: Apple Inc.
    Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
  • Patent number: 9619378
    Abstract: A method for allocating memory among a plurality of computing systems includes assigning a free memory threshold to each computing system, dynamically varying at least one free memory threshold for at least one computing system based on a past memory usage of the at least one computing system, periodically monitoring each computing system for memory usage and in response to the monitoring determining that an amount of free memory for the computer system is below the free memory threshold for the computing system, allocating memory from the free memory pool to the computing system.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: April 11, 2017
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Norman Bobroff, Arun Kwangil Iyengar, Peter Hans Westerink
  • Patent number: 9619379
    Abstract: A data storage device is disclosed comprising a non-volatile memory (NVM). During a read operation, a sequence of signal samples is generated representing codewords stored in the NVM. The signal samples are buffered to generate buffered signal samples. The buffered signal samples are processed at a first frequency to detect a data sequence, and a bottleneck condition is detected associated with processing the buffered signal samples at the first frequency. When the bottleneck condition is detected, the buffered signal samples are processed at a second frequency higher than the first frequency to detect the data sequence.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: April 11, 2017
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Tom Sai-Cheung Chan, Wenli Zhu, Jaedeog Cho, Thao Hieu Banh
  • Patent number: 9619380
    Abstract: A data writing method for a memory storage apparatus having a first buffer memory, a second buffer memory and a rewritable non-volatile memory module is provided, and the transmission bandwidth of the first buffer memory is larger than the transmission bandwidth of the second buffer memory. The method includes: receiving a write command and first data thereof; determining whether the first data belongs to the successive big data; if the first data belongs to the successive big data, temporarily storing the first data into a first data buffer area of the first buffer memory, writing the first write data from the first data buffer area to the rewritable non-volatile memory module; and if the first data does not belongs to the successive big data, temporarily storing the first data into a second data buffer area of the second buffer memory.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: April 11, 2017
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Patent number: 9619381
    Abstract: In at least one embodiment, multiple controllers implement collaborative management of a non-volatile hierarchical storage system. In the storage system, a first controller receives health reports from at least second and third controllers regarding health of multiple storage units of physical storage under control of the second and third controllers and maintains a health database of information received in the health reports. In response to a health event and based on information in the health database, the first controller modifies logical-to-physical address mappings of one or more of multiple storage units under its control such that data having greater access heat is mapped to relatively healthier storage units and data having less access heat is mapped to relatively less healthy storage units. Thereafter, the first controller directs write requests to storage units under its control in accordance with the modified logical-to-physical address mappings.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Andrew D. Walls
  • Patent number: 9619382
    Abstract: Methods for read request bypassing a last level cache which interfaces with an external fabric are disclosed. A method includes identifying a read request for a read transaction, generating a phantom read transaction identifier for the read transaction and forwarding the read transaction with the phantom read transaction identifier beyond a last level cache before detection of a hit or miss with respect to the read transaction. The phantom read transaction identifier acts as a pointer to a real read transaction identifier.
    Type: Grant
    Filed: August 19, 2013
    Date of Patent: April 11, 2017
    Assignee: Intel Corporation
    Inventor: Karthikeyan Avudaiyappan
  • Patent number: 9619383
    Abstract: A transactional memory system predicts the outcome of coalescing outermost memory transactions, the coalescing causing committing of memory store data to memory for a first transaction to be done at transaction execution (TX) end of a second transaction, the method comprising. A processor of the transactional memory system determines whether a first plurality of outermost transactions from an associated program that were coalesced experienced an abort, the first plurality of outermost transactions including a first instance of a first transaction. The processor updates a history of the associated program to reflect the results of the determination. The processor coalesces a second plurality of outermost transactions from the associated program, based, at least in part, on the updated history.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Fadi Y. Busaba, Harold W. Cain, III, Michael Karl Gschwind, Maged M. Michael, Eric M. Schwarz
  • Patent number: 9619384
    Abstract: A computer system processor of a multi-processor computer system having cache subsystem, executes a demote instruction to cause a cache line exclusively owned by the computer system processor to become shared or read-only in the cache subsystem.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: April 11, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chung-Lung Kevin Shum, Kathryn Marie Jackson, Charles Franklin Webb
  • Patent number: 9619385
    Abstract: Cache miss rates for threads operating in a simultaneous multi-threading computer processing environment can be estimated. The single thread rates can be estimated by monitoring a shared directory for cache misses for a first thread. Memory access requests can be routed to metering cache directories associated with the particular thread. Single thread misses to the shared directory and single thread misses to the associated metering cache directory are monitored and a performance indication is determined by comparing the cache misses with the thread misses. The directory in the associated metering cache is rotated, and a second sharing performance indication is determined.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: James J. Bonanno, Alper Buyuktosunoglu, Brian W. Curran, Willm Hinrichs, Christian Jacobi, Brian R. Prasky, Martin Recktenwald, Anthony Saporito, Vijayalakshmi Srinivasan, John-David Wellman
  • Patent number: 9619386
    Abstract: According to an embodiment, a synchronization variable monitoring device includes: an address comparator configured to compare a received address included in an Invalidate Request, and an address that is set as an address of synchronization variable data upon receiving the Invalidate Request; a readout circuit configured to read out data of the address of the synchronization variable data when the received address and the address of the synchronization variable data coincide with each other; a conditional variable comparator configured to determine whether or not a predetermined condition is satisfied based on the data read out by the readout circuit; and a synchronization completion flag register configured to output a synchronization signal indicating that a synchronization condition is satisfied when the conditional variable comparator determines that the predetermined condition is satisfied.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: April 11, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Seiji Maeda
  • Patent number: 9619387
    Abstract: A data processing apparatus and a method of processing data are disclosed, in which address translations between first addresses used in a first addressing system and second addresses used in a second addressing system are locally stored. Each stored address translation is stored with a corresponding identifier. In response to an invalidation command to perform an invalidation process on a selected stored address translation the selected stored address translation is invalidated, wherein the selected stored address translation is identified in the invalidation command by a specified first address and a specified identifier. The invalidation process is further configured by identifier grouping information which associates more than one identifier together as a group of identifiers, and the invalidation process is applied to all stored address translations which match the specified first address and which match any identifier in the group of identifiers to which the specified identifier belongs.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: April 11, 2017
    Assignee: ARM Limited
    Inventors: Matthew L. Evans, Hakan Lars-Goran Persson, Jason Parker, Gareth Stockwell, Andrew Christopher Rose
  • Patent number: 9619388
    Abstract: A method for managing cache data of a mobile terminal includes determining whether first cache data corresponds to an application exists. If it is determined that the first cache data does not exist, a data request is sent to request server data corresponding to the first cache data, the server data is downloaded, forming the first cache data by using the downloaded server data.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: April 11, 2017
    Assignee: Tencent Technology (Shenzhen) Company Limited
    Inventors: Bifeng Zhang, Huafeng Ma, Qiliang Shen, Shili Lin, Xiao Xiao, Tongyi Guo, Kun Zhang
  • Patent number: 9619389
    Abstract: A method for implementing a storage architecture on a storage board is disclosed. The method comprises enabling the storage board on a first application node of an application server in a shared network comprising a plurality of application nodes and a plurality of storage nodes. The method also comprises processing a read or write request from an application on the first application node and profiling data transmitted in the request to determine the manner in which to process the request. Further, the method comprises accessing one of a plurality of tiers of storage media to perform a read or write responsive to the request, wherein each tier of storage media can be distributed over multiple nodes. Finally, the method comprises updating a first cache based on a configuration policy and maintaining coherency between shared data in the first cache and caches implemented on other storage boards in the network.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: April 11, 2017
    Assignee: UNIGEN CORPORATION
    Inventor: Anton Roug