Patents Issued in May 2, 2017
  • Patent number: 9641119
    Abstract: Various embodiments are described herein for an extended-speed low-ripple torque control of a switched reluctance motor (SRM) using online torque sharing function (TSF). Two operational modes of an online TSF are defined during the commutation: In Mode I, absolute value of rate of change of flux linkage (ARCFL) of incoming phase is higher than outgoing phase; in Mode II, ARCFL of outgoing phase is higher than incoming phase. To compensate the torque error produced by imperfect tracking of phase current, a proportional and integral compensator with torque error is added to the torque reference of outgoing phase in Mode I and incoming phase in Mode II. Therefore, the total torque is determined by the phase with lower ARCFL rather than the phase with higher ARCFL as in conventional TSFs.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: May 2, 2017
    Assignee: McMaster University
    Inventors: Ali Emadi, Jin Ye
  • Patent number: 9641120
    Abstract: A motor control apparatus includes a voltage regulator to execute a voltage increase mode to increase a voltage applied to an induction motor from a lower limit of a first range over time. A frequency regulator executes a frequency decrease mode to decrease a frequency of the voltage from an upper limit of a second range over time. When a current through the motor exceeds a first threshold in the voltage increase mode, a mode changer changes the mode to the frequency decrease mode. When the current through the motor becomes smaller than a second threshold in the frequency decrease mode, the mode changer changes the mode to the voltage increase mode to control the motor to change from a free running state to a state in which the voltage and the frequency satisfy a relationship. A determinator determines whether the voltage and the frequency satisfy the relationship.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: May 2, 2017
    Assignee: KABUSHIKI KAISHA YASKAWA DENKI
    Inventors: Shuji Matsuda, Hideaki Iura
  • Patent number: 9641121
    Abstract: A power conversion device includes a power-supply shunt resistance that is provided between an inverter and the negative-voltage side of a DC power supply, and respective-phase lower-arm shunt resistances that are provided between the power-supply shunt resistance and respective-phase lower-arm switching elements. Respective-phase lower-arm voltages, that are respective voltages between the negative-voltage side of the DC power supply and connection points between the respective-phase lower-arm switching elements and the respective-phase lower-arm shunt resistances, are detected to calculate respective-phase currents that flow through a load device in accordance with detection values of the respective-phase lower-arm voltages, and to control a carrier frequency of a carrier signal, which serves as a reference frequency of each drive signal, according to a change in a specific control parameter A.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: May 2, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takuya Shimomugi, Keisuke Uemura, Koichi Arisawa, Yosuke Shinomoto, Shigeo Umehara, Shinichiro Ura, Makoto Tanikawa
  • Patent number: 9641122
    Abstract: An actuator in a HVAC system includes a motor and a drive device driven by the motor. The drive device is coupled to a movable HVAC component for driving the movable HVAC component between multiple positions. The actuator further includes a main actuator controller. The main actuator controller includes end stop location memory that stores one or more end stop locations indicating expected locations of the one or more end stops. The main actuator controller further includes an end stop location recalibrator that runs an automatic recalibration process to determine and set recalibrated end stop locations. The end stop location recalibrator runs the automatic calibration process in response to detecting that the drive device has unexpectedly stalled at a location other than a stored end stop location.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: May 2, 2017
    Assignee: Johnson Controls Technology Company
    Inventors: Gary A. Romanowich, Robert K. Alexander
  • Patent number: 9641123
    Abstract: System and method for mounting one or more photovoltaic modules includes one or more flexible rods, including a first end and a second end opposite the first end, each of the one or more flexible rods further including an inner core and a first jacket surrounding the inner core between the first end and the second end. The first end is configured to be attached to at least one photovoltaic module using one or more first adhesive materials. The second end is configured to be inserted into at least one hole of a modular rail and attached to at least the modular rail using one or more second adhesive materials. The one or more flexible rods are configured to allow at least a lateral movement in a first direction between the photovoltaic module and the modular rail and support at least the photovoltaic module in a second direction.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: May 2, 2017
    Assignee: Alion Energy, Inc.
    Inventors: Anders Swahn, Neil Morris, Kevin Hennessy, Thomas Peter Hunt, Paul Adriani
  • Patent number: 9641124
    Abstract: An electric interconnection system in a vehicle includes a fixed part of the vehicle and a movable part of the vehicle. The movable part has a solar cell module mounted thereon and includes at least one component that maintains contact with the fixed part when the moving part moves. One or more first electric wires extend from the solar cell module of the movable part. Each of the one or more first electric wires has an end that is fixed to one of the at least one component of the movable part. One or more second electric wires are installed on the fixed part. The one or more second electric wires maintain contact with the ends of the first electric wires when the movable part moves.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: May 2, 2017
    Assignee: Hyundai Motor Company
    Inventors: Moon Jung Eo, Won Jung Kim, Hoo Sang Park, Sang Hak Kim, Sol Kim
  • Patent number: 9641125
    Abstract: The present disclosure relates to optical methods and systems for detecting defects in photovoltaic (PV) devices such as PV cells, PV panels, PV modules, and PV arrays.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: May 2, 2017
    Assignee: Alliance for Sustainable Energy, LLC
    Inventor: Steven Johnston
  • Patent number: 9641126
    Abstract: A method for in-phase-quadrature (I-Q) imbalance calibration is described. A signal is transmitted by a first transmitter in a first system. The signal includes a constant value. The signal is received at a second receiver in a second system. An I-Q imbalance is estimated for the second receiver based on the received signal.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: May 2, 2017
    Assignee: QUALCOMM Incorporated
    Inventor: Daniel Jose Fernandes Barros
  • Patent number: 9641127
    Abstract: Aspects of the disclosure provide an operational transconductance amplifier (OTA) having an output stage. The output stage includes a first amplifier path configured to drive a first output current from a first power supply and a first resistor coupled between the first power supply and a source terminal of a first transistor in the first amplifier path. The first resistor is configured to improve a linearity of the OTA.
    Type: Grant
    Filed: June 4, 2015
    Date of Patent: May 2, 2017
    Assignee: Marvell Semiconductor, Inc.
    Inventors: Zhigang Xu, Junxiong Deng, Taotao Yan
  • Patent number: 9641128
    Abstract: An apparatus includes an input amplifier stage and a switch that has a first terminal at a virtual ground input of the input amplifier stage.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: May 2, 2017
    Assignee: Qualcomm Incorporated
    Inventors: Chien-Chung Yang, Vijayakumar Dhanasekaran
  • Patent number: 9641129
    Abstract: A resistor-less amplifying circuit includes a plurality of resistor-less cells. Each cell includes a plurality of MOS transistors. Each cell generates a differential output equal to ?VGS of two MOS transistors with a magnitude of the differential output controlled by a control voltage generated by a differential amplifier coupled to a feedback loop around a cell. In one embodiment, the resistor-less amplifying circuit is a part of a bandgap voltage reference circuit. In another embodiment, the resistor-less amplifying circuit is part of a temperature sensor circuit.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: May 2, 2017
    Assignee: NXP USA, Inc.
    Inventors: Ricardo Pureza Coimbra, André Luis Vilas Boas, Alfredo Olmos
  • Patent number: 9641130
    Abstract: A low noise amplifier (LNA) has been disclosed for the noise and linearity performance improvement. The LNA includes an amplifying transistor and an auxiliary transistor. The amplifying transistor includes a first terminal for receiving an input signal of the LNA, a second terminal for outputting an output signal of the LNA, and a third terminal. The auxiliary transistor has a first terminal, a second terminal coupled to the second terminal of the amplifying transistor, and a third terminal electrically connected to the first terminal of the amplifying transistor.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: May 2, 2017
    Assignee: WIN Semiconductors Corp.
    Inventors: Fan-Hsiu Huang, Jui-Chieh Chiu, Chih-Wen Huang
  • Patent number: 9641131
    Abstract: A signal-processing system has an amplifier that generates an amplified (RF) output signal based on an (RF) input signal. The amplifier receives a supply voltage that can be selectively set to an appropriate level between a lower power supply level and a higher power supply level. With one power supply permanently connected to the supply voltage node, a control unit executes software to toggle a supply switch to periodically connect and disconnect the other power supply thereby generating a weighted average value for the supply voltage between the two power supply levels. When a sudden and large increase occurs in the (input) power level, hardware-interrupt circuitry interrupts and supersedes the software-based control of the supply-voltage switch to quickly switch the supply voltage towards the higher power supply level. The hardware-interrupt circuitry handles such situations faster than the software-based control in order to prevent a limit violation of spectrum emission requirements.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: May 2, 2017
    Assignee: Andrew Wireless Systems GmbH
    Inventor: Udo-Michael Vetter
  • Patent number: 9641132
    Abstract: A radio frequency amplification stage comprising: an amplifier for receiving an input signal to be amplified and a power supply voltage; and a power supply voltage stage for supplying said power supply voltage, comprising: means for providing a reference signal representing the envelope of the input signal; means for selecting one of a plurality of supply voltage levels in dependence on the reference signal; and means for generating an adjusted selected power supply voltage, comprising an ac amplifier for amplifying a difference between the reference signal and one of the selected supply voltage level or the adjusted selected supply voltage level, and a summer for summing the amplified difference with the selected supply voltage to thereby generate the adjusted supply voltage.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: May 2, 2017
    Assignee: SNAPTRACK, INC.
    Inventor: Martin Paul Wilson
  • Patent number: 9641133
    Abstract: Adaptive rail power amplifier technology processes an audio signal by feeding the audio signal to the power amplifier to produce an output signal, applying positive and negative power supply voltages centered with respect to the audio signal to the positive and negative power supply rails of the power amplifier, comparing the output signal with the positive and negative power supply rail voltages to produce dynamically varying positive and negative control signals, feeding the positive and negative control signals to positive and negative high current charge pumps and adding supplemental positive and negative voltages from the positive and negative charge pumps to the positive and negative power supply rails to produce a linear adaptive rail voltage which tracks the output signal.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: May 2, 2017
    Inventor: James K. Waller, Jr.
  • Patent number: 9641134
    Abstract: The invention concerns an amplifier circuit comprising: an amplifier having a first input coupled to an input node of the amplifier circuit via a first resistor and an output coupled to a load via a coupling capacitor, the output being coupled to the first input via a second resistor; and a current ramp generator adapted to supply a current ramp to the first input of the amplifier during a power up phase or power down phase of the amplifier circuit to control the rate of charge or discharge of the coupling capacitor.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: May 2, 2017
    Assignee: Dolphin Integration
    Inventors: Emmanuel Grand, Sébastien Genevey, Arthur Veith, Paul Giletti
  • Patent number: 9641135
    Abstract: A method for detecting an unbalance of a multi-port amplifier MPA intended to be on-board a satellite is presented. The MPA includes a plurality of paths, each path being configurable in gain and phase. The method includes transmitting a first test signal which is spread spectrum modulated from the first transmitting station to the first pathway, the first test signal being generated in at least the useful band of the first pathway; receiving by the second receiving station configured in frequency to receive signals transmitted by the second antenna connected to the second path of the MPA, the signals being likely to include a replica of the first test signal; detecting and measuring a power of received signals corresponding to a replica of the first test signal having leaked at the output of the second output port; computing at least one unbalance value of the MPA from the measurement of the power of the replica of the first test signal received in the second earth station.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: May 2, 2017
    Assignee: EUTELSAT S A
    Inventors: Antonio Arcidiacono, Daniele Vito Finocchiaro, Alessandro Le Pera, Yan Brand
  • Patent number: 9641136
    Abstract: A travelling wave amplifier (TWA) with a widened frequency bandwidth is disclosed. The TWA include input transmission lines, amplifier units connected in parallel between the input terminal and the out terminal of the TWA. Each of the amplifier units configures an emitter follower in the front end thereof and an amplifying section. A feature of the TWA is that compensation units that compensates the high frequency performance of the TWA are implemented in the input transmission lines and/or integrated with the amplifier units.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: May 2, 2017
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Taizo Tatsumi
  • Patent number: 9641137
    Abstract: An electric amplifier circuit for amplifying an output signal of a microphone comprises a supply input terminal (V10) to apply a supply potential (VDDA) for operating the electric amplifier circuit and a differential amplifier (110) having a first input terminal (E110a) for applying the output signal of the microphone (20), a second input terminal (E110b) and an output terminal (A110) for outputting an amplified output signal (OUT) of the microphone (20). A feedback path (FP) is provided between the output terminal (A110) of the differential amplifier (110) and the second input terminal (E110b) of the differential amplifier (110). A charge supplying circuit (120) is coupled to the feedback path (FP) to supply an amount of the charge to the feedback path (FP) in dependence on the supply potential (VDDA). The amount of charge supplied to the feedback path may be dependent on a change of the supply potential (VDDA).
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: May 2, 2017
    Assignee: AMS AG
    Inventors: Wolfgang Duenser, Markus Bingesser, Thomas Froehlich
  • Patent number: 9641138
    Abstract: An exemplary multipath feedforward amplifier includes a plurality of amplification stages configured to form at least partially distinct amplification paths extending from an input terminal to an output terminal, each amplification path defined by a respective subset of the plurality of amplification stages, wherein at least one amplification stage is a band pass resonator. In various implementations, multipath feedforward amplifier can maximize gain at a frequency of interest by having an amplification path that cascades band pass resonators. In various implementations, the plurality of amplification paths are configured to optimize gain at a center frequency ranging from about 2 GHz to about 3 GHz.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: May 2, 2017
    Assignee: ANALOG DEVICES, INC.
    Inventor: Ning Zhu
  • Patent number: 9641139
    Abstract: An amplifier applicable to an intra-band non-contiguous carrier aggregation (NCCA) band includes a first amplifier circuit and a second amplifier circuit. The NCCA band includes at least a primary component carrier (PCC) channel and a secondary component carrier (SCC) channel not adjacent to each other. The first amplifier circuit receives a first input signal, and generates a first output signal for undergoing down-conversion of one of the PCC channel and the SCC channel. The second amplifier circuit receives at least one second input signal, and generates a second output signal for undergoing down-conversion of another of the PCC channel and the SCC channel. The at least one second input signal received by the second amplifier circuit is provided by the first amplifier circuit according to the first input signal.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: May 2, 2017
    Assignee: MEDIATEK INC.
    Inventors: Chi-Yao Yu, Chung-Yun Chou
  • Patent number: 9641140
    Abstract: A matching network and method for matching a source impedance to a load impedance is provided. A bias feed microstrip structure is coupled to a direct current (DC) voltage source and has a bias feed microstrip electrical length less than one fifth of a fundamental wavelength of a fundamental frequency component of an input signal. A harmonic impedance transformation network can be configured to compensate for parasitic reactances of a precursor element. A tuned impedance element presents a short circuit impedance at the second harmonic impedance transformation network terminal for harmonic frequency components and presents a higher impedance for the fundamental frequency component. A fundamental impedance transformation network is configured to match a fundamental impedance transformation network input impedance for the fundamental frequency component to a load impedance of a load. Multiple instances of the harmonic impedance transformation network and the tuned impedance element can be provided.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: May 2, 2017
    Assignee: NXP USA, INC.
    Inventors: Ramanujam Srinidhi Embar, Weng Chuen Edmund Neo, Yu-Ting D. Wu
  • Patent number: 9641141
    Abstract: Even harmonics are suppressed by a harmonics-reducing bias generator that drives bias voltages to cascode control transistors in series with driver transistors in a power amplifier. A first bias voltage is generated by mirroring pull-up currents in the power amplifier. A p-channel source transistor and a p-channel cascode current-mirror transistor also mirror the power amplifier pull-up current to a midpoint node. An n-channel sink transistor and an n-channel cascode current-mirror transistor mirror the pull-down current in the power amplifier to the midpoint node. An op amp compares the midpoint node to VDD/2, and drives the gate of a p-channel feedback transistor. Current from the p-channel feedback transistor flows through an n-channel cascode current-mirror transistor that generates a second bias voltage. The second bias voltage is adjusted until the midpoint node reaches VDD/2, causing the pull-up and pull-down currents in the power amplifier to better match, reducing even harmonics.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: May 2, 2017
    Assignee: Hong Kong Applied Science and Technology Research Institute Company Limited
    Inventors: Shiyuan Zheng, Zhiwei Wu
  • Patent number: 9641142
    Abstract: One example includes a hot-swap control system. The system includes a sense resistor network provides a sense voltage in response to an output current. The system also includes a sense control circuit includes a chopper amplifier system arranged in a servo feedback arrangement to generate a monitoring voltage having an amplitude that is associated with the output current based on the sense voltage. A notch filter chopping stage filters out signal ripple in the chopper amplifier system across a unity-gain bandwidth of the chopper amplifier system, and a capacitive compensation network provides stability-compensation of the chopper amplifier system across the unity-gain bandwidth. A transconductance amplifier configured to compare the monitoring voltage with a predetermined reference voltage to generate a control voltage. The system further includes a power transistor configured to conduct the output current to an output based on the control voltage.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: May 2, 2017
    Assignee: Texas Instruments Incorporated
    Inventor: Sudheer Prasad
  • Patent number: 9641143
    Abstract: An electronic device includes a transimpedance amplifier stage having an amplifier end stage of the class AB type and a preamplifier stage coupled between an output of a frequency transposition stage and an input of the amplifier end stage. A self-biased common-mode control stage is configured to bias the preamplifier stage. The preamplifier stage is formed by a differential amplifier with an active load that is biased in response to the self-biased common-mode control stage.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: May 2, 2017
    Assignee: STMicroelectronics SA
    Inventor: Laurent Chabert
  • Patent number: 9641144
    Abstract: A power combining arrangement includes an input divider waveguide and an output combiner waveguide, and a first and second amplifier. The power combining arrangement is configured to amplify RF energy having a characteristic wavelength ?. The first amplifier has a first input electrically coupled with a first output port of the divider waveguide. The second amplifier has a second input electrically coupled with a second output port of the divider waveguide. The first and second output ports are separated by a first distance corresponding to a phase delay Ø1, the first distance being selected substantially independently of the characteristic wavelength. The first amplifier has a first output electrically coupled with a first input port of the combiner waveguide and the second amplifier has a second output electrically coupled with a second input port of the combiner waveguide. The first and second input ports are separated by the first distance.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: May 2, 2017
    Assignee: Space Systems/Loral, LLC
    Inventors: James J. Sowers, Perry Peterson
  • Patent number: 9641145
    Abstract: An apparatus and method for outputting audio signals of a portable communication device are provided. The apparatus includes a plurality of audio tables including different volume control values or tone control values, and allows a user to selectively set audio tables corresponding to each of audio paths equipped with the portable communication device. Further, the apparatus analyzes a surrounding environment during a voice call, determines the absence or presence of noise, and suitably controls a volume or a tone of audio signals based on the result of the determination before outputting the audio signals. Accordingly, the apparatus can provide an improved calling condition in various calling environments.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: May 2, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yang-Su Kim, Chul-Hwan Lee, Mi-Hyang Kim, Jun-Tai Kim, Nam-Ii Lee, Yong-Hoon Lee
  • Patent number: 9641146
    Abstract: Apparatus and methods are disclosed related to radio frequency (RF) power detection. One such apparatus includes a directional coupler, an RF switch, and an RF power detector. The RF switch can selectively change coupling between the directional coupler and the RF power detector. This can enable accurate power detection based on a ratio of power levels, without factory calibration or laser trimming.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: May 2, 2017
    Assignee: Analog Devices, Inc.
    Inventors: Eamon Nash, Dale Wilson, Carlos Calvo
  • Patent number: 9641147
    Abstract: Disclosed is a signal splitter that includes a coupled transmission line element coupled between two output ports of the signal splitter. The coupled transmission line element is used to lower the isolation between the two output ports for a particular frequency band. The coupled transmission line element includes a first and a second elongate electrical conductor. The first and the second elongate electrical conductor first ends are coupled to the signal transmission path that connects the two output ports. The first and the second elongate electrical conductor second ends are un-terminated. The first elongate electrical conductor and the second elongate electrical conductor are not shorted together, and the first elongate electrical conductor and the second elongate electrical conductor are electrostatically coupled, such as by twisting them together into a helix.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: May 2, 2017
    Assignee: PPC BROADBAND, INC.
    Inventors: Erdogan Alkan, Leon Marketos
  • Patent number: 9641148
    Abstract: A resonator and a filter including the same are provided. The resonator includes a body formed of a dielectric material and including a through-hole formed in one direction, and a conductive film coupled to at least one of both side cross-sections of the body in a lengthwise direction and a wall surface of the through-hole.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: May 2, 2017
    Assignee: INNERTRON, INC.
    Inventors: Soo Duk Seo, Hak Rae Cho
  • Patent number: 9641149
    Abstract: Provided are a matching segment circuit, to which a radio frequency (RF) is applied, and an RF integrated device using the matching segment circuit. The matching segment circuit to which an RF is applied may include an input end connected to a first RF device, a parallel segment having a first capacitor and a first inductor connected in parallel, a second inductor connected to the parallel segment in series, and an output end connected to a second RF device. The first capacitor, the first inductor, and the second inductor may be configured so that an impedance of the first RF device and an impedance of the second RF device may match.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: May 2, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Duck Hwan Kim, In Sang Song, Chul Soo Kim, Young Il Kim, Jea Shik Shin
  • Patent number: 9641150
    Abstract: An electrical component, e.g., a diplexer or a duplexer, can have one of a number of diverse arrangements for terminal surfaces on the substrate bottom. For example, the terminal surfaces for first and second filters are not disposed at the maximum distance from one another. First and second filters can be disposed as one or two discrete components on the substrate, wherein one filter can be implemented as being integrated in a multilayer substrate.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: May 2, 2017
    Assignee: SNAPTRACK, INC.
    Inventors: Maximilian Pitschi, Andreas Fleckenstein, Juergen Kiwitt
  • Patent number: 9641151
    Abstract: An elastic wave filter including a substrate, a signal line disposed on the substrate and connecting a first signal terminal to a second signal terminal, a plurality of series resonators connected to the signal line in series, and a plurality of parallel resonators connected to the signal line. At least one of the series resonator having an anti-resonant frequency closest to the passband of the filter among the plurality of series resonators, and/or the parallel resonator having a resonant frequency closest to the passband of the filter among the plurality of parallel resonators, is covered with a dielectric film that is relatively thicker than a dielectric film covering the other series and/or parallel resonators.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: May 2, 2017
    Assignee: SKYWORKS FILTER SOLUTIONS JAPAN CO., LTD.
    Inventor: Satoru Ikeuchi
  • Patent number: 9641152
    Abstract: An acoustic wave device includes: a piezoelectric substrate; and an IDT formed on the piezoelectric substrate, wherein an anisotropy coefficient is positive, an overlap region where electrode fingers of the IDT overlap each other includes a center region and an edge region, the electrode fingers in the center and edge regions are continuously formed, the electrode finger in the edge region is inclined with respect to the electrode finger in the center region so that a pitch in a width direction of the electrode finger in the edge region is greater than a pitch in a width direction of the electrode finger in the center region, and an angle between the width direction in the center region and a crystal axis orientation of the piezoelectric substrate is less than an angle between the width direction in the edge region and the crystal axis orientation.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: May 2, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Kentaro Nakamura, Jun Tsutsumi, Yoshio Sato, Tabito Tanaka, Takashi Matsuda
  • Patent number: 9641153
    Abstract: A method of forming a resonator by providing a first layer; forming a sacrificial layer on the first layer; forming a capping layer on the sacrificial layer; forming at least one etching aperture in the capping layer; forming at least one additional aperture having a different size than the at least one etching aperture; forming a cavity and releasing a resonator structure within the cavity by removing the sacrificial layer by etching via the at least one etching aperture; sealing the at least one etching aperture; and forming a lining in the at least one additional aperture.
    Type: Grant
    Filed: November 4, 2015
    Date of Patent: May 2, 2017
    Assignee: Infineon Technologies Dresden GmbH
    Inventors: Thoralf Kautzsch, Heiko Froehlich, Mirko Vogt, Maik Stegemann, Thomas Santa, Markus Burian
  • Patent number: 9641154
    Abstract: A single crystal micromechanical resonator includes a suspended plate of lithium niobate or lithium tantalate. The suspended plate and a support structure are formed from a single crystal.
    Type: Grant
    Filed: November 11, 2016
    Date of Patent: May 2, 2017
    Assignee: Sandia Corporation
    Inventors: Roy H. Olsson, Thomas A. Friedmann, Sara Jensen Homeijer, Michael Wiwi, Khalid Mikhiel Hattar, Blythe Clark, Todd Bauer, Stuart B. Van Deusen
  • Patent number: 9641155
    Abstract: A duplexer includes a reception filter that is connected between a reception terminal and an antenna terminal and includes one or a plurality of series resonators that are acoustic wave resonators, and a transmission filter that is connected between a transmission terminal and the antenna terminal and includes one or a plurality of acoustic wave resonators, a resonance frequency of a first series resonator that is one of the one or the plurality of series resonators and is closest to the antenna terminal in the reception filter being higher than an upper limit frequency of a reception band of the reception filter.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: May 2, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Shogo Inoue, Hiroshi Nakamura
  • Patent number: 9641156
    Abstract: A multi-port active circulator includes a plurality of cascode circuits coupled to one another in a ring. Each respective cascode circuit of the plurality of cascode circuits is coupled to a respective port of a plurality of ports. Each respective cascode circuit includes a common source transistor, a common gate transistor coupled to the common source transistor, and a feedback circuit coupled from the common gate transistor to the common source transistor. Each common source transistor of each respective cascode circuit is coupled to a common junction point.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: May 2, 2017
    Assignee: HRL Laboratories, LLC
    Inventors: Jongchan Kang, Hasan Sharifi, Eric M. Prophet
  • Patent number: 9641157
    Abstract: A method and device are provided for filtering digital audio signals using at least one ARMA filter, particularly during a filter change. The method includes the following steps: a step of receiving a first request to change filtering to or from filtering by a first ARMA filter; and, in response to the first request, a step of gradually switching, at each of a plurality of cascaded first filtering blocks, between digital-signal filtering by a first basic filtering cell and digital-signal filtering by another associated basic filtering cell, the first basic filtering cells of the plurality of first filtering blocks factorizing the first filter.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: May 2, 2017
    Assignee: ORANGE
    Inventors: Alexandre Guerin, Julien Faure, Claude Marro
  • Patent number: 9641158
    Abstract: Systems, apparatuses, and methods for implementing a low power decimator. A decimator may receive a plurality of input samples from a digital microphone. The decimator may include one or more coefficient tables for storing values combining two or more filter coefficients for filtering the received samples. The decimator may utilize a concatenation of multiple samples to perform a lookup of a corresponding coefficient table. The coefficient tables may store only the necessary non-redundant values for all coefficient combinations which can be applied to the multiple samples. The result of the lookup of the coefficient table may have its sign inverted or be zeroed based on the values of the multiple samples.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: May 2, 2017
    Assignee: Apple Inc.
    Inventors: Tzach Zemer, Joseph J. Cheng
  • Patent number: 9641159
    Abstract: A flip-flop circuit including a first logic circuit, a first master latch, a second master latch, and a slave latch is provided. The first logic circuit operates a logic operation on a selecting signal and a clock signal to generate a first control signal. The first master latch receives a data signal according to the first control signal and latches the data signal according to the selecting signal and the clock signal. The second master latch receives a scan data signal according to the selecting signal and the clock signal, wherein an output terminal of the second master latch is directly connected to an output terminal of the first master latch. The slave latch latches a signal on the output terminals of the first and second master latches for generating an output signal.
    Type: Grant
    Filed: February 18, 2016
    Date of Patent: May 2, 2017
    Assignee: Faraday Technology Corp.
    Inventors: Chiang-Hsiang Liao, Sheng-Hua Chen
  • Patent number: 9641160
    Abstract: Embodiments include apparatuses, methods, and systems for state retention electronic devices. In embodiments, an electronic device may include a state retention flip-flop having a plurality of P-type metal oxide semiconductor (PMOS) devices coupled with a common N-well, with one or more of the plurality of PMOS devices powered by an always-on supply and one or more of the plurality of PMOS devices powered by a power-gated supply. Other embodiments may be described and claimed.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: May 2, 2017
    Assignee: Intel Corporation
    Inventors: Amit Agarwal, Steven Hsu, Ram Krishnamurthy
  • Patent number: 9641161
    Abstract: In some embodiments, a flip-flop is laid-out on a flip-flop region of a semiconductor substrate. The flip-flop includes master switch circuitry made of a first plurality of devices which are circumscribed by a master switch perimeter residing within the flip-flop region. Scan mux input circuitry is operably coupled to an input of the master switch circuitry. The scan mux input circuitry is made up of a second plurality of devices that are circumscribed by a scan mux perimeter which resides within the flip-flop region and which is non-overlapping with the master switch perimeter. Slave switch circuitry is operably coupled to an output of the master switch circuitry. The slave switch circuitry is made up of a third plurality of devices that are circumscribed by a slave switch perimeter which resides within the flip-flop region and which is non-overlapping with both the master switch perimeter and the scan mux perimeter.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: May 2, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Lin Liu, Ting-Wei Chiang, Jerry Chang-Jui Kao, Hui-Zhong Zhuang, Lee-Chung Lu, Shang-Chih Hsieh, Che Min Huang
  • Patent number: 9641163
    Abstract: A transistor package includes a transistor and one or more bandwidth limiting matching networks. The one or more bandwidth limiting matching networks are coupled to one of a control contact and an output contact of the transistor in order to limit the gain response of the transistor outside of a predetermined frequency band. Specifically, the transistor package has a gain roll-off greater than 0.5 dB within 200 MHz of the predetermined frequency band, while providing signal losses less than 1.0 dB inside the predetermined frequency band at a power level greater than 240 W. By providing the bandwidth limiting matching networks in the transistor package, the gain response of the transistor may be appropriately limited in order to comply with the spectral masking requirements of one or more wireless communications standards, for example, Long Term Evolution (LTE) standards.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: May 2, 2017
    Assignee: Cree, Inc.
    Inventors: Mitchell Flowers, Simon Wood, James W. Milligan
  • Patent number: 9641164
    Abstract: A quadrature LC tank based digitally controlled ring oscillator (DCO). The oscillator structure incorporates a plurality of stages, each stage including a buffer and a series LC tank. Four stages are coupled together to create a 360 degree phase shift around a loop. The oscillation frequency of the oscillator is the same as the resonant frequency of each LC tank, therefore it avoids quality factor degradation of LC tanks found in the prior art. In one example embodiment, class-D amplifiers are used to drive each of the LC tanks. Capacitor banks before at the input and output of the buffers provide coarse and fine tuning of the frequency of oscillation. The high efficiency exhibited by these amplifiers results in very good phase noise performance of this oscillator. The oscillator utilizes a startup circuit to launch oscillation upon power on.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: May 2, 2017
    Assignee: Technische Universiteit Delft
    Inventors: Massoud Tohidian, Robert Bogdan Staszewski, Ali Fotowat Ahmady, Seyed Amir Reza Ahmadi Mehr, Mahmoud Kamarei, Fabien Ndagijimana
  • Patent number: 9641165
    Abstract: A duty cycle correction circuit has a delay line comprising a plurality of current-starved inverters coupled together in series. An input of a first current-starved inverter receives an input clock signal. A relatively weak inverter is coupled in parallel with each of the current-starved inverters. A low pass filter having an operational amplifier has a differential input coupled to the output of the delay line for receiving an output clock signal. A single-ended output of the operational amplifier is coupled to current source and current sink transistors of each of the current-starved inverters to control the amount of delay provided by the delay line. The low pass filter corrects the duty cycle of the input clock signal so that the output clock signal has a 50 percent duty cycle. The relatively weak parallel-connected inverters insure that no clock pulses are skipped if the current-starved inverters fail to transition.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: May 2, 2017
    Assignee: NXP USA, INC.
    Inventors: Venkataram Mooraka, Firas Abughazaleh, Roby Thomas
  • Patent number: 9641166
    Abstract: An apparatus and method for implementing a bootstrapped switching circuit having improved (i.e. faster) turn-on time is provided. In an embodiment, an inner switching loop is implemented in a bootstrapped switching circuit where the inner switching loop is configured to turn on an input switch in the bootstrapped drive circuit independent of the drive circuit output. The embodiment decouples the inner switching loop circuitry from the output drive circuit of the bootstrapped switching circuit, which typically has a larger load capacitance than the inner switching loop. This allows the inner switching loop to turn on the input switch in the bootstrapped switching circuit faster and decreases the turn-on time of the bootstrapped switching circuit.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: May 2, 2017
    Assignee: ANALOG DEVICES, INC.
    Inventors: Siddharth Devarajan, Lawrence A. Singer
  • Patent number: 9641167
    Abstract: A current mirror circuit includes a first transistor connected to a voltage source, a gate of the first transistor being connected to a drain of the first transistor, a current source connected to the drain and the gate of the first transistor, the current source being configured to generate a predetermined first output current, a sample and hold circuit having an input connected to the gate of the first transistor, a second transistor connected to the voltage source, a gate of the second transistor being connected to an output of the sample and hold circuit, and a controller operatively connected to the sample and hold circuit, the controller being configured to operate the sample and hold circuit at a predetermined sampling frequency to attenuate bias noise from the first transistor in a second output current from the second transistor.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: May 2, 2017
    Assignee: Robert Bosch GmbH
    Inventors: Ganesh K. Balachandran, Vladimir P. Petkov
  • Patent number: 9641168
    Abstract: A method for controlling a first switch and a second switch is suggested, wherein each switch is an RC-IGBT and wherein both switches are arranged as a half-bridge circuit. The method includes: controlling the first switch in an IGBT-mode; controlling the second switch such that it becomes desaturated when being in a DIODE-mode; wherein controlling the second switch starts before and lasts at least as long as the first switch changes its IGBT-mode from blocking state to conducting state.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: May 2, 2017
    Assignee: Infineon Technologies AG
    Inventors: Johannes Georg Laven, Heiko Rettinger, Roman Baburske
  • Patent number: 9641169
    Abstract: A circuit for conveying information from a sender component to a receiver component is provided. The sender component is a high side component and the receiver component is a low side component or the sender component is a low side component and the receiver component is a high side component. The low side component is arranged to drive a first electronic switch of a half bridge and the high side component is arranged to drive a second electronic switch of the half bridge. The circuit includes a first voltage-decoupling device and a second voltage-decoupling device that are arranged such that a voltage conveyed from the sender component to the receiver component is modulated by the sender component and conveyed across the first voltage-decoupling device and the second voltage-decoupling device depending on the information.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: May 2, 2017
    Assignee: Infineon Technologies Austria AG
    Inventor: Remigiusz Viktor Boguszewicz