Abstract: Methods, systems, apparatuses, and computer program products are provided for developing user applications that include workflows, and in particular, for developing the user applications and workflows in parallel. A first user interface is provided on a display screen that enables a graphical user interface (GUI) of a user application to be configured. Controls are enabled to be selected for inclusion in the GUI of the user application. Workflow logic is enabled to be associated with a control included in the GUI. A second user interface is provided on the display screen concurrent with the first user interface. The second user interface enables the workflow logic to be generated. Steps are enabled to be selected for inclusion in the workflow logic. Each step is configured to operate on data entered via the GUI and/or data of another step of the workflow logic.

Abstract: A system includes a laser system situated to generate a laser beam, a controller situated to control a path of the laser beam on a target and to control a variation of one or more waveforms associated with the laser beam, and a display coupled to the controller and situated to display a plurality of list data portions that include waveform parameters and a simulated waveform based on the plurality of list data portions, wherein the simulated waveform includes a plurality of simulated waveform portions that are predictive of the one or more waveforms.

Abstract: A physiological parameter display device displays data representing the current values of one or more physiological parameters of a patient. The device has an operating system that does not allow multiple-program execution. A program runs on the operating system. The program provides functionality that gives a user of the device an ability to install virtual applications on the device. In addition, the program provides functionality that gives the user an ability to run the virtual applications on the device while the device continues to display data representing the current value of the physiological parameter of the patient.

Abstract: An embodiment of a computer implemented method of performing a processing action includes detecting an input from a user via an input device of a processing device, the input including a touch by at least one finger of a plurality of fingers of the user, estimating a gesture performed by the at least one finger based on the touch, measuring at least part of a fingerprint of the at least one finger, and identifying the at least one finger used to apply the input by the user based on stored fingerprint data that differentiates between individual fingers of the user. The method also includes identifying an action to be performed based on the estimated gesture and based on the identified at least one finger, and performing the action by the processing device.

Abstract: When a touch operation is performed on a selfie pad, the slide amount of the touch operation is measured, and whether the touch operation is valid as a slide operation is judged in accordance with a function selected as an execution target from among a plurality of functions and the measured slide amount of the touch operation. Then, the selected function is controlled when the touch operation is valid as a slide operation.

Abstract: In one embodiment, the instant application provides one or more of receiving a mobile device's analysis of a movement of a finger, determining a word from the analyzed finger movement, determining a part of a message based on the determined word, placing the word in the message, and based on the analysis, providing space for a new word to be written by the finger.

Abstract: Computer-readable media, computerized methods, and computer systems for intuitively invoking a presentation action (e.g., rendering a menu) by applying a drag-operation at a top-level control button rendered at a touchscreen display are provided. Initially, aspects of a user-initiated input applied at the top-level control button are detected. These aspects may include an actuation location and a distance of a drag-movement therefrom. If a distance of the drag-movement at the touchscreen display is greater than a threshold distance in a particular radial direction from the actuation location, the user-initiated input is considered a drag-operation. Typically, a set of trigger boundaries are constructed based on system metrics to assist in disambiguating the drag-operation from a tap-type operation. If a drag-operation is identified, the presentation action is invoked; otherwise, a principle action associated with the top-level control button (e.g., manipulating content of an application) may be invoked.

Abstract: An electronic device with a display can receive an alert comprising information, and in response to receiving the alert, issue a perceptual output. The device can detect a user input and determine whether the user input was detected within a predetermined time interval after the perceptual output. In accordance with a determination that the user input was detected within the predetermined time interval, the device can display a notification on the display, wherein the notification comprises a first portion of the information. If the device continues to detect the user input after a second predetermined time period, the device can display a second portion of the information, where the second portion is different from the first portion.

Abstract: A computing device with a touch screen display displays a first set of a first plurality of icons in a first area of the touch screen display, the first plurality of icons including a plurality of sets of icons that are separately displayed in the first area of the touch screen display, the first plurality of icons including application launch icons; displays a second plurality of icons in a second area on the touch screen display, the second plurality of icons including application launch icons, wherein the second area is different from the first area; detects a finger swipe gesture in the first area; and, in response, replaces display of the first set of the first plurality of icons with display of a second set of the first plurality of icons in the first area on the touch screen display, while maintaining the display of the second plurality of icons in the second area on the touch screen display.

Abstract: A method for automatically changing information originating from at least either of a first user and a second user by using a mobile device includes steps of: (a) a first device searching second devices as a target to perform interaction and then selecting a specific second device among the searched second device to change the user-originating information; (b) the first device transmitting to, or receiving from, the specific second device data related to the interaction, if a touch gesture is detected in the first device; and (c) at least either of the first and the second devices allowing a server to update the information originating from at least either of the first user and the second user by referring to the transmitted data related to the specific interaction.

Abstract: A first touch gesture is sensed at a subset of a set of six Braille dot touch points at a virtual Braille keyboard. The first touch gesture corresponds to a Braille character. A second touch gesture is sensed that concurrently touches each of the six Braille dot touch points in the set of Braille dot touch points. A contact with a layout of the virtual Braille keyboard with at least one Braille dot touch point is continuously maintained while transitioning from the first touch gesture to the second touch gesture. In response to the second touch gesture, the Braille character is accepted.

Abstract: In accordance with one aspect of the embodiments described herein, there are provided systems and methods for implementing a mobile keyboard software application that can be downloaded to and installed on virtually any mobile device, including mobile devices executing under iOS, Android, Windows Mobile, Linux and the like. The aforesaid downloadable keyboard software application adds an enhanced cross-platform functionality to any user application executing on the user's mobile device. In one embodiment, the aforesaid downloadable keyboard software application is configured to add a functionality of a first software application executing on the mobile device into a second software application executing on the mobile device. In one or more embodiments, the keyboard may incorporate functionality of a convention keyboard in addition to special functions described in detail below.

Abstract: The present disclosure relates to systems, methods, and devices for augmenting text messages. In particular, the message system augments text messages with emotion information of a user based on characteristics of a keyboard input from the user. For example, one or more implementations involve predicting an emotion of the user based on the characteristics of the keyboard input for a message. One or more embodiments of the message system select a formatting for the text of the message based on the predicted emotion and format the message within a messaging application in accordance with the selected formatting.

Abstract: An apparatus is disclosed. The apparatus may include a first image display that may include a touch panel that displays a first image. The apparatus may include an image display control unit that may display a second image in a second image display. The first image may include an image different from the second image. The apparatus may include a keyboard display control unit that may selectively display, on the first image display, a first software keyboard and a second software keyboard. The second software keyboard may be larger in size than the first software keyboard. In response to the image display control unit displaying, in the second image display, the second image, the keyboard display control unit may selectively display the second software keyboard on the first image display. A method and program product are also disclosed.

Abstract: In accordance with one or more aspects of a dynamic soft keyboard, a user input is received via a soft keyboard having multiple keys. Information describing a current input environment for the soft keyboard is obtained, and a determination is made as to which one or more keys of the multiple keys was intended to be selected by the user input. This determination is made based at least in part on the current input environment.

Abstract: A terminal for controlling a display of a multi window includes: an event detecting unit for detecting an execution, change, or finish event of an application; a display analyzing unit for analyzing screens of applications executed on a multi window which includes a mini window; a display controller for controlling a location and size of the mini window based on an analysis result of the display analyzing unit; and a display unit for displaying the mini window at a controlled location. Accordingly, a window to which an always-on-top (AOT) operation is set is automatically disposed not to disturb the use of an application executed in a non-mini window, thereby giving convenience to a user.

Abstract: A signal sampling method, applied to a sensing system comprising a sensing matrix with a first sensing region and a second sensing region. The signal sampling method comprises: (a) applying a first single period sampling number to sample a sensing value of the first sensing region to generate a first sensing signal; and (b) applying a second single period sampling number to sample a sensing value of the second sensing region to generate a second sensing signal. The values of the first single period sampling number and the second single period sampling number are different. The selection for the single period sampling number is extended via sampling different sensing regions by different single period sampling numbers.

Abstract: Subject matter disclosed herein may relate to buffers, and may relate more particularly to non-volatile buffers for memory operations.

Abstract: The present invention provides a method for constructing an NVRAM-based efficient file system, including the following steps: S1. determining a file operation type of the file system, where the file operation type includes a file read operation, a non-persistent file write operation, and a persistent file write operation; and S2. if the file operation type is a non-persistent file write operation, writing, by the file system, content of the non-persistent file write operation to a dynamic random access memory DRAM, updating a corresponding DRAM cache block index, and flushing, at a preset time point, the content of the non-persistent file write operation back to a non-volatile random access memory NVRAM asynchronously, or otherwise, copying, by the file system, related data directly between the NVRAM/DRAM and the user buffer.

Abstract: A storage device may include a plurality of memory cells arranged in pages and blocks, each page including a row of memory cells, and each block including a plurality of pages of memory cells. The storage device may include a memory device, such as a nonvolatile memory device, which includes these items. A data recovery method for the storage device may include receiving by the storage device a first command corresponding to a first selected data recovery scheme. Based on the first command: a first target page scheme for performing error detection on the plurality of blocks is applied, target pages are read using the first target page scheme, and an amount of errors in each read target page is detected. In addition, it may be determined that a target page of a first block has at least a first threshold amount of errors, and based on the determination, data recovery for the first block may be performed by relocating all data stored in the first block to another block.

Abstract: The disclosure relates to a memory access unit. One example embodiment is a memory access unit, for providing read-access to read an item from an arbitrary location in a physical memory, independently of addressable locations of the physical memory. The item includes a first number of bits and each addressable location of the physical memory includes a second number of bits. The second number of bits is different from the first number of bits. The memory access unit includes an address input, an address interpreter, an address output, a memory output, a data formatter, and a data output.

Abstract: A memory circuit includes a plurality of banks and a controller, each bank of the plurality of banks includes a plurality of segments, and each segment of the plurality of segments includes a plurality of bit lines and a plurality of word lines. A word line switch corresponding to a word line of a segment of the memory circuit is turned on and data are written into memory cells of the segment coupled to a plurality of bit lines of the segment and corresponding to the word line in turn after the controller enables an active command corresponding to the word line. When the controller enables at least one copy row write command, the data are simultaneously written into memory cells sharing a plurality of sense amplifiers with the plurality of bit lines of the segment and corresponding to at least one another word line.

Abstract: An integrated circuit including a first EPROM, a second EPROM, and a circuit. The first EPROM is configured to provide a first state and a second state. The second EPROM is configured to provide a third state and a fourth state. The circuit is configured to select the first EPROM and the second EPROM individually and in parallel with each other.

Abstract: A computer memory device and a method of storing data are provided. The computer memory device includes a parallel memory interface configured to be operatively coupled to a system memory controller, to receive data and commands including logical addresses from the system memory controller, and to transmit data to the system memory controller. The parallel memory interface is configured to respond to the commands from the storage device driver of a computer processing unit. The computer memory device further includes an address translation circuit configured to receive the logical addresses from the parallel memory interface and to translate the received logical addresses to corresponding physical addresses. The computer memory device further includes a non-volatile memory operatively coupled to the parallel memory interface and the address translation circuit.

Abstract: A processor includes a first memory interface to be coupled to a plurality of dual in-line memory module (DIMM) sockets located off-package, a second memory interface to be coupled to a non-volatile memory (NVM) socket located off-package, and a multi-level memory controller (MLMC). The MLMC is to: control the DIMMs disposed in the plurality of DIMM sockets as main memory in a one-level memory (1LM) configuration; detect a switch from a 1LM mode of operation to a two-level memory (2LM) mode of operation in response to a basic input/output system (BIOS) detection of a low-power DIMM disposed in one of the DIMM sockets and a NVM device disposed in the NVM socket in a 2LM configuration; and control the low-power DIMM as cache in the 2LM configuration in response to detection of the switch from the 1LM mode of operation to the 2LM mode of operation.

Abstract: A plurality of logically sequential data blocks of a file to write to a shingled magnetic disk are received. The first data block of the plurality of logically sequential data blocks to a first physical data block of a data track, wherein the first physical data block is part of a sub-band of radially adjacent physical data blocks in a shingled direction, is written. The remaining data blocks of the plurality of logically sequential data blocks to radially adjacent physical data blocks in the sub-band in the shingled direction, beginning with a physical data block radially adjacent to the first physical data block, are written.

Abstract: A method and a system for memory management and a memory storage device thereof are provided. The memory storage device includes a rewritable non-volatile memory module. The method includes receiving a command from a host system; reading use information from the rewritable non-volatile memory module according to the command; writing the use information into a first physical erasing unit of the rewritable non-volatile memory module, and marking the first physical erasing unit with a recognizing flag. The method also includes erasing data in at least part of physical erasing units excepting the first physical erasing unit in the rewritable non-volatile memory module according to the recognizing flag; and establishing a memory management table according to the use information stored in the first physical erasing unit for operating the memory storage device.

Abstract: A data allocating method includes steps of: determining whether data to be written into a physical memory block is hot data or cold data; when the data is hot data, according to a hot data allocating order, searching at least one first empty sub-block from the physical memory block to allocate the data; when the data is cold data, according to a cold data allocating order, searching at least one second empty sub-block from the physical memory block to allocate the data.

Abstract: A method includes generating a plurality of segment allocation tables (SATs) for pluralities of sets of encoded data slices. For a first SAT, the method further includes dispersed storage error encoding the first SAT to produce a first set of encoded SAT slices. The method further includes generating a first source name for the first plurality of sets of encoded data slices and the first SAT based on an object identifier associated with the data object. The method further includes generating, based on the first source name, a first plurality of sets of slices names for the first plurality of sets of encoded data slices and the first set of encoded SAT slices. The method further includes outputting, based on the first plurality of sets of slices names, the first plurality of sets of encoded data slices and the first set of encoded SAT slices to storage units.

Abstract: Methods for use in a dispersed storage network (DSN) to select memory devices for storage of encoded data, the memory devices including solid-state memory devices and at least one other type of memory devices. In various examples, a processing module receives a data object for storage in storage units of the DSN. The processing module determines metadata associated with the data object, and encodes the data object into encoded data slices. Based on the metadata (e.g., a data type, frequency of data access, data priority, performance indicator, etc.), the processing module selects a first storage mode of a plurality of storage modes for storage of at least one of the encoded data slices, wherein the first storage mode includes storage of the at least one of the encoded data in a storage unit utilizing solid-state memory devices. A current storage mode may be reassessed periodically or following a trigger event.

Abstract: A method for execution by a computing device of a dispersed storage network (DSN). The method begins by receiving a data segment of a data object for dispersed storage error encoding. Prior to the dispersed storage error encoding, the method continues by determining whether to compress the data segment by predicting a first estimated processing cost based on estimated processing costs to compress the data segment to produce a compressed data segment and estimated processing costs to dispersed storage error encode the compressed data segment and predicting a second estimated processing cost based on estimated processing costs to dispersed storage error encode the data segment. When the first estimated processing cost compares favorably to the second estimated processing cost, the method continues by compressing the data segment to produce the compressed data segment and dispersed storage error encoding the compressed data segment to produce a set of encoded data slices.

Abstract: Methods are provided for copying, from a local place to a remote place, only array variables from a set at the local place that are used at the remote place. A method includes identifying the array based on the array meeting a condition of being defined outside of a code block for a copy command and used inside of the code block. The copy command mandates a copying of all the array variables in the set from the local place to the remote place. The method includes generating a function having code that selectively serializes or deserializes only the array variables from the set that are used at the remote place. The method includes serializing, at the local place, and deserializing at the remote place, only the array variables from the set that are used at the remote place, by invoking the function.

Abstract: A computer determines whether a page boundary of a page has been crossed by a function. Based on the computer determining that the page boundary has been crossed by the function, the computer generates a hardware exception. The computer resets one or more of a change bit and a reference bit for the page.

Abstract: Provided are a computer program product, system, and method for using a plurality of sub-buffers and a free segment list to allocate segments to a plurality of threads to use for writing data. Groups of threads are assigned to sub-buffers. At least one segment of data is indicated in each of the sub-buffers. The threads assigned to one of the sub-buffers write to the at least one segment indicated in the sub-buffer to which the threads are assigned. A free segment list indicates segments which are not indicated in one of the sub-buffers. In response to one of the segments in a containing sub-buffer comprising one of the sub-buffers becoming a full segment having less than a threshold amount of free space, the indication of the full segment in the containing sub-buffer is replaced with one of the segments indicated in the free segment list.

Abstract: A page type may be identified for each of a plurality of memory pages, the page type corresponding to a particular process that accesses a particular memory page of the plurality of memory pages. The plurality of memory pages may each respectively include duplicate data. The duplicate data may be a same set of data values. Each of the plurality of respective memory pages may be ranked as candidates to deduplicate the set of data values to. The ranking may be based on at least the page type. In response to identifying the first processor and identifying a first memory device, the duplicate data may be deduplicated from the plurality of memory pages to a highest ranked memory page. The deduplication may correspond to coalescing the duplicate data to the highest ranked memory page.

Abstract: First page data from one or more pages stored on a persistent storage can be loaded into a page buffer in a main system memory of one or more computing systems, and second page data that includes first dictionary values of a first dictionary for a first database column can be loaded and pinned into the page buffer in the main system memory. First contents of a first dictionary block containing first re-direction references to the first dictionary can be copied from the loaded first page data into a first in-memory array, and the first page data can be deallocated from the page buffer. The first re-direction references can direct to the first dictionary values of the first dictionary in the pinned second page data.

Abstract: An integrated circuit for configuring memory block portions is provided. The integrated circuit may include a memory block that is partitioned into first and second memory block portions. The first memory block portion has a first memory type and the second memory block portion has a second memory type that is different than the first memory type. The integrated circuit further includes a control circuit configured to receive configuration data. The configuration data may include memory partition information for repartitioning the first and second memory block portions into first and second repartitioned memory block portions when a portion of the first memory block portion is unused. The memory partition information may also include a memory partitioning constraint, which includes a start point address for the second repartitioned memory block portion and a number of at least one memory segments to be partitioned in the second repartitioned memory block portion.

Abstract: Methods and systems for providing a virtualization instance on an apparatus access to external primary memory, where the external primary memory is memory that is external to the apparatus but primary memory to the apparatus. Methods and systems to migrate a virtualization instance from a first client to a second client are provided in which memory of the virtualization instance is copied to from a first region to a second region without being copied to or from the first client or the second client. Methods and systems are provided for limiting local primary memory usage by a virtualization instance. After the flushing or the shooting down a translation lookaside buffer, a selected memory portion corresponding to a page table entry is marked dirty based on a portion-tracking data structure indicating that the page table entry for the selected memory portion was dirty when the selected memory portion was unmapped.

Abstract: A plurality of memory blocks are connected to a computation-enabled switch that provides data paths between the plurality of memory blocks. The computation-enabled switch performs one or more computations on data stored in one or more of the plurality of memory blocks during transfer of the data along one or more of the data paths between the plurality of memory blocks.

Abstract: In some implementations, a method includes, at a latency reduction system configured to reduce latency in writing data to one or more storage entities that are each configured to store data on an object-basis, receiving a scheduling request associated with a write operation. The method also includes determining a wait period for the write operation, where the wait period is less than or equal to the difference between a client-defined operation threshold and an operation completion time of the write operation and determining an operation start time for the write operation, based in part on the wait period.

Abstract: A memory device includes a first memory having first hardware properties, a second memory having second hardware properties different from the first hardware properties, and a controller configured to receive a signal, representing the first or second hardware properties, with a command to select the first memory or the second memory based on the received signal. The controller controls the selected first or second memory such that an operation according to the command is performed on the selected first or second memory.

Abstract: A storage device includes an interface circuit configured to communicate with an external device, nonvolatile memory devices forming a plurality of partitions, and a processing circuit configured to receive a write request, a key, and a value from the interface circuit, to generate a partition identifier and a sort identifier from the received key, to select one of the partitions using the partition identifier, and to sort indexes of accumulated keys corresponding to the selected partition using sort identifiers included in the indexes.

Abstract: A data programming method for a solid state drive is provided. The solid state drive has a flash memory with plural blocks. If a garbage collection is determined to be performed, a first open block is selected from the plural blocks of the flash memory for storing a moved valid data corresponding to the garbage collection. Then, the moved valid data corresponding to the garbage collection is programmed into the first open block. A second open block is selected from the plural blocks of the flash memory for storing a write data from a host.

Abstract: In general, techniques are described by which to provide an interface architecture for storage devices. A storage device comprising non-volatile memory, and a hardware controller may be configured to perform various aspects of the techniques. The hardware controller may be configured to read from or write to one or more data registers in a host device to provide a direct communication channel between each of one or more threads executed by one or more processors of the host device and the hardware controller. The hardware controller may further be configured to send a plurality of commands received from the direct communication channel into a hardware queue, and issue access requests based on the plurality of commands to read data from or write data to the non-volatile memory.

Abstract: A memory controller comprises a command interface to transmit a memory command to a plurality of memory devices associated with the memory controller. The memory controller also comprises an acknowledgement interface to receive an acknowledgment status packet from the plurality of memory devices over a shared acknowledgement link coupled between the memory controller and the plurality of memory devices, the acknowledgement status packet indicating whether the command was received by the plurality of memory devices. In addition, the memory controller comprises a memory controller core to decode the acknowledgment status packet to identify a portion of the acknowledgement status packet corresponding to each of the plurality of memory devices.

Abstract: According to one embodiment, a controller executes a first process such that writing is performed in an order of page numbers in the memory chip. The first process includes a second process to be executed in an order of group units. The second process includes a process of writing data to the lower pages of the memory chips belonging to the banks in one group, and subsequently writing data to the upper pages of the memory chips belonging to the banks in the group.

Abstract: A computer-implemented method includes: detecting a read access to one or more data tracks of a target data storage module; and setting a value of one or more bits in response to detecting the read access to the one or more data tracks, each of the one or more bits being associated with one of the one or more data tracks. The value of the one or more bits is set to a value configured to prevent a copy-on-write operation being applied to the one or more data tracks to which the read access was detected. Corresponding systems and computer program products are similarly disclosed, all of which advantageously improve storage system performance by reducing I/O bandwidth via preventing unnecessary copy operations.

Abstract: A method for managing data storage. The method included a processor identifying a plurality of first utilization values for data within a first data storage system, wherein the data includes a plurality of extents and the plurality of first utilization values corresponds to the plurality of extents are included in the data. The method further includes a processor transferring the data from the first data storage system to a second data storage system, wherein the second data storage system includes a plurality of solid-state drives (SSDs). The method further includes a processor storing the transferred data among the plurality of SSDs based, at least in part on, the plurality of first utilization values.

Abstract: In one embodiment, a memory control process of a device receives a plurality of program/erase (P/E) requests for a flash memory of the device. The memory control process then stores data associated with the plurality of P/E requests in a random access memory (RAM) of the device, and aggregates the plurality of P/E requests into a single P/E operation. The memory control process may then send the single P/E operation to the flash memory at a given interval to update the flash memory with the data stored in the RAM.

Abstract: This technology relates to a memory system for processing data into a memory device and an operating method of the same. The memory system may include a memory device comprising one or more closed memory blocks each including plural pages, and a controller suitable for generating valid page counts (VPCs) for each closed memory block at least two different time points, generating a VPC offset for each closed memory block between the at least two different time points, selecting a source memory block among the closed memory blocks according to the generated VPC offsets, and performing a garbage collection operation to the selected source memory block.