Abstract: A system, method and computer program product for use in providing interactive ink from handwriting input to a computing device are provided. The computing device is connected to an input device in the form of an input surface. A user is able to provide input by applying pressure to or gesturing above the input surface using either his or her finger or an instrument such as a stylus or pen. The present system and method monitors the input strokes. The computing device further has a processor and an ink management system for recognizing the handwriting input under control of the processor.

Abstract: Systems, devices and methods are disclosed for selection of characters from a menu using button presses and button presses that incorporate swipe gestures. In one embodiment, a button press ambiguously identifies a pair of characters in the menu. In a further embodiment, a press of the same button, but that incorporates a swipe gesture, unambiguously identifies a character adjacent to said pair. In a further embodiment, button presses are time dependent and button presses that incorporate swipe gestures are time independent. In a further embodiment, a button press lasting longer than a given time threshold unambiguously identifies a character of the character pair. In yet a further embodiment, the direction of a swipe gesture incorporated in a button press unambiguously identifies a character from several characters adjacent to the pair. Sequences of mixed ambiguous and unambiguous selections are compared with a dictionary to identify a possible intended word.

Abstract: The present invention is applicable to the field of terminal technologies, and provides a touch operation method and apparatus for a terminal. The method includes: acquiring a touch gesture entered by a user on a screen; loading a display control in a first screen area corresponding to the touch gesture; loading a display interface of a second screen area onto the display control, where at least some different interface elements exist in a display interface of the first screen area and the display interface of the second screen area; and acquiring an operation instruction entered by the user on the display control, and operating, on the display control, the display interface of the second screen area according to the operation instruction. In a scenario in which a user operates and controls a large-touchscreen terminal by using one hand, the present invention can effectively improve touch operation efficiency on the terminal.

Abstract: Techniques for providing multi-user multi-touch projected capacitive touch sensors are disclosed herein. Some embodiments may include a method that includes receiving a first sense signal indicating a first touch attributed to a first touch entity and receiving a second sense signal indicating a second touch attributed to a second touch entity. Based on the first sense signal and second sense signal, the method may further include determining that the first touch entity and the second touch entity are a common touch entity. Furthermore, the method may include initiating an event in response to determining that the first touch entity and the second touch entity form a common touch entity.

Abstract: Disclosed are systems and methods that model a user's interaction with a user interface. There is provided a data input system, comprising a user interface having a plurality of targets and being configured to receive user input. The system comprises a plurality of models, each of which relates previous user input events corresponding to a target to that target. An input probability generator is configured to generate, in association with the plurality of models, a probability that a user input event corresponds to a particular target. There is also provided a method of modeling a target of a user interface having a plurality of targets and being configured to receive input, by modeling for each target previous user input events which correspond to that target. Furthermore, there is provided a method of inputting data into a system comprising a user interface having a plurality of targets and being configured to receive input.

Abstract: In some examples, a computing device includes at least one processor; and at least one module, operable by the at least one processor to: output, for display at an output device, a graphical keyboard; receive an indication of a gesture detected at a location of a presence-sensitive input device, wherein the location of the presence-sensitive input device corresponds to a location of the output device that outputs the graphical keyboard; determine, based on at least one spatial feature of the gesture that is processed by the computing device using a neural network, at least one character string, wherein the at least one spatial feature indicates at least one physical property of the gesture; and output, for display at the output device, based at least in part on the processing of the at least one spatial feature of the gesture using the neural network, the at least one character string.

Abstract: Apparatuses and methods for performing multithread, concurrent access of different partition of a memory are disclosed herein. An example apparatus may include a non-volatile memory array comprising a plurality of partitions. Each of the plurality of partitions may include a respective plurality of memory cells. The apparatus may further include a plurality of local controllers that are each configured to independently and concurrently access a respective one of the plurality of partitions to execute a respective memory access command of a plurality of memory access commands responsive to receiving the respective memory access command. The example apparatus may further include a controller configured to receive the plurality of memory access commands and to determine a respective target partition of the plurality of partitions for each of the plurality of memory access commands.

Abstract: An HBA or proxy HBA device is configured to use separate Abort Buffer and I/O Buffer in each channel thereby allowing parallel queuing of regular I/O commands and Abort commands. Processing of Abort commands is prioritized such that Abort commands can be processed before all I/O commands received before the abort command are processed. The use of parallel queuing of regular I/O commands and Abort commands is of particular advantage in systems where multiple channels may receive abort commands simultaneously in the situation where the multiple channels share a common communication resource. In a particular embodiment the abort processing logic is implemented in a fiber channel adapter card which includes a proxy host bus adapter device which connects multiple HBAs via fiber channel to a storage area network.

Abstract: Apparatuses, systems, and methods are disclosed for controlling a data path for non-volatile memory. An apparatus includes one or more memory die. A memory die includes a memory core. A memory core includes an array of non-volatile memory cells and an internal data pipeline. A memory die includes a buffer that stores data associated with storage operations for a memory core. A memory die includes an internal controller that communicates with a memory core to initiate storage operations. An internal controller may delay initiating a storage operation in response to determining that an internal data pipeline and a buffer are both full.

Abstract: A memory management method is provided. The method includes receiving a write command, a first data, and a first instruction information corresponding to the write command, wherein the first instruction information instructs writing the first data into at least one first logical sub-unit of a first logical unit; executing load-align operation to the first data according to the first instruction information; writing an aligned first data obtained through the load-align operation into a first physical programming unit if a predetermined event does not occur during the load-align operation; and stopping the load-align operation and storing the first data and the first instruction information into a first physical erasing unit if the predetermined event occurs during the load-align operation, wherein the first instruction information is stored as a first valid bits information corresponding to the first data in the first physical erasing unit.

Abstract: A data memory system is described, where there may be an asymmetry in the time needed to write or erase data and the time needed to read data. The data may be stored using a RAID data storage arrangement and the reading, writing and erasing operations on the modules arranged such that the erasing and writing operations may be performed without significant latency for performing a read operation. Where a failure of a memory module in the memory system occurs, methods for recovering the data of the failed module are disclosed which may selected in accordance with policies that may relate to the minimizing the possibility of irretrievable data loss, or degradation of latency performance.

Abstract: A system and method for backup and recovery of user mobile device modules, settings and configurations. An example system includes a modular mobile device and a number of interconnected modules that can be connected to the mobile device. The device includes memory that stores configuration and setting parameters associated with each of the modules. In operation, a backup software utility monitors the configuration and setting parameters to detect additions and modifications and the transmits the detected additions and modifications to remote data storage to generate a data backup indicating a current state of the configuration and setting parameters. As a result, the modular mobile device can always return to a previous state for each module if it is replaced or the software is reinstalled, for example.

Abstract: A data storage device includes a first volatile memory device, a first scale-out storage, and a first controller. The first controller is configured to control the first volatile memory device and the first scale-out storage and to execute first firmware. The first scale-out storage includes a second volatile memory device, a first non-volatile memory device, and a second controller. The second controller is configured to control the second volatile memory device and the first non-volatile memory device and to execute second firmware. The first controller boots the first firmware after booting of the second firmware is completed by the second controller.

Abstract: An operating method of a semiconductor device and a memory system, each including a multi-connection port, includes: receiving connection information of a first device while connecting to the first device; updating information of a management table by using the connection information; and generating and transmitting a first packet including the connection information of the first device to a second device pre-connected to the memory system.

Abstract: Techniques for implementing data deduplication in conjunction with thick and thin provisioning of storage objects are provided. In one embodiment, a system can receive a write request directed to a storage object stored by the system and can determine whether the storage object is a thin or thick object. If the storage object is a thin object, the system can calculate a usage value by adding a total amount of physical storage space used in the system to a total amount of storage space reserved for thick storage objects in the system and further subtracting a total amount of reserved storage space for the thick storage objects that are filled with unique data. The system can then reject the write request if the usage value is not less than the total storage capacity of the system.

Abstract: Methods and systems for a networked storage environment are provided. One method includes scanning a first data structure by a processor executing instructions out of a memory for a storage operating system to determine whether any data chunk of a first object stored at a first storage tier is referenced by the storage operating; when the storage operating system references a certain number of data chunks, the processor using an object staging data structure to identify a second object that is in the process of being built with space for transferring the certain number of data chunks from the first object to the second object; and updating information regarding the second object at a transfer log with location information of the certain number of data chunks at the first storage tier.

Abstract: There are provided a memory system including a semiconductor memory device and a controller and an operating method thereof. A memory system having an extended storage area includes a semiconductor memory device including a plurality of memory blocks, and a controller for controlling the semiconductor memory device. In the memory system, the semiconductor memory device stores system information required to drive the semiconductor memory device and the controller in one memory block among the plurality of memory blocks.

Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.

Abstract: Methods and systems for a networked system are provided. One method includes receiving a request by a processor to transfer a data block stored at a first storage tier to the second storage tier; using an object staging data structure to determine that an object is available for transferring the data block from the first storage tier to the second storage tier. The object staging data structure an indicator providing a status for the object and an object length and an offset value of a transfer log indicating where information regarding the data block is stored. The method further includes updating an address of the storage tier where the information regarding data block is stored at the transfer log; increasing the object length and the offset value at the object staging data structure; and creating the object at the second tier.

Abstract: A central processing unit (CPU) executes a write request for first data to be written to a first block of a storage device. Executing the write request includes determining whether the first block is remapped to a first memory block in the persistent memory and whether the first memory block is in an uncommitted state. Responsive to determining that the first block is remapped to the first memory block in the persistent memory and that the the first memory block is in an uncommitted state, the CPU overwrites the first memory block in the persistent memory with the first data.

Abstract: Embodiments of the present invention use a NAND block as the basic write operation unit and ensure that the write operation uses the same basic unit as the erase operation. In this way, the flash product maintains the same level of granularity for read and write operations. The mapping between logical block addressing (LBA) and physical block addressing (PBA) are at the page level. Wear leveling and garbage collection are simplified so the robustness and performance is enhanced. If the data is frequently written, there are no concerns regarding data retention. Embodiments of the present invention evenly distribute hot data using a global optimization perspective based on this observation. When dealing with hot data, the NAND flash's required data retention capability may be adjusted to increase P/E cycles.

Abstract: Disclosed aspects include managing a set of wear-leveling data for a set of compute nodes. A set of bus traffic data may be monitored with respect to a bus which is connected to a computer hardware component of the set of compute nodes. In response to monitoring the set of bus traffic, the set of wear-leveling data may be determined using the set of bus traffic. The wear-leveling data determined using the set of bus traffic may then be established in a data store. The wear leveling data may be used to manage asset placement with respect to a shared pool of configurable computing resources.

Abstract: Methods, systems and computer-readable storage media for increasing spare space in a storage subsystem including a flash memory, extending a lifetime of the storage subsystem to achieve a stored selected minimum lifetime based at least in part as a result of the increasing spare space, and identifying at least one aspect associated with the lifetime of the storage subsystem. The storage subsystem may include compressed data stored in the flash memory.

Abstract: Systems, methods, and computer program products for autonomously obtaining configuration information and configuring a storage system for virtualization are disclosed. Configuring virtualization of a storage system may include: creating a storage pool for each array designated by an administrator for virtualization; creating one or more volumes for each storage pool; creating or selecting a volume controller designated by the administrator for hosting virtualization; identifying one or more ports of the volume controller; and mapping the one or more volumes to the one or more ports of the volume controller. Configuration information obtained may include designation of one or more arrays available to a storage system to which virtualization should be applied; designation of either an existing volume controller or a new volume controller and new volume controller name; and/or a confirmation, a negation, or a modification of one or more port identifiers.

Abstract: An memory management system with backup system, and a method of operation of a memory management system with backup system thereof, including: a memory module controller for detecting a power failure condition, the memory module controller including a nonvolatile memory controller; a compression controller integrated within the nonvolatile memory controller for receiving a data block from volatile memory; a compression engine within the compression controller for compressing the data block to form a compressed data block; and a sequencer for writing the compressed data block to nonvolatile memory.

Abstract: A memory system includes a memory device including a plurality of memory blocks each block including a plurality of pages; and a controller including a memory, and suitable for buffering segments of user data and metadata for a command operation into the memory, and storing the buffered segments into a super memory block including two or more of the plurality of memory blocks during the command operation in response to a command, wherein, when the total size of to-be-stored data among the buffered segments of the memory is smaller than an unit size of the one shot program, the controller stores dummy data as well as the to-be-stored data into the super memory block.

Abstract: A storage device includes a volatile memory, a nonvolatile memory, an auxiliary power source, and a controller configured to start a setting process to store a setting value in the volatile memory in response to a setting command received from a host, and operate in accordance with one or more setting values stored in the volatile memory. When the controller determines that a main power supply will stop, power from the auxiliary power source starts to be primarily used, and the controller saves at least part of said one or more setting values stored in the volatile memory to the nonvolatile memory, before power supply from the auxiliary power source ends.

Abstract: According to one embodiment, a memory system includes a nonvolatile first memory, a second memory, and a processor. The second memory includes a first cache area for caching in units of a data-unit. The processor transfers the first data and translation information for the first data into the first memory and performs garbage collection. The garbage collection includes first to third process. The first process is determining whether second data is valid or invalid on the basis of translation information for the second data. The second data is corresponding to the first data in the first memory. The second process is copying third data within the first memory. The third data is corresponding to the second data determined to be valid. The third process is updating translation information for the third data. The processor caches, in the first cache area, only a data-unit including translation information for the first process.

Abstract: Techniques for providing shared access to, e.g., a small computer system interface (SCSI) storage device in a computer network include providing an operational mode on SCSI interfaces with a first media agent and a second media agent such that, in response to inquiry messages on the SCSI interfaces, the SCSI storage device appears as a SCSI target device to the first media agent and the second media agent and mapping data operations between the first media agent and the SCSI storage device and the second media agent and the SCSI storage device to logically unique channel numbers for the first media agent and the second media agent to perform data storage operations over their respective SCSI interfaces by concurrently sharing the SCSI storage device.

Abstract: One embodiment of the present invention is a memory subsystem that includes a sliding window tracker that tracks memory accesses associated with a sliding window of memory page groups. When the sliding window tracker detects an access operation associated with a memory page group within the sliding window, the sliding window tracker sets a reference bit that is associated with the memory page group and is included in a reference vector that represents accesses to the memory page groups within the sliding window. Based on the values of the reference bits, the sliding window tracker causes the selection a memory page in a memory page group that has fallen into disuse from a first memory to a second memory. Because the sliding window tracker tunes the memory pages that are resident in the first memory to reflect memory access patterns, the overall performance of the memory subsystem is improved.

Abstract: In accordance with embodiments of the present disclosure, a method may include receiving requirements for building a virtual storage resource from an array of physical storage resources, receiving performance metrics and power metrics of the physical storage resources of the array available for inclusion in the virtual storage resource, determining a plurality of unique combinations of the available physical storage resources that could be used to build the virtual storage resource, determining an effective performance, an effective performance penalty, a total power consumption, and an effective power penalty for each of the plurality of unique combinations, and selecting a single combination of the plurality of unique combinations for the virtual storage resource based on effective performances, effective performance penalties, total power consumptions, and effective power penalties of the plurality of unique combinations.

Abstract: A memory module may include a plurality of memory groups configured to include a plurality of memory packages, respectively, and input/output data through input/output pins. The memory module may include a control circuit configured to activate one or more of the plurality of memory groups on a basis of an address signal. The memory module may include a multiplexer circuit configured to couple the memory group activated on the basis of the address signal to input/output buses of the memory module.

Abstract: Example implementations relate to placing loads in a self-refresh mode using a shared backup power supply. For example, a shared backup power supply system can include a node coupled to a shared backup power supply. The node can include a plurality of loads that include volatile memory and a processing resource to place the plurality of loads in a self-refresh mode in response to a failure of a primary power supply. A shared backup power supply system can also include the shared backup power supply to provide backup power to the plurality of loads in the self-refresh mode in response to the failure of the primary power supply.

Abstract: The present invention provides an electronic system having a power-condition-aware hybrid storage device and a method for the operation of the hybrid storage device in the electronic system. The electronic system comprises: a host and a hybrid storage device. The host comprises a detecting unit, and the detecting unit is utilized for detecting a power condition of the host to generate a first detecting result and detecting an operation condition of the host to generate a second detecting result. The hybrid storage device comprises: a plurality of non-volatile memory units, a hard drive unit, and a control unit. The control unit is utilized for receiving the first detecting result and the second detecting result from the detecting unit in the host and determining whether to turn on the hard drive unit according to the first detecting result and the second detecting result.

Abstract: In accordance with embodiments of the present disclosure, an information handling system may include a plurality of physical storage resources and a storage controller associated with the storage resources. The storage controller may be configured to allocate a reserved portion of each of the plurality of physical storage resources to a local pool reserved storage associated with the storage controller, communicate to at least one other storage controller information regarding the local pool reserved storage, and receive from the at least one other storage controller information regarding a global pool reserved storage comprising the local pool reserved storage and at least one other local pool reserved storage of the at least one other storage controller.

Abstract: A distributed network of storage elements (DNSE) is provided in which the physical capacity of each drive is split into a set of equal sized logical splits which are individually protected within the DNSE using separate RAID groups. To reduce restoration latency, members of the RAID groups having a member in common on a given drive are spread within the DNSE to minimize the number of sets of drives within the DNSE that have RAID members in common. By causing the splits to be protected by RAID groups, restoration of the splits may occur in parallel involving multiple drives within the DNSE. By minimizing the overlap between RAID members on various drives, failure of a given drive will not require multiple reads from another drive in the DNSE. Likewise, spare splits are distributed to enable write recovery to be performed in parallel on multiple drives within the DNSE.

Abstract: A computer system, especially but not exclusively an embedded system, is provided with a CPU and an external FLASH or other memory which is used for storing code to be executed by the CPU in operation of the system. The system can be initialized without requiring a secondary boot sequence which means it can be used in preference to embedded or serial FLASH solutions. There is provided a computer system comprising: a processor; an external memory, being external to the processor; a memory controller for the external memory; and a power management unit which is arranged to receive a wake up signal, then to first wake up the memory controller; and secondly at a later time to wake up the processor.

Abstract: A memory apparatus including multiple buffers includes a memory controller configured to obtain memory allocation information based on a multi-write operation command, and a memory configured to store same graphics data in each of multiple buffers in a memory based on the memory allocation information.

Abstract: Data is stored on a storage device, such as one or multiple hard disk drives, in accordance with intra-storage device data tiering. Data to be written to the storage device is received. Whether the data is hot data or cold data is determined. In response to determining that the data is hot data, the data is written to a fastest region of the storage device. In response to determining that the data is cold data, the data is written to a region of the storage device other than the fastest region. The intra-storage device data tiering moves data between the fastest region of the storage device and the region of the storage device other than the fastest region, as opposed to copying data between the fastest region and the region other than the fastest region in a caching-type manner.

Abstract: A system according to certain embodiments associates a signature value corresponding to a data block with one or more data blocks and a reference to the data block to form a signature/data word corresponding to the data block. The system further logically organizes the signature/data words into a plurality of files each comprising at least one signature/data word such that the signature values are embedded in the respective file. The system according to certain embodiments reads a previously stored signature value corresponding to a respective data block for sending from a backup storage system having at least one memory device to a secondary storage system.

Abstract: A method for dynamically freeing storage space in a tiered storage system includes reading attribute values associated with data sets residing on a first storage tier. The method compares characteristics of the data sets to the attribute values to determine which initial data sets qualify to be moved from the first storage tier to a second storage tier. The method further determines whether movement of the initial data sets creates a desired amount of free space on the first storage tier. In the event the movement does not create the desired amount of free space, the method modifies the attribute values, determines which additional data sets qualify to be moved from the first storage tier to the second storage tier, and recalculates the amount of free space that would be generated. A corresponding system and computer program product are also disclosed.

Abstract: A server system may be configured to access a first contiguous portion of memory for a first activity of a plurality of activities, and to transfer data associated with the first activity into the first contiguous portion of memory. The first contiguous portion of memory may be placed in a memory repository to make the first contiguous portion of memory available for access by at least a second activity of the plurality of activities, and an identifier may be assigned to the first contiguous portion of memory placed in the memory repository. The server system may also be configured to access the first contiguous portion of memory for the second activity, and to transfer the data associated with the first activity from the first contiguous portion of memory to memory specifically associated with the second activity.

Abstract: The present disclosure includes methods and devices for solid state drive formatting. One device embodiment includes control circuitry coupled to a number of memory arrays, wherein each memory array has multiple physical blocks of memory cells. The memory arrays are formatted by the control circuitry that is configured to write system data to the number of memory arrays, where the system data ends at a physical block boundary; and write user data to the number of memory arrays, where the user data starts at a physical block boundary.

Abstract: A non-volatile memory system may include a plurality of memory dies and a controller that is configured to write data into the memory dies according to a multi-die interleave scheme. A total number of the dies may be a non-multiple of a die component number of the interleave scheme. The controller may select abstract address based on a virtual die layout, and translate the abstract address to actual physical addresses. The translation may identify actual blocks located in different rows of blocks. The controller may also read data sets from the memory dies. To do so, the controller may translate an abstract address to actual physical addresses, which may similarly identify actual blocks located in different rows of blocks.

Abstract: A system and method for providing mutual exclusivity to an operation is presented. A memory location is checked to determine if the memory location is subject to an exclusive lock. If so, the age of the exclusive lock is determined. If the age of the exclusive lock is greater than a certain length of time, the exclusive lock on the memory location is released such that operations can be performed on the memory location. When a memory lock is created, a length of time can be associated with the memory location. The length of time can be a default length of time. The length of time can be a custom length that is stored in a database. Other embodiments also are disclosed.

Abstract: A controller controls a memory including first and second strings. The first and second strings configure first and second string groups, respectively. In each string group, a set of memory cell transistors each from each string configures a unit. The controller is configured to: sequentially write, in the first string group, data in first units to which serially-coupled memory cell transistors respectively belong; sequentially write, in the second string group, data in first units to which serially-coupled memory cell transistors respectively belong; and sequentially write, in the first string group, data in second units to which serially-coupled memory cell transistors respectively belong.

Abstract: Various examples of the present invention relate to an electronic device data recording method and an electronic device thereof, and an electronic device operating method can comprise the steps of: determining a data recording possibility of a specific area of a nonvolatile memory in which data is to be recorded; and determining whether to record data based on the data recording possibility. In addition, the various examples of the present invention also include the aforementioned example and other examples.

Abstract: Methods and systems for a networked system are provided. One method includes generating an object by a processor for storing a plurality of data chunks at a storage device, where the object includes a header segment and a data segment, the header segment providing a first offset address where an uncompressed data chunk is stored within the object and a second offset address of the object indicating a beginning of a compressed group having compressed data chunks and providing an indicator of a compression group size; reading the header segment by the processor to retrieve the second offset and the compressed group size in response to a first request for a data chunk within the compressed group; and decompressing the data chunk of the compressed group by the processor and providing the uncompressed data chunk for completing the first read request.

Abstract: Apparatuses, hybrid memory modules, memories, and methods for configuring I/Os of a memory for a hybrid memory module are described. An example apparatus includes a non-volatile memory, a control circuit coupled to the non-volatile memory, and a volatile memory coupled to the control circuit. The volatile memory is configured to enable a first subset of I/Os for communication with a bus and enable a second subset of I/O for communication with the control circuit, wherein the control circuit is configured to transfer information between the volatile memory and the non-volatile memory.

Abstract: The invention relates to printing and other output of documents using data processors, and particularly to methods, apparatus, and computer programming useful for controlling output processes. In various aspects the invention provides systems, methods, and computer programming useful for minimizing the number of command inputs required from a user to complete printing or other output of multiple documents. In other aspects, the invention provides systems, methods, and computer programming useful for printing documents using content data received from users or other sources, together with previously-provided form data, according to predetermined formats.