Abstract: Techniques are disclosed for generating a multi-transactional system using transactional memory techniques. According to certain embodiments, a device may include a memory, one or more processing entities, and a transactional memory system for maintaining a plurality of transactional memory (TM) logs in a first portion of the memory. Each TM log may be associated with one transaction from a plurality of transactions sequentially executed by the one or more processing entities and each transaction comprises a plurality of operations. Furthermore, each TM log associated with each transaction comprises information associated with changes to a second portion of the memory caused by execution of operations from the transaction using the one or more processing entities. The TM logs for completed transactions may be used for error detection and recovery and maintaining high availability of the device.

Abstract: An apparatus acquires, at each of times having a predetermined interval, first data identifying one of programs which is being executed at the each time by a virtual machine. When a first program is executed at a time before or after a steal time-period indicating a time-period during which a virtual machine program to operate the virtual machine is suspended, the apparatus outputs, in association with the first data identifying the first program, second data indicating a result of subtracting the steal time-period from an apparent execution time of the first program which indicates a time-period from a time of starting execution of the first program to a time of ending execution of the first program.

Abstract: Techniques are described for a real-time prioritization of service tasks. In one example, a method includes receiving one or more customer activity inputs associated with one or more service tasks for performing in a service establishment on behalf of customers of the service establishment. The method further includes receiving one or more metadata items associated with the one or more service tasks. The method also includes determining a prioritization of the one or more service tasks based on the one or more customer activity inputs, wherein determining the prioritization includes generating a prioritization value for the one or more service tasks based at least in part on at least one of the one or more metadata items or the one or more customer activity inputs, and updating the one or more service tasks based on the prioritization value.

Abstract: A method and an apparatus for visualizing a scheduling result in a multicore system. A method for visualizing a scheduling result of a plurality of tasks with respect to a plurality of cores in a multicore system includes extracting scheduling data in a time section to be visualized, determining whether the number of the extracted scheduling data exceeds a preset first threshold value, if the number of the extracted scheduling data exceeds the preset first threshold value, performing reduction of the extracted scheduling data, and visualizing and outputting the reduced scheduling data.

Abstract: The invention relates to bioinformatics pipelines and wrapper scripts that call executables in those pipelines and that also identify beneficial changes to the pipelines. A tool in a pipeline has a smart wrapper that can cause the tool to analyze the sequence data it receives but that can also select a change to the pipeline when circumstances warrant. In certain aspects, the invention provides a system for genomic analysis. The system includes a processor coupled to a non-transitory memory. The system is operable to present to a user a plurality of genomic tools organized into a pipeline. At least a first one of the tools comprises an executable and a wrapper script. The system can receive instructions from the user and sequence data—instructions that call for the sequence data to be analyzed by the pipeline—and select, using the wrapper script, a change to the pipeline.

Abstract: An input/output (I/O) throttling method of a process group, performed with respect to a multi-queue capable resource, includes setting a total credit corresponding to the multi-queue capable resource, allocating an individual credit to the process group based on the total credit and a weight of the process group, and selectively dispatching an I/O request of the process group to a multi-queue manager by consuming at least a part of the individual credit.

Abstract: A system for providing low latency computational capacity is provided. The system may be configured to maintain a pool of virtual machine instances, which may be assigned to users to service the requests associated with the users. The system may further be configured to receive a request to acquire compute capacity for executing a program code associated with a particular user, determine whether the pool of virtual machine instances includes a container that may be used to execute the program code therein, and cause the program code of the particular user to be executed in the container.

Abstract: Embodiments provide a resource management technology that may be applied to a host, where the host includes a CPU, an endpoint connected to the CPU, and an I/O device connected to the endpoint. A method includes: allocating, by the CPU, a target endpoint to a target process, where a virtual device is disposed on the target endpoint; obtaining, by the target endpoint, a performance specification of the target process, and adjusting a performance parameter of the virtual device according to the performance specification, where the adjusted virtual device satisfies a total requirement of performance specifications of all processes that use the target endpoint; and when the target process needs to access a resource, obtaining, from the I/O device, a resource that satisfies the performance specification of the target process, and providing the obtained resource to the target process for use.

Abstract: A method to manage peripheral component interconnect (PCI) memory includes accessing a page table that includes mapped data representing base address register (BAR) space and addresses of PCI devices. The method also includes determining whether a requested address of a PCI device has a corresponding entry in the page table. The method further includes invoking a hypervisor to perform a memory operation to obtain address information of the PCI device upon determining that the requested address does not have the corresponding entry in the page table.

Abstract: Disclosed aspects include managing asset placement with respect to a shared pool of configurable computing resources. A set of wear-leveling data may be detected for a set of hosts of the shared pool of computing resources. Based on the wear-leveling data, a placement arrangement for the set of assets may be determined with respect to the set of hosts of the shared pool of configurable computing resources. The placement arrangement may be based on a lesser utilized hardware factor which indicates a lesser likelihood of a hardware error event. Based on the placement arrangement, the set of assets may be placed with respect to the set of hosts of the shared pool of configurable computing resources.

Abstract: The present disclosure describes methods and systems for load balancing of a host-computing device. A supervisory computing device receives one or more resource usage statistics (e.g., CPU, memory, disk storage, and network bandwidth) of container instances operating on a first host-computing device. The device determines whether (i) the resource usage statistics of each of the containers, which are linked a given user account, exceeds (ii) a set of threshold values associated with the given user account. Responsive to the determination that the compared resource usage statistics exceeds a given threshold value, the device transmits a command (e.g., API function) to the first host computing device to migrate the container associated with the compared resource usage statistics from the first host computing device to a second host computing device selected from a group of host computing devices. The migration occurs with a guaranteed minimum downtime of the web-services being provided by the container.

Abstract: The described technology relates to integrating events electronically scheduled in enterprise web applications and other event management applications. An improved capability is provided for an event management application like, for example, Microsoft's Outlook™ to provide the user with additional useful information and/or resources associated with scheduled events such as, but not limited to, meetings. Improved capabilities are provided to the enterprise web application clients based upon integration with event applications such as Outlook. Embodiments use a unique identifier generated for an event scheduled in one application for associating corresponding event information in the second application, such that the scheduled event calendars in the first and second applications can be synchronized without duplicating the event information between the two applications.

Abstract: Methods, computing systems and computer program products implement embodiments of the present invention that include identifying a first number of processors in a computer, and identifying a second number of interrupt request (IRQ) lines on a hardware acceleration device in the computer and coupled to the processors, the second number greater than or equal to the first number. Each of the IRQ lines is associated with one of the processors, and upon selecting a given IRQ line for an application thread, a given processor associated with the given IRQ line is identified. Execution of the application thread is initiated on the given processor, and using the given IRQ line, a completion queue is configured for the application thread. If the thread is executing on a different processor than the one managing the completion queue, then the management of the completion queue can be migrated to the processor executing the thread.

Abstract: Techniques to modify a document using a latent transfer surface are described. An apparatus may comprise a document editing subsystem comprising a transfer surface creation module operative to embed a latent transfer surface in the document. A transfer control module may be communicatively coupled to the transfer surface creation module. The transfer control module may be operative to receive a transfer request to transfer media content for the document, and transfer the media content using the latent transfer surface in response to the transfer request. Other embodiments are described and claimed.

Abstract: The present disclosure extends to methods, systems, and computer program products for integrating applications. In general, aspects of the invention can be used to reduce complexities associated with integrating applications and conserve computer system resources. Designed message processing functionality as well as updates and changes can be maintained through a centralized application message processing framework and then used by a plurality of applications. The centralized application message processing framework significantly reduces, and potentially eliminates, the need to incorporate message processing functionality individually into each of the plurality of applications. This in turn reduces the burden and complexity of maintaining message processing functionality for the plurality of applications.

Abstract: Some embodiments include apparatuses and methods using a low-density parity-check (LDPC) decoding circuit to receive information retrieved from memory cells, the information including codewords, and a calculating circuit to calculate a rate of codeword errors in the codewords. The calculation is based on a rate of erroneous bits in the information and a rate of erroneous bits with a selected reliability level. The erroneous bits with the selected reliability level form a portion of the erroneous bits in the information.

Abstract: A method and an information handling system (IHS) perform server boot failure recovery by disabling failed devices and/or failed functions within functional devices. According to one aspect, a processor-executed fault isolation module (FIM) initiates calls to detected devices during a binding phase. The FIM identifies devices corresponding to successfully completed calls as operational devices, and identifies devices corresponding to failed calls as failed devices. Following completion of the binding phase, the FIM initiates calls, via a pre-boot application, to individual protocol functions of each operational device identified during the binding phase. If a first protocol call to a first operational device is successfully completed, the FIM identifies a protocol function(s) corresponding to the first protocol call as an operational function(s).

Abstract: A wireless communications device may be configured to perform integrity checking and interrogation with a network entity to isolate a portion of a failed component on the wireless network device for remediation. Once an integrity failure is determined on a component of the device, the device may identify a functionality associated with the component and indicate the failed functionality to the network entity. Both the wireless network device and the network entity may identify the failed functionality and/or failed component using a component-to-functionality map. After receiving an indication of an integrity failure at the device, the network entity may determine that one or more additional iterations of integrity checking may be performed at the device to narrow the scope of the integrity failure on the failed component. Once the integrity failure is isolated, the network entity may remediate a portion of the failed component on the wireless communications device.

Abstract: Embodiments related to managing lazy runahead operations at a microprocessor are disclosed. For example, an embodiment of a method for operating a microprocessor described herein includes identifying a primary condition that triggers an unresolved state of the microprocessor. The example method also includes identifying a forcing condition that compels resolution of the unresolved state. The example method also includes, in response to identification of the forcing condition, causing the microprocessor to enter a runahead mode.

Abstract: A starting logical lane of a logical bus is set to the first or last physical lane of a physical bus. A width of a logical bus is set to half the number of physical lanes. If a fault is absent in the logical bus, the starting logical lane is set to the other of the first and last physical lanes. The width is repeatingly divided by two until it is equal to one lane or the fault is not present in the logical bus. When the fault is absent in the logical bus and the width is greater than one lane, the fault is present within a range of the physical lanes encompassing a contiguous number of the physical lanes and the first or last physical lane.

Abstract: A method includes determining that an error has occurred. The error includes a hardware error in a computer, a network error in a network connected to the computer and/or a software error for software executing on the computer. The computer determines that the error has occurred. The method includes identifying a type of computer system in which the error has occurred. The computer system type includes a manufacturer and/or a brand for the computer. The method includes identifying, in response to determining that the error has occurred, an advertisement for a product or service relating to resolution of the error and to the type of computer system. The computer identifies the advertisement and generates an error message. The error message includes the advertisement and information regarding the error. The computer displays the error message with the advertisement on an electronic display connected to the computer.

Abstract: A method for performing a repair operation in a computer system using arrays having array cells includes detecting an error in an array. In response to detecting the error, error information is written to an error trap register. The error information includes error data and associated error detection information and a position in an array row. The error information is read from the error trap register and a corresponding data copy is determined and fetched in the computer system. One or more exact bit positions that caused the error are determined by comparing the error data with the corresponding data copy. The array cells which are associated with the determined one or more bit positions are disabled.

Abstract: A method for performing a repair operation in a computer system using arrays having array cells includes detecting an error in an array. In response to detecting the error, error information is written to an error trap register. The error information includes error data and associated error detection information and a position in an array row. The error information is read from the error trap register and a corresponding data copy is determined and fetched in the computer system. One or more exact bit positions that caused the error are determined by comparing the error data with the corresponding data copy. The array cells which are associated with the determined one or more bit positions are disabled.

Abstract: A method for operating a data storage device includes reading a plurality of data chunks from a plurality of pages corresponding to target memory cells coupled to a target word line based on read biases; obtaining discrimination data corresponding to the target memory cells based on discrimination biases; determining an unreliable bit in a target data chunk among the plurality of data chunks based on the plurality of data chunks and the discrimination data; and determining whether the unreliable bit is an error bit.

Abstract: The method of data recovery when errors failing to be corrected through ECC occur to NAND FLASH includes reading NAND FLASH; setting the read page as a current page; and judging whether the bit errors of the current page can be corrected through ECC. If yes, the operation of reading NAND FLASH is finished. If no, the data of lower pages of the current page is read out and subjected to ECC and information is recorded. Then, the data of the current page is modified according to the bit flipping information of the lower pages of the current page and re-subjecting the current page to ECC verification. The present invention can recover most of the data when errors failing to be corrected through ECC occur to NAND FLASH through the above way.

Abstract: Example implementations relate to a memory controller. For example, an apparatus includes a data storage device and a memory controller coupled to the data storage device. The memory controller is to perform, during a memory scrubbing operation, a corrective action to correct an error associated with a data block stored in the data storage device. The memory control is to determine, during the memory scrubbing operation, whether the corrective action is successful. In response to a determination that the corrective action is a failed corrective action, the memory controller is to fix a hardware failure of the data storage device based on a type of the hardware failure.

Abstract: According to an example, a method for assigning redundancy in encoding data onto crossbar memory arrays is provided wherein each of said crossbar memory arrays include cells. The data may be allocated to a subset of the cells in multiple crossbar memory arrays. The redundancy for the data may then be assigned based on coordinates of the subset of cells within the multiple crossbar memory arrays onto which the data is allocated.

Abstract: Disclosed are examples of systems, apparatus, methods and computer program products for batch job processing using a database system. In some implementations, a data object relationship structure of a first record can be identified. Based on a type of data dependency of the data object relationship structure, a first record and a second record can be determined to be associated. A first batch number can be assigned to the first record and the second record. A first batch job can be defined. It can be determined that a third record is not associated with the first record. A second batch number can be assigned to the third record and a second batch job can be defined.

Abstract: Latency-reduced document change discovery in a co-authoring session is provided. When a co-authoring session is established between clients for co-authoring a document, a communication channel that is separate from a content channel is established between each client in the co-authoring session and a notification service. When a client uploads edits made to the document to a server-stored and managed master copy of the document, the client sends a notification on the separate channel to the other clients via the notification service, notifying the other clients that document changes have been made and are available to download from the content service. The other clients are enabled to discover document changes in real-time or in near real-time to when the changes are saved to the master copy of the document, and download the client edits for merging the changes with a local copy of the document.

Abstract: To manage complexity related to automatically saving an electronic document while the electronic document is collaboratively edited, an end user application running on a local client computer, while participating in collaborative editing of a shared electronic document, is configured to automatically save the electronic document based on both local user activity and external user activity received from a collaboration system on a server computer. The collaboration system implements a save protocol that maintains consistency of the electronic document among the shared storage, remote client computers and the local client computer. The local client computer determines a save interval based on information about external user activity through the server computer, the activity of a user of the end user application on the local client computer. The performance specifications for local and shared storage and the computer network also can be considered.

Abstract: An approach for improving application performance after database recovery is provided, the approach involving tracking one or more applications connecting to a database, tracking metadata in memory on a server computer, wherein the metadata is accessed by the one or more applications, recovering the metadata during a database recovery occurring after a database crash and repopulating the metadata in memory on the server computer during the database recovery, wherein the repopulating occurs prior to the metadata being requested by the one or more applications.

Abstract: The data storage system according to certain aspects can manage the archiving of virtual machines to (and restoring of virtual machines from) secondary storage. The system may archive virtual machines (VMs) that are determined to have a low level of utilization. The system may create a virtual machine placeholder for an archived VM, which may be a “light” or minimal version of the VM that acts like the actual VM. By using a VM placeholder, a VM may appear to be active and selectable by the user. When the user selects the VM, the VM placeholder can interact with the user in similar manner as the VM. Accessing the VM placeholder may trigger restore of the archived VM from secondary storage. The restore of the archived VM may be “seamless” to the user since the VM remains available while it is being restored.

Abstract: An approach for improving application performance after database recovery is provided, the approach involving tracking one or more applications connecting to a database, tracking metadata in memory on a server computer, wherein the metadata is accessed by the one or more applications, recovering the metadata during a database recovery occurring after a database crash and repopulating the metadata in memory on the server computer during the database recovery, wherein the repopulating occurs prior to the metadata being requested by the one or more applications.

Abstract: One or more techniques and/or systems are provided for controlling restoration of a storage aggregate. For example, a local storage device, located at a first storage site, and a remote storage device, located at a second storage site, may be assigned to a first storage aggregate. Responsive to a disaster of the first storage site, a gate may be created for the local storage device. The gate may block automated reconstruction and/or automated synchronization that may otherwise occur with respect to the local storage device. Until the local storage device is restored, the remote storage device may be used to service I/O requests that were otherwise directed to the local storage device. Responsive to receiving a user restoration command, the gate may be removed from the local storage device. Synchronization between the local storage device and the remote storage device may then be facilitated.

Abstract: In one embodiment, a data processing device includes power port units for connection to network devices. Each power port unit is selectively configurable to operate as either (i) a Power Source Equipment port unit to provide power to a network device, or (ii) a Powered Device (PD) port unit to sink power from a network device. The device also includes a processor. In response to a power supply failure, the processor is operative to poll at least two network devices to determine if they are able to supply power, receive a response from each of the at least two network devices, and configure at least two power port units as PD port units to sink power from the at least two network devices. At least part of the received power is transferred from the at least two power port units via a power summing node to at least one local load.

Abstract: Various techniques for deferred server recovery are disclosed herein. In one embodiment, a method includes receiving a notification of a fault from a host in the computing system. The host is performing one or more computing tasks for one or more users. The method can then include determining whether recovery of the fault in the received notification is deferrable on the host. In response to determining that the fault in the received notification is deferrable, the method includes setting a time delay to perform a pending recovery operation on the host at a later time and disallowing additional assignment of computing tasks to the host.

Abstract: Network-based systems for monitoring geographically distributed electromechanical equipment, such as a supermarket refrigerator case or walk-in freezer. Systems includes a number of monitored sites, each in data communication with a separate data analysis facility, each facility in turn with its own data storage. All data analysis facilities are in communication with an interface server, which provides site owners/operators access to data and analyses on the various monitored sites. In some examples, data analysis facilities carry out analysis only, with data storage being consolidated into a single data storage facility that is in communication with the interface server.

Abstract: In one example, an ambulatory medical device is provided. The ambulatory medical device includes a plurality of subsystems, at least one sensor configured to acquire data descriptive of a patient, a user interface and at least one processor coupled to the at least one sensor and the user interface. The at least one processor is configured to identify subsystem status information descriptive of an operational status of each subsystem of the plurality of subsystems and to provide a device health report for the ambulatory medical device via the user interface, the device health report being based on the operational status of each subsystem.

Abstract: Disclosed aspects include managing a set of wear-leveling data with respect to a set of physical cores of a set of compute nodes. A set of physical cores of the set of compute nodes may be monitored using a set of processor utilization resource registers (PURRs) to identify the set of wear-leveling data. By monitoring the set of physical cores of the set of compute nodes, a set of thread events with respect to the set of physical cores of the set of compute nodes may be detected. Based on the set of thread events, the set of wear-leveling data may be determined. The set of wear-leveling data may then be established in a data store. The wear leveling data may be used to manage asset placement with respect to a shared pool of configurable computing resources.

Abstract: The present invention is a pad for connecting a host device to a slave device through a slave adapter. The host may provide services to the slave, including power and data connections. Pins in the pad magnetically align the slave adapter. The host and slave may collaborate on which pins are assigned to connections. The system handles various usage modifications including, for example, dislocation of the slave adapter, and changes in pin assignments.

Abstract: One or more passive collectors watch a system's real activity confirming normal responses to requests. This passive monitor may have other purposes such as measuring real performance, and determining normal completion of requests which provides complete and accurate performance and availability of the monitored system. When the passive monitoring no longer detects actual activity, the preferred embodiment automatically triggers the execution of synthetic activity which simulates the real usage of the system. This active monitoring determines the state of the usage of the system. If the simulated use of the system results in an abnormal completion of the activity, an outage is recorded. The simulation occurs on a regular interval until the passive monitor sees real normal activity.

Abstract: A method and computer program product for causing a processor to perform the method are provided. The method includes monitoring a plurality of operating parameters for each of multiple components of a compute node, wherein the multiple components have the same component type, and determining a stress factor score for each of the multiple components, wherein the stress factor score is a function of the plurality of operating parameters. The method further includes reducing use of a first component from among the multiple components, wherein the first component has a stress factor score that is greater than the stress factor score for any of the other components of the same component type. Optionally, the method may prioritize use of each of the multiple components in an order of ascending stress factor score.

Abstract: Examples of techniques for setting a stack pattern breakpoint for a COBOL program are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include providing a static program control flow view of a plurality of COBOL paragraphs of the COBOL program. The method may further include enabling a user to select the stack pattern using the static program control flow view of the plurality of COBOL paragraphs of the COBOL program. The method may also include setting, by a processing device, the stack pattern breakpoint in source code of the COBOL program using information from a compiler compiling the COBOL program to create a pseudo-stack that can be operated on by a debugger to evaluate stack pattern conditions for the plurality of COBOL paragraphs.

Abstract: Duplicate bug report detection using machine learning algorithms and automated feedback incorporation is disclosed. For each set of bug reports, a user-classification of the set of bug reports as including duplicate bug reports or non-duplicate bug reports is identified. Also for each set of bug reports, correlation values corresponding to a respective feature, of a plurality of features, between bug reports in the set of bug reports is identified. Based on the user-classifications and the correlation values, a model is generated to identify any set of bug reports as including duplicate bug reports or non-duplicate bug reports. The model is applied to classify a particular bug report and a candidate bug report as duplicate bug reports or non-duplicate bug reports.

Abstract: Examples of techniques for setting a stack pattern breakpoint for a COBOL program are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include providing a static program control flow view of a plurality of COBOL paragraphs of the COBOL program. The method may further include enabling a user to select the stack pattern using the static program control flow view of the plurality of COBOL paragraphs of the COBOL program. The method may also include setting, by a processing device, the stack pattern breakpoint in source code of the COBOL program using information from a compiler compiling the COBOL program to create a pseudo-stack that can be operated on by a debugger to evaluate stack pattern conditions for the plurality of COBOL paragraphs.

Abstract: A method may include, in a computing device comprising at least one processor and a memory, generating at least one information beacon from each of a plurality of applications installed on the computing device. Each information beacon may include application analytics data associated with a corresponding application while the corresponding application is running on the computing device. The at least one information beacon from each of the plurality of applications may be stored in a common location in the computing device. The stored at least one information beacon may be dispatched from each of the plurality of applications to a network device communicatively coupled to the computing device. The generating may be triggered by beacon generation code implemented in each of the plurality of applications installed on the computing device.

Abstract: Transaction data is received from an agent instrumented on a first one of a plurality of software components in a system, the transaction data identifying characteristics observed by the agent during monitoring of the first software component during a transaction involving the first software component and a second one of the plurality of software components. A second thread running on the second software component is identified that is at least partially dependent on a first thread run on the first software component during the transaction, the second thread corresponding to code of the second software component with a conditional breakpoint defined to be triggered based on when the second thread falls within a defined transaction boundary for the system. From the transaction data, it can be determined that the second thread falls within the transaction boundary to cause the conditional breakpoint to be triggered.

Abstract: A developer analytic module executing on an integrated development environment provides location tracing of a software development toolkit and automatic updates of the SDK. The developer analytic module further provides a user interface that enables a developer to select one or more functional modules to be included in a SDK to be installed at the developer's IDE.

Abstract: A computer-implemented method for debugging a transaction includes receiving a transaction in a transaction management system, where the transaction management system includes one or more message-processing regions (MPRs). A request to debug the transaction is identified. A debug session for the transaction is isolated from the one or more MPRs, by a computer processor, and this isolation is responsive to identifying the request to debug the transaction. Performing the isolation includes identifying a first MPR of the one or more MPRs, and deploying a replica MPR having an execution environment copied from the first MPR. Performing the isolation further includes invoking, inside the replica MPR, a debug-specific application program configured to perform the transaction.

Abstract: Various techniques for interacting with a test case via a graphical model are disclosed. For example, one method involves displaying a first icon, which represents a first testing activity within a test case; displaying a second icon, which represents a second testing activity within the test case; and displaying a connector, which couples the first icon and the second icon. An assertion (e.g., against test results obtained by performing the first testing activity) is associated with the connector.