Abstract: A playback device may have a network interface configured to communicate with a network microphone device over a communication network. A processor of the playback device may comprise instructions, which when executed, cause the processor to obtain acoustics of an environment in which the playback device is located; identify a network microphone device; and send the acoustics to the network microphone device to cause the network microphone device to apply the acoustics to voice input received by the network microphone device.

Abstract: Disclosed herein are systems and methods for establishing a metadata exchange channel between a media playback system and a networked microphone system, wherein the networked microphone system comprises a networked microphone device and a networked microphone server. After establishing the metadata exchange channel, the media playback system experiences a metadata exchange triggering event. In response to experiencing the metadata exchange triggering event, the media playback system provides metadata to the networked microphone system via the metadata exchange channel.

Abstract: Disclosed herein are systems and methods for receiving a voice command and determining an appropriate action for the media playback system to execute based on user identification. The systems and methods receive a voice command for a media playback system, and determines whether the voice command was received from a registered user of the media playback system. In response to determining that the voice command was received from a registered user, the systems and methods configure an instruction for the media playback system based on content from the voice command and information in a user profile for the registered user.

Abstract: Specialized digital assistants are described that provide scoped natural language, outcome focused options. Techniques and systems for generating the specialists are also provided so that the specialists can be embedded in or employed by other software applications. A specialist can be added directly to a website or application so that visitors to the website or application can more easily interact with the website or application and obtain desired outcomes. More than one specialist may be included in a website or application. The specialist is supported by a back-end specialized digital assistant service (“service platform”) that is scoped to the particular aspects of the website or application. The service platform can provide developer assistance by, upon receiving an indication that a specialized digital assistant component is being included in an application or a webpage, setting up a specialized digital assistant for that component.

Abstract: A system (1; 14; 30) of a device (2; 43) to store and reproduce audio information and a steering device (5; 15; 21; 26; 31) with at least one button (11) to steer the modes of the device (2; 43) and with communications means (13; 35, 36) for a wireless communication of steering commands with communications means (4) of the device (2; 43), wherein the steering device (5; 15; 21; 26; 31) is built in the form factor of a strap (6; 16; 24; 32) to be worn at least partially around a users (7) neck (8).

Abstract: A random number processing device according to an aspect of the present disclosure is a random number processing device generating random number data by using data read from memory cells, the memory cells having a property such that, in a variable state, in response to application of different electrical signals, a resistance value of each of the memory cells reversibly transitions between resistance value ranges and, when the resistance value falls within at least one resistance value range among the resistance value ranges, the resistance value changes as time passes, the random number processing device including a random number processing circuit that, in operation, generates first random number data from a combination of first resistance value information and second resistance value information about the resistance values of first and second memory cells among the memory cells which fall within the at least one resistance value range.

Abstract: Provided are a module division assistance device, a module division assistance method, and a module division assistance program for automatically extracting a divisible module by utilizing information relating to a function used by a module. A keyword obtaining unit of an information processing device collects data relating to a function used by a module into keyword use data organized by modules, and a data analysis unit uses the data and a calculation method for an indivisibility calculation item specified by a user and stored in an indivisibility calculation item list, thereby calculating an indivisibility, and stores the indivisibility into indivisibility data.

Abstract: A method of performing finite field addition and doubling operations in an elliptic curve cryptography (ECC) authentication scheme as a countermeasure to side-channel attack. The addition and doubling operations are executed using atomic patterns that involve the same sequence and number of operation types, so that the noise consumption and electromagnetic emanation profile of circuitry performing the operations is identical regardless of operation. A subtraction operation using such an atomic pattern is also disclosed.

Abstract: Methods and computing devices are described for computing a structural model stability metric, a functional model stability metric, and a behavioral model stability metric. A first state of a diagram having a first plurality of actors or participants and a second state of the diagram having a second plurality of actors or participants are obtained. One or more properties for the first state and the second state are identified. A transformation is tracked in the properties from the first state to the second state. The stability metric is calculated for the second state as a ratio of a percentage of unchanged properties from the first state to the second state to a total number of the first plurality of actors or participants in the first state of the diagram.

Abstract: Provided is a method, apparatus, system, and non-transitory computer readable medium for extending at least one function of a package file. A function addition method executed at a computer may include storing a package file for an application; extracting, from the package file, a file in which information about a class most initially called in response to execution of the application is set as configuration information of the application; and setting a class name of a new class to an item to which information about the most initially called class is set in the extracted file.

Abstract: Generate hybrid enterprise mobile applications in cloud environment, according to one embodiment. A web application is selected in a web integrated development environment (IDE) executing in a browser. The web application may depend on various components and the dependent build components may reside on different repositories. Dependency analysis engine determines the dependent build components corresponding to the web application. The component retrieval engine retrieves the dependent build components from corresponding repositories to memory or cache of the browser where the web IDE is executing. Component build engine builds the dependent build components to a build result. Packaging engine packages the build result to a single package as an application asset package. The application asset package is received in a platform dependent build service. The application asset package is built as a hybrid mobile application in the platform dependent build service.

Abstract: A system of one or more computing devices includes a user interface presented to a developer. A data store stores information identifying multiple functions, each corresponding to external functionality available from third party applications. The developer selects at least one of the functions to supplement functionality of a first application. A code generation module provides a software object for incorporation into the first application. The software object includes instructions for transmitting a query wrapper to a search system. The query wrapper includes a predefined text string corresponding to one of the functions selected by the developer. The software object includes instructions for receiving and displaying a result set including multiple items, each including a name and corresponding access mechanism of an application. The software object includes instructions for, in response to user selection of a first item, actuating the access mechanism to download or open the corresponding application.

Abstract: A software development tool uses a workflow pattern that describes software applications. The tool may provide a solution that can automatically generate a well-architected application without compromising its quality or integrity. The tool may have a Data Notation Architecture (DNA) layer and a Resolution Notation Architecture (RNA) layer Genetic Framework that use a workflow pattern that describes software applications. Models may be identified and linked together using a Polymorphic Relational Path Language (PRPL), which is a scripting language that is designed and optimized to resolve various hierarchy and set theory problems that naturally appear in programming. When targeting the Service Area Architecture Pattern (SAAP), this Genetic Framework may greatly reduce the overall cost of virtually every part of the software development lifecycle.

Abstract: An example system for content publishing includes a computer processor and computer memory including instructions that cause the computer processor to present a first code sample having a first functionality in response to a request for the first functionality. The instructions also cause the processor to detect an association between the first code sample and a second code sample having a second functionality, wherein the association indicates the first code sample is dependent on the second code sample. The instructions further cause the processor to generate, in response to a selection of the first code sample, a build file based on the first code sample and the second code sample. The instructions also further cause the processor to generate a package including the first functionality and the second functionality based on the build file.

Abstract: A method is described that includes translating higher level program code including higher level instructions having an instruction format that identifies pixels to be accessed from a memory with first and second coordinates from an orthogonal coordinate system into lower level instructions that target a hardware architecture having an array of execution lanes and a shift register array structure that is able to shift data along two different axis. The translating includes replacing the higher level instructions having the instruction format with lower level shift instructions that shift data within the shift register array structure.

Abstract: A method for compiling software code comprises scanning call sites within the code to identify a function that is called with at least one constant argument and creating a list of each call site associated with the function and sets of constant arguments passed to the function. If any common subsets of the constant arguments are shared across a plurality of call sites, a size of the function is estimated. selecting any sets of constant arguments that are used only in one call site. The sizes of specialized functions covering sets of constant arguments that are used in only one call site is estimated. The method comprises creating a first set of specialized versions of the function covering one or more sets of constant arguments that are used in only one call site, and if any common subsets of the constant arguments exist, creating a second set of specialized versions of the function.

Abstract: Herein disclosed is an optimization for a compiler, the optimization configured to assign numeric values, or semantic fingerprints, to portions of code, and to combine these fingerprints to arrive at fingerprints for larger and larger portions of code. The fingerprints can be provided to various consumers such as code redundancy optimization modules and copyright violation and malware/virus identification modules. The fingerprints can also be used to cluster similar code, and then code within each cluster can be merged. Merger can include creating a single merged portion of code including identical portions of code from the original portions of code and control flow and new arguments to account for differences between the original portions of code. The original portions of code can be replaced with wrappers that use new arguments to call to the merged portion of code.

Abstract: Method and system are provided for identifying a processing element for executing a computer program code module. The method includes: calculating a cyclomatic complexity score for the module; selecting one of a first or second processing element based on the calculated complexity score, the first processing element having a first architecture and the second processing element having a second architecture different from the first architecture, the first and second processing elements forming part of a heterogeneous computer system; running the module on the selected processing element to determine a first run time, and subsequently running the module on the non-selected processing element to determine a second run time; comparing the first and second run time to identify a shortest run time; and identifying a processing element producing a shortest run time as the processing element for executing the computer program code module.

Abstract: Embodiments include methods, and computer system, and computer program products for generating ease of use interfaces for legacy system management facilities (SMF). Aspects include: retrieving an SMF record from an SMF data source through an SMF data interface from a file, over a network or via a real-time API, SMF record having a data control section (DSECT) with code comments for storing a mapping of SMF record defining data structure of SMF record with one or more fields, converting mapping of SMF record into an intermediate format representing mapping of SMF record and corresponding information extracted from the code comments among the one or more fields of SMF record, generating at least one application programming interface (API) in a different computer language using intermediate format, and accessing SMF record using API generated. Different computer language may include Java and intermediate format may include Extensible Markup Language (XML).

Abstract: System and techniques for an internet-of-things device blank are described herein. An IoT blank device may be tested to determine whether it is in an initial state. In response to a determination that the IoT blank device is in the initial state, a cloud endpoint may be contacted, via a transceiver, to retrieve a package. Here, the contact includes a message with an identifier of the IoT blank device. The package may be received, the package including an application. The package may be installed. The installation including registering the application with a message queue of the IoT blank device. The application may also be run after installation. Data from the application running on the IoT blank device may be received via a message queue. The data may then be transmitted to the cloud endpoint via the transceiver of the IoT blank device.

Abstract: The present invention discloses a system and method for smart installation of applications on a computing device without logging into the computing device using an email account. The system is configured to install applications by identifying applications in a peer computing device and listing those identified applications in a target computing device. A picture of app drawing screen on a user interface of a secondary computing device is captured and displayed on the user interface of the primary computing device for analysis for identifying the applications for installation. Optionally the applications are identified from the applications available on an application store based on a browsing history and a demography of the user. The icons of the identified applications are displayed along with a checkbox for selecting the required applications. The required application are installed on the computing device alter confirming the non-availability.

Abstract: A control system and method enabling comparison of first and second character strings, the control system comprising a first source of information supplying the first string and a second source of information embedded in an aircraft and supplying the second string. A first processing module can model the first character string, each first character string character divided into a given number H×W of standardized elements comprising sign elements and background elements. The first processing module can transform each character into a standardized image. A second processing module can model the second character string, each character divided into H×W standardized elements comprising sign elements and background elements, and can transform each character into a standardized image in which each standardized element is associated with a comparison code. A comparison module can load the first string into the first module and load the second string into the second module for processing.

Abstract: An automatic software gathering device includes a processor that executes a process. The process includes receiving setup order information related to a specific system construction, identifying respective software items of a setup target included in the setup order information, referencing a first storage section storing software and storage areas, accessing a storage area of each identified software item of the setup target, gathering each software item of the setup target, and storing each of the gathered software items in a second storage section as a software group employed during the specific system construction.

Abstract: A system includes a processor configured to detect a vehicle key-off. The processor is also configured to delete from a primary memory (“internal memory”) of an electronic control unit an existing software version for which a new software version update exists in a secondary memory of the ECU. The processor is further configured to load the new software version from the secondary memory (“external memory”) into the primary memory and upon detection of a failure during the load, delete the new software version from the primary memory and reload the existing software version from the secondary memory.

Abstract: A system includes a processor configured to, in response to a notification received from a remote network that an update to vehicle software is available, assemble a list of installed vehicle software versions. The processor is also configured to transmit the list of installed versions to a remote update server. The processor is further configured to receive a list of available updates compatible with the installed vehicle software versions in response to the transmission. Additionally, the processor is configured to download at least one of the available updates and install the downloaded updates.

Abstract: A vehicle includes at least one programmable computing device including a memory configured to store instructions that are executable by a processor. The vehicle also include a software loader configured to modify or replace the instructions based on a loadable software part. The vehicle includes a data interface and a loadable software part memory. The vehicle further includes a switch coupled to the data interface, to the loadable software part memory, and to software loader. While the switch is in a first position, a first data path between the data interface and the loadable software part memory is enabled and a second data path between the loadable software part memory and the software loader is disabled. While the switch is in a second position, the second data path is enabled and the first data path is disabled.

Abstract: Embodiments herein relate to a master process being executed by a processor to control an upgrade to an application process. For instance, the master process initializes an environment for operating an application process and starting an execution of the application process within the environment. Further, the master process upgrades a code of the application process while the master process maintains the environment and the execution of the application process.

Abstract: Embodiments herein relate to a master process being executed by a processor to control an upgrade to an application process. For instance, the master process initializes an environment for operating an application process and starting an execution of the application process within the environment. Further, the master process upgrades a code of the application process while the master process maintains the environment and the execution of the application process.

Abstract: The present disclosure includes methods, devices and systems for establishing a connection between a medical device and a remote computing device, receiving an upgrade command at the medical device, storing a current version of persistent data and a current version of executable code in a first storage area of the medical device, transmitting at least the current version of the persistent data to the remote computing device, receiving a second format of the current version of the persistent data and an upgraded version of executable code at the medical device, storing the second format of the current version of the persistent data and the upgraded version of the executable code in a second storage area of the medical device, and executing the upgraded version of the executable code with the second format of the current version of the persistent data.

Abstract: A controller corresponding to production equipment, requiring upgrade can be selected automatically, thereby reduction in operating rate can be reduced. When software is upgraded, version upgrade software relating to a predetermined action description and version information are transferred to a controller management apparatus (S1). A version change determination unit selects a controller including the predetermined action description described in the version information (S2 and S3). The selected controller downloads the new version of software to change the software (S4 and S5) after stopping operation of the production equipment. On the other hand, a controller not selected does not download the software, and the operation of the production equipment is not stopped.

Abstract: The present disclosure provides a first method for updating firmware of a computer system, which is embedded in a technical device, wherein the technical device has a volatile memory module, wherein the technical device has a non-volatile memory module, in which a firmware update package is stored, wherein the firmware update package contains individual files and associated first checksums, wherein the method runs through the following steps in the specified sequence: a restart (G), a subsequent booting of the computer system (H), and checking if an indicator file exists in the non-volatile memory module (I). Also provided is a second method for updating firmware of the computer system, which is embedded in a technical device, wherein the method runs through the following steps in the specified sequence: a restart (G), a subsequent booting of the computer system (H), and a check as to whether an indicator file exists in the non-volatile memory module (I).

Abstract: Systems and methods are provided for updating hot-pluggable devices of an information handling system using dynamic EFI System Resource Table (ESRT) entries to implement an ESRT entry update procedure for hot-pluggable devices. Extended configuration space (e.g., such as PCIe Extended Config Space) of a hot-pluggable device may be utilized to store firmware update version information such as firmware version details, which is used in the OS space to update the ESRT table, and the system OS may read and apply the updated firmware version information and apply the firmware update immediately without additional OS reboots.

Abstract: Some examples described herein relate to dynamically applying a patch to a shared library, An external process may be invoked to bring target processes that refer to a shared library, to a safe point. In response to a function call from a target process, amongst the target processes, to access a target function in the shared library, the function call may be forwarded to a special function in a dynamic loader, wherein the target function is a function to be patched in the shared library. The special function may determine whether a shared patch library, comprising a patched version of the target function or a new function, is loaded for the target process. In response to determination that the shared patch library is not loaded for the target process, the shared patch library may be loaded only for the target process, and the request for the target function may be routed to the patched version of the target function or the new function, in the shared patch library.

Abstract: The disclosure includes a system and method for removing an incompatibility between an adaptive sensor system and an adaptive engine control unit system. The method may include detecting an update to one or more of an adaptive sensor system and an adaptive engine control unit system. The method may include identifying an incompatibility between the adaptive sensor system and the adaptive engine control unit system created by the update. The method may include determining one or more modifications for one or more of the first compatibility module and the second compatibility module. The modifications may be configured to remove the incompatibility.

Abstract: An action sequence including a plurality of actions and a corresponding input dictionary are obtained. A first container, running an image for a first one of the actions implemented in a first programming language, is instantiated, and the image is executed on the input dictionary to obtain a first action result; the input dictionary is then updated with the first action result to obtain an updated input dictionary. A second container, running an image for a second one of the actions implemented in a second programming language, different than the first programming language, is instantiated, and the image is executed on the updated input dictionary to obtain a second action result; the updated input dictionary is further updated with the second action result to obtain a further updated input dictionary. The input dictionaries are independent of the programming languages.

Abstract: Aspects include extensible change set conflict and merge gap detection in a record-based configuration management system. A method includes instructing the record-based configuration management system to create a change set. The method also includes instructing the record-based configuration management system to add one or more version mappings to a given configuration and to indicate specific concepts which should be flagged as not participating in a process that includes change set conflict and merge gap detection. The record-based configuration management system is instructed to deliver the change set to a requestor.

Abstract: Methods and apparatuses are provided for code refactoring. The method includes acquiring a code and identifying, using processing circuitry and based on a Markov decision process model, a refactoring sequence. The refactoring sequence includes a plurality of refactoring steps to be applied to the code. Further, the method includes refactoring, by the processing circuitry, the code according to the refactoring sequence.

Abstract: A system for providing a computer language with which to write rules is provided. The system may include a rules container, a rules classes container and an engine/graph. The rules classes container may provide a code library of rules and unit test from which to inherit. The system may also include a rules GUI that may accept code of a rule in a code field window. The rules GUI may also include a documentation presentation window. The documentation presentation window may include a non-editable, reader-friendly view of the rule. Viewing the documentation window adjacent to the code field window may enable a user to understand the code and edit the code. Each rule may depend from another rule or provide a dependency for another rule. The system may save the rules into the rules container. The engine/graph may create a graph of the rules documentation based on the dependencies.

Abstract: A safety I/O module (10) disposed between a network (NW) and a target device (20) is provided. The safety I/O module (10) includes MCUs (121, 122). Further, the each of the MCUs (121, 122) includes a CPU (123) and an RTOS accelerator (124) configured to perform a process for switching a task executed by the CPU (123) and a process for starting the task.

Abstract: Embodiments of systems, apparatuses, and methods for performing in a computer processor vector double block packed sum of absolute differences (SAD) in response to a single vector double block packed sum of absolute differences instruction that includes a destination vector register operand, first and second source operands, an immediate, and an opcode are described.

Abstract: An apparatus is described that includes an execution unit having a multiply add computation unit, a first ALU logic unit and a second ALU logic unit. The ALU unit is to perform first, second, third and fourth instructions. The first instruction is a multiply add instruction. The second instruction is to perform parallel ALU operations with the first and second ALU logic units operating simultaneously to produce different respective output resultants of the second instruction. The third instruction is to perform sequential ALU operations with one of the ALU logic units operating from an output of the other of the ALU logic units to determine an output resultant of the third instruction. The fourth instruction is to perform an iterative divide operation in which the first ALU logic unit and the second ALU logic unit operate during to determine first and second division resultant digit values.

Abstract: Methods and apparatuses relating to processors that contextually optimize instructions at runtime are disclosed. In one embodiment, a processors includes a fetch circuit to fetch an instruction from an instruction storage, a format of the instruction including an opcode, a first source operand identifier, and a second source operand identifier; wherein the instruction storage includes a sequence of sub-optimal instructions preceded by a start-of-sequence instruction and followed by an end-of-sequence instruction.

Abstract: A processor is described, including a fetch circuit to fetch an instruction, including a first source operand identifier, a second source operand identifier, and a destination operand identifier, a decode circuit to decode the instruction, a data retrieval circuit to retrieve data associated with the first source operand identifier and the second source operand identifier, and an execution circuit. In some embodiments, the execution circuit is configured to determine whether a first element of the data associated with the first source operand identifier is set, if the first element is set, to retrieve a destination index from a corresponding second element of the data associated with the second source operand identifier, and to use the destination index to select and set a destination element of data associated with the destination operand identifier.

Abstract: A processor includes a logic for stateless capture of data linear addresses (DLA) during precise event based sampling (PEBS) for an out-of-order execution engine. The engine may include a PEBS unit with logic to increment a counter each time an instance of a designated micro-op is retired a reorder buffer, capture output DLA referenced by an instance of the micro-op that executes after the counter overflows, set a captured bit associated with a reorder buffer identifier for the instance of the micro-op, and store a PEBS record in a debug storage when the instance of the micro-op is retired from the reorder buffer. The designated micro-op references a DLA of a memory accessible to the processor.

Abstract: A vector reduction instruction is executed by a processor to provide efficient reduction operations on an array of data elements. The processor includes vector registers. Each vector register is divided into a plurality of lanes, and each lane stores the same number of data elements. The processor also includes execution circuitry that receives the vector reduction instruction to reduce the array of data elements stored in a source operand into a result in a destination operand using a reduction operator. Each of the source operand and the destination operand is one of the vector registers. Responsive to the vector reduction instruction, the execution circuitry applies the reduction operator to two of the data elements in each lane, and shifts one or more remaining data elements when there is at least one of the data elements remaining in each lane.

Abstract: Instructions and logic provide pushing buffer copy and store functionality. Some embodiments include a first hardware thread or processing core, and a second hardware thread or processing core, a cache to store cache coherent data in a cache line for a shared memory address accessible by the second hardware thread or processing core. Responsive to decoding an instruction specifying a source data operand, said shared memory address as a destination operand, and one or more owner of said shared memory address, one or more execution units copy data from the source data operand to the cache coherent data in the cache line for said shared memory address accessible by said second hardware thread or processing core in the cache when said one or more owner includes said second hardware thread or processing core.

Abstract: Branch prediction in a computer processor, includes: fetching an instruction, the instruction comprising an address, the address comprising a first portion of a global history vector and a global history vector pointer; performing a first branch prediction in dependence upon the first portion of the global history vector; retrieving, in dependence upon the global history vector pointer, from a rolling global history vector buffer, a second portion of the global history vector; and performing a second branch prediction in dependence upon a combination of the first portion and second portion of the global history vector.

Abstract: A processor includes a front end, an execution pipeline, and a binary translator. The front end includes logic to receive an instruction and to dispatch the instruction to a binary translator. The binary translator includes logic to determine whether the instruction includes a control-flow instruction, identify a source address of the instruction, identify a target address of the instruction, determine whether the target address is a known destination based upon the source address, and determine whether to route the instruction to the execution pipeline based upon the determination whether the target address is a known destination based upon the source address. The target address includes an address to which execution would indirectly branch upon execution of the instruction.

Abstract: A processor includes an instruction decoder to receive an instruction having a first operand, a second operand, and a third operand, and an execution unit coupled to the instruction decoder to execute the instruction, the execution unit to individually perform a shift operation by at least one bit for each of a plurality of data elements stored in a storage location indicated by the second operand, for each of the data elements that has an overflow in response to the shift-left operation, to carry over the overflow into an adjacent data element based on a first bitmask obtained from the third operand, generating a final result, and to store the final result in a storage location indicated by the first operand.

Abstract: An apparatus is described that includes instruction execution circuitry to execute first, second, third, and fourth instructions, the first and second instructions select a first group of input vector elements from one of multiple first non-overlapping sections of respective first and second input vectors. Each of the multiple first non-overlapping sections have a same bit width as the first group. Both the third and fourth instructions select a second group of input vector elements from one of multiple second non-overlapping sections of respective third and fourth input vectors. The second group has a second bit width that is larger than the first bit width. Each of multiple second non-overlapping sections have a same bit width as the second group. The apparatus includes masking layer circuitry to mask the first and second groups at a first granularity a second granularity.