Patents Issued in October 12, 2017
  • Publication number: 20170293558
    Abstract: A multiprocessor data processing system includes multiple vertical cache hierarchies supporting a plurality of processor cores, a system memory, and a system interconnect. In response to a load-and-reserve request from a first processor core, a first cache memory supporting the first processor core issues on the system interconnect a memory access request for a target cache line of the load-and-reserve request. Responsive to the memory access request and prior to receiving a systemwide coherence response for the memory access request, the first cache memory receives from a second cache memory in a second vertical cache hierarchy by cache-to-cache intervention the target cache line and an early indication of the systemwide coherence response for the memory access request. In response to the early indication and prior to receiving the systemwide coherence response, the first cache memory initiating processing to update the target cache line in the first cache memory.
    Type: Application
    Filed: April 11, 2016
    Publication date: October 12, 2017
    Inventors: GUY L. GUTHRIE, JONATHAN R. JACKSON, WILLIAM J. STARKE, JEFFREY A. STUECHELI, DEREK E. WILLIAMS
  • Publication number: 20170293559
    Abstract: In at least one embodiment, a multiprocessor data processing system includes multiple vertical cache hierarchies supporting a plurality of processor cores, a system memory, and an interconnect fabric. In response to a first cache memory snooping on the interconnect fabric a request of an interconnect operation of a second cache memory, the first cache memory allocates a snoop machine to service the request. Responsive to the snoop machine completing its processing of the request and prior to the first cache memory receiving a systemwide coherence response of the interconnect operation, the first cache memory allocates an entry in a data structure to handle completion of processing for the interconnection operation and deallocates the snoop machine. The entry of the data structure protects transfer of coherence ownership of a target cache line from the first cache memory to the second cache memory during a protection window extending at least until the systemwide coherence response is received.
    Type: Application
    Filed: April 11, 2016
    Publication date: October 12, 2017
    Inventors: GUY L. GUTHRIE, WILLIAM J. STARKE, DEREK E. WILLIAMS
  • Publication number: 20170293560
    Abstract: A method and apparatus for performing memory prefetching includes determining whether to initiate prefetching. Upon a determination to initiate prefetching, a first memory row is determined as a suitable prefetch candidate, and it is determined whether a particular set of one or more cachelines of the first memory row is to be prefetched.
    Type: Application
    Filed: September 19, 2016
    Publication date: October 12, 2017
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Yasuko Eckert, Nuwan Jayasena, Reena Panda, Onur Kayiran, Michael W. Boyer
  • Publication number: 20170293561
    Abstract: Systems and methods for managing memory access bandwidth include a spatial locality predictor. The spatial locality predictor includes a memory region table with prediction counters associated with memory regions of a memory. When cache lines are evicted from a cache, the sizes of the cache lines which were accessed by a processor are used for updating the prediction counters. Depending on values of the prediction counters, the sizes of cache lines which are likely to be used the processor predicted for the corresponding memory regions. Correspondingly, the memory access bandwidth between the processor and the memory may be reduced to fetch a smaller size data than a full cache line if the size of the cache line likely to be used is predicted to be less than that of the full cache line.
    Type: Application
    Filed: September 20, 2016
    Publication date: October 12, 2017
    Inventors: Brandon Harley Anthony DWIEL, Harold Wade CAIN, III, Shivam PRIYADARSHI
  • Publication number: 20170293562
    Abstract: Host memory buffer is dynamically adjusted based on performance. As memory pages are accessed, one or more counts of the memory pages are maintained. If the counts indicate some of the memory pages are identical, then a portion of host system memory allocated to buffer cache may be reduced or decremented in response to repetitive access. However, if the counts indicate different memory pages are accessed, then the host system memory allocated to the buffer cache may be increased or incremented.
    Type: Application
    Filed: April 6, 2016
    Publication date: October 12, 2017
    Inventors: Lee B. Zaretsky, Lawrence E. Knepper
  • Publication number: 20170293563
    Abstract: Techniques are described for metadata processing that can be used to encode an arbitrary number of security policies for code running on a processor. Metadata may be added to every word in the system and a metadata processing unit may be used that works in parallel with data flow to enforce an arbitrary set of policies. In one aspect, the metadata may be characterized as unbounded and software programmable to be applicable to a wide range of metadata processing policies. Techniques and policies have a wide range of uses including, for example, safety, security, and synchronization. Additionally, described are aspects and techniques in connection with metadata processing in an embodiment based on the RISC-V architecture.
    Type: Application
    Filed: June 16, 2017
    Publication date: October 12, 2017
    Inventors: Andre' DeHon, Udit Dhawan
  • Publication number: 20170293564
    Abstract: Systems, apparatuses and methods of adaptively controlling a cache operating voltage are provided that comprise receiving indications of a plurality of cache usage amounts. Each cache usage amount corresponds to an amount of data to be accessed in a cache by one of a plurality of portions of a data processing application. The plurality of cache usage amounts are determining based on the received indications of the plurality of cache usage amounts. A voltage level applied to the cache is adaptively controlled based on one or more of the plurality of determined cache usage amounts. Memory access to the cache is controlled to be directed to a non-failing portion of the cache at the applied voltage level.
    Type: Application
    Filed: April 8, 2016
    Publication date: October 12, 2017
    Applicants: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Ihab Amer, Khaled Mammou, Haibo Liu, Edward Harold, Fabio Gulino, Samuel Naffziger, Gabor Sines, Lawrence A. Bair, Andy Sung, Lei Zhang
  • Publication number: 20170293565
    Abstract: Systems and methods are directed to selectively bypassing allocation of cache lines in a cache. A bypass predictor table is provided with reuse counters to track reuse characteristics of cache lines, based on memory regions to which the cache lines belong in memory. A contender reuse counter provides an indication of a likelihood of reuse of a contender cache line in the cache pursuant to a miss in the cache for the contender cache line, and a victim reuse counter provides an indication of a likelihood of reuse for a victim cache line that will be evicted if the contender cache line is allocated in the cache. A decision whether to allocate the contender cache line in the cache or bypass allocation of the contender cache line in the cache is based on the contender reuse counter value and the victim reuse counter value.
    Type: Application
    Filed: September 22, 2016
    Publication date: October 12, 2017
    Inventors: Shivam PRIYADARSHI, Brandon Harley Anthony DWIEL, Rami Mohammad A. AL SHEIKH, Harold Wade CAIN III
  • Publication number: 20170293566
    Abstract: Technologies are generally described herein to detect non-volatile write request sequences. A write request is received to write to a solid-state device that includes the non-volatile memory. A determination is made as to whether the write request is part of a non-volatile write request sequence or is not pan of the non-volatile write request sequence, in response to determining that the write request is part of the non-volatile write request sequence, the write request is associated with the non-volatile write request sequence. In response to determining that the write request is not part of the non-volatile write request sequence, the data associated with the write request is written to a cache that is coupled to the non-volatile memory. The data associated with the non-volatile write request sequences may be written directly to the non-volatile memory.
    Type: Application
    Filed: September 9, 2014
    Publication date: October 12, 2017
    Applicant: HUA ZHONG UNIVERSITY OF SCIENCE TECHNOLOGY
    Inventors: Dan Feng, Wen Zhou, Jingning Liu, Wei Tong, Yu Hua, Shuangwu Zhang
  • Publication number: 20170293567
    Abstract: An apparatus comprises processing circuitry to process data access operations specifying a virtual address of data to be loaded from or stored to a data store, and proxy identifier determining circuitry to determine a proxy identifier for a data access operation to be processed by the data access circuitry, the proxy identifier having fewer bits than a physical address corresponding to the virtual address specified by the data access operation. The processing circuitry comprises at least one buffer to buffer information (including the proxy identifier) associated with one or more pending data access operations awaiting processing. Address translation circuitry determines the physical address corresponding to the virtual address specified for a data access operation after that data access operation has progressed beyond said at least one buffer.
    Type: Application
    Filed: June 26, 2017
    Publication date: October 12, 2017
    Inventors: Richard F. BRYANT, Kim Richard SCHUTTENBERG, Lilian Atieno HUTCHINS, Thomas Edward ROBERTS, Alex James WAUGH, Max John BATLEY
  • Publication number: 20170293568
    Abstract: Systems and methods for wear leveling in non-volatile memories (NVMs) are disclosed. One such system includes a cumulative control state determiner configured to determine a cumulative control state indicative of a state of random mappings between physical block addresses (PBAs) and logical block addresses (LBAs) of an NVM, an access network configured to translate a LBA to a PBA based on the cumulative control state, and a background swap scheduler configured to swap PBAs assigned to preselected LBAs based on a control state. One such method involves determining a cumulative control state indicative of a state of random mappings between physical block addresses (PBAs) and logical block addresses (LBAs) of an NVM, translating a LBA to a PBA based on the cumulative control state, and swapping PBAs assigned to preselected LBAs based on a control state.
    Type: Application
    Filed: June 19, 2017
    Publication date: October 12, 2017
    Inventor: Kiran Kumar Gunnam
  • Publication number: 20170293569
    Abstract: Systems and methods for wear leveling in non-volatile memories (NVMs) are illustrated. One such system includes a first non-volatile memory configured to store information from a host, a second non-volatile memory storing a plurality of cumulative control states, each indicative of a state of random mappings between physical block addresses (PBAs) and logical block addresses (LBAs) of the first non-volatile memory, and a plurality of control states, an access network configured to translate LBAs to PBAs based on the plurality of cumulative control states, a background swap scheduler configured to swap PBAs assigned to LBAs based on the plurality of control states, and a controller configured to sequentially advance through the plurality of cumulative control states and the plurality of control states.
    Type: Application
    Filed: June 19, 2017
    Publication date: October 12, 2017
    Inventor: Kiran Kumar Gunnam
  • Publication number: 20170293570
    Abstract: An in-memory cache for a computer system having a first storage and a second storage where the first storage is a cache for the second storage, tracks priority levels of block attributes stored therein. If a data item is cached in the first storage, the block attribute corresponding to the data item is stored in the in-memory cache as a high priority block attribute. If a data item evicted from the first storage, the block attribute corresponding to the data item is stored in the in-memory cache as a low priority block attribute. When the cache becomes full, the low priority block attributes are evicted before the high priority block attributes.
    Type: Application
    Filed: April 12, 2016
    Publication date: October 12, 2017
    Inventors: Wenguang WANG, Enning XIANG
  • Publication number: 20170293571
    Abstract: Systems and methods relate to cost-aware cache management policies. In a cost-aware least recently used (LRU) replacement policy, temporal locality as well as miss cost is taken into account in selecting a cache line for replacement, wherein the miss cost is based on an associated operation type including instruction cache read, data cache read, data cache write, prefetch, and write back. In a cost-aware dynamic re-reference interval prediction (DRRIP) based cache management policy, miss costs associated with operation types pertaining to a cache line are considered for assigning re-reference interval prediction values (RRPV) for inserting the cache line, pursuant to a cache miss and for updating the RRPV upon a hit for the cache line. The operation types comprise instruction cache access, data cache access, prefetch, and write back. These policies improve victim selection, while minimizing cache thrashing and scans.
    Type: Application
    Filed: September 20, 2016
    Publication date: October 12, 2017
    Inventors: Rami Mohammad A. AL SHEIKH, Shivam PRIYADARSHI, Harold Wade CAIN, III
  • Publication number: 20170293572
    Abstract: A processing system includes a memory and a cryptographic accelerator operatively coupled to the memory. The cryptographic accelerator performs a split substitute byte operation within two paths of a cryptographic round by determining a first output from a first path by applying a mapped affine transformation to an input bit sequence represented by an element of a composite field of a finite-prime field, wherein the first output is represented by a first element of the composite field of the finite-prime field, and a second output from a second path by applying a scaled mapped affine transformation to the input bit sequence, wherein the second output is represented by a second element of the composite field and is equal to a multiple of the first output in the composite field.
    Type: Application
    Filed: April 11, 2016
    Publication date: October 12, 2017
    Inventors: Sudhir K. Satpathy, Sanu K. Mathew, Vikram B. Suresh
  • Publication number: 20170293573
    Abstract: A method for restricting write access to a non-volatile memory. The method includes receiving a request to write to a protected location in the non-volatile memory and determining whether the protected location is in a write-protected state. If the protected location is not in a write-protected state, the method includes writing data indicated by the request to the protected location. If the protected location is in a write-protected state, the method includes rejecting the request. The protected location stores a validation key to validate the contents of another portion of the non-volatile memory.
    Type: Application
    Filed: October 31, 2014
    Publication date: October 12, 2017
    Inventors: Gregg B. LESARTRE, Joseph E. FOSTER, David PLAQUIN, James M. MANN
  • Publication number: 20170293574
    Abstract: A memory protection module includes comparison logic that has a write-once window CSR that stores a memory address range, and window protection logic. The comparison logic receives a memory write transaction, determines a memory address of the memory write transaction, and provides an indication as to whether or not the memory address is included in the memory address range. The window protection logic receives the memory transaction receives the indication from the comparison logic, allows the memory write transaction to proceed in response to the indication indicating that the memory address is not included in the memory address range, and drops the memory write transaction in response to the indication indicating that the memory address is included in the memory address range.
    Type: Application
    Filed: June 27, 2017
    Publication date: October 12, 2017
    Inventors: Stuart Allen Berke, Mi Wang, Vivek Dharmadhikari
  • Publication number: 20170293575
    Abstract: A first non-volatile memory may store first data and a second non-volatile memory may store second data. An authentication component may be coupled with the first non-volatile memory and the second non-volatile memory and may receive a request to perform an authentication operation. In response to the request to perform the authentication operation, the authentication component may access the first data stored at the first non-volatile memory and the second data stored at the second non-volatile memory and determine whether the second data stored at the second non-volatile memory has become unreliable based on a memory disturbance condition. In response to determining that the second data stored at the second non-volatile memory has become unreliable, a corrective action associated with the first data stored at the first non-volatile memory may be performed.
    Type: Application
    Filed: March 27, 2017
    Publication date: October 12, 2017
    Inventors: Scott C. Best, Brent S. Haukness, Carl W. Werner
  • Publication number: 20170293576
    Abstract: A universal serial bus (USB) multi-host device includes a plurality of upstream ports connected to a first host and a second host, a storage for storing data to be transmitted from the first host to the second host through the upstream ports, and a controller, and if the storage receives the data, the controller transmitting a signal based on the received data to the second host, and transmitting the stored data to the second host.
    Type: Application
    Filed: December 15, 2016
    Publication date: October 12, 2017
    Inventor: Seung-Cheol LEE
  • Publication number: 20170293577
    Abstract: An example processor-implemented method for accessing peripheral devices with the present disclosure includes establishing connection between a portable computing device and a dock, determining a pairing status between the portable computing device and the dock, and managing access to at least one peripheral device by the portable computing device based on the pairing status. The dock is associated with the at least one peripheral device.
    Type: Application
    Filed: September 30, 2014
    Publication date: October 12, 2017
    Inventors: Slava GOMZIN, Manny NOVOA, Binh T. TRUONG
  • Publication number: 20170293578
    Abstract: Systems and methods are directed to managing access to a shared memory. A request received at a memory controller, for access to the shared memory from a client of one or more clients configured to access the shared memory, is placed in at least one queue in the memory controller. A series of one or more timeout values is assigned to the request, based, at least in part on a priority associated with the client which generated the request. The priority may be fixed or based on a Quality-of-Service (QoS) class of the client. A timer is incremented while the request remains in the first queue. As the timer traverses each one of the one or more timeout values in the series, a criticality level of the request is incremented. A request with a higher criticality level may be prioritized for servicing over a request with a lower criticality level.
    Type: Application
    Filed: September 23, 2016
    Publication date: October 12, 2017
    Inventors: Derek HOWER, Harold Wade CAIN, III, Carl Alan WALDSPURGER
  • Publication number: 20170293579
    Abstract: There is provided an information transmission apparatus and an information transmission method for suitably transmitting information on power generation or power storage. A unified format of a message is provided to various power generation devices or power storage devices, which may be connected to various apparatuses for outdoor use that cannot use a commercial power supply, such as portable electronic apparatuses, the message transmitting information on a power generation efficiency and other power generation statuses, and the remaining amount, a power storage efficiency, and other power storage statuses of the secondary battery. The electronic apparatus, which uses electric power from the power generation devices or power storage devices, analyzes the message from any of the power generation devices or power storage devices and presents a result to a user.
    Type: Application
    Filed: June 26, 2015
    Publication date: October 12, 2017
    Inventors: YOICHIRO SAKO, MASAKAZU YAJIMA, TAKAYUKI HIRABAYASHI, MASASHI TAKEDA, KOUICHIROU ONO
  • Publication number: 20170293580
    Abstract: A server system and a data access method using the same are provided. The server system includes a first server and a second server. The first server includes a first host, a first expander unit and a first peripheral device. The first expander unit is coupled to the first host, and the first peripheral device is coupled to the first expander unit. The second server includes a second host, a second expander unit and a second peripheral device. The second expander unit is coupled to the second host, and the second peripheral device is coupled to the second expander unit. The first expander unit is connected to the second expander unit. The first host accesses the first peripheral device through the first expander unit. The first host further accesses the second peripheral device through the first expander unit and the second expander unit while the second host malfunctions.
    Type: Application
    Filed: July 15, 2016
    Publication date: October 12, 2017
    Inventor: Cheng-Kuang Hsieh
  • Publication number: 20170293581
    Abstract: A bus between a requester and a target component includes a portion dedicated to carry information indicating a privilege level, from among a plurality of privilege levels, of machine-readable instructions executed on the requester.
    Type: Application
    Filed: October 31, 2014
    Publication date: October 12, 2017
    Inventors: Maugan VILLATEL, David PLAQUIN, Chris I. DALTON
  • Publication number: 20170293582
    Abstract: A portable electronic instrument that has a connection port for inserting a connector and includes a built-in spring having a protrusion portion protruding in a lateral direction inside the connection port, a connector 10 has an insertion portion 12 which is inserted in the connection port 16 and includes connection members 31, 32 which respectively have hooking portions 23, 24 able to be hooked at the protrusion portions of the built-in springs inside a main body.
    Type: Application
    Filed: December 24, 2014
    Publication date: October 12, 2017
    Inventor: Tetsushi HOSHIKAWA
  • Publication number: 20170293583
    Abstract: A semiconductor integrated circuit includes a bus signal line and a test signal line arranged adjacent to the bus signal line. The semiconductor integrated circuit has a system mode, which is an operation mode that uses the bus signal line, and a scan mode, which is an operation mode that uses the test signal line. The semiconductor integrated circuit fixes the logic level of the test signal line adjacent to the bus signal line in the system mode that uses the bus signal line. The semiconductor integrated circuit fixes the logic level of the bus signal line adjacent to the test signal line in the scan mode that uses the test signal line.
    Type: Application
    Filed: March 3, 2017
    Publication date: October 12, 2017
    Applicant: MIE FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Seiji Goto
  • Publication number: 20170293584
    Abstract: HDMI systems, devices, circuits, and apparatuses perform functions to allow extending the number of HDMI inputs for an HDMI device using cascaded HDMI extenders. HDMI extenders are mechanically coupled and decoupled to an HDMI device such as an HDMI switch or sink device. HDMI extenders include HDMI input ports to receive HDMI signals and include connectors to receive and transmit HDMI signals as well as non-HDMI signals for configuration and control of the HDMI extenders. One or more mechanically coupled HDMI extenders are configured by the HDMI device based on information received from HDMI source devices connected to the HDMI extenders and to the HDMI device. The HDMI extenders select between HDMI signals received from their input ports or HDMI signals received from their connectors, and provide the selected HDMI signals to the HDMI device. HDMI extenders are configured to be cascaded in any number to increase HDMI source availability.
    Type: Application
    Filed: April 10, 2017
    Publication date: October 12, 2017
    Inventors: Sharath Hariharpur Satheesh, Conrad Savio Jude Gomes, Bitto Niclavose
  • Publication number: 20170293585
    Abstract: A bridge hoard includes a printed circuit board (PCB) and a protocol converter mounted on the PCB to perform a conversion operation converting between a first communication protocol and a second communication protocol different from the first communication protocol. The bridge board further includes a first connector configured to communicate according to the first communication protocol and a second connector configured to communicate according to the second communication protocol. The bridge board additionally includes a hole formed in the PCB. The PCB is shaped as a concave polygon. The concave polygon includes a first region and a second region. The first region includes a first edge and a second edge, which extends in parallel to the first edge, along a first direction. The second region includes a third edge and a fourth edge, which extends in parallel to the third edge, along a second direction perpendicular to the first direction.
    Type: Application
    Filed: October 26, 2016
    Publication date: October 12, 2017
    Inventors: Han Hong Lee, Jae Hong Park, Jung Hyun Woo, Sung Woo Joo, Chang Hoon Han
  • Publication number: 20170293586
    Abstract: Disclosed is method for operating an interposer that includes assigning a binary port weight to a plurality of input ports of the interposer. The sum of all of the port weights is less than or equal to a number of traversals available to the interposer in a cycle. A traversal counter is set zero at the beginning of each cycle. The output of the traversal counter is a binary number of m bits. A mask is generated when a bit of the traversal counter transitions from a zero to a one. The mask is generated having the m?k+1 bit of the mask equal to one and all other bits of the mask equal to zero. Data is transmitted from each port when both the binary port weight and the mask have a one in the same bit position.
    Type: Application
    Filed: April 12, 2016
    Publication date: October 12, 2017
    Inventors: Peter Yan, Alex Elisa Chandra, Lee Dobson McFearin, Fang Yu, Alan Gatherer
  • Publication number: 20170293587
    Abstract: A described embodiment of the present invention includes a network having a first, second an d third plurality of routers connected to a plurality of endpoints. At least one of the first plurality of routers includes a plurality of interposers having a number of queues. The at least one of the first plurality of routers has a demultiplexer for each interposer configured to receive multiplexed data from the interposer and provide demultiplexed data on to a plurality of second queues corresponding to the first queues of the number of queues. The at least one of the first plurality of routers also includes a number multiplexers, each of the number multiplexers having inputs configured to receive data from the number of queues.
    Type: Application
    Filed: April 12, 2016
    Publication date: October 12, 2017
    Inventors: Peter Yan, Alex Elisa Chandra, YwhPyng Harn, Xiaotao Chen, Alan Gatherer, Fang Yu, Xingfeng Chen, Zhuolei Wang, Yang Zhou
  • Publication number: 20170293588
    Abstract: A data storage system configured as node in a distributed data store is presented. The system comprises an RDMA-enabled network adapter, a buffer management unit, and an RDMA application interface. The network adapter is configured to establish communication with one or more other nodes in the distributed data store. The buffer management unit is configured to pre-register a plurality of memory blocks as RDMA buffers with one or more other nodes. The RDMA application interface is configured to: process RDMA operations initiated by one of the other nodes, and send an acknowledgement message to the one of the other nodes via the RDMA-enabled network adapter in response to completion of an RDMA operation initiated by the one of the other nodes, wherein the acknowledgement message includes a target address corresponding to a start address of an RDMA buffer available for use in a subsequent RDMA operation.
    Type: Application
    Filed: June 16, 2016
    Publication date: October 12, 2017
    Inventors: Purvaja NARAYANASWAMY, Manoj GUTHALA, Hiren DESAI, Andrew TOMLIN
  • Publication number: 20170293589
    Abstract: A packet transmitting unit transmits, to a node via RDMA communication, a packet with a first identifier that represents a predetermined process and a second identifier that represents a destination communication interface and is a logical identifier, as a destination, being added thereto. A plurality of communication interfaces exist. A packet receiving unit receives a packet transmitted from the node via RDMA communication, selects a communication interface that is a destination of a received packet and is used in the predetermined process, based on the first identifier and the second identifier added to the received packet, and transfers the received packet to a selected communication interface.
    Type: Application
    Filed: March 27, 2017
    Publication date: October 12, 2017
    Applicant: FUJITSU LIMITED
    Inventor: Yuichiro Ajima
  • Publication number: 20170293590
    Abstract: A method for modeling warp for registration of images includes receiving input warp data and performing a fitting process on the input warp data to produce at least one of reduced noise warp data or reduced noise warp uncertainty. The warp for at the at least one of reduced noise warp data or reduced noise warp uncertainty is modeled with components including an offset that varies in time and a non-linear distortion that does not vary with time. The method also includes outputting at the least one of reduced noise warp data or reduced noise warp uncertainty.
    Type: Application
    Filed: April 8, 2016
    Publication date: October 12, 2017
    Inventors: Suhail Shabbir Saquib, Matthew D. Egan
  • Publication number: 20170293591
    Abstract: A device identifies one or more functional elements, and one or more device characteristics. The device determines a selection index based on one or more device characteristics. The device determines a first functional element of the one or more functional elements that has a highest priority level. The device determines whether there is an appropriate technology layer for the first functional element based on comparing the selection index to one or more technology layer ranges corresponding to one or more technology layers associated with the first functional element.
    Type: Application
    Filed: April 8, 2016
    Publication date: October 12, 2017
    Inventors: Sailatha Karthikeyan, Dinup P. Pillai, Sachin Prasad
  • Publication number: 20170293592
    Abstract: The Scalable Vector Graphics (SVG) standard defines a way to describe two-dimensional graphics within the extensible markup language (XML) that can be interpreted by multiple programs. The SVG standard, however, lacks native support for several user experience features, such as look and feel settings (e.g., themes) that affect multiple objects within a document. The present disclosure, however, teaches how an SVG object may be made theme-aware and still comply with the SVG standard so that it is portable between files and applications that apply the present disclosure and those that do not. By enabling the dynamic updating of SVG objects, the benefits to the user experience and computer efficiency associated with standardized vector graphics and the document-wide application of look and feel settings can be realized without deviating from the SVG standard.
    Type: Application
    Filed: August 25, 2016
    Publication date: October 12, 2017
    Applicant: Microsoft Technology Licensing, LLC.
    Inventors: Haitao He, Stephanie Lorraine Horn, Thomas Roland Mignone, Matthew William Kernek, Ancuta Irina Zaharia
  • Publication number: 20170293593
    Abstract: Method and system are provided for managing node pagination for a graph data set. A content controller receives a request for one or more pages of a node for display at the user interface; retrieving the one or more pages of the node from a backing store of the graph data set; caching the one or more pages at the content controller; and returning the one or more pages to the user interface for loading and display. In response to de-selection of one or more pages in the display, the method may hide the pages of data for the node by un-loading the pages from the display whilst maintaining the pages in the cache. In response to re-selection of one or more pages in the display, the method may retrieve the pages from the cache and re-loading the pages in the display.
    Type: Application
    Filed: April 12, 2016
    Publication date: October 12, 2017
    Inventors: Douglas J. Cowie, Anthony A. Garrard, Jonathan Limburn, Nicolas S. Townsend
  • Publication number: 20170293594
    Abstract: Linking, tying, referencing or otherwise utilizing characters, images, alphanumerical values, codes and other metadata to link content, media, information, data and other electronically transmittable matter to an application, program, process or other logically executing construct is contemplated. Such content linking may include but is not necessarily limited to enabling content linking without requiring a server or other entity posting a corresponding link to host the linked-to content.
    Type: Application
    Filed: June 27, 2017
    Publication date: October 12, 2017
    Inventors: Stephen Glennon, David Agranoff, Stephen Buck
  • Publication number: 20170293595
    Abstract: Rules are automatically learned via machine-learning techniques to deduce the semantic roles of extracted information elements, as well as, compute the respective levels of certainty that the semantic roles are indeed as deduced. Such a process is referred to herein as “tagging” the information elements. The tagged information elements are then associated, in a database, with their respective deduced semantic roles and levels of certainty. The machine-learning techniques provided herein include supervised, unsupervised, and semi-supervised techniques. Embodiments described herein may be applied to data leakage prevention, cyber security, quality-of-service analysis, lawful interception, or any other relevant application.
    Type: Application
    Filed: April 12, 2017
    Publication date: October 12, 2017
    Inventors: Itay Malleron, Itai Zilberstein
  • Publication number: 20170293596
    Abstract: Computer-implemented methods for allowing users to specify interactive graphical designs are provided. The graphical designs can comprise multiple dimension versions—such as a tablet dimension version or a phone dimension version. Some of the methods involve an inheritance structure that defines a first dimension version of the design as a child of a second dimension version of the design. Specifications for properties of widgets in the graphical design are applied to the design in accordance with the inheritance specification. Some of the methods involve an inheritance characterization that determines how properties of a widget are affected by the inheritance structure across different dimension versions. Some of the methods involve an existence property for the widgets.
    Type: Application
    Filed: June 27, 2017
    Publication date: October 12, 2017
    Applicant: Axure Software Solutions, Inc.
    Inventors: Victor Hsu, Martin Smith, Ian Gardner, Ben Fraser
  • Publication number: 20170293597
    Abstract: This invention relates to methods and systems for message analysis and classification. It is particularly applicable to analysis and classification of very short messages such as “Tweets”. Embodiments of the invention provide methods for unbiased enriched representation for messages which can be used to transform very short messages into comparatively longer text. These methods can make use of word context information in addition to word information itself. This can provide text with enough information for analysis and classification without changing the information in the original message. Embodiments of the invention also provide a statistical learning mechanism which does not require pre-defined keywords, and can automatically detect inherent frequent words and word patterns. These methods can provide satisfactory classification accuracy even for very short messages.
    Type: Application
    Filed: April 7, 2016
    Publication date: October 12, 2017
    Inventors: Di Wang, Ahmad Al-Rubaie
  • Publication number: 20170293598
    Abstract: Technologies are described herein for providing an assistive graphical user interface for preserving document layout while improving readability, such as for persons with dyslexia or another type of reading disability. A document including one or more lines of text can be edited in first and second editing modes. When a request is received to edit the document in the second editing mode, the width of the lines when displayed using a non-assistive font is computed. The width of the lines when displayed using an assistive font, such as a font configured for use by persons with dyslexia, is also computed. A ratio between the width of the lines when displayed using the non-assistive font and the width of the lines when displayed using the assistive font is also computed. The width of the page is then expanded based upon the ratio and the lines are displayed using the assistive font.
    Type: Application
    Filed: April 12, 2016
    Publication date: October 12, 2017
    Inventor: Hani Farouq Abu-Huwaij
  • Publication number: 20170293599
    Abstract: Systems, methods and computer-readable media are presented for processing a checklist from a checklist template. In contrast to typical checklist processing, the disclosed embodiments include a checklist instance, generated from a checklist template, which includes structured data storage, unstructured data storage, a checklist, and an execution state. Upon an indication to pause execution of the checklist, the checklist instance is stored in a data store such that, upon resumption of execution, the values of the structured, unstructured, and execution state are restored. Upon detecting that an executed checklist item corresponds to markup content, an analysis of the markup content is made to identify entry fields within the content that correspond to structured data fields of the checklist instance. Entry fields with a corresponding field in the checklist can be prepopulated with the values of the checklist data fields.
    Type: Application
    Filed: April 6, 2016
    Publication date: October 12, 2017
    Inventors: Dan Driscoll, Thomas Matthew Laird-McConnell
  • Publication number: 20170293600
    Abstract: Voice enabled dialog with web pages is provided. An Internet address of a web page is received including an area with which a user of a client device can specify information. The web page is loaded using the received Internet address of the web page. A task structure of the web page is then extracted. An abstract representation of the web is then generated. A dialog script, based on the abstract representation of the web page is then provided. Spoken information received from the user is converted into text and the converted text is inserted into the area.
    Type: Application
    Filed: June 26, 2017
    Publication date: October 12, 2017
    Inventors: Amanda Joy STENT, Hyuckchul JUNG, I. Dan MELAMED, Nobal Bikram NIRAULA
  • Publication number: 20170293601
    Abstract: Disclosed is a method and apparatus that detects an input focus proximate an edit area of a web page navigated to by a user of a computing device via a web browser. The edit area is configured to receive input in a particular format. The method also includes the step of displaying, on a display of the computing device, information associated with the user and maintained by a service provider, the displayed information having a format matching the particular format of input for the edit area of the web page. In one embodiment, the web page is associated with the service provider. In another embodiment, the web page is not associated with the service provider.
    Type: Application
    Filed: June 26, 2017
    Publication date: October 12, 2017
    Inventor: Stephen Owens
  • Publication number: 20170293602
    Abstract: In some embodiments, a publication system comprises at least a user interface module and a data transmitting module, operating on one or more computer processors, to cause, by the user interface module, a presentation of a first information field to a user as part of a graphical user interface in a portable electronic device, and to receive information entered or data identified in the first information field; by the data transmitting module, to commence automatically transmitting the information entered or data identified over a network in response to the user interface module detecting that the user has navigated away from the first information field and before information has been entered into a second information field, and wherein the user interface module is further to detect that the user has modified the first information field, and the data transmitting module is further to abort transmitting the information or data over the network in response to detecting that the user has modified the first inform
    Type: Application
    Filed: June 27, 2017
    Publication date: October 12, 2017
    Inventors: Mahesh Subramanian, William Orcutt
  • Publication number: 20170293603
    Abstract: A publisher is configured to receive a plurality of inputs such as audio, imagery, text, responses to questionnaires, and the like. The publisher is also operable to access a registry having pre-existing information and content. A user may submit inputs, and may further make selections relating to how the inputs will be processed by the publisher. The publisher is operable to process the inputs in accordance with the user's selections to produce any of a variety of outputs. Outputs of the publisher may include books, sound recordings, newspapers, web pages, movies, prayer cards, collages/montages, and the like. The publisher is also operable to automatically generate a biographical text about a deceased friend or relative of the user, based on inputs and selections provided by the user. The publisher may also provide voice-overs for movies automatically generated using image input, audio input, and selections provided by the user.
    Type: Application
    Filed: June 26, 2017
    Publication date: October 12, 2017
    Inventors: Steven Craig Sefton, Jeffrey Jon Johnson, Gordon Scott Mindrum
  • Publication number: 20170293604
    Abstract: The embodiments of the present application disclose a spell checking method and device, which relate to the technical field of computer software. The method includes: determining character segments corresponding to characters contained in a page to be displayed according to preset character segment dividing rules; obtaining the character locations of wrong words in each of the determined character segments; presenting each of the determined character segments and marking wrong words in the corresponding character segment in a form of preset mark according to the character locations of wrong words in each of character segments. The solutions provided by the embodiments of the present application are applied to improve document loading speed and document displaying speed, thereby improving users' experience.
    Type: Application
    Filed: April 19, 2016
    Publication date: October 12, 2017
    Inventors: Junhang Zhu, Shicong Yan
  • Publication number: 20170293605
    Abstract: A method, a processing device, and a computer program product are provided. Via at least one processing device, each text file is selected from a collection of text files, wherein the collection of text files has an intensity with respect to negative sentiment toward a common issue. At least one profile algorithm is performed, each calculating a corresponding profile score for that text file. At least one corresponding profile score of the text files of the collection are combined to produce an aggregated profile score for each of at least one profile algorithm. The aggregated profile score of each of the at least one profile algorithm for the collection is stored. A signature for the collection of text files includes the aggregated profile score of each of the at least one profile algorithm for the collection.
    Type: Application
    Filed: April 8, 2016
    Publication date: October 12, 2017
    Inventors: Patrick W. Fink, Kristin E. McNeil, Philip E. Parker, David B. Werts
  • Publication number: 20170293606
    Abstract: Techniques are disclosed to optimize feature selection in generating betas for a feature dictionary of a neuro-linguistic Cognitive AI System. A machine learning engine receives a sample vector of input data to be analyzed by the neuro-linguistic Cognitive AI System. The neuro-linguistic Cognitive AI System is configured to generate multiple feature words for each of a plurality of sensors. The machine learning engine identifies a sensor specified in the sample vector and selects optimization parameters for generating feature words based on the identified sensor.
    Type: Application
    Filed: April 6, 2017
    Publication date: October 12, 2017
    Inventors: Gang XU, Tao YANG, Ming-Jung SEOW
  • Publication number: 20170293607
    Abstract: An example method for natural language text classification based on semantic features comprises: performing semantico-syntactic analysis of a natural language text to produce a semantic structure representing a set of semantic classes; associating a first semantic class of the set of semantic classes with a first value reflecting a specified semantic class attribute; identifying a second semantic class associated with the first semantic class by a pre-defined semantic relationship; associating the second semantic class with a second value reflecting the specified semantic class attribute, wherein the second value is determined by applying a pre-defined transformation to the first value; evaluating a feature of the natural language text based on the first value and the second value; and determining, by a classifier model using the evaluated feature of the natural language text, a degree of association of the natural language text with a particular category of a pre-defined set of categories.
    Type: Application
    Filed: May 18, 2016
    Publication date: October 12, 2017
    Inventors: Sergey Kolotienko, Konstantin Anisimovich, Andrey Valerievich Myakutin, Evgeny Mikhaylovich Indenbom