Patents Issued in October 24, 2017
  • Patent number: 9797909
    Abstract: A sensor for detecting and/or quantifying the amount of analyte in a sample, the sensor including: a sensing region; and a barrier layer including a reactive oxygen species (ROS)-quenching, analyte-permeable membrane having an ROS-quenching agent adsorbed thereto; wherein the sensor is adapted so that the sample enters the sensing region of the sensor through the barrier layer.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: October 24, 2017
    Assignee: Lightship Medical Limited
    Inventors: William Paterson, Nick Barwell, Bruce Culbert, Barry Colin Crane
  • Patent number: 9797910
    Abstract: The present invention relates to an assay for determining endogenous levels of analyte in vivo. In particular, the present invention is directed to an assay for determining endogenous levels of stromal cell-derived factor (SDF-1) isoforms in vivo.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: October 24, 2017
    Assignee: Merck Sharp & Dohme Corp.
    Inventors: Weixun Wang, Bernard Karsten Choi, Lucinda H. Cohen
  • Patent number: 9797911
    Abstract: An isolated polypeptide comprising an amino acid sequence at least 70% homologous to SEQ ID NO: 4 and an isolated polynucleotide encoding same are disclosed. A polynucleotide comprising a nucleic acid sequence capable of specifically hybridizing to the isolated polynucleotide and an isolated antibody comprising an antigen recognition domain which specifically binds the isolated polypeptide are also disclosed. Pharmaceutical compositions, methods of diagnosing and treating comprising same are also disclosed.
    Type: Grant
    Filed: June 15, 2014
    Date of Patent: October 24, 2017
    Assignees: Yissum Research Development Company of the Hebrew University of Jerusalem Ltd., Hadasit Medical Research Services and Development Ltd.
    Inventors: Eli Keshet, Shay Sela, Ahuva Itin, Simcha Yagel
  • Patent number: 9797912
    Abstract: The invention relates to a method of diagnosing or assessing an inflammatory bowel disease in a subject, comprising comparing the level of one or more markers in a tissue or body fluid of the subject relative to a reference value for the one or more markers, wherein the marker is selected from the group consisting of Secretogranin-1 or a fragment thereof, guanylin or a fragment thereof, SPP 24 or a fragment thereof, AMBP or a fragment thereof; and serglycin or a fragment thereof.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: October 24, 2017
    Assignee: NEWSOUTH INNOVATIONS PTY LIMITED
    Inventors: Valerie Christine Wasinger, Rupert Wing-Loong Leong
  • Patent number: 9797913
    Abstract: The present invention relates to methods of diagnosing Alzheimer's Disease as well as to methods of confirming the presence or absence of Alzheimer's Disease in a subject. The present invention is also directed to methods of identifying a lead compound useful for the treatment of Alzheimer's Disease by contacting non-Alzheimers cells with an amyloid beta peptide, stimulating the cells with a protein kinase C activator, contacting the cells with a test compound, and determining the value of an Alzheimer's Disease-specific molecular biomarker. The present invention is also directed to methods of diagnosing Alzheimer's Disease in a subject by detecting alterations in the ratio of specific phosphorylated MAP kinase proteins in cells after stimulation with a protein kinase C activator.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: October 24, 2017
    Assignee: Blanchette Rockefeller Neuroscienses Inc.
    Inventors: Tapan Kumar Khan, Daniel L. Alkon
  • Patent number: 9797914
    Abstract: The invention features a method of monitoring a clotting process by measuring a signal characteristic of the NMR relaxation of water in a sample undergoing clotting to produce NMR relaxation data and determining from the NMR relaxation data a magnetic resonance parameter of water in the sample characteristic of the clots being formed.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: October 24, 2017
    Assignee: T2 Biosystems, Inc.
    Inventors: Thomas Jay Lowery, Jr., Vyacheslav Papkov, Walter W. Massefski, Jr., Rahul K. Dhanda, Edward Chris Thayer
  • Patent number: 9797915
    Abstract: In an analyzing system including a commanding unit for sending a command and an executing unit for executing a processing upon receiving the command, a processing instruction may not be executed at the right time due to a heavy traffic of information and other factors. In order to solve this problem, in a preparative separation system 1 according to the present invention, a PC 20 provides the execution time for starting/finishing the fractionation processing to a controller 18. Therefore, even in the case where the time of the PC 20 and that of the controller 18 are not synchronized, the controller 18 can accurately set the execution time for starting/finishing the fractionation in a preparative separation unit 16. A piping 17 may be placed so that the traveling time of sample components is sufficiently larger than the delay time of signals due to the signal transfer lag and other reasons. This can absorb the delay time, allowing the units to cooperate with each other at a correct timing.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: October 24, 2017
    Assignee: Shimadzu Corporation
    Inventors: Keisuke Munetaka, Toshinobu Yanagisawa
  • Patent number: 9797916
    Abstract: A medical apparatus for analyzing fluid samples includes an outer casing, a slide loading mechanism disposed within the outer casing for loading fluid analysis slides, a slide ejecting mechanism disposed within the outer casing for ejecting fluid analysis slides, an evaporation cap opening mechanism disposed within the outer casing for opening an evaporation cap, an evaporation cap closing mechanism disposed within the outer casing for closing an evaporation cap, a drawer locking mechanism disposed within the outer casing for locking a drawer associated with the outer casing, a camera disposed within the outer casing, and a robot disposed within the outer casing. The robot is movable in three dimensions and has means for conducting three or more of the following operations: slide loading; slide ejecting; evaporation cap opening; evaporation cap closing; drawer locking; and camera manipulation.
    Type: Grant
    Filed: January 8, 2015
    Date of Patent: October 24, 2017
    Assignee: IDEXX Laboratories, Inc.
    Inventors: David Lance Connolly, Mark Raymond Dumont, Justin Jay Griffin, John Harvey McGibbon, Garland Christian Misener, Jeffrey Eric Phelps, Carl Russell Rich, Kenneth Eugene Smith, Dragan Vidacic
  • Patent number: 9797917
    Abstract: An apparatus and method for detecting microplate well surface contact and setting standoff is provided. The apparatus may include a sample probe, coupled to a spring-loaded carriage, and a sensor configured to detect when the sample probe is in contact with a surface. The sample probe is moved toward a surface of a well in a well-plate until the sample end of the sample probe contacts the surface, whereby the carriage allows the probe to be displaced. Displacement of the probe is detected by the sensor and further downward movement of the carriage is stopped. A processor records the location of the sample probe and sets standoff based on the recorded location.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: October 24, 2017
    Assignee: Intellicyt
    Inventors: Stephen M. Barnes, Aaron B. Kennington
  • Patent number: 9797918
    Abstract: An electronic device that enables identification of application of an impact is provided. The electronic device includes a module case including a first structure and a second structure having different deformation quantities, a first impact identification part formed between the first structure and the second structure and configured to generate a deformation according to the difference between the deformation quantities of the first and second structures at the time of applying the impact, and a second impact identification part that enables identification of whether the impact was applied based on the deformation of the first impact identification part.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: October 24, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jaewook Kim
  • Patent number: 9797919
    Abstract: A motion sensor assembly is adapted to determine an angular velocity of a moving contrast in its field of view. The motion sensor assembly includes: a motion sensor with a first and a second analog photoreceptor each adapted for observing the moving contrast, the first and the second photoreceptors being separated by a predetermined interreceptor angle; and an angular velocity calculating unit connected to the first and second photoreceptors for calculating the angular velocity of the moving contrast based on a first and a second analog signal delivered by the first and the second photoreceptors, respectively. The first and the second analog signals delivered by the first and the second photoreceptors at are sampled a given sampling frequency to obtain a first and a second digital signal, respectively. An interpolator is configured to interpolate the first and the second digital signals upon their crossing a predetermined threshold between successive samples.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: October 24, 2017
    Assignees: UNIVERSITE D'AIX MARSEILLE, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (C.N.R.S.)
    Inventors: Franck Ruffier, Fabien Expert
  • Patent number: 9797920
    Abstract: An electronic device monitors accelerations using a motion sensor. The electronic device determines a current motion state based on the accelerations. The electronic device identifies a plurality of applications that subscribe to a motion state identification service and notifies a subset of the applications of the current motion state, the subset meeting notification criteria associated with the current motion state.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: October 24, 2017
    Assignee: DPTechnologies, Inc.
    Inventors: Philippe Richard Kahn, Arthur Kinsolving, Mark Andrew Christensen, Brian Y. Lee, David Vogel
  • Patent number: 9797921
    Abstract: A system includes a MEMS sensor having dual proof masses capable of moving independently from one another in response to forces imposed upon the proof masses. Each proof mass includes an independent set of sense contacts configured to provide output signals corresponding to the physical displacement of the corresponding sense mass. A switch system is in communication with the sense contacts. The switch system is configured to enable a sense mode and various test modes for the MEMS sensor. When the switch system enables a sense mode, output signals from the sense contacts can be combined to produce sense signals. When the switch system enables a test mode, the second contacts are electrically decoupled from one another to disassociate the output signals from one another. The independent sense contacts and switch system enable the concurrent compensation and calibration of the proof masses along two different sense axes.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: October 24, 2017
    Assignee: NXP USA, Inc.
    Inventors: Tehmoor M. Dar, Bruno J. Debeurre, Raimondo P. Sessego
  • Patent number: 9797922
    Abstract: A SPM head incorporates a probe and a cantilever on which the probe is mounted. The cantilever has a planar reflecting surface proximate a free end of the cantilever. The cantilever extends from a mechanical mount and a single-mode optical fiber is supported by the mechanical mount to provide a beam. A micromirror is mounted to reflect the beam substantially 90° to the planar reflecting surface.
    Type: Grant
    Filed: February 18, 2016
    Date of Patent: October 24, 2017
    Assignee: Angstrom Science, Inc.
    Inventors: Andrew Norman Erickson, Stephen Bradley Ippolito
  • Patent number: 9797923
    Abstract: A method of forming a sample and performing correlative S/TEM and APM analysis is provided wherein a sample containing a region of interest is cut from a bulk of sample material and formed into an ultra-thin lamella. The lamella is then analyzed with an S/TEM to form an image. The lamella sample and mount may then go through a cleaning process to remove any contamination. The lamella containing the ROI is then embedded within a selected material and is formed into a needle-shaped sample. The needle-shaped sample is then analyzed with the APM and the resulting data is merged and correlated with the S/TEM data.
    Type: Grant
    Filed: February 20, 2015
    Date of Patent: October 24, 2017
    Assignee: FEI Company
    Inventor: Roger Alvis
  • Patent number: 9797924
    Abstract: Provided herein in an apparatus, including a substrate; a functional layer, wherein the functional layer has a composition characteristic of a workpiece of an analytical apparatus; and pre-determined features configured to calibrate the analytical apparatus. Also provided herein is an apparatus, including a functional layer overlying a substrate; and pre-determined features for calibration of an analytical apparatus configured to measure the surface of a workpiece, wherein the functional layer has a composition similar to the workpiece.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: October 24, 2017
    Assignee: Seagate Technology LLC
    Inventors: Gennady Gauzner, Zhaoning Yu, Nobuo Kurataka, David S. Kuo, Kim Y Lee, Yautzong Hsu, Hong Ying Wang
  • Patent number: 9797925
    Abstract: A probe pin includes a coil spring, a first plunger, and second and third plungers. The second and third plungers respectively are independently operable and include a main body and first and second elastic pieces that extend from the main body in the same direction to each other. The first plunger is inserted between the first and second elastic pieces each of the second and third plungers.
    Type: Grant
    Filed: June 4, 2015
    Date of Patent: October 24, 2017
    Assignee: OMRON Corporation
    Inventors: Hirotada Teranishi, Takahiro Sakai
  • Patent number: 9797926
    Abstract: A contact terminal has a support section that holds an elastically deformable axle so as to rotate about the axle with an elastic deformation of the axle, and a contact section extending from the support section. The contact section has, at a distal end thereof, a contact portion configured to make a contact with a testing element. The contact section deforms elastically while rotating with the support section by the contact of the contact portion with the testing element.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: October 24, 2017
    Assignee: OMRON Corporation
    Inventors: Hirotada Teranishi, Takahiro Sakai
  • Patent number: 9797927
    Abstract: A browser probe has a probe body including a signal line, a nose of electrical insulating material integral with and projecting from the probe body, a pin supported by the probe body and electrically conductively connected to the signal line, a spring exerting a biasing force on the pin, an electrically conductive probe tip supported by the nose at a distal end of the nose remote from the probe body, and a plurality of discrete resistors interposed between the pin and the probe tip within the nose. The resistors are supported independently of another so as to be slidable within the nose. The probe tip is electrically conductively connected to the signal line via the resistors and the pin under the biasing force exerted by the spring.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: October 24, 2017
    Assignee: Keysight Technologies, Inc.
    Inventor: Michael T. McTigue
  • Patent number: 9797928
    Abstract: The disclosure describes a probe card assembly for nondestructive integrated circuit testing. The probe card assembly includes an outer gimbal bearing with a tapered bearing surface being mounted on a top surface of a printed circuit board. The probe card assembly further includes an inner gimbal bearing with a spherical bearing surface which contacts the tapered bearing surface of the outer gimbal bearing at a single point of contact about a circumference thereof. The probe card assembly further includes a spring plate mounted to the outer gimbal bearing, providing a downward force to a substrate.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: October 24, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David M. Audette, Dustin Fregeau, David L. Gardell, Peter W. Neff, Frederick H. Roy, III, Grant W. Wagner
  • Patent number: 9797929
    Abstract: Provided is a waveform processing assistance system for helping users determine the value of a parameter which is necessary in a waveform processing method for determining the rising and falling points of a peak and whose validity cannot be easily and intuitively determined The system includes: a waveform displayer for showing, on a display screen, a waveform including a peak; a marker displayer for showing, on the display screen, a marker which is capable of being moved by a user; and a slope information displayer for showing information related to the slope of the waveform at a point lying on the waveform and meeting the marker, or at a point which lies on the waveform, which meets the marker, and at which a predetermined operation has been performed by the user. Examples of the slope-related information include a numerical value of the slope, a tangent, and a grid.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: October 24, 2017
    Assignee: SHIMADZU CORPORATION
    Inventor: Daisuke Nakayama
  • Patent number: 9797930
    Abstract: An exemplary voltage sensor device includes at least one high voltage segment and at least one low voltage impedance element. In order to enhance the power dissipation due to impedances spread inside of the device body, the sensor device can be adapted or extended such that at least one high voltage segment, and at least one low voltage impedance element are arranged on an elongated insulating support with adaptive complementary mechanical and electrical interconnection elements on at least one end of the support element. The mechanical and electrical interconnection elements provide a manner of interconnecting at least two elongated insulating supports together in a pivotable way.
    Type: Grant
    Filed: August 4, 2014
    Date of Patent: October 24, 2017
    Assignee: ABB Schweiz AG
    Inventors: Jaromir Podzemny, Marek Pavlas, Miroslav Hrabcik, Radek Javora
  • Patent number: 9797931
    Abstract: To provide a measurement method of characteristics of an electrical element which causes variation in the luminance of pixels. In a device which includes components (pixels) arranged in a matrix and a wiring and where each component is capable of supplying current to the wiring through an electrical element included in each component, supply and non-supply of current of N components are individually set and current flowing through the wiring is measured N times. In the respective N measurements, combinations of the supply and non-supply of current in N components capable of supplying current to the wiring differ from one another. The amount of current flowing through each electrical element is obtained based on current obtained by the N measurements and the combinations of supply and non-supply of current in the N measurements.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: October 24, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiko Takemura, Hiroyuki Miyake
  • Patent number: 9797932
    Abstract: A voltage sampling system is provided. The voltage sampling system includes a voltage sampling device, two optic-fiber transmission lines and a control device. The voltage sampling device includes a voltage-dividing resistor module, a common mode rejection circuit and an analog-to-digital converter. The voltage-dividing resistor module generates a first and a second divided voltages according to a voltage source. The common mode rejection circuit receives the first and the second divided voltages to perform a common-mode noise rejecting process to generate an output voltage. The analog-to-digital converter converts the output voltage to generate a digital data signal. The two optic-fiber transmission lines transmit the digital data signal and a clock signal respectively. The control device receives the digital data signal from the analog-to-digital converter and the clock signal to perform a digital data processing.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: October 24, 2017
    Assignee: DELTA ELECTRONICS (SHANGHAI) CO., LTD.
    Inventors: Bo-Yu Pu, Yi Zhang, Ming Wang, Hong-Jian Gan, Jian-Ping Ying
  • Patent number: 9797933
    Abstract: A method for monitoring the power consumption of an electrical consumer that has a capacitive load and the controllable circuit element and the consumer are connected in series. The amplitude of the current flowing through the consumer, the voltage dropping across the consumer, and the change over time of the voltage dropping across the consumer are sensed. An allowed operating current amplitude is calculated from the voltage dropping across the consumer and from a predefined power. A charging current amplitude of the capacitive load is calculated from the change over time of the voltage dropping across the consumer. An allowed instantaneous current amplitude is calculated. The allowed instantaneous current amplitude is compared with the amplitude of the current flowing through the consumer and the electrical resistance of the circuit element is increased if the amplitude of the current flowing through the consumer is greater than the allowed instantaneous current amplitude.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: October 24, 2017
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Florian Voelzke
  • Patent number: 9797934
    Abstract: An appliance includes an operation unit that is mounted in a case of the appliance that is supplied power by an external power supply and that includes at least one of a motor and a heating member. The appliance further includes a control circuit mounted in the case of the appliance and configured to control the operation unit to perform appliance functionality that is different than measuring power. The appliance further includes a power meter coupled to the control circuit, built into the case, and configured to measure power consumed by the appliance in performing the appliance functionality.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: October 24, 2017
    Assignee: LG Electronics Inc.
    Inventors: Namki Lee, Chungill Lee
  • Patent number: 9797935
    Abstract: An electronic electricity meter (102) for monitoring electrical power consumption due to a plurality of loads, comprising electric power sensor (506A, 506, 502, 504, 508) configured to register, optionally in a substantially real-time fashion, data indicative of aggregate power demand (202) of a number of loads coupled to a common electrical power source, such as one or more phases of a polyphase system, load tracker (506B, 506, 502, 504) configured to detect the effect of individual loads on the basis of distinctive load patterns in said data, wherein the tracker is configured to utilize a distinctive load pattern detected in said data as at least a basis for a reference pattern (304, 306, 308) for subsequent detections (304a, 306a, 308a) of the effect of the same load in the data, accuracy analyzer (506C, 506, 502, 504) configured to, on the basis of comparisons of subsequent detections with the corresponding references, determine (312, 314, 316) whether the comparisons relating to at least two, preferably
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: October 24, 2017
    Assignees: LANDIS+GYR OY, LANDIS+GYR AG
    Inventors: Risto Airaksinen, Ari Koskinen
  • Patent number: 9797936
    Abstract: An improved counter may implement dynamic frequency measurement while also remaining fully backwards compatible with traditional frequency measurement methods. The counter may operate according to low-frequency, large range, and/or high frequency modes of operation. It may be programmable with a divisor value associated with the large range operating mode, and a measurement time associated with the high frequency mode of operation. The divisor and measurement time settings may be enabled or disabled, and when either setting is disabled, the counter becomes backwards compatible with traditional frequency measurement methods. The counter may also be provided with inputs representative of the desired type of measurement and the minimum and maximum expected values for the signal to be measured. The counter may perform the frequency measurement according to any one or more of the operating modes, and return a measurement result obtained in the operating mode that completes the measurement first.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: October 24, 2017
    Assignee: NATIONAL INSTRUMENTS CORPORATION
    Inventors: Adam H. Dewhirst, Chee Fai Yap
  • Patent number: 9797937
    Abstract: A carbon nanofiber aggregate (CNFA) system and method provides self-sensing capabilities that can be used to detect strain, moisture, and temperature changes. The CNFA may include cement, aggregate, silica fume, high-range water reducer (HRWR), and/or carbon nanofibers. The metal meshes in the CNFA may be utilized to monitor the electric properties of the CNFA to detect strain, moisture, and temperature changes. The CNFA may be embedded in concrete structures to allow detection of strain, moisture, and temperature changes that may cause damage to structures. Several metal meshes may be embedded in the CNFA.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: October 24, 2017
    Assignee: UNIVERSITY OF HOUSTON
    Inventors: Yi-Lung Mo, Rachel Howser, Hermant Dhonde, Gangbing Song
  • Patent number: 9797938
    Abstract: Functionality for estimating characteristics of an on-chip noise signal can be implemented on a processing module. An on-chip noise signal is determined at an on-chip determination point of a computer chip. The on-chip noise signal is converted to a frequency-varying signal using a voltage-controlled oscillator implemented on the computer chip. The frequency-varying signal is measured at an off-chip measurement point and frequency information is extracted from the frequency-varying signal. The frequency information is converted to a voltage level associated with the on-chip noise signal based on the relationship between an input voltage provided to the voltage-controlled oscillator and an output frequency generated by the voltage-controlled oscillator.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: October 24, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jose A. Hejase, Nanju Na, Nam H. Pham, Lloyd A. Walls
  • Patent number: 9797939
    Abstract: A device for monitoring a neutral grounding resistor (NGR), including first and second NGRs electrically connected in parallel, a rectifier circuit electrically connected in series with the second NGR and a voltage source and a logic resistor electrically connected in series with the second NGR. A logic circuit measures current passing through the logic resistor and determines the resistance of the first NGR based on the measured current and the resistance of the second NGR. As such, a failed-open or failed-short condition of the first NGR may be identified based at least in part on the determined resistance of the first NGR.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: October 24, 2017
    Assignee: Littelfuse, Inc.
    Inventors: Michael P. Vangool, Geoffrey J. Baker
  • Patent number: 9797940
    Abstract: An AC arc fault detection module includes an LF current section, an LF voltage section, and an HF current section having a plurality of outputs, each output being associated with a respective one of a plurality of frequency sub-bands. The HF current section is structured to, for each of the frequency sub-bands, (i) detect a rise in energy of the frequency sub-band above a first predetermined threshold level for at least a certain amount of time and (ii) cause the associated output to indicate a rise in energy detection in response to detecting the rise in energy above the associated threshold level for at least the associated certain amount of time. The module includes a processing device structured to determine whether an AC arc fault has occurred based on the outputs from the LF and HF current and LF voltage sections.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: October 24, 2017
    Assignee: EATON CORPORATION
    Inventors: David Kolker, Chaitanya Bhalwankar, Birger Pahl, Steven Christopher Schmalz, Archit Agarwal
  • Patent number: 9797941
    Abstract: A DC arc fault detection module includes an LF current section, an LF voltage section, and an HF current section having a plurality of outputs, each output being associated with a respective one of a plurality of frequency sub-bands. The HF current section is structured to, for each of the frequency sub-bands, (i) detect a rise in energy of the frequency sub-band above a first predetermined threshold level for at least a certain amount of time and (ii) cause the associated output to indicate a rise in energy detection in response to detecting the rise in energy above the associated threshold level for at least the associated certain amount of time. The module includes a processing device structured to determine whether a DC arc fault has occurred based on the outputs from the LF and HF current and LF voltage sections.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: October 24, 2017
    Assignee: EATON CORPORATION
    Inventors: David Kolker, Chaitanya Bhalwankar, Birger Pahl, Steven Christopher Schmalz, Archit Agarwal
  • Patent number: 9797942
    Abstract: FPAs on a wafer can be tested prior to dicing the wafer into individual dies. A focal plane array (FPA) can comprise an array of photodetectors, such as microbolometers, on a semiconductor substrate or die. FPAs can be manufactured on a wafer to make multiple FPAs on a single wafer that can be later diced or divided into individual FPAs. Prior to dicing the wafer, the FPAs can be tested electrically and radiometrically in bulk to characterize individual FPAs, to identify bad pixels, to identify bad chips, to calibrate individual FPAs, and the like. These test results can be used to determine acceptable FPAs and can be used to provide initial settings for imaging systems with the tested and integrated FPA.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: October 24, 2017
    Assignee: Seek Thermal, Inc.
    Inventors: Andreas Engberg, William J. Parrish
  • Patent number: 9797943
    Abstract: A method of constructing an electric linear displacement motor for use in a testing device includes providing a stator having as stator housing with internal coils and a through bore extending from a first end of the stator housing to the second end of the housing. First and second end supports are connected to the first and second ends of the stator housing. An armature having magnets retained therein is inserted into the stator housing such of the armature is supported by the first end support and the second end support. A plurality of set screws are inserted into threaded openings proximate both the first end and the second end of the housing. The set screws then support and retain the armature such that there is an annular gap between the armature and the coils.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 24, 2017
    Assignee: MTS SYSTEMS CORPORATION
    Inventors: Tyler B Kuhlmann, Bradley Dean Schulz, Paul M. Krueger, Don Curtis Petersen
  • Patent number: 9797944
    Abstract: The present disclosure relates to the field of display technology, in particular to a test fixture, comprising a pressing connection mechanism (1), an eccentric mechanism (2), and a working carrier (3), the pressing connection mechanism (1) and the working carrier (3) being arranged correspondingly, and the rotation of the eccentric mechanism (2) driving the pressing connection mechanism (1) to move up and down in a Y direction so as to conduct a signal pressing connection test for a tested product on the working carrier (3). The test fixture has a simple structure and steady properties, easy to be operated and maintained conveniently.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: October 24, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BOE (HEBEI) MOBILE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Jian Li, Yongjun Liao, Yu Tan, Jianchao Zhang, Chunhua Zhang
  • Patent number: 9797945
    Abstract: A semiconductor device is capable of detecting a power supply voltage abnormality without degrading the performance of internal circuits. The semiconductor device includes a plurality of power supply inspection circuits and a result storage register. The power supply inspection circuits detect a power supply voltage abnormality in each pad that couples an internal wiring disposed in the semiconductor device to another part disposed outside of the semiconductor device. The result storage register stores inspection results indicated by result signals output from the power supply inspection circuits.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: October 24, 2017
    Assignee: Renesas Electronics Corporation
    Inventor: Masayuki Yamamoto
  • Patent number: 9797946
    Abstract: Embodiments of the invention provide a scan test system for an integrated circuit comprising multiple processing elements. The system comprises at least one scan input component and at least one scan clock component. Each scan input component is configured to provide a scan input to at least two processing elements. Each scan clock component is configured to provide a scan clock signal to at least two processing elements. The system further comprises at least one scan select component for selectively enabling a scan of at least one processing element. Each processing element is configured to scan in a scan input and scan out a scan output when said the processing element is scan-enabled. The system further comprises an exclusive-OR tree comprising multiple exclusive-OR logic gates. The said exclusive-OR tree generates a parity value representing a parity of all scan outputs scanned out from all scan-enabled processing elements.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: October 24, 2017
    Assignee: International Business Machines Corporation
    Inventors: Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Bryan L. Jackson, Paul A. Merolla, Dharmendra S. Modha, Jun Sawada
  • Patent number: 9797947
    Abstract: An arrangement for disabling a configuration of a first programmable hardware component, having the first programmable hardware component, a second programmable hardware component, and a switching element. The first programmable hardware component has a configuration interface for configuring a logic of the first programmable hardware component, a data interface for communication of the logic with the second programmable hardware component, a debugging interface for debugging and configuring the logic, and a configuration monitoring interface for signaling a configuration process of the logic. The switching element is designed and connected to the debugging interface such that access to the debugging interface during a configuration process of the logic can be disabled.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: October 24, 2017
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Matthias Bockelkamp, Marc Dressler
  • Patent number: 9797948
    Abstract: A multi-die chip module (MCM) comprises a first die containing a first test controller and a second die containing a second test controller coupled to the first die via an interconnect. The first test controller is configured to place the first die in either a shift mode or a capture mode. The second controller is configured to place the second die in either the shift mode or the capture mode. After a scan shift operation, scan cells are initialized to predetermined values. During the capture operation one die remains in the shift mode and the other die enters the capture mode so that as test bits are shifted into registers associated with output pads on the die in the shift mode, the other die is in the capture mode and captures signals on input pads associated with that die, enabling scan based at-speed testing of the interconnect.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: October 24, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Milan Shetty, Srinivasulu Alampally, Prasanth V
  • Patent number: 9797949
    Abstract: A test circuit, provided to a semiconductor device including a plurality of semiconductor chips, includes: a test clock terminal provided to a first chip; a plurality of clock paths disposed between the first chip and a second chip through which the test clock is transmitted from the first chip to the second chip; a test unit provided to the second chip for testing the second chip by using the test clock transmitted to the second chip; a clock detection unit provided to the second chip, and detects the test clock that is received through each of the plurality of clock paths; and a clock path selection unit which is provided to the second chip, selects a first clock path among the plurality of clock paths as a test clock path, and supplies the test clock transmitted through the test clock path to the test unit.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: October 24, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Gen Oshiyama, Osamu Moriyama, Takahiro Shikibu, Akihiro Chiyonobu, Iwao Yamazaki
  • Patent number: 9797950
    Abstract: A semiconductor device addresses to a problem in which a current consumption variation rate increases during BIST execution causing resonance noise generation in a power supply line. The semiconductor device includes a self-diagnosis control circuit, a scan target circuit including a combinational circuit and a scan flip-flop, and an electrically rewritable non-volatile memory. A scan chain is configured by coupling a plurality of the scan flip-flops. In accordance with parameters stored in the non-volatile memory, the self-diagnosis control circuit can change a length of at least one of a scan-in period, a scan-out period and a capture period, and can also change a scan start timing.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: October 24, 2017
    Assignee: Renesas Electronics Corporation
    Inventor: Takuro Nishikawa
  • Patent number: 9797951
    Abstract: Methods and systems for compensating for temperature variation in the performance of electronic circuits and systems are disclosed. In some embodiments, the systems are configured to store compensation parameters determined in calibration, where the compensation parameters are used by the systems to modify performance. In some embodiments, the systems are part of an automatic test equipment (ATE) system.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: October 24, 2017
    Assignee: Analog Test Engines
    Inventor: Jeffrey Allen King
  • Patent number: 9797952
    Abstract: An interface test device for testing a circuit, the interface test device including a module assembly including a plurality of modules, wherein a test block assembly is formed from individual test blocks that are arranged at one another in parallel and fixated at one another, wherein a test plug assembly is formed from individual test plugs that are arranged at one another other in parallel and fixated at one another, wherein a movement of a lever arm out of a plane of an insertion direction of the test plug assembly into the test block assembly is transferred by strut elements to pinions of the test plug assembly and inserts test fingers of the test plug assembly into openings of the test block assembly, wherein one of the test fingers of the test plug assembly opens a medium to high voltage monitoring circuit.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: October 24, 2017
    Inventor: Hubert Ostmeier
  • Patent number: 9797953
    Abstract: A self-test module of an electronic circuit breaker includes a power supply assembly with a rechargeable battery, a self-test enablement assembly, an induced power supply assembly, a boost power supply, and a micro control unit (MCU). The self-test enablement assembly is connected to the rechargeable battery and includes an enablement button, a capacitor and a first power chip connected in series. The induced power supply assembly includes a buck chip. The boost power supply includes a second power chip and a boost chip connected in series. The MCU includes a plurality of pins that are connected to the first and second power chips, the buck chip, and the boost chip. The self-test module has two working modes; the electronic circuit breaker may be provided with or without a load current. The MCU operates the self-test procedure, indicates the self-test status, and maintains the indication for a period of time.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: October 24, 2017
    Assignees: SEARI ELECTRIC TECHNOLOGY CO., LTD., ZHEJIANG CHINT ELECTRICS CO., LTD.
    Inventors: Yinglong Hu, Lijun Chen, Xianjun Yi
  • Patent number: 9797954
    Abstract: A system for management of a circuit breaker counter according to an exemplary embodiment of the present invention includes a data processing unit receiving state change data and measurement data of at least one of a circuit breaker and a current measuring unit and transferring an event on the basis of the state change data and measurement data; and a counter managing unit counting a total operation, a load-breaking operation and a fault-breaking operation of the circuit breaker, based on the event and the measurement data, and outputting and storing respective count accumulation values.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: October 24, 2017
    Assignee: KOREA ELECTRIC POWER CORPORATION
    Inventors: Hye-Ryun Hyun, Man-Sun Lee, Kang-Soo Lee, Jun-Soo Jang, Hyo-Sung Song, Il-Lae Jo, En-Jin Sin
  • Patent number: 9797955
    Abstract: An insulation inspection device for motors includes an inverter for driving a motor, a partial discharge detecting unit for determining soundness of the motor, and a control circuit for controlling the inverter. The control circuit adjusts a switching interval of a voltage pulse of the inverter so as to be equal to a pulse round-trip propagation time between the inverter and the motor, thereby generating surge voltage higher than driving voltage for the motor, between the motor and ground, and adjusts a switching time for each phase of the inverter, thereby generating surge voltage higher than driving voltage for the motor, between phases, thus performing insulation inspection.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: October 24, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shinichi Okada, Hiroki Shiota, Hirotaka Muto
  • Patent number: 9797956
    Abstract: A tester for a default mode of operation of an alternator is provided. The tester includes an internal memory having computer executable instructions and a processor coupled to the internal memory and to an alternator via a communication bus. The processor is configured to execute the computer executable instructions in the internal memory to provide at least one parameter associated with a vehicle to the alternator simulated as a communication signal over the communication bus, detect an absence of the communication signal at the alternator, test, upon detecting the absence of the communication signal, whether or not the alternator enters a default mode of operation, the default mode being indicated by a preset output voltage uniquely associated with the default mode and monitored by the processor, and indicate whether the alternator entered the default mode successfully.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: October 24, 2017
    Assignee: Bosch Automotive Service Solutions Inc.
    Inventors: Chad Samp, David Vossen
  • Patent number: 9797957
    Abstract: A detecting apparatus for AC motor malfunction by using a current delay property of an AC motor and outputting a malfunction signal to an alarming device is presented. The detecting apparatus for AC motor malfunction includes a voltage phase delay setting unit, a voltage phase conversion unit, a current phase detecting unit, a current phase conversion unit, a phase comparator, a sawtooth wave generating unit, a phase difference detecting unit, a phase shift bandwidth setting unit, a noise filtering unit, and a malfunction signal output unit.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: October 24, 2017
    Inventor: SeoungChoul Lee
  • Patent number: 9797958
    Abstract: A monitoring system having a monitoring unit and a circuit element that are integrated in an enclosure for protecting connections between the monitoring unit and the circuit element. The monitoring unit monitors the circuit element via a first electrical quantity, and the monitoring unit has a control unit and a first circuit unit and a second circuit unit. The first current is essentially or precisely equal in amplitude to the first current, and the first current and the second current flow simultaneously in the two line sections. The first current direction is opposite to the second current direction, and the first circuit unit ascertains a first voltage drop at the first line section, and the second circuit unit ascertains a second voltage drop at the second line section. The control unit ascertains the first electrical quantity from the first voltage drop and the second voltage drop.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: October 24, 2017
    Assignee: TDK-Micronas GmbH
    Inventor: Stefan Albrecht