Abstract: A trim command processing method for a memory storage apparatus having a rewritable non-volatile memory module having a plurality of physical programming units is provided. The method includes receiving a command from a host system; starting a trim operation to perform an operation corresponding to a trim command according to a record related to the trim command in a trim table if an operation corresponding the command is performed on the rewritable non-volatile memory module with a first mode; and not starting aforesaid trim operation if the operation corresponding the command is performed on the rewritable non-volatile memory module with a second mode.

Abstract: Techniques and systems are provided for tracking commands. Such methods and systems can include receiving a data access request in a controller coupled to (a) a non-volatile memory configured to store a set of physical data pages, and (b) a volatile memory configured to store a plurality of physical data page addresses, wherein each physical data page address corresponding to a physical data page in the set of physical data pages, and each physical data page address is accessed via a corresponding logical address in a set of logical addresses; accessing, by the controller based on the received data access request, a bitmap stored on the volatile memory, the bitmap including a set of bits, each bit configured to indicate a validity state of a different plurality of logical addresses in a set of logical addresses; and determining, via the controller, an invalid state of at least one of a selected (a) logical address, or (b) plurality of logical addresses, based on a bit in the bitmap.

Abstract: A method of determining an access address includes determining a first address translation rule to translate a first input address to a first output address, determining a second address translation rule to translate a second input address to a second output address, and using at least one of the first address translation rule and the second address translation rule to determine the access address. An apparatus for accessing a memory based on a memory address includes a first address translator configured to translate a first input address to a first output address and a second address translator configured to translate a second input address to a second output address. The apparatus is configured to use at least one of the first address translator and the second address translator to translate the memory address to the access address.

Abstract: A clock mode configuration circuit for a memory device is described. A memory system includes any number of memory devices serially connected to each other, where each memory device receives a clock signal. The clock signal can be provided either in parallel to all the memory devices or serially from memory device to memory device through a common clock input. The clock mode configuration circuit in each memory device is set to a parallel mode for receiving the parallel clock signal, and to a serial mode for receiving a source synchronous clock signal from a prior memory device. Depending on the set operating mode, the data input circuits will be configured for the corresponding data signal format, and the corresponding clock input circuits will be either enabled or disabled. The parallel mode and the serial mode is set by sensing a voltage level of a reference voltage provided to each memory device.

Abstract: A memory system includes a memory device including a plurality of memory blocks; and a controller suitable for; storing user data corresponding to a write command received from a host, in the memory blocks, storing map data in response to storing of the user data, in the memory blocks, sorting map segments included in the map data, according to logical information of the user data, determining correlations for the memory blocks, through the map segments, and selecting source memory blocks among the memory blocks based on the determined correlations.

Abstract: The technology relates to systems and methods for automatically determining, using an in-memory hierarchical data structure and traversal technique, the applicability of one or more sets of requirements for entities such as systems, processes, products, etc. Example embodiments represent selected sets of requirements in the in-memory hierarchical data structure based on which model objects representing various entities are evaluated.

Abstract: A data encryption system receives data to be encrypted prior to being transmitted to a storage unit. The received data is analyzed to determine a secure storage approach based on a risk level associated with the received data. In response to the risk level satisfying a threshold risk level the data encryption system uses a convergent encryption technique to encrypt the received data, but in response to the risk level failing to satisfy the threshold risk level, the data encryption system encrypts the received data using a key based on a random number. The encrypted data is transmitted to a storage unit.

Abstract: A method includes determining to rebuild one or more encoded data slices (EDSs) of a plurality of sets of EDSs. When determined to rebuild the one or more EDSs, the method includes sending a lock request to a set of storage units (SUs) regarding the plurality of sets of EDSs. The method further includes determining whether at least a decode threshold number of favorable lock responses is received from the set of SUs. When the at least the decode threshold number is received, the method further includes recovering one or more sets of EDSs to rebuild the one or more EDSs to produce one or more rebuilt EDSs. For a rebuilt EDS, the method further includes determining whether a SU that is targeted to receive the rebuilt EDS is available to store the rebuilt EDS, and when the SU is available, sending the rebuilt EDS to the SU.

Abstract: A memory device includes a first storage unit storing an address mapping table, and a control unit coupled to the first storage unit and including a second storage unit storing a risky mapping table and a cached mapping table. The control unit is configured to: write data into the first storage unit; update mapping information associated with the data in the risky mapping table; and store mapping information in the cached mapping table into the address mapping table.

Abstract: A method and device for using volatile and non-volatile computer memory are provided. The method may comprise locating page table entries associated with a plurality of pages associated with a process in a first data structure in the volatile memory, the process having a low likelihood of execution in comparison to other processes. Then, the method may comprise copying the plurality of pages to a second data structure in the volatile memory. Next, the method may further comprise copying the plurality of pages from the second data structure to a third data structure in the volatile memory at the same time. Finally, the method may include writing the plurality of pages from the third data structure to contiguous blocks of non-volatile memory based on the plurality of pages having been written to the third data structure at the same time.

Abstract: One or more techniques and/or systems are provided for cluster configuration information replication, managing cluster-wide service agents, and/or for cluster-wide outage detection. In an example of cluster configuration information replication, a replication workflow corresponding to a storage operation implemented for a storage object (e.g., renaming of a volume) of a first cluster may be transferred to a second storage cluster for selectively implementation. In an example of managing cluster-wide service agents, cluster-wide service agents are deployed to nodes of a cluster storage environment, where a master agent actively processes cluster service calls and standby agents passively wait for reassignment as a failover master in the event the master agent fails. In an example of cluster-wide outage detection, a cluster-wide outage may be determined for a cluster storage environment based upon a number of inaccessible nodes satisfying a cluster outage detection metric.

Abstract: A data processing system may include: a plurality of memory systems each comprising a memory device and a controller for the memory device; and a host system suitable for performing processes corresponding to workloads which are processed in the plurality of memory systems, wherein at a first time, the host system performs a first process corresponding to a first workload among the workloads and transmits a command corresponding to the first workload to the memory systems, and at a second time, the host system receives an acknowledgement signal of the command from the memory systems, checks an end time of a command operation corresponding to the command through the acknowledgement signal, and prepares the first process in advance according to the end time.

Abstract: Provided are a computer program product, system and method for determining adjustments to the spare space in a storage device unavailable to a user based on a current consumption profile of a storage device. A current write amplification is based on storage writes to a media at a storage device and host writes from a host to the storage device. An adjustment to the current write amplification is determined to produce an adjusted write amplification based on an estimated lifespan of the storage device, a maximum storage writes for the storage device, and the storage writes at the storage device since the storage device was powered-on. A determination is made to an adjustment to spare space based on the adjusted write amplification. The spare space and the free space available to the user are reconfigured to adjust the spare space by the determined adjustment to the spare space.

Abstract: Embodiments of selective data persistence in computing devices and associated methods of operations are disclosed therein. In one embodiment, a method includes receiving a command to initiate persistence of data currently contained in a volatile memory module to a non-volatile memory module of a hybrid memory device. The method also includes determining whether the data in the volatile memory module is valid data. In response to determining that the data currently contained in the volatile memory module is valid data, causing the data to be copied from the volatile memory module to the non-volatile memory module. in response to determining that the data is not valid data, discarding the data currently contained in the volatile memory module.

Abstract: A memory system may include: a memory device comprising: a plurality of pages each having a plurality of memory cells coupled to a plurality of word lines and suitable for storing data; a plurality of memory blocks each having the pages; a plurality of planes each having the memory blocks; and a plurality of memory dies each having the planes, and a controller suitable for transmitting a request command for acquiring setting information on the memory device to the memory device, receiving an acknowledgement signal corresponding to the request command from the memory device, acquiring the setting information through the acknowledgement signal, and checking the setting information to perform a command operation based on a command received from a host on the memory device.

Abstract: The present invention notably relates to a method for saving data stored in memory in a non-volatile memory (2) of a secure element (1), the method being characterized by steps for generating a backup image (IS) containing the data stored in memory in the non-volatile memory (2) and for writing the backup image (IS) into the non-volatile memory (2) of the secure element (1). The present invention also relates to a method for restoring saved data.

Abstract: A method includes storing, by a set of storage units, a set of appended encoded data slices, where an appended encoded data slice of the set of appended encoded data slices includes an encoded data slice of a set of encoded data slices and slice verification information. The method further includes identifying, by a rebuilding agent, one of the set of appended encoded data slices for rebuilding, rebuilding the encoded data slice, generating current slice verification information, and sending an appended rebuilt encoded data slice that includes the rebuilt encoded data slice and the current slice verification information to a storage unit. The method further includes verifying, by the storage unit, the current slice verification information corresponds to the slice verification information, and when the current slice verification information corresponds to the slice verification information, storing the appended rebuilt encoded data slice as a trusted rebuilt encoded data slice.

Abstract: Various embodiments manage deployable computing environments. In one embodiment, a system model of a computing environment that includes a set of computing resources is analyzed. The system model at least describes properties of each of the set of computing nodes and identifies a plurality of configuration operations to be executed by each of the set of computing nodes during deployment. A set of dependency information is generated for each of the set of computing nodes based on analyzing the system model. The set of dependency information identifies at least one dependency between two or more of the plurality of configuration operations. An executable coordination operation is added to each of the plurality of configuration operations. The executable coordination operation automatically coordinates execution of the plurality of configuration operations on the computing node.

Abstract: It is provided an information processing apparatus. The information processing apparatus includes a processor and memory storing an instruction for causing the processor to execute changing an amount of free space in main memory, determining whether data is swapped out from the main memory due to insufficient space for the free space, and setting a parameter for changing the amount of the free space in the main memory to a value to increase the amount of the free space when the determining determines that the data is swapped out from the main memory due to insufficient space for the free space.

Abstract: A data de-duplication approach leverages acceleration hardware in SSDs for performing digest computations used in de-duplication operations and support on behalf of an attached host, thereby relieving the host from the computing burden of the digest computation in de-duplication (de-dupe) processing. De-dupe processing typically involve computation and comparison of message digests (MD) and/or hash functions. Such MD functions are often also employed for cryptographic operations such as encryption and authentication. Often, SSDs include onboard hardware accelerators for MD functions associated with security features of the SSDs. However, the hardware accelerators may also be invoked for computing a message digest result and returning the result to the host, effectively offloading the burden of MD computation from the host, similar to an external hardware accelerator, but without redirecting the data since the digest computation is performed on a data stream passing through the SSD for storage.

Abstract: An information processing apparatus includes a memory and a processor coupled to the memory. The processor is configured to calculate, when writing a first data block at a first address on a storage, a first index value corresponding to a number of times of writing data at the first address. The processor is configured to determine, on basis of the first index value, whether to perform or hold deduplication on the first data block. The processor is configured to switch between performing and holding the deduplication on the first data block depending on a result of the determination.

Abstract: Organization and management of key-value stores is described. An example method includes providing a stack of tables. Each of the tables includes a set of pages of a pre-determined size for storing a set of key-value entries. The method includes monotonically decreasing a number of pages in the tables according to a position of the table in the stack. The method includes configuring each of the pages in the tables to address a particular range of a key space in such a way that each of the pages in a subsequent table in the stack is configured to address a range addressed by at least two pages in a preceding table in the stack. An action with a key-value entry is carried out by starting with a table in the top of the stack and moving to the next table if the action cannot be carried out.

Abstract: Methods, systems, and devices for operating a memory array are described. A memory controller may be configured to provide enhanced bandwidth on a command/address (C/A) bus, which may have a relatively low pin count, through use of a next partition command that may repeat an array command from a current partition at a different partition indicated by the next partition command. Such a next partition command may use fewer clock cycles than a command that includes a complete instruction and memory location information.

Abstract: Systems and method relating generally to solid state memory, and more particularly to systems and methods for recycling data in a solid state memory. The systems and methods include receiving a data set maintained in a memory device, applying at least one iteration of a data decoding algorithm to the data set by a data decoder circuit to yield a decoded output, counting the number of iterations of the data decoding algorithm applied to the data set to yield an iteration count, and recycling the data set to the memory device. The recycling is triggered based at least in part on the iteration count.

Abstract: Methods, systems and computer-readable storage media for receiving, via an external interface of a storage device, a command from a computing host, the command including at least one non-standard command modifier, executing the command according to a particular non-standard command modifier, storing an indication of the particular non-standard command modifier in an entry of a map associated with a logical block address of the command, and storing a shadow copy of the map in a memory of the computing host.

Abstract: The invention facilitates a setting state updating operation of the printer. An updating system of a setting state of a printer comprises an application activating unit which issues an application binding command upon detection of a predetermined operation when an application is executed by a mobile. The application binding command designates a printing application and a predetermined setting state updating command. The updating system further comprises a setting state updating unit which executes an updating of the setting state of the printer in the printing application activated by the application activating unit according to the predetermined setting state updating command included in the application binding command. A predetermined operation in the application triggers activation of the printing application for an automatic updating of the printer setting state.

Abstract: A method, a readable recording medium, and a system are disclosed for managing software version compatibility amongst a plurality of devices within a network. The method includes hosting a configuration file on a server, populating the configuration file for each of the two or more printers within the network with a printer identifier and one or more software versions associated with each of the two or more printers; executing a configuration tool on the server to compare the one or more software versions on a first printer of the two or more printers and the one or more software versions on at least one second printer of the two or more printers; and displaying if there is a software version discrepancy between the one or more software versions on the first printer and the one or more software versions on the at least one second printer.

Abstract: An information processing apparatus includes a display unit configured to display a user interface of an application, wherein the user interface includes an object for displaying a user interface of a printer driver. The apparatus further includes a receiving unit configured to receive default values of print settings via the user interface of the printer driver displayed by designating the object. A creation unit is configured to create a file for installing a customized printer driver based on the received default values, wherein a user interface of the customized printer driver installed using the created file is displayed based on the received default values.

Abstract: A print management server provided outside a predetermined LAN includes a receiver, a processor, and a transmitter. The receiver receives a print output instruction from a communication terminal of a user, the print output instruction being issued to a print output device provided inside the predetermined LAN and being an instruction to print out a print target file. The processor determines whether the print target file is present inside the predetermined LAN. When it is determined that the print target file is present inside the predetermined LAN, the transmitter transmits a generation command to a communication relay device inside the predetermined LAN, the generation command being a command to generate print job data on the basis of the print target file acquired by the communication relay device and a print setting instruction.

Abstract: An image recording apparatus includes: a first communication interface configured to perform communication according to a first communication standard; a second communication interface configured to perform communication according to a second communication standard that is different from the first communication standard and that is a wireless communication standard; an image recorder; and a controller. The controller receives image data and first identification information from an image-data output device via the first 02-19 communication interface. The controller broadcasts the received first identification information via the second communication interface.

Abstract: When a print processing apparatus is not connected to a printing apparatus, the printing apparatus generates communication information using an IP address of the printing apparatus and writes the generated communication information into a memory of an NFC communication unit. When the print processing apparatus is connected to the printing apparatus, the printing apparatus generates communication information using an IP address of the print processing apparatus and writes the generated communication information into the memory of the NFC communication unit.

Abstract: Systems and methods associated with resource provisioning are disclosed. One example method includes dividing a set of printing resources into a first partition and a second partition. The example method also includes provisioning the first partition to handle print jobs from a print queue that have a specified attribute. The first partition may be provisioned when print jobs having the specified attribute exceed a first predefined threshold.

Abstract: An information processing apparatus includes a receiving unit and a display controller. The receiving unit receives designation of a cooperative function that becomes available through cooperation among a group of devices. The display controller controls display of information about a result of extracting the group of devices that are necessary to use the cooperative function.

Abstract: A control device for a vehicle equipped in the vehicle, the control device that includes a first display located in a center fascia of the vehicle, a second display located at a lower side of the first display, a guide configured to guide the second display to be moved in a direction from front to rear sides of the vehicle, and a controller configured to control at least one of the first and second displays such that information output on the at least one of the first and second displays differs according to a position of the second display is disclosed.

Abstract: Methods and systems for displaying messages using body-worn electronic display devices. One method includes receiving proximity data indicating a distance between a first electronic display device and a second electronic display device. The method also includes receiving first orientation data indicating an orientation of the first electronic display device and receiving second orientation data indicating an orientation of the second electronic display device. The method also includes determining a distributed message for display based on the proximity data, the first orientation data, and the second orientation data. The distributed message includes a first message for display on the first electronic display device and a second message for display on the second electronic display device. The method also includes displaying, by a controller, the first message on the first electronic display device and the second message on the second electronic display device.

Abstract: A method for providing a collaboration session using a designated control pen includes receiving graphical content from either a first computing device associated with a first pen tool or a second computing device associated with a second pen tool. A request can be received from the first computing device to designate the first pen tool as the control pen. In response to the request, the first pen is designated as the control pen and the second pen is disabled so long as the first pen tool retains the control pen designation. The graphical content can be modified based on the interactions made with the designated control pen at the first display area. The modified graphical content is globally displayed, which includes providing the modified graphical content to the second computing device for display at the second display area.

Abstract: A control method and an electronic device are provided. The method comprises: after establishing a connection between the first electronic device and a second electronic device, determining a device type of the second electronic device; based on the device type of the second electronic device as well as a correspondence between device types and output modes, determining a target output mode of the first electronic device that corresponds with the device type of the second electronic device; and displaying data via a display output unit of the first electronic device in the target output mode, wherein the displayed data corresponds to contents displayed by a display unit of the second electronic device, said contents being transmitted from the second electronic device to the first electronic device.

Abstract: The invention relates to a system and method for displaying and transmitting a sequence of images to listeners. The method comprises the following steps: transferring a sequence of images displayed to a transmitting device; transmitting by the transmitting device the images displayed in real time over a multicast wireless communication network, preferably WI-FI; receiving and displaying the images transmitted by a receiving device of the listener; optionally processing and/or annotating the images received by the listener on his device. The invention also relates to a system for the implementation of this method.

Abstract: An isolation unit may include input pins to receive an electrical signal induced by ambient sound waves incident on an appliance in a powered-off state, one or more first transformers, connected to the input pins, to electrically isolate the induced electrical, one or more second transformers, connected to the first transformers, to provide a common mode choke function on the induced electrical signal, one or more inductors, connected to the one or more second transformers, one or more resistors, connected to the one or more inductors, wherein the one or more inductors and the one or more resistors are configured to limit an amplitude of a current of the induced electrical signal, and output pins, connected to the one or more inductors, to receive a modified electrical signal from the one or more inductors to propagate the modified electrical signal to a downstream cable.

Abstract: A method for adjusting speed of playback of at least a segment of a media file, comprising generating a text file by speech-to-text conversion of the media file; and determining a speed measure for the media file, including determining a plurality of speech elements in the text file, and associating a time stamp for each speech element of the generated text file. The method may further include determining a degree of comprehensibility of the media file; and adjusting a current speed of playback of the media file based on the determined speed measure and the determined degree of comprehensibility.

Abstract: A system, method and computer readable medium for operating a First In, First Out (FIFO) buffer that transfers data between a host and a plurality of endpoints using chip select is disclosed. The method includes receiving a current value of a read pointer and a status for an active endpoint and reading data at a location to which the read pointer points and setting a tag associated with the location to which the read pointer points to indicate availability.

Abstract: Embodiments of a processor are disclosed for performing arithmetic operations on a machine independent number format. The processor may include a floating point unit, and a number unit. The number format may include a sign/exponent block, a length block, and multiple mantissa digits. The number unit may be configured to perform an operation on two operands by converting the digit format of each mantissa digit of each operand, to perform the operation using the converted mantissa digits, and then to convert each mantissa digit of the result of the operation back into the original digit format.

Abstract: The present embodiments relate to circuitry that efficiently performs floating-point arithmetic operations and fixed-point arithmetic operations. Such circuitry may be implemented in specialized processing blocks. If desired, the specialized processing blocks may include configurable interconnect circuitry to support a variety of different use modes. For example, the specialized processing block may efficiently perform a fixed-point or floating-point addition operation or a portion thereof, a fixed-point or floating-point multiplication operation or a portion thereof, a fixed-point or floating-point multiply-add operation or a portion thereof, just to name a few. In some embodiments, two or more specialized processing blocks may be arranged in a cascade chain and perform together more complex operations such as a recursive mode dot product of two vectors of floating-point numbers or a Radix-2 Butterfly circuit, just to name a few.

Abstract: The present invention discloses a processor for computing a mathematical function. The processor comprises a look-up table circuit (LUT) and an arithmetic logic circuit (ALC). The LUT is formed on the backside of the processor substrate and stores data related to the mathematical function. The ALC is formed on the front side of the processor substrate and performs arithmetic operations on the function-related data. The LUT and the ALC are communicatively coupled by a plurality of through-silicon vias (TSV).

Abstract: The present invention discloses a configurable processor with an in-package look-up table. The configurable processor comprises a programmable memory die and a logic die located in a same package. The programmable memory die comprises a look-up table circuit (LUT) for storing data related to a desired function. The logic die comprises an arithmetic logic circuit (ALC) for performing arithmetic operations on the data read out from the LUT.

Abstract: A method for fast parallel adder processing. The method includes receiving parallel inputs from a communications path, wherein each input comprises one bit, adding the inputs using a parallel structure, wherein the parallel structure is optimized to accelerate the addition by utilizing a characteristic that the inputs are one bit each, and transmitting the resulting outputs to a subsequent stage.

Abstract: A multiplier circuit includes a partial product generation circuit, a truncation circuit, and a summation circuit. The partial product generation circuit is configured to generate a plurality of partial products for multiplying two values. The truncation circuit is coupled to the partial product generation circuit. The truncation circuit is configured to shorten at least some of the partial products by removing a least significant bit from the at least some of the partial products. The summation circuit coupled to the truncation circuit. The summation circuit is configured to sum the truncated partial products produced by the truncation circuit.

Abstract: The present invention discloses a configurable processor with a backside look-up table. The configurable processor comprises a look-up table circuit (LUT) on the backside of the processor substrate and an arithmetic logic circuit (ALC) on the front side of the processor substrate. The LUT stores data related to a desired function. The ALC performs arithmetic operations on the data read out from the LUT.

Abstract: A programmable logic device (PLD) includes a plurality of logic array blocks (LAB's) connected by a PLD routing architecture. At least one LAB includes a logic element (LE) configurable to arithmetically combine a plurality of binary input signals in a plurality of stages. The LE comprises look-up table (LUT) logic having K inputs (a “K-LUT”). The K-LUT is configured to input the binary input signals at respective inputs of the K-LUT logic cell and to provide, at a plurality of outputs of the K-LUT logic cell, respective binary result signals indicative of at least two of the plurality of stages of the arithmetic combination of binary input signals. An input line network includes a network of input lines, the input lines configurable to receive input signals from the PLD routing architecture that represent the binary input signals and to provide the input signals to the K-LUT.

Abstract: Provided are a device and method for displaying a product in a product lifecycle management (PLM) system. In some embodiments, the device may include an input unit that may receive input from a user, a processor that may generate an engineering model of a product corresponding to one or more physical components of the product, and generate a software model of the product corresponding to one or more software components of the product, and a display that may display representations of both the engineering model and the software model incorporated in a same window.