Abstract: Material transfer/interrogation devices (e.g. liquid handling workstations) have been designed in the past for transferring material from a source to a destination location or for interrogating a material at a location, where the locations remain fixed. The invention provides methods and apparatuses for transferring or interrogating materials by one or more carrier devices to one or more receiving devices, where the carrier and receiving devices move independently and simultaneously on multiple axes. In some embodiments, one or more of the carrier and receiving devices can move along an X, Z, Y, and Theta axis, which allows the source and destination locations to rotate and translate relative to each other. Due to this rotation and translation, containers can be positioned to minimize the distance traveled between a pick location from the source and a place location on the destination, greatly increasing the speed at which material transfer can occur.

Abstract: A method and geophysical acceleration sensor (100) for measuring seismic data and also for protecting the sensor from shock. The sensor includes a housing (102); a flexible beam (104) having a first end fixedly attached to the housing; a piezoelectric layer (108) attached to the flexible beam; a seismic mass (112) attached to the flexible beam; and a first movement limiter (130) connected to the housing and configured to limit a movement of the flexible beam. A distance between a tip of the first movement limiter and the flexible beam is adjustable.

Abstract: A capacitive physical quantity sensor includes a first substrate, a movable electrode, a fixed electrode, and a second substrate. An auxiliary electrode is disposed on a portion of the second substrate to face the movable electrode and the auxiliary electrode has a facing area that faces the movable electrode. The facing area in a case where the movable electrode is displaced in one direction is different from the facing area in a case where the movable electrode is displaced in an opposite direction opposite to the one direction. The physical quantity is detected based on a capacitance, which is generated corresponding to the interval between the fixed electrode and the movable electrode, and a capacitance, which is generated corresponding to an interval between the facing area of the movable electrode and the auxiliary electrode.

Abstract: A microelectromechanical system (MEMS) acceleration sensor includes a mass bar, a first spring disposed on a first set of opposite sides of the mass bar and configured to secure the mass bar in a first direction, an interdigital structure disposed along a second set of opposite sides of the mass bar in a second direction perpendicular to the first direction, a detection electrode corresponding to the interdigital structure, and a second spring disposed on the second set of opposite sides and configured to secure the mass bar in the second direction. The first spring has a frame shape, and the second spring has an S-shape. Through the second spring, the acceleration sensor is less sensitive to acceleration on the other direction, so that the detection performance of the acceleration sensor is improved.

Abstract: In a method for calibrating a sensor installed in a vehicle, a triggering signal for the calibration is automatically generated subsequent to the vehicle production process, during which calibration sensor signals are calibrated as a function of the inclination of the ground on which the vehicle is located.

Abstract: A technique for allowing users to efficiently specify a region of interest (ROI) on a sample for a certain physical quantity (e.g. phase) other than the altitude is provided. A range-indicating image showing a range that can be observed on a sample is displayed on a navigation window in a sample observation display screen. An ROI-indicating frame for specifying a magnified observation range is superposed on the range-indicating image. A list of thumbnails of previously taken magnified images for the same sample is displayed on an image history display window. When an observer selects any image from this list, the thumbnail of the selected image is mapped onto the range-indicating image. With reference to this image, the observer can change the position, size and/or angle of the ROI-indicating frame by a mouse operation. In response to this operation, a magnified image of the sample within the new ROI is acquired.

Abstract: The present invention is related to a membrane electrochemical signal detection system, which comprises a detection platform and a probe, wherein the detection platform comprises a substrate having a cavity; a hydrogel layer disposed in the cavity of the substrate; and a carrier film disposed above the substrate and the hydrogel layer with at least one through hole corresponding to the cavity of the substrate as a sample slot. The surface of the probe is covered by an insulating layer and a metal for detection is exposed at a tip portion of the probe.

Abstract: A method is provided for fabricating a semiconductor testing structure. The method includes providing a substrate having a to-be-tested device structure formed on a surface of the substrate, a dielectric layer formed on the surface of the substrate and a surface of the to-be-tested structure, and conductive structures and an insulation layer electrically insulating the conductive structures formed on a first surface of the dielectric layer. The method also includes planarizing the conductive structures and the insulation layer to remove the conductive structures and the insulation layer until the first surface of the dielectric layer is exposed; and bonding the first surface of the dielectric layer with a dummy wafer by an adhesive layer. Further, the method includes removing the substrate to expose a second surface relative to the first surface of the dielectric layer of the dielectric layer and a surface of the to-be-tested device structure.

Abstract: A wafer testing probe card includes a printed circuit board, a flexible circuit board, an elastic piece, and a probe unit. The flexible circuit board is electrically connected to the printed circuit board. The elastic piece is disposed between the printed circuit board and the flexible circuit board. The probe unit includes a probe head and a plurality of probes. The probe head is fixed on the printed circuit board and has a plurality of through holes. The probes respectively pass through the through holes and move up and down relative to the probe head.

Abstract: Probe tip formation is described for die sort and test. In one example, the tips of wires of a test probe head are prepared for use as test probes. The wires are attached to a test probe head substrate. The end opposite the substrate has a tip. The tips of the wires are polished when attached to the test probe head to form a sharpened point.

Abstract: A low-cost and high-precision current sensing device and methods for use and manufacturing. In one embodiment, the current sensing apparatus comprises a Rogowski-type coil which is manufactured in segments so as to facilitate the manufacturing process. In an exemplary embodiment, the current sensing apparatus segments comprise a number of bobbin elements that are wound and subsequently formed into complex geometric shapes such as torus-like shapes. In an alternative embodiment, bonded windings are utilized which allow the segments to be formed without a bobbin or former. In yet another alternative embodiment, the aforementioned current sensing devices are stacked in groups of two or more. Methods of manufacturing and using the aforementioned current sensing apparatus are also disclosed.

Abstract: The present invention relates to electrical measurement apparatus (10). The electrical measurement apparatus (10) comprises a measurement arrangement (20,24) configured to be disposed in relation to an electrical circuit (12,14,16,18) which bears an electrical signal, the measurement arrangement (20,24) being operative when so disposed to measure the electrical signal. The electrical measurement apparatus (10) further comprises a signal source (22) operative to apply a reference input signal to the measurement arrangement (20,24) whereby an output signal from the measurement arrangement comprises an electrical output signal corresponding to the electrical signal and a reference output signal corresponding to the reference input signal, the reference input signal having a substantially piecewise constant form which is repeated over each of plural cycles.

Abstract: Some embodiments are directed to a process device comprising a process variable sensor configured to generate an output signal indicative of a sensed process variable; loop current output circuitry configured to control a loop current on a two wire process control loop to a value based on the output signal; loop current measurement circuitry coupled to the process control loop and configured to generate a measured loop current value based on the loop current; and loop current verification circuitry configured to approximate the loop current value based on the output signal and properties of a low pass filter, and generate a diagnostic signal based on a comparison of the approximated loop current value and the measured loop current value.

Abstract: A fiber optic sensor for measuring electromagnetic phenomena, including electrical and magnetic fields, voltage, and current is disclosed. The sensor includes an optical fiber probe containing a transmitting fiber and at least one receiving fiber, and a reflective surface or body. The reflective surface or body may be part of or attached to a material exhibiting a physical displacement from a force exerted upon the material due to electromagnetic phenomena, such as an electrical field, a magnetic field, voltage, and current. The reflective surface may be spaced apart from the ends of the fibers in the probe, and positioned so that light transmitted through the transmitting fiber is reflected by that surface into at least one receiving fiber. A light sensing means is coupled to the at least one receiving fiber, so light from a light reflected by the reflector body back into the receiving fibers is detected.

Abstract: A fault detecting apparatus, to use an output current from a drive circuit as a current value detected by a current sensor, calculates a duty ratio of a control signal to be supplied to the drive circuit to define the duty ratio as a theoretical value of the duty ratio of the control signal. The fault detecting apparatus compares a duty ratio of a control signal actually supplied to the drive circuit with the theoretical value of the duty ratio of the control signal to determine whether the current sensor (fails on the basis of a comparison result.

Abstract: A current sense resistor integrated with an integrated circuit die where the integrated circuit die is housed in a flip-chip semiconductor package includes a metal layer formed over a passivation layer of the integrated circuit die where the metal layer having an array of metal pillars extending therefrom. The metal pillars are electrically connected to a first leadframe portion and a second leadframe portion of the semiconductor package where the first leadframe portion and the second leadframe portion are electrically isolated from each other and physically separated by a separation of a first distance. The current sense resistor is formed in a portion of the metal layer spanning the separation between the first and second leadframe portions, the first and second leadframe portions forming terminals of the current sense resistor.

Abstract: External conditions, e.g., smoke, temperature, humidity, humidity, pressure, flow rate, etc., affects a sensor's characteristics, wherein the sensor provides a current output representative of its characteristics as affected by the external conditions. The current output of the sensor is coupled to a sample and hold capacitor for a precision time period thereby charging the sample and hold capacitor to a voltage proportional to current provided by the sensor over the precision time period. The voltage on the sample and hold capacitor is converted to a digital representation and a determination is made whether the external condition represents an alarm situation, e.g., smoke detected from a fire.

Abstract: A method for determining electric voltage u(t) and/or electric current i(t) of an RF signal in the time domain in a calibration plane, wherein by at least one directional coupler having two outputs and one signal input a first component of a first RF signal that runs from the signal input in the direction of the calibration plane, and a second component of a second RF signal that runs from the calibration plane in the direction of the signal input is decoupled. For a two-port error of the directional coupler, the error terms e00, e01, e10 and e11, are determined as a function of a frequency f and the signal values v1(t) and v2(t) are transformed into the frequency domain as wave quantities V1(f) and V2(f), and absolute wave quantities a1 and b1 in the frequency domain in the calibration plane are calculated from the wave quantities V1(f) and V2(f) by the error terms e00, e01, e10 and e11.

Abstract: An integrated circuit includes a functional circuit (10) having a power grid (20) with a set of power grid points (30.i) for monitoring; and an electronic monitoring circuit (100) that has a variably operable reference circuit (150) responsive to an input register (155) and having an output, comparison circuitry (110) having plural outputs and having a first input coupled to the output of said variably operable reference circuit (150) and a set of second inputs each second input coupled to a respective one of said power grid points (30.i); and an output register (120) having at least two register bit cells (120.i) respectively fed by the plural outputs of said comparison circuitry (110.i). Other integrated circuits, and processes of testing and of manufacturing are also disclosed.

Abstract: The operation of electrical appliances receiving electrical power from an electrical system may be indirectly monitored using monitoring units engaged with outlets on branch circuits of the electrical system. Electrical systems providing power to appliances to be monitored in accordance with the present invention may comprise split phase alternating current systems, tri-phase systems, or any other type of electrical system. Known loads may be applied to calibrate the monitoring system. The monitoring system may measure the power consumption of appliances operating on the electrical system and/or detect possible fault conditions. The application of a known load to each phase of the electrical system for calibration permits different portions of the electrical system to be isolated and, therefor, provides improved accuracy in monitoring power consumption and detection of potential fault conditions.

Abstract: A measuring bridge (1) provides a first matching pad (2), a second matching pad (3) and a third matching pad (4), wherein all matching pads (2, 3, 4) comprise at least three resistors (21, 22, 23, 31, 32, 33, 41, 42, 43) which are arranged in a T-structure. A second resistor (32) of the second matching pad (3) is connected to a second resistor (22) of the first matching pad (2), and a third resistor (43) of the third matching pad (4) is connected to a third resistor (23) of the first matching pad (2). A second resistor (42) of the third matching pad (4) can be connected to a device under test (7). A third resistor (33) of the second matching pad (3) can be connected to a calibration standard (5), and a first resistor (31, 41) of the second and the third matching pad (3, 4) are connected in each case to a signal input of an element (11) which suppresses a common-mode component on its two signal inputs.

Abstract: An apparatus comprises a comparator that includes a first input, a second input and an output. The comparator is configured for measuring a difference in voltage between a source coupled to the first input and another source coupled to the second input, and providing information associated with the measured difference at the output. The apparatus also comprises a controllable current source coupled to the first input of the comparator and configured for supplying or drawing current. The apparatus also comprises a digital logic circuit that is configured for controlling an amount of current supplied or drawn by the controllable current source. The apparatus is configured for measuring a charge associated with an external source that is coupled to the first input of the comparator.

Abstract: An electronic device includes a housing and an electrical connector disposed along the housing. The electrical connector includes one or a plurality of electrical contacts having at least a portion thereof exposed to an exterior of the housing. An interface circuit is operable with the electrical connector and coupled to one or more electrical contacts of the electrical connector to interact with a complementary connector when connected to the electrical connector. A moisture detection circuit is to detect moisture contacting the electrical connector.

Abstract: A method for providing an environmental impact rating for a solar cell includes acquiring power generation data and thermal exchange data regarding the solar cell using a data acquisition device, transmitting the power generation data and the thermal exchange data to a controller, and generating the environmental impact rating based on the power generation data and the thermal exchange data using the controller, wherein the environmental impact rating provides an indication of an environmental impact of using the solar cell.

Abstract: The invention concerns a method for monitoring a cable strand containing multiple electrical lines, such that the cable strand is designed to conduct electrical energy generated by a generator in a wind turbine involving the steps: measuring the temperature of at least two of the electrical lines, comparing the temperatures of said lines, and determining whether the two temperatures deviate from one another by more than a predefined threshold.

Abstract: An automated earth fault testing system and early warning system designed to be used with mobile towers for real-time monitoring of the earthing values. The automated earth fault testing system comprises an earth fault testing device powered by a low voltage direct current battery, a plurality of terminals, at least one calibration switch including a calibration pad for calibrating the earth fault testing device, a plurality of visual indication means for providing indication of a variety of conditions including high and/or normal value of the earth resistance value and for indicating a charge level of the earth fault testing device and a liquid crystal display for displaying the earthing values. The earth fault testing device is connected to an alarm system of a base transceiver station utilizing a relay for informing the mobile signal station and operator with information regarding a status of the earth fault testing device.

Abstract: In accordance with one embodiment, a method for testing a plurality of electronic components is provided, including subdividing the plurality of electronic components into a plurality of first groups and subdividing the plurality of electronic components into a plurality of second groups. The method may further include measuring, for each first group, an electrical parameter of an interconnection of the components of the first group; measuring, for each second group, an electrical parameter of an interconnection of the components of the second group, and determining which electronic components of the plurality of electronic components have a predefined property, on the basis of the result of the measurement of the electrical parameter for the first groups and on the basis of the result of the measurement of the electrical parameter for the second groups.

Abstract: A semiconductor device includes: a plurality of semiconductor chips; and a connecting portion that connects a plurality of terminals formed on the plurality of semiconductor chips, wherein the plurality of terminals of the plurality of semiconductor chips belong to one of first group or second group, an interval between one of first terminals belonging to the first group and one of second terminals belonging to the second group is a predetermined interval, the one of the second terminals being adjacent to the one of the first terminal, the first terminals are arranged at an interval larger than the predetermined interval, and each of the plurality of semiconductor chips includes a selecting portion that selects a signal transmitting terminal among the plurality of terminals, per each of the groups.

Abstract: An information output apparatus includes: a first switching element joined through a solder part, and forming one arm of a power conversion apparatus; a second switching element connected in series with the first switching element, and forming the other arm of the power conversion apparatus; a smoothing capacitor; a measuring unit configured to measure a temperature of the first switching element to output a measured value; an applying unit configured to apply two or more continuous pulses in a state where a potential difference across the smoothing capacitor is greater than or equal to a predetermined value, the pulses causing the first switching element and the second switching element to simultaneously turn on; an adjusting unit configured to adjust pulse widths of the pulses; and an output unit configured to output information indicating a deterioration of the solder part based on a manner of a change in measured values.

Abstract: A method for diagnosing an electrical circuit including at least one electrical device, an actuator for the device controlled by a high side actuating switch and a low side actuating switch, and at least one additional switch not in series with any of the HS or LS switch, the method including: to each of the possible statuses of the circuit, giving a code; sequentially putting the circuit in at least some of these statuses for a given time period; during each of these periods, measuring voltage and/or current in different parts of the circuit and giving a code to the measurement; and establishing a diagnosis of correct functioning or of a malfunctioning of at least some elements of the circuit according to a pre-established correlation between the status codes and the measurement codes.

Abstract: A negative voltage testing including a monitoring and triggering circuit coupled to a supply voltage rail of a device under test (DUT) and a switching circuit coupled to the monitoring and triggering circuit. The monitoring and triggering circuit is configured to cause the switching circuit to provide a first negative voltage to the supply voltage rail when a supply voltage on the supply voltage rail decays below a predetermined level during a first test of the DUT.

Abstract: A battery simulator for simulating the status of a battery connected to a load component includes a controllable current source, a voltage detector, and a gain controller. The controllable current source supplies an output current to the load component according to a current control signal. The voltage detector measures a detection voltage that is generated in response to the output current flowing through the load component. The gain controller is electrically connected to the controllable current source and the voltage detector and generates the current control signal according to a voltage control signal, a gain control signal and the detection voltage.

Abstract: A built-in self test system comprises an integrated circuit device comprising a plurality of functional units coupled to built-in self test circuitry; a low power control unit operable to switch the integrated circuit device into a low power mode and to generate a BIST wake-up signal during or before entering the low power mode; and a built-in self test control unit coupled to the built-in self test circuitry and the low power control unit and arranged to initiate a built-in self test when receiving the BIST wake-up signal.

Abstract: A degradation detection circuit may include a degradation unit including multiple delay elements driven by a high voltage for degradation. The high voltage for degradation value may be higher than an operation voltage. The degradation unit may be configured to provide a first delayed signal after passing a test signal through the degradation unit, wherein the test signal retains a pulse for a preset time. The degradation detection circuit may include a reference unit including a plurality of delay elements driven by the operation voltage, and configured to provide a second delayed signal after passing the test signal through the reference unit, a delay setting unit configured to provide a third delayed signal by selectively adding delay elements with respect to the second delayed signal, and a delay checking logic configured to detect a delay of the test signal by comparing the first delayed signal and the third delayed signal.

Abstract: Various implementations described herein are directed to a system and methods for implementing a critical path architect. In one implementation, the critical path architect may be implemented with a system having a processor and memory including instructions stored thereon that, when executed by the processor, cause the processor to analyze timing data of an integrated circuit. The timing data may include transition times for cells along paths of the integrated circuit. The instructions may cause the processor to identify instances of timing degradation for the cells along the paths of the integrated circuit. The instructions may cause the processor to recommend changes for the instances of the cells along the paths having timing degradation.

Abstract: Provided are a socket for a semiconductor chip test, and a method of manufacturing the same, the socket for the semiconductor chip test including: a film layer; a semiconductor chip test terminal disposed on the film layer and connected to a terminal of a semiconductor chip; and a conductive elastic pad disposed on the film layer and connected to a ground terminal of the semiconductor chip.

Abstract: An electrical check executed on wafer tests for the correct positioning or alignment of the probes of a probe card on the pads or bumps of the electronic devices integrated on the wafer. A signal is applied to cause a current to circulate in at least part of a seal ring of at least one of the electronic devices. In a case where the current flows between and through multiple electronic devices, the seal rings of those electronic devices are suitably interconnected to each other by electronic structures that extend through the scribe line between electronic devices.

Abstract: A method is presented for characterizing a digital circuit for determining an optimum operating point of the digital circuit. The digital circuit includes sequential elements; conducting data paths; a clock tree; a time fault sensor receiving as input a data signal and configured to detect during a detection window a transition of the data signal; and a system for setting first and second operating parameters of the circuit. The method includes a) activating a conducting data path leading to the sequential element coupled to the sensor; b) determining, for a given value of the first parameter, a first value of the second parameter from which the sensor detects a transition of the data signal during the detection window, the values of the first and second parameters defining an operating point of the circuit; and c) correcting the operating point.

Abstract: A semiconductor circuit has circuit units in a plurality of stages which units are continuously connected, each of the circuit units in the plurality of stages including: a first register; a second register; a first outputter; and a second outputter. The first outputter is connected to the first register and the second register, and selects and outputs one of a first input signal inputted from the first register and a second input signal inputted from the second register. The second outputter outputs at least one of the second input signal and a third input signal to a second register in a next stage, the third input signal being outputted from a logic circuit unit that performs logic operation on the basis of an input signal containing at least one of a signals outputted from the first outputters.

Abstract: Methods for selecting integrated circuit dies based on pre-determined criteria are disclosed. A disclosed method includes binning tools that characterizes multiple integrated circuit dies based on performance attributes. Each integrated circuit die is labeled with an identifier that represents bin location of the integrated circuit die within a die storage structure. A user can search for integrated circuit dies that matches certain performance grading by providing a performance description to an input interface on testing equipment. A tester is then configured to perform a screening to identify the physical locations of integrated circuit dies that match the retrieved identifiers from the die storage structure.

Abstract: An electronic device having a functional portion and a test portion. The test portion includes a boundary scan register formed by a plurality of test cells arranged in the body according to a register sequence, where first test cells are configured to form a serial-to-parallel converter and second test cells are configured to form a parallel-to-serial converter. The test cells are each coupled to a respective data access pin of the device and to a respective input/output point of the functional part and have a first test input and a test output. The boundary scan register defines two test half-paths formed, respectively, by the first test cells and by the second test cells. The first test cells are directly coupled according to a first sub-sequence, and the second test cells are directly coupled according to a second sub-sequence.

Abstract: A method for generating a post-silicon validation test for a system on chip (SOC), may include obtaining a selection of action scenarios from a set of scenarios originally constructed for generating simulation tests; combining the selected scenarios into a combined scenario in which the selected scenarios are to be executed in parallel; and generating a post-silicon test code corresponding to the combined scenario.

Abstract: An integrated circuit (IC) is provided with functional logic having a plurality of internal signal lines and test logic. The test logic has a plurality of inputs coupled to the plurality of internal signal lines and with an output coupled to a first external pin of the integrated circuit. The test logic includes a buffer, and the test logic is configured to selectively couple each of the signals received on the plurality of signal lines either directly or via the buffer to the first external pin of the IC. The test logic is configured to selectively couple a signal received on a second external pin of the IC either via the buffer to the first external pin of the IC in order to calibrate the buffer.

Abstract: A node energy diagnosis method for a fault of a switched reluctance motor double-switch power converter. By detecting a transient value of a phase current of a switched reluctance motor double-switch power converter, a node energy standard deviation ? is calculated to be used as a fault characteristic quantity, and a main switch lower-tube short-circuit fault of the switched reluctance motor double-switch power converter is diagnosed by adopting a node energy standard deviation ? curve of the phase current of the switched reluctance motor double-switch power converter in the whole rotation speed range. It also can be applied in fault diagnosis when a main switch lower-tube short-circuit fault occurs in two phases or more than two phases of a switched reluctance motor double-switch power converter.

Abstract: A method for discovering demagnetisation faults of a permanent magnet synchronous generator, such as a wind power generator. The method is performed during operation of the synchronous generator and includes measuring the vibration of the stator, performing a frequency analysis of the vibration, and deducing whether the generator suffers from demagnetization of a permanent magnet, from the vibration analysis. Moreover, geometric eccentricity faults and electric short circuit faults may also be detected from the vibration.

Abstract: A method for identifying electrical faults in a generator assemblage, in particular of a motor vehicle, which assemblage includes a generator having a generator regulator and a rectifier having rectifier elements, the method encompassing ascertaining, in the context of at least one excitation current value of an excitation current through an excitation winding of the generator, at least one respective parameter that corresponds to a current conduction time proportion of at least one of the rectifier elements, and determining that an electrical fault exists if the at least one parameter deviates by more than a predetermined amount from an associated expected value. Also described is an apparatus for implementing the method.

Abstract: A state of charge indicator including an indicator with a display threshold and an indicator circuit electrically coupled to the indicator such that when a main cell voltage of a main cell is greater than a display threshold, the indicator circuit applies a driver voltage to the indicator such that the indicator is inactive and when the main cell voltage is less than the display threshold, the indicator circuit applies the driver voltage to the indicator such that the indicator is active.

Abstract: A system to identify potential faults in an electrical power distribution system includes a vibration monitor configured to detect a vibration event proximate a portion of the electrical power distribution system, a power quality monitor configured to detect a power quality event in a portion of the electrical power distribution system, an analysis system configured to correlate the vibration event detected by the vibration monitor with the power quality event detected by the power quality monitor, and an output configured to receive information regarding the power quality event from the analysis system and to provide the information to an operator.

Abstract: An apparatus and a method for indirectly cooling a superconducting quantum interference device (SQUID) are provided. The apparatus includes an outer container extending in a vertical direction; a metallic inner container inserted into the outer container to store a liquid coolant, the metal inner container including a top plate; a SQUID sensor module disposed between a bottom surface of the outer container and a bottom surface of the inner container; a heat transfer pillar adapted to cool the SQUID sensor module, the heat transfer pillar having one end connected to the bottom surface of the inner container and the other end directly or indirectly connected to the SQUID sensor module; a magnetic shield part formed of a superconductor covering a top surface of the SQUID sensor module; and a heat conduction plate being in thermal contact with the other end of the heat transfer pillar.

Abstract: A magnetic sensor assembly includes a base substrate and a material assembly. The material assembly is formed on the base substrate. The material assembly includes an assembly substrate. A magneto-optical defect center material having a plurality of magneto-optical defect centers is formed on the assembly substrate. A radio frequency (RF) excitation source is formed on the magneto-optical defect center material.