Abstract: An approach for restoring an analytical model in a data streaming application which involves creating a plurality of data buffers for holding data submitted to the data streaming application, wherein the data streaming application comprises a first analytical model, persisting one or more parameters and/or internal state variables associated with the first analytical model, persisting the plurality of data buffers, retrieving a plurality of persisted data buffers and the one or more parameters and/or internal state variables responsive to a failure of the data streaming application, creating a second analytical model associated with the data streaming application and initializing the second analytical model with the one or more parameters and/or more internal state variables, and submitting data, associated with the plurality of persisted data buffers, to the data streaming application for training the second analytical model to be a close approximation of the first analytical model.

Abstract: Techniques for error correction in a processor include detecting an error in first data stored in a register. The method also includes generating an instruction to read the first data stored in the register, where the register is both a source register and a destination register of the instruction. The method further includes transmitting the first data and error correcting code data to an execution unit, where the first data and error correcting code data bypasses an issue queue. The method also includes decoding the instruction and correcting the error to generate corrected data and writing the corrected data to the destination register.

Abstract: A storage device includes a memory that includes storage circuitry and a memory including multiple memory cells. The storage circuitry is configured to store in a group of the memory cells data that was encoded using an error correcting code (ECC) consisting of multiple component codes, to define multiple threshold settings, each specifying positions of one or more reading-thresholds, to read the data from the memory cells in the group using the threshold settings and decode the read data using the component codes, to calculate for the component codes respective component-code scores that are indicative of levels of confidence in the decoded data of the component-codes, to select, based on the component-code scores, a threshold setting that is expected to result in a best readout performance among the multiple threshold settings, and to read data from the memory using the selected threshold setting.

Abstract: Apparatuses and methods are described for selective determination of data error repair. An example apparatus includes a memory array and a controller coupled to the memory array. The controller is configured to direct performance, responsive to a request, of a read operation at an address in the memory array, direct detection of an error in data corresponding to the read operation address, and direct storage of the read operation address in an address error register. The controller is further configured to direct a response be sent to the enable selective determination of data error repair, where the response does not include the read operation address.

Abstract: A method and a controller for recovering data in event of a program failure and a storage system using the method and the controller are disclosed. The controller includes main units of a parity generator, a volatile memory module and a processor. With a parity in the volatile memory module and successfully programmed sub-data, a program failed write data can be recovered and correctly programmed. The method of the present invention has advantages of saving use of storage resources and extending lifetime of the storage system than other methods for recovering data in event of a program failure.

Abstract: The present disclosure relates to methods and systems for implementing redundancy in memory controllers. The disclosed systems and methods utilize a row of memory blocks, such that each memory block in the row is associated with an independent media unit. Failures of the media units are not correlated, and therefore, a failure in one unit does not affect the data stored in the other units. Parity information associated with the data stored in the memory blocks is stored in a separate memory block. If the data in a single memory block has been corrupted, the data stored in the remaining memory blocks and the parity information is used to retrieve the corrupted data.

Abstract: A controller sets the processing in accordance with an error that may occur in data. A controller for controlling a machine or a facility includes a storage unit, a diagnosis unit that diagnoses the presence of an error in data written in a memory space of the storage unit or data read from the memory space, and a processing unit that performs processing in accordance with a diagnosis result obtained by the diagnosis unit. The processing unit performs appropriate processing when an error is detected in data within a set range of the memory space in which the diagnosis unit is to be enabled.

Abstract: A method includes utilizing, by a first computing device, a first writing pattern to write a set of encoded data slices to a sharing group of sites. The first writing pattern includes writing a write threshold number of encoded data slices to storage units of a first site and writing a remaining number of encoded data slices to another storage unit(s) in another site(s). The method further includes sending, by storage units of the first site, encoded data slices of up to the write threshold number to other storage units in accordance with an inter-site storage unit relationship. The method further includes, when indicating in the inter-site storage unit relationship, sending, by storage unit(s) of the other site(s), encoded data slices of the remaining number of encoded data slices to other storage units in accordance with the inter-site storage unit relationship.

Abstract: A cluster receives a request to store an object using replication or erasure coding. The cluster writes the object using erasure coding. A manifest is written that includes an indication of erasure coding and a unique identifier for each segment. The cluster returns a unique identifier of the manifest. The cluster receives a request from a client that includes a unique identifier. The cluster determines whether the object has been stored using replication or erasure coding. If using erasure coding, the method reads a manifest. The method identifies segments within the cluster using unique segment identifiers of the manifest. Using these unique segment identifiers, the method reconstructs the object. A persistent storage area of another disk is scanned to find a unique identifier of a failed disk. If using erasure coding, a missing segment previously stored on the disk is identified. The method locates other segments. Missing segments are regenerated.

Abstract: Techniques for parallel data collection and recovery for a failing virtual processing system are disclosed. According to aspects of the present disclosure, an example method includes: detecting that the virtual processing system experiences an irreparable error; saving, by each of a plurality of processors of the physical processing system, a corresponding context and data stored in an allocated portion of a memory of the physical processing system to a data store; selecting one of the plurality of processors as a recovery processor; initializing, by the recovery processor, a pre-determined reserved portion of the memory; initiating, by the recovery processor, a new instance of the virtual processing system on the reserved portion of the memory while each remaining processor of the plurality of processors continues the saving; and dynamically adding each remaining processor of the plurality of processors to the new instance of the virtual processing system.

Abstract: A processing system comprising a first processing domain and a second processing domain. Each of the first processing domain and the second processing domain comprises a multi-threaded processor core arranged to output a set of internal state signals representative of current states of internal components of the respective processor core. The processing system further comprises a supervisor component arranged to receive the sets of internal state signals output by the processor cores of the first and second processing domains, compare internal state signals output by the processor core of the first processing domain to corresponding internal state signals output by the processor core of the second processing domain, and upon detection of a mismatch between compared internal state signals to initiate a reset of a thread under the execution of which the detected mismatch of internal state signals occurred.

Abstract: Example implementations relate to sequential resets of redundant subsystems. For example, in an implementation, a controller may receive a maintenance activity instruction and may perform the maintenance activity on the redundant subsystems. After performance of the redundant subsystems, the controller may sequentially reset each of the redundant subsystems. The controller may wait a random delay between sequential resets of the redundant subsystems.

Abstract: Techniques to back up a cluster shared volume (CSV) are disclosed. In various embodiments, a snapshot of the cluster shared volume is stored persistently on the cluster shared volume itself. A task to back up a corresponding assigned portion of the snapshot is assigned to each of one or more cluster servers available to participate in backing up the cluster shared volume. The cluster servers have shared access to the snapshot as stored on the cluster shared volume, and each is configured to perform the task assigned to it in parallel with any other cluster servers assigned to back up other portions of the same cluster shared volume snapshot. The respective assigned tasks are monitored to completion.

Abstract: The present disclosure relates to a mobile terminal for performing a data backup function with an external device, and a controlling method therefore. The controlling method for the mobile terminal for performing a data backup function with an external device comprises the steps of: receiving authentication information of the external device when the external device is connected with an interface unit; identifying, using the received authentication information, whether the external device is a pre-registered device for performing the data backup function; and if the external device is the pre-registered device as a result of the identifying, transmitting at least a part of data stored in a memory to the external device.

Abstract: Local distributed backup techniques are described, where each client device calculates a manifest of its files and sends the manifest to a central server. The server performs deduplication based on the received manifest to determine which files are missing and need to be backed up, and notifies the client of those files. At this point, instead of uploading the missing files to the central server, the files are instead uploaded to another peer client device that has sufficient disk space and resides in the network vicinity of the original client device. The upload may be done to multiple peers for redundancy. Upon backup completion, the client state may be left as-is, in which case the client periodically uploads incremental updates to keep any changes synchronized with the backup peer. Alternatively, the client can be centralized to the central server, but at a later time when more resources are available.

Abstract: Systems and methods for limiting performance variation in a storage device are described. Storage devices receive work requests to perform one or more operations from other computing devices, such as a host computing device. Completing the work requests may take a response time. In some embodiments, if the response time of executing the work request exceeds a threshold, the storage device may assign additional computing resources to complete the work request.

Abstract: Operation of a multi-slice processor that includes a plurality of execution slices and a plurality of load/store slices, where the load/store slices are coupled to the execution slices via a results bus. Operation of such a multi-slice processor includes: capturing first state information corresponding to a first set of control signals; monitoring state information of a plurality of logical components of the multi-slice processor; selecting, in dependence upon one or more selection criteria and upon the monitored state information, a second set of control signals; and capturing second state information corresponding to the second set of control signals, wherein the first set of control signals is different than the second set of control signals.

Abstract: Data in a database cache in memory of an operating database server is copied to memory of a standby database server, without requiring synchronization between the operating server and the standby server. If the operating server fails, the database is recovered to a consistent state in the standby server using a sequential database log and the copied data in the cache of the standby server. Preferably, recovery is performed by reading the log to determine a set of database actions to recover, verifying blocks of data in the standby server's cache, using verified blocks to recover at least some actions, and reading blocks from storage only when a corresponding verified block is not available in the cache.

Abstract: Provided are techniques for transaction consistency query support for replicated data from recovery log to external data stores. An external data store is populated with records using entries of a change data table. The change data table has entries for each transaction that has committed and is to be replicated, and each of the entries stores information for each log entry in a recovery log from a database management system. Each log entry identifies a transactional change of data and a transaction completion indicator of one of commit and abort. In response to receiving a query about a transaction of the transactions, a set of records are retrieved from the external data store for the transaction. From the set of records, records whose sequence identifier values are larger than a maximum transaction commit sequence identifier are removed. From the set of records, remaining records having transaction consistency are returned.

Abstract: One or more techniques and/or systems are provided for identifying configuration inconsistencies between storage virtual machines across storage clusters. For example, a first storage cluster and a second storage cluster may be configured according to a disaster recovery relationship where user data and configuration data of the first storage cluster are replicated to the second storage cluster so that the second storage cluster can takeover for the first storage cluster in the event a disaster occurs at the first storage cluster. Because replication of configuration data (e.g., a name and size of a volume, a backup policy, etc.) may fail for various reasons, configuration of the first storage cluster is compared to configuration of the second storage cluster to identify a configuration difference (e.g., a new size of the volume at the first storage cluster may have failed to be replicated to a replicated volume at the second storage cluster).

Abstract: Various systems, methods, and apparatuses for operating a wireless charging device in an electric vehicle are disclosed. One method includes detecting a system fault indicative of one or more faults in the wireless charging device in the electric vehicle or in the transmitter. The method further includes determining a fault severity level from a plurality of fault severity levels based on a type of the system fault detected. A total number of types of system faults can be greater than a total number of the plurality of fault severity levels. The method further includes performing one or more system fault response operation based on the determined fault severity level. Each of the plurality of fault severity levels can be associated with a different set of system fault response operations.

Abstract: A computer program product is provided for extending network services addresses, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, where the program instructions are executable by a processor to cause the processor to identify, by the processor, a network event affecting a node of a network, wherein the node provides external access to the network using an Internet Protocol (IP) address, in response to identifying the network event, identify, by the processor, an attribute associated with the IP address, and based on the attribute associated with the IP address, determine, by the processor, whether to move the IP address to another node of the network.

Abstract: A high availability (HA) failover manager maintains data availability of one or more input/output (I/O) resources in a cluster by ensuring that each I/O resource is available (e.g., mounted) on a hosting node of the cluster and that each I/O resource may be available on one or more partner nodes of the cluster if a node (i.e., a local node) were to fail. The HA failover manager (HA manager) processes inputs from various sources of the cluster to determine whether failover is enabled for a local node and each partner node in an HA group, and for triggering failover of the I/O resources to the partner node as necessary. For each I/O resource, the HA manager may track state information including (i) a state of the I/O resource (e.g., mounted or un-mounted); (ii) the partner node(s) ability to service the I/O resource; and (iii) whether a non-volatile log recording I/O requests is synchronized to the partner node(s).

Abstract: Dynamically forming a failure domain in a storage system that includes a plurality of blades, each blade mounted within one of a plurality of chassis, including: identifying, in dependence upon a failure domain formation policy, an available configuration for a failure domain that includes a first blade mounted within a first chassis and a second blade mounted within a second chassis, wherein each chassis is configured to support multiple types of blades; and creating the failure domain in accordance with the available configuration.

Abstract: A method for optimizing recovery in a data replication environment is disclosed. In one embodiment, such a method includes directing I/O from a primary site to a secondary site in response to a failure at the primary site. After the primary site has recovered from the failure, the method initiates a recovery process wherein updated data elements at the secondary site are copied to the primary site. The method determines a recorded average I/O latency for a host system driving I/O to the secondary site, and calculates an expected average I/O latency for the host system driving I/O to the primary site. The method redirects I/O from the secondary site to the primary site when a difference between the expected average I/O latency and the recorded average I/O latency reaches a threshold value. A corresponding system and computer program product are also disclosed.

Abstract: The present disclosure relates to a universal serial bus device and a method thereof. The universal serial bus device comprises a set of standard metal contacts, at least two functional metal contacts, a processing unit and a substrate. The set of standard metal contacts is electrically connected to a terminal device for planning operations of the universal serial bus device when two functional metal contacts are electrically conducted to each other; the universal serial bus device comprises an extra storage unit in which some engineering functions to delete, backup or restore data can be planned.

Abstract: An example system for a performance gains predictor includes a counter engine to determine a number of events during an application session of a computing system utilizing a first processor, a metrics engine to calculate a number of metrics for the first processor based on the number of events, a factor engine to determine a number of factors of the first processor that can affect the number of metrics based on an evaluation of the computing system, and a performance engine to predict a performance change of the computing system utilizing a second processor based on the number of factors.

Abstract: This disclosure provides a computer-implemented method for debugging a program including a SQL statement. The method comprises indicating one or more first positions of source code of the program. Each of the one or more first positions corresponds to a fragment of the SQL statement at which a breakpoint can be set. The method further comprises receiving an input of setting breakpoint at one of the one or more first positions. The method further comprises presenting an execution context generated in response to execution of the program reaching a breakpoint set based on the input.

Abstract: This disclosure provides a computer-implemented method for debugging a program including a SQL statement. The method comprises indicating one or more first positions of source code of the program. Each of the one or more first positions corresponds to a fragment of the SQL statement at which a breakpoint can be set. The method further comprises receiving an input of setting breakpoint at one of the one or more first positions. The method further comprises presenting an execution context generated in response to execution of the program reaching a breakpoint set based on the input.

Abstract: Methods, apparatus, and systems for traversing a representation of an application source code, such as an abstract syntax tree (AST), are disclosed. Steps for traversing the AST include specifying a plurality of runtime binding rules which are associated with one or more locations within the AST, beginning to traverse the AST, monitoring a history of the traverse, continuing to traverse the AST based on the history of the traverse, and updating the history of the traverse. Continuing to traverse the AST may include identifying a plurality of concrete implementations of a method invocation and traversing less than all of the concrete implementations based at least in part on the runtime binding rules, the concrete implementations being traversed being selected based on the history of the traverse.

Abstract: A computer system, method, and computer readable product are provided for identifying and isolating library code that has been obfuscated in software applications. A call graph is created for the execution of at least one module of preexisting library code within a bundle of software modules through either static analysis of the software code or dynamic analysis of the executing code, and then one or more anchor points are devised based upon the call graph that are indicative of the preexisting library code. Then a bundle of software modules can be analyzed or its execution monitored to determine if a discrete module of library code is present in the executing bundle based upon the modules' interaction with the one or more anchor points, and the discrete module of library code in the executing bundle can be identified as a module of preexisting library code.

Abstract: An example system configured to perform regression tracking and triaging includes a processor and memory coupled with the processor. The memory is configured to provide the processor with instructions to schedule the testing of a first list of equidistant revisions associated with a software application. The memory is configured to provide the processor with instructions to schedule the testing of a second list of equidistant revisions associated with the software application. The memory is further configured to provide the processor with instructions to, for a first revision selected from the first list of equidistant revisions and a second revision selected from the second list of equidistant revisions, upon a determination that an equidistance between the first revision and the second revision is below a predetermined threshold, test the second revision using a first build generated based on the first revision, wherein the first build is executable by the processor.

Abstract: Example implementations relate to automatically rerunning test executions. Some implementations may capture data during executions of a test. The data may include test status data, test rerun data, test owner data, and/or code committer data. Some implementations may also dynamically determine, for a failed execution of the test, a number of reruns to execute based on the captured data. Additionally, some implementations may cause in response to the dynamic determination, automatic rerun executions of the test until one of the rerun executions passes, the rerun executions being performed up to the number of times.

Abstract: Disclosed are system and method for controlling execution of a program. An example method includes determining a memory sector for storing at least a portion of execution instructions of the computer program in virtual memory address space; determining, in the virtual memory address space, one or more pages that contain code instructions and data associated with the memory sector; creating a duplicate of the virtual memory address space comprising the memory sector and the one or more pages; tagging the memory sector and the one or more pages in both the virtual memory address space and its duplicate; receiving a notification to transfer execution of the computer program between different memory sectors while executing instructions stored in either the virtual memory address space or its duplicate; and transferring execution of the computer program to a memory location other than the one in which the notification was received.

Abstract: An allocation request for requesting allocation of a target virtual area with respect to target data issued to a system program includes a target ID corresponding to the target data. In response to the allocation request, whether or not the target ID is included in data map information is determined. When it is included in the data map information, the system program determines whether or not a target physical area is included in a storage apparatus. When the target physical area is included in the storage apparatus, the system program reserves a free area in a non-volatile memory as a target memory area, copies target data stored in the storage apparatus to the target memory area, changes the target physical area in the data map information to the target memory area, and writes an association between the target virtual area and the target memory area into the volatile memory.

Abstract: To determine whether or not to data is compressed at a timing when a non-volatile memory device receives the data from a host apparatus. A storage controller transmits a specified logical address range, an update frequency level of the specified logical address range, and specified data to a device controller. On the basis of the update frequency level of the specified logical address range, the device controller determines whether the specified data is compressed or not. When determination is made that the specified data is compressed, the device controller compresses the specified data to generate compressed data, and writes the compressed data into a non-volatile memory. When determination is made that the specified data is not compressed, the device controller writes the specified data into the non-volatile memory.

Abstract: A method for garbage collection in a NAND flash memory system is disclosed. The method includes the steps of receiving a data request task in the NAND flash memory system; executing the data request task in the NAND flash memory system; based on the condition where the number of free data pages in the NAND flash memory system is below the first pre-determined threshold, determining whether a data block partial garbage collection list is empty; based on the condition where the data block partial garbage collection list is empty, selecting a victim block in the NAND flash memory system; and creating a plurality of data block partial garbage collection tasks.

Abstract: A method includes obtaining an average number of valid pages per block of the solid state storage device, obtaining an average number of invalid pages per block of the solid state storage device, determining a scaling factor as a function of the a number of free blocks in the solid state storage device, a steady state target number of free blocks, a high target number of free blocks, and a low target number of free blocks, and applying the scaling factor to the average number of invalid pages to control a ratio of host writes versus garbage collection writes to the solid state storage device.

Abstract: Techniques are described for accessing data from a storage device. In one example, the storage device may include a storage medium comprising non-volatile memory, a network connection, and one or more processing entities. The one or more processors may be configured to receive a request from the network connection at the non-volatile memory storage device for accessing data associated with a file system object, the request comprising a virtual address offset, a file object identifier and a size of the data access, perform, at a flash translation layer of a storage device software stack executing on the one or more processing entities of the storage device, a translation from the virtual address offset to a physical address for the data stored on the non-volatile memory, using the virtual address offset and the file object identifier, and access the data from the physical address from the storage medium.

Abstract: According to an example, persistent memory garbage collection may include determining whether termination of a program is based on a specified termination of the program during execution of the program or an unspecified termination of the program during the execution of the program. In response to a determination that the termination of the program is based on the specified termination of the program during the execution of the program, persistent metadata stored in a persistent memory may be used to restart the program. In response to a determination that the termination of the program is based on the unspecified termination of the program during the execution of the program, the persistent metadata stored in the persistent memory may be used to collect garbage from the persistent memory and to restart the program.

Abstract: The embodiments relate to a method for managing a garbage collection process. The method includes executing a garbage collection process on a memory block of user address space. A load instruction is run. Running the load instruction includes loading content of a storage location into a processor. The loaded content corresponds to a memory address. It is determined if the garbage collection process is being executed at the memory address. The load instruction is diverted to a process to move an object at the memory address to a location outside of the memory block in response to determining that the garbage collection process is being executed at the first memory address. The load instruction is continued in response to determining that the garbage collection process is not being executed at the memory address.

Abstract: According to one embodiment, a host device is provided. The host device includes a processor that stores a log of a file in plurality of storages using a log -structured file system. The processor selects in which of the plural storages to store a log which is determined to be live in garbage collection which is a process of determining whether the log is live.

Abstract: In one embodiment, storage drive dependent track removal processing logic performs destage tasks for tracks cached in a cache as a function of whether the storage drive is classified as a fast class or as slow class of storage drives, for example. In one embodiment, a destage task configured for a slow class storage drive, transfers an entry for a track selected for destaging from a main cache list to a wait cache list to await destaging to the slow class drive. A destage task configured for a fast class storage drive allows the cache list entry for the selected track to remain on the main cache list while the selected track is being destaged to the fast class storage drive, thereby bypassing the transfer of the entry to a wait cache list. Other features and aspects may be realized, depending upon the particular application.

Abstract: Embodiments of the present disclosure support implementation of a Level-1 (L1) cache in a microprocessor based on independently accessed data and tag arrays. Presented implementations of L1 cache do not require any stall pipeline mechanism for stalling execution of instructions, leading to improved microprocessor performance. A data array in the cache is interfaced with one or more data index queues that comprise, upon occurrence of a conflict between at least one instruction requesting access to the data array and at least one other instruction that accessed the data array, at least one data index for accessing the data array associated with the at least one instruction. A tag array in the cache is interfaced with a tag queue that stores one or more tag entries associated with one or more data outputs read from the data array based on accessing the data array.

Abstract: Provided are a computer program product, system, and method for invoking Input/Output (I/O) threads and demote threads on processors to demote tracks from a cache. An Input/Output (I/O) thread, executed by a processor, processes I/O requests directed to tracks from the storage stored in the cache. A demote thread, executed by the processor, processes a demote ready list, indicating tracks eligible to demote from cache, to select tracks to demote from the cache to free cache segments in the cache. After processing a number of I/O requests, the I/O thread processes the demote ready list to demote tracks from the cache in response to determining that a number of free cache segments in the cache is below a free cache segment threshold.

Abstract: The embodiment of the disclosure discloses a data processing method and device in a cache coherence directory architecture. The method includes that allocating a tag entry in a tag array for a data block; allocating a data entry in a data array for the data block when the data block is actively shared; and de-allocating the data entry when the data block is temporarily private or gets evicted in the data array. Therefore the embodiments of the disclosure allocate data entry only when a data block is actively shared and will not allocate data entry for data block which is not actively shared, therefore smaller directory size can be achieved.

Abstract: A dual-server based storage system maintains a first cache and a first non-volatile storage (NVS) in a first server, and a second cache and a second NVS in a second server, where data in the first cache is also written in the second NVS and data in the second cache is also written in the first NVS. In response to a failure of the first server, a determination is made as to whether space exists in the second NVS to accommodate the data stored in the second cache. In response to determining that space exists in the second NVS to accommodate the data stored in the second cache, the data is transferred from the second cache to the second NVS.

Abstract: A system, according to one embodiment, includes: non-volatile memory; a non-volatile memory controller having a cache; and logic integrated with and/or executable by the non-volatile memory controller, the logic being configured to: retrieve a physical block address corresponding to a logic block address; extract information from the physical block address; perform a lookup operation in cache using the extracted information; perform a range check of the physical block address in response to the lookup operation succeeding; and read data from the cache in response to the range check succeeding. An architecture of the cache supports separation of data streams, in addition to supporting parallel writes to different non-volatile memory channels. The cache architecture also supports pipelining of the parallel writes to different non-volatile memory planes. The non-volatile memory controller is also configured to perform a direct memory lookup in the cache based on a physical block address.

Abstract: It is determined that a cache operation relating to the transfer of data between a cache memory and a data storage system is required. A state of a utilization model is received, the utilization model including requirements for utilization of resources of the data storage system over a time period, and the state indicating a cost of resource utilization associated with cache operations in the current time period. It is determined whether to perform the cache operation, based on the utilization requirements and the state of a utilization model. If the cache operation is not to be performed, and if the cache operation is a write operation, it is determined whether the cache memory is full. If so, the cache operation is managed according to an emergency cache management process; if not, the data associated with the cache operation is maintained in the cache memory.

Abstract: Sleep modes use non-volatile dual inline memory modules (NVDIMMs) to reduce electrical power and execution times. An S3 suspend-to-RAM, for example, may store a system state to NVDIMM via a high-speed memory bus. Likewise, an S4 suspend-to-disk may store a restoration file to the NVDIMM via the high-speed memory bus. When a server or other information handling system is then awakened, execution resumes in less time due to the NVDIMM.