Patents Issued in February 8, 2018
  • Publication number: 20180040447
    Abstract: An accumulator control system for one or more electrical breaker poles comprises: an accumulator mechanism presenting a control handle movable at least between breaking and closing positions; a first link connected to the outer carriage and pivoting about a first pivot point between first and second positions, by actuating the control handle of the accumulator mechanism between the breaking and closing positions; a second link pivotable about a pivot axis and connected to the first link by a sliding connection so that the movement of the first link, between the second and first positions, causes the second link to pivot about the pivot axis between a position for closing one or more breaker poles, and a position for opening one or more breaker poles. The control system further comprises means for exerting additional pivoting force on the second link when the control handle is actuated beyond the breaking position.
    Type: Application
    Filed: March 3, 2016
    Publication date: February 8, 2018
    Inventors: Yassine BOUAZZA, Roger DUMONT, Damien ROGOSINSKI
  • Publication number: 20180040448
    Abstract: A fuse positioning fixture includes a fuse positioning template and a fuse loading block. The fuse positioning template includes a number of fuse positioning openings. Each one of the fuse positioning openings extends through the fuse positioning template and corresponds with a fuse holder in a fuse relay center. The fuse positioning template includes solid portions adjacent each one of the fuse positioning openings which provide a fuse blocking portion. The fuse loading block includes a number of fuse loading openings and is configured to slidably engage with a top surface of the fuse positioning template such that in a first position of the fuse loading block fuses placed in the fuse loading openings are held in place by the fuse blocking portion. In a second position of the fuse loading block, the fuse loading openings align with the fuse positioning openings.
    Type: Application
    Filed: February 27, 2015
    Publication date: February 8, 2018
    Applicant: VOLVO TRUCK CORPORATION
    Inventors: Steven Abraham THACKER, Paul Edward KINSER, Jr., Sheldon Keith OUSLEY
  • Publication number: 20180040449
    Abstract: A horizontal multilayer junction-edge field emitter includes a plurality of vertically-stacked multilayer structures separated by isolation layers. Each multilayer structure is configured to produce a 2-dimensional electron gas at a junction between two layers within the structure. The emitter also includes an exposed surface intersecting the 2-dimensional electron gas of each of the plurality of vertically-stacked multilayer structures to form a plurality of effectively one-dimensional horizontal line sources of electron emission.
    Type: Application
    Filed: October 13, 2017
    Publication date: February 8, 2018
    Applicant: Elwha LLC
    Inventors: Roderick A. Hyde, Jordin T. Kare, Tony S. Pan, Lowell L. Wood,, JR.
  • Publication number: 20180040450
    Abstract: The invention relates to a novel ion source, which uses method for the production of highly charged ions in the local ion traps created by an axially symmetric electron beam in the thick magnetic lens. The highly charged ions are produced in the separate local ion traps, which are created as a sequence of the focuses (F1, F2, and F3) of the electron beam (EB) rippled in the magnetic field (B(z)). Since the most acute focus is called the main one, the ion source is classified as main magnetic focus ion source (MaMFIS/T), which can also operate in the trapping regime. The electron current density in the local ion traps can be much greater than that in the case of Brillouin flow. For the ion trap with length of about 1 mm, the average electron current density of up to the order of 100 kA/cm2 can be achieved. Thus it allows one to produce ions in any charge state for all elements of the Periodic Table.
    Type: Application
    Filed: March 10, 2016
    Publication date: February 8, 2018
    Inventors: Vladimir Petrovich Ovsyannikov, Andrei Vladimirovich Nefiodov, Oleg Kostantinovich Kultashev
  • Publication number: 20180040451
    Abstract: The present application discloses an array substrate comprising a first substrate, a first electrode on the first substrate, a passivation layer on a side of the first electrode distal to the first substrate, the passivation layer comprising a plurality of first vias, each of which corresponds to a different part of the first electrode, an electron emission source layer on a side of the first electrode distal to the first substrate comprising at least one electron emission source in each of the plurality of first vias, and a dielectric layer on a side of the first electrode distal to the first substrate comprising a plurality of dielectric blocks corresponding to the plurality of first vias, at least a portion of each of the plurality of dielectric blocks in each of the plurality of first vias. The at least one electron emission source comprises a first portion having a first end and a second portion having a second end.
    Type: Application
    Filed: October 17, 2017
    Publication date: February 8, 2018
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhiying Bao, Xiaochuan Chen, Wenbo Jiang, Shijun Wang, Lei Wang, Yue Li, Yanna Xue, Zhenhua Lv, Wenjun Xiao, Yong Zhang
  • Publication number: 20180040452
    Abstract: An electron beam inspection device includes: a primary electron optical system that irradiates the surface of a sample with an electron beam; and a secondary electron optical system that gathers secondary electrons emitted from the sample and forms an image on the sensor surface of a detector. An electron image of the surface of the sample is obtained from a signal detected by the detector, and the sample is inspected. A cylindrical member that is formed with conductors stacked as an inner layer and an outer layer, and an insulator stacked as an intermediate layer is provided inside a lens tube into which the secondary electron optical system is incorporated. An electron orbital path is formed inside the cylindrical member, and the members constituting the secondary electron optical system are arranged outside the cylindrical member.
    Type: Application
    Filed: August 2, 2017
    Publication date: February 8, 2018
    Inventors: Masahiro HATAKEYAMA, Ryo TAJIMA, Kenichi SUEMATSU, Kenji WATANABE, Yasushi TOMA, Kenji TERAO, Takeshi MURAKAMI
  • Publication number: 20180040453
    Abstract: In one embodiment, a multi charged particle beam writing apparatus includes an emitter that emits a charged particle beam, an aperture plate in which a plurality of openings are formed and that forms multiple beams by allowing the charged particle beam to pass through the plurality of openings, a blanking plate provided with a plurality of blankers that each perform blanking deflection on a corresponding beam included in the multiple beams, a stage on which a substrate irradiated with the multiple beams, a detector that detects a reflection charged particle from the substrate, feature amount calculation circuitry that calculates a feature amount of an aperture image based on a detection value of the detector, and aberration correction circuitry that corrects aberration of the charged particle beam based on the feature amount.
    Type: Application
    Filed: August 1, 2017
    Publication date: February 8, 2018
    Applicant: NuFlare Technology, Inc.
    Inventors: Tsubasa NANAO, Yukitaka Shimizu
  • Publication number: 20180040454
    Abstract: A method for operating a multi-beam particle optical unit comprises includes providing a first setting of effects of particle-optical components, wherein a particle-optical imaging is characterizable by at least two parameters. The method also includes determining a matrix A, and determining a matrix S. The method further includes defining values of parameters which characterize a desired imaging, and providing a second setting of the effects of the components in such a way that the particle-optical imaging is characterizable by the parameters having the defined values.
    Type: Application
    Filed: October 19, 2017
    Publication date: February 8, 2018
    Inventors: Ingo Mueller, Nicole Rauwolf, Christof Riedesel, Thomas Kemen, Joerg Jacobi, Arne Thoma, Markus Doering, Dirk Zeidler, Juergen Kynast, Gerd Benner
  • Publication number: 20180040455
    Abstract: In one embodiment, an aperture for inspecting a multi-beam allows passage of one beam among multi-beams applied in a multi-beam writing apparatus. The aperture includes a scattering layer that is provided with a through-hole through which the one beam passes, and by which the other beams are scattered, and an absorbing layer that is provided with an opening having a diameter greater than the diameter of the through-hole and that absorbs at least some of the beams entering it.
    Type: Application
    Filed: August 1, 2017
    Publication date: February 8, 2018
    Applicant: NuFlare Technology, Inc.
    Inventors: Hiroshi Yamashita, Munehiro Ogasawara
  • Publication number: 20180040456
    Abstract: In one embodiment, a method for measuring a resolution of a charged particle beam includes changing a focus position of the charged particle beam in a height direction, and scanning a dot mark formed on a substrate with the charged particle beam for each focus position, detecting a reflected charged particle reflected from the dot mark for each focus position, calculating a scattered charged particle distribution from a detection result of the reflected charged particle for each height corresponding to the focus position, performing a convolution operation on an approximate expression of a beam waveform of the charged particle beam and a mark shape of the dot mark, the approximate expression including an aperture angle and a resolution of the charged particle beam as parameters, and calculating the aperture angle and the resolution by fitting the scattered charged particle distribution by height and a calculation result of the convolution operation.
    Type: Application
    Filed: July 28, 2017
    Publication date: February 8, 2018
    Applicant: NuFlare Technology, Inc.
    Inventor: Yukitaka SHIMIZU
  • Publication number: 20180040457
    Abstract: Implementations of the disclosure provide a surface treatment process for chamber components. In one implementation, the chamber component includes a crystalline body comprising machined surfaces including at least a reflowed surface layer formed in a plasma treatment chamber by placing the body on a pedestal disposed within the plasma chamber, maintaining a pressure in the plasma chamber at 0.1-100 mTorr, flowing a gas into the plasma chamber at a flow rate of 10-500 sccm, applying an RF power to an inductive coil of the plasma chamber to form a plasma from the gas in the plasma chamber, the RF power of 300 Watts is applied at a frequency of 10 kHz to 160 MHz, and applying an RF bias power of 100 Watts at a frequency of 10 kHz to 160 MHz to the pedestal to bombard the body with ions from the plasma for 10-100 hours.
    Type: Application
    Filed: August 8, 2017
    Publication date: February 8, 2018
    Applicant: Applied Materials, Inc.
    Inventor: Banqiu WU
  • Publication number: 20180040458
    Abstract: Substrate treating systems are disclosed. The system may include a chamber with a processing space, a supporting unit provided in the processing space to support a substrate, a gas supplying unit provided in the processing space to supply gas into the processing space, a plasma source unit generating plasma from the gas, and a liner unit disposed to enclose the supporting unit. The supporting unit may include a supporting plate supporting a substrate. The liner unit may include an inner liner enclosing the supporting plate and an actuator vertically moving the inner liner.
    Type: Application
    Filed: October 19, 2017
    Publication date: February 8, 2018
    Applicant: Semes Co., Ltd
    Inventors: Hyungchul MOON, Hyung Joon KIM
  • Publication number: 20180040459
    Abstract: Disclosed herein is a plasma processing apparatus including: a processing chamber in which a sample is to be processed using plasma; a radio-frequency power source that supplies radio-frequency power for producing the plasma; and a sample stage on which the sample is to be mounted, the plasma processing apparatus further including a control unit that performs control so that plasma is produced after applying a DC voltage for electrostatically attracting the sample to the sample stage to each of two electrodes placed on the sample stage, and a heat-transfer gas for adjusting a temperature of the sample is supplied to a back surface of the sample after production of the plasma.
    Type: Application
    Filed: February 6, 2017
    Publication date: February 8, 2018
    Inventors: Taku IWASE, Masahito MORI, Takao ARASE, Kenetsu YOKOGAWA
  • Publication number: 20180040460
    Abstract: Method and systems for operating a plasma processing chamber are provided. One example method includes processing a substrate in the plasma processing chamber under vacuum. The processing of said substrate producing particulate residues that adhere to surfaces within an internal region of the plasma processing chamber. The method includes characterizing performance of the processing of the substrate and inspecting an internal region of the plasma processing chamber after processing said substrate without breaking said vacuum. The inspecting is configured to identify characteristics of said particulate residues on one or more surfaces of the internal region of the plasma processing chamber. The inspecting includes capturing optical data of said one or more surfaces. The method further includes generating a tool model to correlate the characterized performance of the processing of the substrate to the characterized particulate residues.
    Type: Application
    Filed: July 21, 2017
    Publication date: February 8, 2018
    Inventor: Richard Alan Gottscho
  • Publication number: 20180040461
    Abstract: Systems, methods, and apparatus are disclosed for reducing crazing in thin film stacks deposited on large area substrates such as glass, for instance architectural glass. Crazing can occur once a conductor-insulator-conductor series of films have been deposited, thereby effectively forming a capacitor, and where the substrate spans multiple deposition chambers such the coupling between chambers can cause the effective capacitor voltage to breakdown the insulator layer between the two conductor layers. The resulting crazing can be reduced if not eliminated through the grounding of outputs of an AC power supply that assists in deposition of one of the conductor layers. The grounding is via rectified channels, such as diodes, or series of diodes such that the outputs of the AC power supply are precluded from falling below ground potential.
    Type: Application
    Filed: August 2, 2016
    Publication date: February 8, 2018
    Inventors: Joshua Brian Pankratz, Douglas R. Pelleymounter, Uwe Krause
  • Publication number: 20180040462
    Abstract: A refractory metal plate is provided. The plate has a center, a thickness, an edge, a top surface and a bottom surface, and has a crystallographic texture (as characterized by through thickness gradient, banding severity; and variation across the plate, for each of the texture components 100//ND and 111//ND, which is substantially uniform throughout the plate.
    Type: Application
    Filed: August 22, 2017
    Publication date: February 8, 2018
    Inventors: Peter R. Jepson, Dincer Bozkaya
  • Publication number: 20180040463
    Abstract: A method of identifying precursor ion species from their fragments comprises obtaining mass spectra of a plurality of precursor ion species and their fragments to high mass accuracy. The fragment mass spectrum, obtained from fragmentation of multiple precursor ion species, is then scanned it identify pairs of fragments whose combined mass matches the mass of one of the precursor ion species. Once pairs of fragment ion shave been matched to precursor ions, the composite fragment ion spectrum is broken down into portions, one per fragment pair. Analysis continues until no further pairs are identified. A simplified fragment ion spectrum is then reconstructed for each precursor sample ion by stitching together the broken down sections of the composite fragment spectrum. The resultant reconstructed, simplified fragment spectra are sent to a search engine which returns a score—sorted list of likely candidates for each synthetic fragment ion spectrum.
    Type: Application
    Filed: September 29, 2017
    Publication date: February 8, 2018
    Inventors: Mikhail M. SAVITSKI, Roman ZUBAREV
  • Publication number: 20180040464
    Abstract: The invention generally relates to systems and methods for relay ionization of a sample. In certain aspects, the invention provides systems that include an ion source that generates ions, a sample emitter configured to hold a sample, and a mass spectrometer. The system is configured such that the ions generated by the ion source are directed to interact with the sample emitter, thereby causing the sample to be discharged from the sample emitter and into the mass spectrometer.
    Type: Application
    Filed: March 9, 2016
    Publication date: February 8, 2018
    Inventors: Robert Graham Cooks, Anyin Li, Adam Hollerbach
  • Publication number: 20180040465
    Abstract: An ion mirror (10) for use in a time of flight mass spectrometer (100) comprises a first conductor (20) for producing a quadratic field along a first axis (80), and a second conductor (30) for producing a quadratic field along a second axis (90), the axes (80, 90) being orthogonal.
    Type: Application
    Filed: January 29, 2016
    Publication date: February 8, 2018
    Applicant: Aukland UniServices Ltd.
    Inventors: Peter Derrick, Igor FILIPPOV
  • Publication number: 20180040466
    Abstract: The present invention provides methods and systems for a modular ion generator device that includes a bottom portion, two opposed side portions, a front end, a back end, and a top portion. A cavity is formed within the two opposed side portions, front end, back end, and top portion. At least one electrode is positioned within the cavity, and an engagement device is engaged to the front end and/or an engagement device engaged to the back end for allowing one or more modular ion generator devices to be selectively secured to one another.
    Type: Application
    Filed: August 7, 2017
    Publication date: February 8, 2018
    Applicant: Global Plasma Solutions, LLC
    Inventor: Charles Houston WADDELL
  • Publication number: 20180040467
    Abstract: An apparatus for monitoring a surgical procedure includes a MALDI-TOF mass spectrometer comprising a load lock, an ionization chamber, and an ion detector. A first video camera produces an optical image of an operating field of the surgical procedure. A sample extracting device extracts the tissue sample at the location within the optical image of the operating field. A sample preparation system prepares MALID-TOF samples by depositing an extract of the extracted tissue sample on a sample plate together with a MALDI matrix. A sample plate loading mechanism loads the sample plate into the MALDI-TOF mass spectrometer. A second video camera produces an optical image of the sample plate and records a location of the extracted tissue sample.
    Type: Application
    Filed: July 28, 2017
    Publication date: February 8, 2018
    Applicant: Virgin Instruments Corporation
    Inventor: Marvin L. Vestal
  • Publication number: 20180040468
    Abstract: The present disclosure relates to a processing liquid supplying unit configured to supply a processing liquid that contains a removing agent of an adhered substance and a solvent having a boiling point lower than a boiling point of the removing agent to a substrate, a substrate heating unit configured to subsequently heat the substrate at a predetermined temperature that is equal to or higher than the boiling point of the solvent in the processing liquid and is lower than the boiling point of the removing agent, and a rinsing liquid supplying unit configured to subsequently supply a rinsing liquid to the substrate so as to remove the adhered substance from the substrate.
    Type: Application
    Filed: July 27, 2017
    Publication date: February 8, 2018
    Inventors: Takayuki Toshima, Shoichi Terada, Junji Nakamura
  • Publication number: 20180040469
    Abstract: A semiconductor wafer has a base material. The semiconductor wafer may have an edge support ring. A grinding phase of a surface of the semiconductor wafer removes a portion of the base material. The grinder is removed from or lifted off the surface of the semiconductor wafer during a separation phase. The surface of the semiconductor wafer and under the grinder is rinsed during the grinding phase and separation phase to remove particles. A rinsing solution is dispensed from a rinsing solution source to rinse the surface of the semiconductor wafer. The rinsing solution source can move in position while dispensing the rinsing solution to rinse the surface of the semiconductor wafer. The grinding phase and separation phase are repeated during the entire grinding operation, when grinding conductive TSVs, or during the final grinding stages, until the final thickness of the semiconductor wafer is achieved.
    Type: Application
    Filed: August 2, 2016
    Publication date: February 8, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Michael J. SEDDON
  • Publication number: 20180040470
    Abstract: Methods for the formation of SiCN, SiCO and SiCON films comprising cyclical exposure of a substrate surface to a silicon-containing gas, a carbon-containing gas and a plasma. Some embodiments further comprise the addition of an oxidizing agent prior to at least the plasma exposure.
    Type: Application
    Filed: October 20, 2017
    Publication date: February 8, 2018
    Inventors: Ning Li, Mark Saly, David Thompson, Mihaela Balseanu, Li-Qun Xia
  • Publication number: 20180040471
    Abstract: A liquid processing method can remove pure water existing within a pattern of a substrate and replace the pure water with a solvent rapidly. The liquid processing method of supplying the pure water onto the substrate, which is horizontally held and has the pattern formed on a surface thereof, and drying the substrate includes a pure water supplying process of supplying the pure water onto the surface of the substrate; a heated solvent supplying process of supplying, after the pure water supplying process, the solvent in a liquid state, which is heated to a temperature equal to or higher than a boiling point of water, onto the surface of the substrate on which the pure water exists; and a removing process of drying the substrate by removing the solvent form the surface of the substrate.
    Type: Application
    Filed: August 4, 2017
    Publication date: February 8, 2018
    Inventors: Mitsunori Nakamori, Yosuke Kawabuchi, Takuro Masuzumi, Koji Yamashita, Shozou Maeda
  • Publication number: 20180040472
    Abstract: Described herein is a method for growing indium nitride (InN) materials by growing hexagonal and/or cubic InN using a pulsed growth method at a temperature lower than 300° C. Also described is a material comprising InN in a face-centered cubic lattice crystalline structure having an NaCl type phase.
    Type: Application
    Filed: September 7, 2017
    Publication date: February 8, 2018
    Inventors: Neeraj Nepal, Charles R. Eddy, JR., Nadeemullah A. Mahadik, Syed B. Qadri, Michael J. Mehl
  • Publication number: 20180040473
    Abstract: A method and apparatus for forming a flowable film are described. The method includes providing an oxygen free precursor gas mixture to a processing chamber containing a substrate. The oxygen free precursor gas is activated by exposure to UV radiation in the processing chamber. Molecular fragments resulting from the UV activation are encouraged to deposit on the substrate to form a flowable film on the substrate. The substrate may be cooled to encourage deposition. The film may be hardened by heating and/or by further exposure to UV radiation.
    Type: Application
    Filed: October 16, 2017
    Publication date: February 8, 2018
    Inventors: Brian Saxton UNDERWOOD, Abhijit Basu MALLICK, Mukund SRINIVASAN, Juan Carlos ROCHA-ALVAREZ
  • Publication number: 20180040474
    Abstract: A wafer is rinsed with a solvent. The wafer has an increased hydrophobicity as a result of being rinsed with the solvent. A metal-containing material is formed over the wafer after the wafer has been rinsed with the solvent. One or more lithography processes are performed at least in part using the metal-containing material. The metal-containing material is removed during or after the performing of the one or more lithography processes. The increased hydrophobicity of the wafer facilitates a removal of the metal-containing material.
    Type: Application
    Filed: April 19, 2017
    Publication date: February 8, 2018
    Inventors: An-Ren Zi, Joy Cheng, Ching-Yu Chang
  • Publication number: 20180040475
    Abstract: There is provided a method of manufacturing a semiconductor device. The method includes: forming a first amorphous silicon film on a substrate in a process chamber; and etching a portion of the first amorphous silicon film using a hydrogen chloride gas under a temperature at which an amorphous state of the first amorphous silicon film is maintained, in the process chamber.
    Type: Application
    Filed: August 1, 2017
    Publication date: February 8, 2018
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Takahiro MIYAKURA, Atsushi MORIYA, Naoharu NAKAISO, Kensuke HAGA
  • Publication number: 20180040476
    Abstract: Methods of the disclosure include a BN ALD process at low temperatures using a reactive nitrogen precursor, such as thermal N2H4, and a boron containing precursor, which allows for the deposition of ultra thin (less than 5 nm) films with precise thickness and composition control. Methods are self-limiting and provide saturating atomic layer deposition (ALD) of a boron nitride (BN) layer on various semiconductors and metallic substrates.
    Type: Application
    Filed: August 10, 2017
    Publication date: February 8, 2018
    Inventors: Steven WOLF, Mary EDMONDS, Andrewe KUMMEL, Srinivas NEMANI, Ellie YIEH
  • Publication number: 20180040477
    Abstract: A starting semiconductor structure includes a layer of filler material, a hard mask layer over the layer of filler material, and filler material lines over the hard mask layer. The starting semiconductor structure is placed in an etching chamber, and oxygen gas and high plasma power are inserted into the etching chamber and oxidizing, resulting in one or more of the filler material lines being oxidized, the filler material line(s) increasing in width from oxidizing, and etching the hard mask layer with a chemistry that is non-selective to the oxidized filler material lines and hard mask layer, and which has a stronger lateral etch selectivity to the oxidized filler material lines than the hard mask layer.
    Type: Application
    Filed: October 4, 2017
    Publication date: February 8, 2018
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Shivaji PEDDETI, Chang MAENG
  • Publication number: 20180040478
    Abstract: In an LCD driver, in a high voltage resistant MISFET, end portions of a gate electrode run onto electric field relaxing insulation regions. Wires to become source wires or drain wires are formed on an interlayer insulation film of the first layer over the high voltage resistant MISFET. At this moment, when a distance from an interface between a semiconductor substrate and a gate insulation film to an upper portion of the gate electrode is defined as “a”, and a distance from the upper portion of the gate electrode to an upper portion of the interlayer insulation film on which the wires are formed is defined as “b”, a relation of a>b is established. In such a high voltage resistant MISFET structured in this manner, the wires are arranged so as not to be overlapped planarly with the gate electrode of the high voltage resistant MISFET.
    Type: Application
    Filed: October 3, 2017
    Publication date: February 8, 2018
    Inventors: Yusuke TERADA, Shigeya TOYOKAWA, Atsushi MAEDA
  • Publication number: 20180040479
    Abstract: A method for fabricating a structure having surfaces exposed to plasma in a substrate processing system includes providing a sacrificial substrate having a first shape, machining the substrate into a second shape, the second shape having dimensions corresponding to a desired final shape of the structure, depositing a layer of material on the substrate, machining first selected portions of the layer of material to expose the substrate within the layer of material, removing remaining portions of the substrate, and machining second selected portions of the layer of material into the structure having the desired final shape without machining the surfaces of the structure that are exposed to plasma during processing.
    Type: Application
    Filed: September 9, 2016
    Publication date: February 8, 2018
    Inventor: Justin Charles Canniff
  • Publication number: 20180040480
    Abstract: A silicon carbide semiconductor substrate includes an epitaxial layer. A difference of a donor concentration and an acceptor concentration of the epitaxial layer is within a range from 1×1014/cm3 to 1×1015/cm3. Further, the donor concentration and the acceptor concentration of the epitaxial layer are a concentration unaffected by an impurity inside epitaxial growth equipment.
    Type: Application
    Filed: August 1, 2017
    Publication date: February 8, 2018
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Fumikazu IMAI
  • Publication number: 20180040481
    Abstract: A manufacturing method of dynamic random access memory (DRAM) with low leakage current includes forming a plurality of gates within a substrate of the DRAM; forming a plurality of drain/sources within the substrate of the DRAM by a first ion implantation; and forming a plurality of lightly doped drains under all of the plurality of drain/sources or partial drain/sources of the plurality of drain/sources by a second ion implantation after the plurality of drain/sources are formed. The plurality of lightly doped drains is used for reducing a leakage current within the DRAM, and the second ion implantation has a predetermined incident angle.
    Type: Application
    Filed: August 8, 2017
    Publication date: February 8, 2018
    Inventor: Li-Ping Huang
  • Publication number: 20180040482
    Abstract: A method of forming a memory device that includes forming a first insulation layer on a semiconductor substrate, forming a conductive material layer on the first insulation layer, forming an insulation block on the conductive material layer, forming an insulation spacer along a side surface of the insulation block and on the conductive material layer, etching the conductive material layer to form a block of the conductive material disposed directly under the insulation block and the insulation spacer, removing the insulation spacer, forming a second insulation layer having a first portion wrapping around an exposed upper edge of the block of the conductive material and a second portion disposed on a first portion of the first insulation layer over the substrate, and forming a conductive block insulated from the block of the conductive material by the second insulation layer and from the substrate by the first and second insulation layers.
    Type: Application
    Filed: May 15, 2017
    Publication date: February 8, 2018
    Inventors: Chien-Sheng Su, Jeng-Wei Yang, Man-Tang Wu, Chun-Ming Chen, Hieu Van Tran, Nhan Do
  • Publication number: 20180040483
    Abstract: A method of fabricating semiconductor devices includes sequentially forming a gate layer and a mandrel layer on a substrate, forming a first photoresist on the mandrel layer, forming a mandrel pattern by at least partially removing the mandrel layer using the first photoresist as a mask, forming a spacer pattern that comprises a first mandrel spacer located on a side of a first mandrel included in the mandrel pattern and a second mandrel spacer located on the other side of the first mandrel, forming a sacrificial layer that covers the first and second mandrel spacers after removing the mandrel pattern, forming a second photoresist including a bridge pattern overlapping parts of the first and second mandrel spacers on the sacrificial layer; and forming a gate pattern by at least partially removing the gate layer using the first and second mandrel spacers and the second photoresist as a mask.
    Type: Application
    Filed: March 29, 2017
    Publication date: February 8, 2018
    Inventors: Sang Jine Park, Yong Sun Ko, In Seak Hwang
  • Publication number: 20180040484
    Abstract: A semiconductor system shares information on a semiconductor manufacturing apparatus between first and second semiconductor manufacturing apparatuses through direct communication. The first semiconductor manufacturing apparatus includes a first acquisition unit acquiring first information on the first semiconductor manufacturing apparatus, a first storage unit storing the acquired first information, and a first communication unit sending the stored first information to the second semiconductor manufacturing apparatus.
    Type: Application
    Filed: July 28, 2017
    Publication date: February 8, 2018
    Inventors: Noriaki Koyama, Kazushi Shoji, Motokatsu Miyazaki
  • Publication number: 20180040485
    Abstract: The invention relates to a method for structuring a nitride layer (2), comprising the following steps: A) providing a nitride layer (2) formed with silicon nitride of a first type, B) defining regions (40) of said nitride layer (2) to be transformed, and C) inserting the nitride layer (2) into a transformation chamber for the duration of a transformation period, said transformation period being selected such that—at least 80% of the nitride layer (2) regions (40) to be transformed are transformed into oxide regions (41) formed with silicon oxide, and—remaining nitride layer (2) regions (21) remain at least 80% untransformed.
    Type: Application
    Filed: February 19, 2016
    Publication date: February 8, 2018
    Inventors: Andreas RUECKERL, Roland ZEISEL, Simeon KATZ
  • Publication number: 20180040486
    Abstract: Provided are methods for etching films comprising transition metals. Certain methods involve activating a substrate surface comprising at least one transition metal, wherein activation of the substrate surface comprises exposing the substrate surface to heat, a plasma, an oxidizing environment, or a halide transfer agent to provide an activated substrate surface; and exposing the activated substrate surface to a reagent comprising a Lewis base or pi acid to provide a vapor phase coordination complex comprising one or more atoms of the transition metal coordinated to one or more ligands from the reagent. Certain other methods provide selective etching from a multi-layer substrate comprising two or more of a layer of Co, a layer of Cu and a layer of Ni.
    Type: Application
    Filed: October 20, 2017
    Publication date: February 8, 2018
    Inventors: Jeffrey W. Anthis, Benjamin Schmiege, David Thompson
  • Publication number: 20180040487
    Abstract: In the manufacturing method of a semiconductor device according to an embodiment, a suspension lead is connected to a chip mounting section on which a semiconductor chip is mounted. Also, the suspension lead includes: a first tab connection section connected to the chip mounting section and extending in a first direction; a first branch section provided at a position higher than the first tab connection section with respect to a chip mounting surface and branching in a plurality of directions intersecting the first direction; and a plurality of first exposed-surface connection sections provided at positions higher than the first branch section and each having one end connected to a portion exposed from a sealing body.
    Type: Application
    Filed: July 2, 2015
    Publication date: February 8, 2018
    Applicant: Renesas Electronics Corporation
    Inventor: Noriyuki TAKAHASHI
  • Publication number: 20180040488
    Abstract: A substrate processing apparatus, includes a reaction furnace, a preparatory chamber provided below the reaction furnace, an elevating mechanism configured to raise/lower a substrate holder between the reaction furnace and the preparatory chamber, a fluid circulation mechanism including a suction part for sucking a fluid within the preparatory chamber, a pipe part constituting a flow path through which the fluid flows from the suction part to a supply part, and a cooling mechanism, provided in the flow path, for cooling the fluid, and a control part for controlling the fluid circulation mechanism and the elevating mechanism to circulate the fluid sucked from the suction part through the flow path, and supply the fluid from the supply part to the preparatory chamber. The cooling mechanism is disposed adjacent to the suction part to cool the fluid introduced from the suction part before circulating the fluid through the flow path.
    Type: Application
    Filed: August 2, 2017
    Publication date: February 8, 2018
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Toshiki FUJINO, Atsushi UMEKAWA, Takayuki NAKADA
  • Publication number: 20180040489
    Abstract: A device and method for at least partial loosening of a connecting layer of a temporarily bonded substrate stack. The device has at least one ring, whereby the substrate stack can be placed within the at least one ring, the at least one ring having a plurality of nozzles. The nozzles are arranged distributed at least over a portion of the periphery of the at least one ring, the nozzles directed onto the connecting layer. The device sprays solvent from the nozzles onto an edge area of the connecting layer.
    Type: Application
    Filed: November 3, 2015
    Publication date: February 8, 2018
    Applicant: EV Group E. Thallner GmbH
    Inventor: Andreas FEHKÜHRER
  • Publication number: 20180040490
    Abstract: A manufacturing method of a semiconductor device according to the present invention comprises cleaning a semiconductor substrate. A first chemical liquid for forming a water-repellent protection film and a second chemical liquid coating the first chemical liquid are supplied on a surface of the semiconductor substrate. Alternatively, the semiconductor substrate is immersed in the first chemical liquid coated with the second chemical liquid. The semiconductor substrate is then dried.
    Type: Application
    Filed: October 4, 2017
    Publication date: February 8, 2018
    Applicant: Toshiba Memory Corporation
    Inventors: Shinsuke KIMURA, Yoshihiro Ogawa
  • Publication number: 20180040491
    Abstract: The invention provides a plasma processing apparatus which includes a processing chamber, a radio frequency power source to supply a radio frequency power for plasma generation, a sample stage equipped with an electrostatic chuck electrode of a sample, a DC power source to apply a DC voltage to the electrode, and a control unit to change the DC voltage from a predetermined value to almost 0 V when a predetermined time elapses since the supplying of the radio frequency power is stopped. The predetermined value is a predetermined value indicating that a potential of the sample when the DC voltage is almost 0 V becomes almost 0 V. The predetermined time is a time defined on the basis of a time when charged particles generated by the plasma processing disappear or a time when an afterglow discharge disappears.
    Type: Application
    Filed: February 6, 2017
    Publication date: February 8, 2018
    Inventors: Masaki ISHIGURO, Masahiro SUMIYA
  • Publication number: 20180040492
    Abstract: A pod for exchanging consumable parts with a process module includes a base plate having a front side, a back side, and first and second lateral sides. A first support column is disposed on the first lateral side proximal to the front side. A second support column is disposed on the second lateral side proximal to the front side. A third support column is disposed on the first lateral side proximal to back side and a fourth support column is disposed on the second lateral side proximal to the back side. Each of the support columns includes a plurality of support fingers distributed lengthwise and directed inward. A first hard stop column is disposed parallel to the third support column and a second hard stop column is disposed parallel to the fourth support column. A shell structure connected to the base plate is configured to enclose the first, second third and fourth support columns, top plate and first and second hard stop columns and includes a front opening disposed on the front side of the base plate.
    Type: Application
    Filed: August 14, 2017
    Publication date: February 8, 2018
    Inventors: Scott Wong, Damon Tyrone Genetti, Derek John Witkowicki, Alex Paterson, Richard H. Gould, Austin Ngo, Marc Estoque
  • Publication number: 20180040493
    Abstract: To provide a transfer chamber capable of replacing a chemical filter without affecting an internal atmosphere, and shortening or eliminating stop time of a transfer process of a wafer (W) associated with replacement of the chemical filter. The transfer chamber transfers the wafer (W) to or from a processing device (6) by using a transfer robot (2) provided thereinside, and includes a circulation path (CL1) formed inside of a transfer chamber (1) to circulate gas, a chemical filter unit (7) provided in the midstream of the circulation path (CL1), and a connecting and disconnecting means (8) which switches connection and disconnection of the chemical filter unit (7) to and from the circulation path (CL1).
    Type: Application
    Filed: February 5, 2016
    Publication date: February 8, 2018
    Applicant: SINFONIA TECHNOLOGY CO., LTD.
    Inventors: Toshihiro Kawai, Takashi Shigeta, Munekazu Komiya, Yasushi Taniyama
  • Publication number: 20180040494
    Abstract: The invention relates to an inspection system adapted for determining a state and/or content of a wafer or reticle container or at least a part of a wafer or reticle container, comprising a detection device or a multitude of detection devices (102, 104, 152, 154, 156, 158, 160, 164) adapted to receive detection data from a surface and/or interior of the wafer or reticle container or the part of a wafer or reticle container indicative of the state and/or content of the wafer or reticle container or the part of a wafer or reticle container.
    Type: Application
    Filed: March 2, 2016
    Publication date: February 8, 2018
    Inventor: Lutz Rebstock
  • Publication number: 20180040495
    Abstract: A substrate holder having a fixing surface for holding a substrate, a system having such a substrate holder, a use of such a substrate holder, a method for bonding two substrates and a product, particularly a substrate stack, produced using such a method and also a use of such a substrate holder for such a method.
    Type: Application
    Filed: April 10, 2015
    Publication date: February 8, 2018
    Applicant: EV Group E. Thallner GmbH
    Inventors: Thomas Wagenleitner, Thomas Plach, Jurgen Michael Suss, Jurgen Mallinger
  • Publication number: 20180040496
    Abstract: An electrostatic chuck system includes a first heater, a second heater, a chiller, and a controller. The first heater includes a plurality of resistors connected to a plurality of row wiring lines and a plurality of column wiring lines in a matrix form. The second heater includes a heater electrode in a concentric shape or a spiral shape. The chiller chills the first heater or the second heater. The controller controls the first heater, the second heater, and the chiller. The controller switches the row wiring lines and the column wiring lines of the first heater in a time-division manner to provide a power pulse to heat the resistors and a detect pulse to monitor a real-time resistance value or a real-time temperature of each of resistors connected to selected row wiring lines.
    Type: Application
    Filed: March 31, 2017
    Publication date: February 8, 2018
    Inventors: Chunghun LEE, Janghwan KIM, Kwanghyun CHO, Youngho HWANG