Patents Issued in July 3, 2018
  • Patent number: 10013163
    Abstract: The present invention relates to a method and a mobile computing device for reliable and fast text entry. The method relies on a virtual keyboard layout that has a multi-touch interaction surface spread out on both the front and rear sides of a handheld computing device. A user-adaptive updating algorithm allows the virtual keyboard layout to adapt to the user's handling of the device.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: July 3, 2018
    Inventors: Oliver Schönleben, Antti Oulasvirta, Daniel Buschek
  • Patent number: 10013164
    Abstract: A method and a User Equipment (UE) are provided for optimizing access to Universal Integrated Circuit Card (UICC) files in the UE. The method includes storing, by the UE, at least one File Control Parameter (FCP) file corresponding to a plurality of Elementary Files (EFs); and sending, by the UE, a command directly to the UICC, based on the at least one FCP file. The command includes one of a READ command and an UPDATE command.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: July 3, 2018
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Ravikiran Ramakrishnarao, Thejeswara Reddy Pocha
  • Patent number: 10013165
    Abstract: A remote memory swapping method, an apparatus, and a system, that relate to the communications field and can improve a running speed of a system and reduce power consumption. The method, executed by a local node, includes obtaining a base address of a memory page that needs to be dumped; querying, according to the base address, a routing table to obtain routing information of the memory page; sending the routing information and dumping signaling to a cloud controller, so that the cloud controller forwards the routing information and the dumping signaling to a remote node in which the memory page is located; further, the remote node dumps, according to the dumping signaling and the routing information, from memory of the remote node into a hard disk of the remote node or the backward, data in the memory page.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: July 3, 2018
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Qianlong Zhang, Tao Jiang, Jianbo Dong, Yi Zhang
  • Patent number: 10013166
    Abstract: A virtual tape library system is used to back up data from a client archive system expecting physical tape operations onto logical data containers and/or a metadata store of a storage service by emulating the physical tape operations. For example, a virtual tape library appliance is installed at a customer premise location to interface with a client archive system. The virtual tape library appliance provides virtual interfaces to appear as physical tape library subsystems, such as tape drives and media changing interfaces. However, these virtual interfaces are supported by logical data containers in a storage service and a metadata store. The virtual tape library system allows the client archive system to make requests to import new virtual tapes, export virtual tapes for archiving, store virtual tapes at a virtual location, load and eject virtual tapes into a virtual tape drive and operate on virtual tapes in a virtual tape drive.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: July 3, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Pradeep Vincent, Craig Carl, Arun Sundaram
  • Patent number: 10013167
    Abstract: A system for storing data includes a performance storage unit, a performance storage transfer manager, a segment storage system, and a performance segment storage unit. The performance storage unit is for storing a data stream or a data block in. The data stream or the data block includes one or more data items. The performance storage transfer manager manages a transfer of the one or more data items to be automatically stored in the segment storage system over a network. The segment storage system is for storing a stored data item of the one or more data items as a set of segments. The performance segment storage unit is for storing the set of segments in the event that the stored data item has been stored using the segment storage system.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: July 3, 2018
    Assignee: EMC IP Holding Company LLC
    Inventor: R. Hugo Patterson
  • Patent number: 10013168
    Abstract: Systems, apparatuses and methods may provide for communicating, by a common layer, with a local block storage system and communicating, by a subsystem layer that is communicatively coupled to the common layer, with one or more subsystems. Additionally, the common layer may be disassociated with one or more hardware specific components of the subsystem layer. In one example, the common layer may export one or more callback functions to the subsystem layer, wherein the callback functions include a registration and/or deregistration function.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: July 3, 2018
    Assignee: Intel Corporation
    Inventors: Phil C. Cayton, Jay E. Sternberg, James P. Freyensee, Dave B. Minturn
  • Patent number: 10013169
    Abstract: Deduplication of data on a set of non-volatile memory by performing the following operations: receiving a first dataset; determining whether the first dataset is already present in data written to a first set of non-volatile memory; and on condition that the first dataset is determined to have already been present in the data written to the first set of non-volatile memory, providing a linking mechanism to associate the received first dataset with the already present data written to the first set of non-volatile memory.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: July 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Fisher, Nikolas Ioannou, Ioannis Koltsidas, Roman A. Pletka, Sasa Tomic
  • Patent number: 10013170
    Abstract: Determining whether to compress data of a virtual storage unit based at least in part on: an I/O activity value of a virtual storage unit; a compressibility value of the virtual storage unit; and/or a capacity utilization of the storage system or a component thereof. For example, decision logic may be configured based on one or more of such parameters such that virtual storage units with relatively high I/O activities are rarely or never compressed, e.g., to avoid the disproportionately high increases in CPU and bandwidth resource consumption and I/O latency this could create. Decision logic may be configured such that, in general, the likelihood that a virtual storage unit will be compressed increases as: the I/O activity of the virtual storage unit decreases; the system capacity utilization increases; and/or as the compressibility value of the virtual storage unit increases.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: July 3, 2018
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Adnan Sahin, Owen Martin, Jeremy J. O'Hare
  • Patent number: 10013171
    Abstract: A method for reducing stress on a RAID under rebuild is disclosed herein. In one embodiment, such a method includes performing the following actions while the RAID is undergoing a rebuild process: (1) redirect writes intended for the RAID to a temporary storage area located on a same primary storage system as the RAID, and (2) redirect reads intended for the RAID to a secondary storage system configured to store a copy of data in the RAID. The method is further configured to perform the following actions upon completing the rebuild process: (3) update the rebuilt RAID to reflect writes made to the temporary storage area during the rebuild process, and (4) redirect reads and writes to the rebuilt RAID. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: July 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Herve G. P. Andre, Rashmi Chandra, Glynis G. Dsouza, Larry Juarez, Tony Leung, Igor Popov, Jacob L. Sheppard, Todd C. Sorenson
  • Patent number: 10013172
    Abstract: An electronic data storage device includes a single outer case enclosing a plurality of individually isolated data storage mediums. The outer case may appear to be an industry standard single data storage device, however the plurality of data storage mediums are accessible therein. The electronic data storage device may include a wireless receiver paired to a wireless controller for selecting the accessible data storage medium. The electronic data storage medium may include a processor configured with firmware for enabling tamper protection and/or large volume management protocols.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: July 3, 2018
    Assignee: THE KEYW CORPORATIN
    Inventors: Jordan Spencer Jacobs, Joseph Andrew Hock
  • Patent number: 10013173
    Abstract: An electronic device including a communication interface and a command buffer coupled to the communication interface. The communication interface is configured to receive commands from a plurality of initiator devices, and the command buffer is configured to store the commands. The electronic device further includes a command buffer management module coupled to the command buffer. The command buffer management module is configured to generate a message indicating a remaining allowed storage size associated with the command buffer. The communication interface is further configured to enable communication of the message to a particular initiator device of the plurality of initiator devices. The message may enable the particular initiator device to hold off on sending one or more other commands to the command buffer if the remaining allowed storage size fails to satisfy a threshold storage size.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: July 3, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Shankar More, Kapil Sundrani
  • Patent number: 10013174
    Abstract: A plurality of mapping systems are maintained for mapping logical addresses for data stored in a Data Storage Device (DSD) to physical addresses for locations in at least one memory of the DSD that store the data. Data is received from a host for storage in the at least one memory, and the received data is stored in a location in the at least one memory. A mapping system is selected from the plurality of mapping systems for mapping the received data based on information provided by the host for the received data or based on information determined by the controller for the received data.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: July 3, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventor: Robert Lynn Horn
  • Patent number: 10013175
    Abstract: A method for indexing an external SD card. The method comprises: acquiring a mount path list; determining whether or not a filter criterion is satisfied by each mount path in the mount path list, if the criterion is satisfied, then splitting with spaces a current mount path into multiple paths, determining whether or not each path contains a preset string, and if yes, then recording the current path as a suspected external SD card path; and, determining whether or not a final external SD card path is in the suspected external SD card path recorded, if yes, then a final external SD card is found, and if not, then no final external SD card is found.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: July 3, 2018
    Assignee: Feitian Technologies Co., Ltd.
    Inventors: Zhou Lu, Huazhang Yu
  • Patent number: 10013176
    Abstract: Methods and apparatuses for parallel processing data are disclosed. One method includes reading items of data from a memory using at least memory access address, confirming items of data with the same memory address among the read items of data, and masking the confirmed items of data other than one of the confirmed items of data. A correction value is generated for the memory access address using the confirmed items of data, and an operation is performed on data that has not been masked using the confirmed items of data and the correction value. Data obtained by operating on the data that has not been masked is stored as at least on representative data item for the data items with the same memory address. A schedule of a compiler of a processor is adjusted by performing bypassing of memory access address alias checking for at least one memory access address.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: July 3, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-kwan Suh, Suk-jin Kim, Young-hwan Park
  • Patent number: 10013177
    Abstract: Methods, systems, and computer programs are presented for storing data in a solid state drive (SSD). One method includes an operation for detecting a plurality of streams writing to the SSD, each stream writing in sectors, a page including a plurality of sectors and a block including a plurality of pages. A write operation includes writing at least one complete page, and an erase operation includes erasing at least one complete block. The method further includes operations for allocating a write buffer for each stream in RAM memory, and for storing each received sector of a stream in the corresponding write buffer. When a write buffer stores enough sectors to fill a page, content of the write buffer is written to a page in flash memory such that the page is filled. Further, the write buffer is freed after writing the content of the write buffer to the flash memory.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: July 3, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Chun Liu, Umesh Maheshwari
  • Patent number: 10013178
    Abstract: A method for optimizing storage device bus and resource utilization using host realignment includes detecting a first write command for writing data from a host device to a storage device. The method further includes determining whether the first write command includes addressing that is misaligned with regard to storage device resource assignments. The method further includes, in response to determining that the first write command includes addressing that is misaligned with respect to storage device resource assignments: determining an amount to shift the misaligned addressing to align the addressing with the storage device resource assignments; and notifying the host device of the misaligned addressing. The method further includes performing a host realignment according to the amount determined to shift the misaligned addressing.
    Type: Grant
    Filed: April 30, 2016
    Date of Patent: July 3, 2018
    Assignee: SanDisk Technologies LLC
    Inventors: Gadi Vishne, Shai Baron, Judah Gamliel Hahn
  • Patent number: 10013179
    Abstract: The various implementations described herein include systems, methods and/or devices for reading data stored in a storage device. In one aspect, read commands are executed, each command for reading a requested logical group of data from a specified logical address comprising one or more logical portions. A first physical location in the storage device corresponding to the logical address is identified from a mapping table, and data is read. In accordance with a determination that the first physical location stores less than all of the logical group of data, a second physical location is identified based on information contained within the data from the first physical location, and data is read from the second physical location. Data read from the one or more physical locations is decoded to produce the requested logical group of data, which is then returned.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: July 3, 2018
    Assignee: SanDisk Technologies LLC
    Inventors: Umang Thakkar, Gary Lin, Robert Gugel
  • Patent number: 10013180
    Abstract: A method for operating a data storage device including a nonvolatile memory device and a controller which controls the nonvolatile memory device includes the controller transmitting to the nonvolatile memory device one of a command, an address, seed data and data via a input/output line and first, second and third control signals via corresponding signal lines; and the nonvolatile memory device receiving any one of the transmitted command, the address, the seed data and the data depending on at least two of the first, second and third control signals.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: July 3, 2018
    Assignee: SK Hynix Inc.
    Inventor: Dong Sop Lee
  • Patent number: 10013181
    Abstract: Provided are a method, a system, and a computer program product in which a storage controller determines a plurality of parts of a dataset. At least one part of the dataset is stored in a local storage coupled to the storage controller. At least one other part of the dataset in one or more cloud storages coupled to the storage controller.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: July 3, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew G. Borlick, Lokesh M. Gupta, Roger G. Hathorn, Karl A. Nielsen
  • Patent number: 10013182
    Abstract: A system and method for data storage management is disclosed. The method includes determining, by an access tracking component, a quantity of access requests for at least one data block, and determining a quantity of current copies of the data block. The method also includes creating, by a duplication component, at least one additional copy of the data block when the quantity of the access requests exceeds an access request threshold. Additionally, a deduplication component removes at least one current copy of the data block when the quantity of the access requests falls below the access request threshold. The access request threshold can be a threshold number of access requests for the data block, the presence of an input/output bottleneck, or a given length of a read latency when accessing the data block. Further, data coloring techniques can be used to distribute current copies of the data block.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: July 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Joseph W. Dain, Itzhack Goldberg, Gregory T. Kishi, Daniel I. Tan
  • Patent number: 10013184
    Abstract: A system may comprise a storage device on which counters are stored. A counter may be associated with an identifier. A computing node of the system may receive a request to modify the counter. In response to the request, a read signature may be stored and may comprise a hash of the identifier and a tolerance of the counter to change. A write signature may be stored in response to the request, and may comprise a hash of the identifier and a magnitude of the requested modification. A conflict may be detected by comparing a sum of the magnitudes of requested changes to the tolerance of the read operation.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: July 3, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: John Michael Morkel, Timothy Daniel Cole, Christopher Richard Jacques de Kadt, Allan Henry Vermeulen
  • Patent number: 10013185
    Abstract: In an embodiment, a mapping method of an accelerated application-oriented middleware layer is provided. The method includes, using a first mapper, determining for an input output operation whether a data storage location has been designated for storing a corresponding data in a virtual storage object, the input output operation involving the corresponding data. The method further includes, using the first mapper and at least one processor, acquiring the virtual element identification of the corresponding data. The method also includes, using the virtual element identification and the corresponding data, performing the input output operation.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: July 3, 2018
    Inventors: Srinivasan Viswanathan, Jagannathdas Rath
  • Patent number: 10013186
    Abstract: The invention relates to a storage device management method allowing to manage the storage space, on a storage device, by proposing to an end user to store a new content he was going to consume if its storage determined size is lower than an already stored content size.
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: July 3, 2018
    Assignee: THOMSON LICENSING
    Inventors: Philippe Gilberton, Eric Gautier, Christopher Howson
  • Patent number: 10013187
    Abstract: A mapping table accessing method for a rewritable non-volatile memory module is provided. The method includes: storing a mapping record corresponding to a first physical erasing unit into the first physical erasing unit, wherein the mapping record of the first physical erasing unit is a mapping relation of physical programming units in the first physical erasing unit. The method further includes: storing a mapping record corresponding to a second physical erasing unit into the second physical erasing unit, wherein the mapping record of the second physical erasing unit is a mapping relation of physical programming units in the second physical erasing unit. A size of the mapping record of the first physical erasing unit is different from a size of the mapping record of the second physical erasing unit.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: July 3, 2018
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Patent number: 10013188
    Abstract: A determining unit determines, when a failover occurs, whether the storage device is a master device. If the determining unit determines that the storage device is not the master device, a converting unit converts the virtual LUNs of the copy source and the copy destination to the real LUNs. Then, a copying unit performs a copy process by using the real LUNs converted by the converting unit.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: July 3, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Tetsuo Watanabe, Hajime Kondo
  • Patent number: 10013189
    Abstract: An apparatus comprises at least one host device for hosting respective tenants of a multi-tenant environment. The apparatus further comprises a storage platform coupled to the host device and implementing storage resources for utilization by respective tenants, and a storage controller associated with the host device comprising a storage volume creation functionality and a storage volume backup functionality. The storage volume creation functionality is configured to provision portions of the storage resources to create at least one storage volume. The storage volume backup functionality is configured to provision portions of the storage resources for performing one or more respective storage volume backup or restore processes, wherein a container is respectively provisioned for each storage volume backup or restore process.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: July 3, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Xing Yang, Kenneth Durazzo
  • Patent number: 10013190
    Abstract: A data storage device includes a first memory device including an operation information region for an original operation information, and suitable for performing a first initialization operation based on the original operation information and a controller suitable for performing a management operation to the original operation information, wherein the original operation information of the operation information region is prohibited from being changed until completion of the management operation.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: July 3, 2018
    Assignee: SK Hynix Inc.
    Inventor: Jee Yul Kim
  • Patent number: 10013191
    Abstract: A method for execution by a dispersed storage and task (DST) processing unit that includes a processor includes receiving a data object for storage in the DSN via a network. Available storage unit data is generated, indicating a subset of a plurality of storage units of the DSN that corresponds to a plurality of available storage units. A shortened encoding matrix is generated based on an original encoding matrix and the available storage unit data. A size of the shortened encoding matrix is based on a number of storage units in the plurality of available storage units. A plurality of encoded slices is generated, each for transmission to one of the plurality of available storage units via the network, by performing an encoding function on the shortened encoding matrix and the data object.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: July 3, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Jason K. Resch
  • Patent number: 10013192
    Abstract: An integrated circuit (IC) device including a first memory device, a second memory device stacked with the first memory device, and one or more memory controllers configured to detect a first error in data stored in the first memory device at a first physical location in the IC device, and upon detecting the first error, determine whether there is a second error in data stored in the second memory device in a second physical location in the IC device near the first physical location.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: July 3, 2018
    Assignee: NXP USA, Inc.
    Inventor: Andrew C. Russell
  • Patent number: 10013193
    Abstract: Embodiments for managing data in a virtual tape storage environment, by a processor device, are provided. A management system on a host is used to define volume expiration attributes for virtual tape volumes and the volume expiration attributes are forwarded to a virtual tape server. Return-to-scratch processing is performed on the virtual tape volumes directly on the virtual tape server by using the volume expiration attributes to compile candidate volumes without querying the host, where the candidate volumes are expired and converted to scratch by the virtual tape server.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: July 3, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sosuke Matsui, Takeshi Nohta, Aderson J. Pacini, Michael R. Scott
  • Patent number: 10013194
    Abstract: The present disclosure discloses a memory device including a controller for handling thermal shutdown of the memory device. The control system acquires temperatures of a plurality of non-volatile memory elements in the memory device from one or more temperature detectors at a first frequency. Upon determining that the temperature of one of the plurality of non-volatile memory elements is above a threshold, the controller activates thermal throttling for the plurality of non-volatile memory elements and flushes metadata from a volatile memory element in the memory device to the plurality of non-volatile memory elements for future recovery of the memory device.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: July 3, 2018
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Nian Niles Yang, Varuna Kamila
  • Patent number: 10013195
    Abstract: A memory module may include a plurality of memory groups configured to include a plurality of memory packages, respectively, and input/output data through input/output pins. The memory module may include a control circuit configured to activate one or more of the plurality of memory groups on a basis of an address signal. The memory module may include a multiplexer circuit configured to couple the memory group activated on the basis of the address signal to input/output buses of the memory module.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: July 3, 2018
    Assignee: SK hynix Inc.
    Inventors: Do Yun Lee, Min Chang Kim, Chang Hyun Kim, Jae Jin Lee, Hun Sam Jung
  • Patent number: 10013196
    Abstract: Described are techniques for provisioning storage for a logical device including receiving at least one capability profile identifying a first set of storage resource configurations; receiving a request to provision storage for the logical device, the request including a policy profile identifying a second set storage resource configurations; determining a third set of zero or more storage resource configurations, the third set being a set intersection of the first set and the second set; determining whether the third set includes at least one storage resource configuration; and if it is determined that the third set includes at least one storage resource configuration, selecting one of the storage resource configurations of the third set and provisioning storage of the logical device in accordance with the selected storage resource configuration of the third set.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: July 3, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Dmitry Nikolayevich Tylik, Sergey Alexandrovich Alexeev, Alexey Vladimirovich Shusharin
  • Patent number: 10013197
    Abstract: The present disclosure includes apparatuses and methods related to a shift skip. An example apparatus comprises a plurality of sensing circuitries, comprising respective sense amplifiers and respective compute components. A controller is configured to, responsive to a mask data unit associated with a first sensing circuitry having a particular value, cause a data value to be shifted from a second sensing circuitry to a third sensing circuitry without shifting the data value to the first sensing circuitry, wherein the first sensing circuitry is physically located between the second sensing circuitry and the third sensing circuitry.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: July 3, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Daniel B. Penney, Gary L. Howe, Harish N. Venkata
  • Patent number: 10013198
    Abstract: Techniques are disclosed for memory management in a streams processing environment. Certain aspects of the present disclosure provide a method generally including monitoring, via a streams manager for a distributed application, an amount of memory used by a group of executing processes, and for each group, comparing the amount of memory used by the group against a memory threshold, and determining whether the memory used by the group exceeds a first threshold, and reducing memory usage by the group when the memory used by the group exceeds the first threshold.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: July 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Michael J. Branson, Jay S. Bryant, James E. Carey, John M. Santosuosso
  • Patent number: 10013199
    Abstract: A system and method of translation bypass includes a hypervisor retrieving a physical bus address range from a host input-output memory management unit. The hypervisor reserves an allowed address range of the physical bus address range, and sends the allowed address range to a guest virtual machine. Sending the allowed address range sets a guest bus address range mapped by a virtual input-output memory management unit. The guest virtual machine is prevented from accessing any bus address outside of the allowed address range. The hypervisor receives, from the guest virtual machine, an access request to a guest bus address, which is an address within the allowed address range. The hypervisor stores the access request to the guest bus address in physical memory mapped in the host input-output memory management unit to an address outside of the allowed address range.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: July 3, 2018
    Assignee: Red Hat Israel, Ltd.
    Inventors: Michael Tsirkin, Amnon Ilan
  • Patent number: 10013200
    Abstract: Described embodiments may provide methods and systems for receiving an input/output (I/O) request by a storage system having at least one storage volume. The I/O request has associated payload data. The I/O request is performed with early prediction compression by compressing a first portion of the payload data and determining whether one or more remaining portions of the I/O request should be processed in a compressed manner or an uncompressed manner based, at least in part, upon the results of compressing the first portion of the payload data.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: July 3, 2018
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Vladimir Shveidel, Kirill Shoikhet
  • Patent number: 10013201
    Abstract: In one embodiment, a computer program product is configured for performing deduplication in conjunction with random read and write operations across a namespace divided into a plurality of disjoint regions. The computer program product includes a computer readable storage medium having program instructions embodied therewith, where the computer readable storage medium is not a transitory signal per se. The program instructions are executable by a computer to cause the computer to perform a method including: maintaining a metadata structure for each of the plurality of disjoint regions via the respective region manager(s) of the plurality of disjoint regions, each metadata structure comprising metadata indicating a physical storage location of one or more data chunks associated with the respective region; and performing, by the computer, a deduplicated write operation of a first data chunk in a first region of the plurality of disjoint regions.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: July 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jonathan Amit, Aviv Caro, David D. Chambliss, Joseph S. Glider, Chaim Koifman, Yosef Shatsky
  • Patent number: 10013202
    Abstract: Input data is partitioned into data chunks and digest values are calculated for each of the data chunks. The positions of similar repository data are found in a repository of data for each of the data chunks. The input digests of the input data are matched with the repository digests contained in the global digests cache for locating data matches. The processor prefers to match the input digests of the input data with the repository digests contained in the global digests cache which are of the similar repository data, rather than repository digests which are of other repository data that was not determined as similar to the input data chunks. The positions of the similar repository data are used to locate and linearly load into the global digests cache, digests and digest block boundaries of the similar repository data.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: July 3, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shay H. Akirav, Lior Aronovich
  • Patent number: 10013203
    Abstract: A method begins by a dispersed storage (DS) processing module receiving a request to store data in a dispersed storage network and determining dispersed storage error encoding parameters for encoding the data into sets of encoded data slices. The method continues with the DS processing module determining whether the request includes a desired write reliability indication. When the request includes the desired write reliability indication, the method continues with the DS processing module determining whether storage of the sets of encoded data slices is meeting the desired write reliability indication. When storage of a set of encoded data slices is not meeting the desired write reliability indication, the method continues with the DS processing module determining a storage compliance process for the set of encoded data slices to meet the desired write reliability indication and executing the storage compliance process for the set of encoded data slices.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: July 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jason K. Resch, Wesley Leggette
  • Patent number: 10013204
    Abstract: A method for writing data from a table to a tape includes setting a number of partitions on the tape, where the number of partitions is greater than or equal to a number of columns of the table to be written to the tape, and writing data from each column of the table to at least one partition of the tape, the at least one partition including two or more wraps, the data is written from a top of the two or more wraps towards a bottom of the two or more wraps in a direction of a width of the at least one partition. The written data is reciprocated from a beginning of the tape to an end of the tape in a longitudinal direction of the tape such that writing of a last data entry of one column ends at a beginning of the two or more wraps.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: July 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Kousei Kawamura, Koichi Masuda, Sosuke Matsui, Yutaka Oishi, Takahiro Tsuda
  • Patent number: 10013205
    Abstract: A memory migration method and device relate to the field of computer application technologies. A memory page is combined into a memory block, which reduces a quantity of migrations, and improves central processing unit (CPU) utilization. The method includes receiving, by a first node, a migration instruction sent by a second node, sequentially scanning each memory page between a physical address of a start memory page accessed by a target process and a physical address of an end memory page accessed by the target process, where the memory page is a memory page accessed by the target process or a memory page accessed by a non-target process, determining whether each memory page meets a block combination condition, combining a memory page that meets the block combination condition into a corresponding memory block, and migrating the corresponding memory block to a memory area of the second node.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: July 3, 2018
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Lixing Chu
  • Patent number: 10013206
    Abstract: In a hierarchical storage memory (HSM), a file recalled by a specific application is migrated as soon as possible after completion of the application process. Specifically, the effective UID of a specific process is preregistered on an HSM client. After a recall operation is performed on a certain file from the user ID, when there is no access from the UID to the file for a given length of time, the file is migrated. This prevents files premigrated by access from any application other than the specific one from being handled in the same way, resolving a disadvantageous problem caused when these (premigrated) files are not desired to be migrated preferentially.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: July 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Hiroshi Araki, Hiroyuki Miyoshi, Satoshi Takai
  • Patent number: 10013207
    Abstract: A method for execution by one or more processing modules of one or more computing devices of a dispersed storage network (DSN) begins by identifying an unrecoverable encoded data slice of a data segment stored in a set of DSN storage units, where a region of a data object includes a plurality of data segments, and where the plurality of data segments includes the data segment. The method continues by determining whether the data segment is recoverable. The method continues, when recoverable, by salvaging the region by indicating that the region has corruption, updating a directory and replacing the data segment with filler data, and when not recoverable, by not salvaging the region by indicating that the region has been eliminated.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: July 3, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Wesley B. Leggette
  • Patent number: 10013208
    Abstract: According to one mode of implementation it is proposed to automatically accelerate the write operation by deleting on the basis of the values of the data to be written and optionally on the basis of the values of the data present in the memory the erasure step or the programming step, so doing while optionally using a conventional write command. When the memory is equipped with an error-correcting code based on a Hamming code, a property of the latter makes it possible readily to implement this possible acceleration of the cycles of writings within the memory. This property is that according to which when all the bits of the bytes of a digital word grouping together n bytes are equal to zero, the check bits associated with these bytes are also all equal to zero.
    Type: Grant
    Filed: February 27, 2016
    Date of Patent: July 3, 2018
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: François Tailliet, Marc Battista
  • Patent number: 10013209
    Abstract: A memory system may include: a memory device including a plurality of memory blocks; and a controller including a memory, and suitable for storing segments of data corresponding to a command received from a host in the memory, and storing a first segment for a first time point and a second segment for a second time point selected from among the segments in the memory blocks on a program basis at the first time point.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: July 3, 2018
    Assignee: SK Hynix Inc.
    Inventor: Eu-Joon Byun
  • Patent number: 10013210
    Abstract: The present invention provides a data storage device including a flash memory and a controller. The controller equally distributes the TLC-data blocks into three regions. In a first stage, the controller determines a first TLC-data block corresponding to the logic address of a prewrite data sector, defines the region that contains the first TLC-data block as a first region, and determines whether the first TLC-data block has valid data. When the first TLC-data block does not have valid data, the controller selects a second TLC-data block and a third TLC-data block from the regions other than the first region for writing the prewrite data sector, into the first TLC-data block, the second TLC-data block and the third TLC-data block by a SLC storage mode.
    Type: Grant
    Filed: October 3, 2016
    Date of Patent: July 3, 2018
    Assignee: SILICON MOTION, INC.
    Inventors: Chien-Cheng Lin, Jie-Hao Lee
  • Patent number: 10013211
    Abstract: A storage device may include a nonvolatile memory device, a buffer memory, and a controller. The controller may perform first accesses on the nonvolatile memory device using the buffer memory, collect access result information and access environment information of the first accesses in the buffer memory, and generate an access classifier that predicts a result of a second access to the nonvolatile memory device by performing machine learning based on the access result information and the access environment information collected in the buffer memory.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: July 3, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Donghwan Lee, Junjin Kong, Seongnam Kwon, Seungkyung Ro, Changkyu Seol, Hong Rak Son, Pilsang Yoon, Donggi Lee, Heewon Lee
  • Patent number: 10013212
    Abstract: An accelerator controller comprises a detector and a loader. The detector detects runtime features of an application or a virtual machine and identifies an accelerator logic associated with the application or the virtual machine corresponding to the detected runtime features. The loader loads the identified accelerator logic into at least one dynamic random access memory (DRAM). The at least one DRAM array is selectively reconfigurable to behave like a look-up table (LUT) or to behave like a DRAM memory array based on the identified accelerator logic, and the at least one DRAM array is in a cache-coherent address space of the operating system environment. The accelerator logic may comprise a look-up table (LUT).
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: July 3, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hongzhong Zheng, Mu-Tien Chang
  • Patent number: 10013213
    Abstract: An apparatus comprises at least a first container host device implementing a plurality of containers, a storage platform coupled to the first container host device and implementing storage resources for utilization by the containers, and a container storage controller associated with the first container host device. The container storage controller is configured to provision portions of the storage resources for respective ones of the containers including for each of the containers at least one storage volume. The provisioned storage volume for a given one of the containers is partitioned into at least a data storage volume and a state storage volume, with the data storage volume being configured to store data for at least one application running in the given container, and the state storage volume being configured to store state information of the given container for use in migrating the given container from the first container host device to a second container host device.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: July 3, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Keerthana Suresh, Vaibhav Khanduja, Ashish Mehrotra