Patents Issued in October 9, 2018
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Patent number: 10095539Abstract: A method and associated systems for automated orchestration of complex server provisioning tasks, An orchestration-optimization system receives input that identifies a destination, platform, and pattern of tasks that together characterize a procedure for building a particular virtualized computer environment. The system selects a set of generic orchestration methods that identify in general terms each task required to build the environment. The system then embeds into the orchestration methods all currently known contextual data associated with the specified build procedure, converting the generic methods into a build-specific runlist of tasks. When the environment is ready to be built, additional environment-specific data that becomes known only at build time is inserted into placeholders previously embedded into the runlist tasks. The system then performs the sequence of runlist tasks in order to automatically build the virtualized system.Type: GrantFiled: July 25, 2016Date of Patent: October 9, 2018Assignee: International Business Machines CorporationInventors: Joshua J. Barker, Mark A. Cayley, Andrew P. Lyons, A. Charlotte Wang
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Patent number: 10095540Abstract: A method includes receiving a deployment template at a host system, partitioning a networking device of the host system with a virtual network partition based upon the deployment template, receiving attribute data that includes a first attribute associated with the first virtual network partition, loading the networking device with the attribute data, launching a virtual machine manager on the host system, reading the attribute from the networking device, and assigning a virtual network interface of a virtual switch associated with the virtual machine manager to the virtual network partition in response to reading the attribute.Type: GrantFiled: September 30, 2016Date of Patent: October 9, 2018Assignee: Dell Products, LPInventors: Mukund P. Khatri, Sudhir V. Shetty
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Patent number: 10095541Abstract: A computer-implemented method is provided for executing a memory access while performing a task switching using an optical circuit switch provided with a plurality of channels. The method includes executing, by a hardware processor, the memory access on the basis of a precedent task using a first channel of the plurality of channels. The method further includes assigning, by the hardware processor, a second channel of the plurality of channels to a subsequent task before performing the task switching. The method also includes executing, by the hardware processor, the subsequent task being executed after the precedent task upon performing the task switching. The method further includes performing, by the hardware processor, the task switching to the subsequent task to which the second channel has been assigned.Type: GrantFiled: September 21, 2016Date of Patent: October 9, 2018Assignee: International Business Machines CorporationInventor: Atsuya Okazaki
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Patent number: 10095542Abstract: Techniques are provided for restoring threads within a processing core. The techniques include, for a first thread group included in a plurality of thread groups, executing a context restore routine to restore from a memory a first portion of a context associated with the first thread group, determining whether the first thread group completed an assigned function, and, if the first thread group completed the assigned function, then exiting the context restore routine, or if the first thread group did not complete the assigned function, then executing one or more operations associated with a trap handler routine.Type: GrantFiled: October 30, 2017Date of Patent: October 9, 2018Assignee: NVIDIA CORPORATIONInventors: Gerald F. Luiz, Philip Alexander Cuadra, Luke Durant, Shirish Gadre, Robert Ohannessian, Lacky V. Shah, Nicholas Wang, Arthur Merlin Danskin
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Patent number: 10095543Abstract: A computing system comprises one or more cores. Each core comprises a processor. In some implementations, each processor is coupled to a communication network among the cores. In some implementations, a switch in each core includes switching circuitry to forward data received over data paths from other cores to the processor and to switches of other cores, and to forward data received from the processor to switches of other cores.Type: GrantFiled: May 23, 2014Date of Patent: October 9, 2018Assignee: Mellanox Technologies Ltd.Inventors: Patrick Robert Griffin, Mathew Hostetter, Anant Agarwal, Chyi-Chang Miao
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Patent number: 10095544Abstract: Method for hosting a multitasking guest on a host system, wherein the guest is allocated a periodic execution server and a deferrable execution server associated with a partition of the system, event-driven tasks of the guest are assigned to the deferrable execution server, time-driven tasks of the guest are assigned to the periodic execution server, a hypervisor of the execution servers is assigned to a first priority group of the system, the deferrable execution server is assigned to a second priority group of the system, the periodic execution server is assigned to a third priority group of the system, and a preemptive task scheduler maintains a descending priority order among the priority groups while the execution servers execute the tasks concurrently.Type: GrantFiled: July 20, 2016Date of Patent: October 9, 2018Assignee: ROBERT BOSCH GMBHInventors: Christos Evripidou, Gary Morgan, Alan Burns
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Patent number: 10095545Abstract: Techniques for managing large-scale automatic fleet refresh operations are described herein. An application programming interface request to perform a refresh operation on a set of computer system instances is received. The application programming interface request includes a set of constraints for performing the refresh operation which are used to determine the impact of performing the refresh operation. Based at least in part on the impact, a set of schedules for performing the refresh operation is provided.Type: GrantFiled: September 29, 2016Date of Patent: October 9, 2018Assignee: Amazon Technologies, Inc.Inventors: Diwakar Gupta, Robert Beazley, Alexey Gadalin, Mihir Sadruddin Surani, Scott Sikora, Anton Valter
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Patent number: 10095546Abstract: Some embodiments include a method of scheduling batch processing of a batch processing system based on subscriber usage patterns. The method includes steps of recording a last job commencement event for a subscriber when the batch processing system starts processing a batch process for the subscriber; recording a last usage event for the subscriber when the subscriber uses the batch processing system; in an event that a time period elapsed since the last usage event for the subscriber is less than a time period elapsed since the last job commencement event for the subscriber, placing a next batch process of the subscriber into a recently used queue; identifying the next batch process of the subscriber as the oldest batch process from the recently used queue; and start processing the identified batch process for the subscriber.Type: GrantFiled: April 11, 2016Date of Patent: October 9, 2018Assignee: Flexera Software LLCInventor: Robert Lowery
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Patent number: 10095547Abstract: A system and method for data stream processing. Two or more instances are connected as a topology, wherein at least one of the instances is a spout and at least one of the instances is a bolt. The topology is submitted to a scheduler, wherein the service scheduler receives resource offers from a cluster manager representing computing resources available on one or more of cluster nodes and determines resources to accept and computations to run on the accepted computing resources. The topology is scheduled as one or more jobs, wherein each job includes two or more containers, including a first container and a second container, the first container including a topology master and the second container including a stream manager and one or more stream processing system (SPS) instances, wherein each SPS instance represents one of the instances in the topology.Type: GrantFiled: March 14, 2016Date of Patent: October 9, 2018Assignee: Twitter, Inc.Inventors: Sanjeev Raghavendra Kulkarni, Nikunj Bhagat, Maosong Fu, Vikas Kedigehalli, Christopher Kellogg, Sailesh Mittal, Jignesh M. Patel, Karthik Ramasamy, Siddharth Taneja
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Patent number: 10095548Abstract: One embodiment of the present disclosure sets forth an effective way to maintain fairness and order in the scheduling of common resource access requests related to replay operations. Specifically, a streaming multiprocessor (SM) includes a total order queue (TOQ) configured to schedule the access requests over one or more execution cycles. Access requests are allowed to make forward progress when needed common resources have been allocated to the request. Where multiple access requests require the same common resource, priority is given to the older access request. Access requests may be placed in a sleep state pending availability of certain common resources. Deadlock may be avoided by allowing an older access request to steal resources from a younger resource request. One advantage of the disclosed technique is that older common resource access requests are not repeatedly blocked from making forward progress by newer access requests.Type: GrantFiled: May 21, 2012Date of Patent: October 9, 2018Assignee: NVIDIA CORPORATIONInventors: Michael Fetterman, Shirish Gadre, John H. Edmondson, Omkar Paranjape, Anjana Rajendran, Eric Lyell Hill, Rajeshwaran Selvanesan, Charles McCarver, Kevin Mitchell, Steven James Heinrich
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Patent number: 10095549Abstract: Technology is described for providing an ownership transfer service in virtual computing service environment. Computing resources under the control of one or multiple customers are stored in an ownership transfer account. Workflows based on a pre-defined set of triggers for releasing the computing resources from the ownership transfer account are established. Exclusive control over the computing resources may be transferred from the single or multiple customers to at least one of the multiple customers or to a receiving customer according to a triggering event. The exclusive control over the computing resources from one or at least one of the multiple customers is terminated upon occurrence of one of the pre-defined set of triggers or temporary control is granted based on rules such as time periods.Type: GrantFiled: September 29, 2015Date of Patent: October 9, 2018Assignee: Amazon Technologies, Inc.Inventors: Sean Michael Needham, Attila Narin, David Walker
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Patent number: 10095550Abstract: A multiprocessor computer system facility is provided for selectively reallocating a logical processing unit within the computer system. The logical processing unit is one logical processing unit of multiple logical processing units backed by a socket of a plurality of sockets of the multiprocessor computer system. The selectively reallocating includes: monitoring, during execution of program code of the multiple logical processing units, a performance metric of a hardware resource of the socket, the hardware resource being shared by the multiple logical processing units; and reassigning the logical processing unit, based on the monitoring, to a different socket of the plurality of sockets of the multiprocessor computer system to, in part, improve the performance metric of the hardware resource of the socket.Type: GrantFiled: October 19, 2016Date of Patent: October 9, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Oliver Benke, Hartmut E. Penner, Klaus Theurich
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Patent number: 10095551Abstract: Multiple workloads from multiple users requesting access to at least one virtualized application are received, wherein each of the workloads is specified with one or more separate globalization characteristics from among multiple globalization characteristics. To dynamically manage workload placement, each of the workloads is dynamically categorized separately for placement in one or more particular virtualized environments from among multiple virtualized environments based on the one or more separate globalization characteristics of each of the workloads, wherein each virtualized environment comprises the at least one virtualized application configured for a separate selection of globalization services from among multiple globalization services for handling a separate selection of the one or more separate globalization characteristics.Type: GrantFiled: July 15, 2016Date of Patent: October 9, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Arun Deivanayagam, Wu S. Fang, Su Liu, Priya Paul
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Patent number: 10095552Abstract: An apparatus includes a processor to: receive, from a first remote device, a request to perform at least one iteration of a first job flow at least partly within a first federated area, wherein access to the first federated area is granted to the first remote device and not a second remote device, access to a second federated area is granted to the second remote device and not the first remote device, and a transfer area is maintained to transfer an object between the first and second federated areas; perform the at least one iteration of the first job flow; and analyze an output object generated in each iteration to determine whether a condition has been met to transfer an object from the first federated area to the transfer area to enable its transfer to the second federated area to enable its use in a second job flow.Type: GrantFiled: February 14, 2018Date of Patent: October 9, 2018Assignee: SAS Institute Inc.Inventors: Henry Gabriel Victor Bequet, Huina Chen
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Patent number: 10095553Abstract: An apparatus includes a processor to: grant a first device access to a first federated area, but not a second device; grant the second device access to a second federated area, but not the first device; grant the first and second devices access to a base federated area; maintain inheritance relationships among the federated areas so an object stored in the base federated area is as accessible to the first device as an object in the first federated area and is as accessible to the second device as an object in the second federated area; and maintain priority relationships among the federated areas so priority is given to providing the first device access to a task routine stored in the first federated area, and to providing the second device access to a task routine stored in the second federated area, over a task routine stored in the base federated area.Type: GrantFiled: February 15, 2018Date of Patent: October 9, 2018Assignee: SAS Institute Inc.Inventors: Henry Gabriel Victor Bequet, Eric Jian Yang, Kais Arfaoui, Ronald Earl Stogner
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Patent number: 10095554Abstract: An apparatus includes a processor to: receive a request from a first remote device to provide a second remote device with access to an existing federated area; allocate storage for a new private federated accessible to the second remote device and not to the first remote device; maintain an inheritance relationship between the existing and new private federated areas in which an object stored in the existing federated area is made accessible to the second remote device to the same extent as an object in the new private federated area; and maintain a priority relationship between the existing and new private federated areas as an exception to the inheritance relationship such that priority is given to providing the second remote device with access to a task routine stored in the new private federated area over a task routine stored in the existing federated area that performs the same task.Type: GrantFiled: February 15, 2018Date of Patent: October 9, 2018Assignee: SAS Institute Inc.Inventors: Henry Gabriel Victor Bequet, Eric Jian Yang, Kais Arfaoui, Ronald Earl Stogner
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Patent number: 10095555Abstract: To provide a system capable of appropriately assigning, in consideration of a state concerning increase in an arithmetic processing load required for executing each of a plurality of tasks, each task to a plurality of arithmetic processing resources. An indication value is detected which represents a degree of an arithmetic processing load required for executing each of the plurality of tasks. Whether or not the indication value satisfies a predetermined condition is determined. States or occurring events in an area concerning execution of the plurality of tasks are detected. Each of the plurality of tasks is assigned to each of the plurality of servers S1 to Sn (arithmetic processing resources) in a different order of priority depending on a difference of the detected state on a requirement that the indication value satisfies the predetermined condition.Type: GrantFiled: July 29, 2016Date of Patent: October 9, 2018Assignees: HONDA MOTOR CO., LTD., SUMITOMO ELECTRIC SYSTEM SOLUTIONS CO., LTD.Inventors: Junichi Koyanagi, Go Nakamoto, Satoru Yokote, Isao Onishi, Kanehiro Imanishi, Takafumi Yamori
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Patent number: 10095556Abstract: Disclosed are various embodiments for a parallel priority queue implemented on one or more many-core processors and/or multi-core processors such as those in general-purpose graphics processing units (GPGPUs). According to various embodiments, a priority may be determined according to a timestamp of an item, such as an event or an entry, in a priority queue. A priority queue interface may comprise functions to insert and remove entries from the priority queue. Priority order of the entries may be maintained as the entries are inserted and removed from the queue.Type: GrantFiled: December 19, 2013Date of Patent: October 9, 2018Assignee: Georgia State University Research Foundation, Inc.Inventors: Sushil K. Prasad, Xi He, Dinesh Agarwal
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Patent number: 10095557Abstract: Processing logic and a method to provide single thread access to a specific memory region without suspending processing activity for all other cores and/or threads within or in association with a processor, computer system, or other processing apparatus. Single thread access may be provided through implementation of microcode which may control thread access to model specific registers (“MSRs”) within a processor. One MSR may provide a mutex, which a single thread may claim, and another MSR may provide a range of memory locations, which may be accessed by the thread that has claimed the mutex.Type: GrantFiled: June 29, 2012Date of Patent: October 9, 2018Assignee: Intel CorporationInventor: Nicholas J. Adams
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Patent number: 10095558Abstract: A new approach is proposed that contemplates systems and methods to support a mechanism to offload all aspects of inline SSL processing of an application running on a server/host to an embedded networking device such as a Network Interface Card (NIC), which serves as a hardware accelerator for all applications running on the server that need to have a secure connection with a remote client device over a network. By utilizing a plurality of its software and hardware features, the embedded networking device is configured to process all SSL operations of the secure connection inline, i.e., the SSL operations are performed as packets are transferred between the host and the client over the network, rather than having the SSL operations offloaded to the NIC, which then returns the packets to the host (or the remote client device) before they can be transmitted to the remote client device (or to the host).Type: GrantFiled: May 11, 2016Date of Patent: October 9, 2018Assignee: CAVIUM, INC.Inventors: Ram Kumar Manapragada, Manojkumar Panicker, Faisal Masood, Satish Kikkeri
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Interface for translating software commands and hardware commands for a distributed computing system
Patent number: 10095559Abstract: In one embodiment, a method receives a software command from a software element in a main computer at a management computer via an application programming interface (API) included in the management computer. The management computer manages the main computer, and the main computer controls services for a distributed computing system. The management computer then determines a hardware device associated with the software command where the management computer includes a communication pathway to the hardware device. The management computer translates the software command to a hardware command that the hardware device can process where the hardware device cannot process the software command. Then, the management computer sends the hardware command to the hardware device via the communication pathway where the management computer provides the API to allow the software element to communicate with the hardware element without the software element having to translate the software command to the hardware command.Type: GrantFiled: October 14, 2016Date of Patent: October 9, 2018Assignee: OC Acquisition LLCInventors: Matthew Gambardella, Joe Heck, Paul McMillan -
Patent number: 10095560Abstract: An application monitoring infrastructure that enables application configuration changes on multiple machines across multiple OS types to be tracked by identifying data containers that are to be monitored for changes, detecting a change to a monitored data container, and storing data representative of a changed version of the monitored data container responsive to detecting that the monitored container was changed. The data containers that are to be monitored for changes are identified from templates, and a unique template is provisioned for each of the applications.Type: GrantFiled: August 8, 2016Date of Patent: October 9, 2018Assignee: VMware, Inc.Inventors: Adar Margalit, Eran Dvir
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Patent number: 10095561Abstract: The present invention gives the methods and processes for automatically servicing user driven requests to find place-holder fields, fill them in with relevant data in a secure manner and securely communicating the data related thereto to the appropriate Android™ device and/or application. More particularly, it relates to the methods and processes for authenticated users to automatically obtain and use the correct filled-in data that allows them to access or use any of a multiple number of Android™ applications and/or services at any time.Type: GrantFiled: September 18, 2017Date of Patent: October 9, 2018Assignee: McAfee, LLCInventor: Etienne Caron
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Patent number: 10095562Abstract: A system and method can use continuation-passing to transform a queue from non-blocking to blocking. The non-blocking queue can maintain one or more idle workers in a thread pool that is not accessible from outside of the non-blocking queue. The continuation-passing can eliminate one or more serialization points in the non-blocking queue, and allows a caller to manage the one or more idle workers in the thread pool from outside of the non-blocking queue.Type: GrantFiled: February 28, 2013Date of Patent: October 9, 2018Assignee: ORACLE INTERNATIONAL CORPORATIONInventor: Oleksandr Otenko
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Patent number: 10095563Abstract: The invention relates to processing a service request by a web runtime environment in a processing device, the processing of the service request enabling a service provider to provide a service requested in the service request. After having selected a specific interface based on the service request, a web driver application associated with the service requested in the service request is executed and the selected specific interface is implemented. Then, it is possible to interact with the web driver application, via said specific interface, for providing the service by the service provider.Type: GrantFiled: October 20, 2015Date of Patent: October 9, 2018Assignee: Canon Kabushiki KaishaInventors: Romain Bellessort, Youenn Fablet, Hervé Ruellan
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Patent number: 10095564Abstract: Aspects of the present disclosure involve systems and methods that enable the dynamic execution of code library calls using external system data. A processing device processes unstructured data to generate structured data that optionally may be filtered. The processing device uses the structured data and one or more parameter groupings to execute various commands associated with a code library of an external system.Type: GrantFiled: May 3, 2017Date of Patent: October 9, 2018Assignee: Oracle International CorporationInventor: Robert Thomas Scrimo, Jr.
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Patent number: 10095565Abstract: A memory system includes a link having at least one signal line and a controller. The controller includes at least one transmitter coupled to the link to transmit first data, and a first error protection generator coupled to the transmitter. The first error protection generator dynamically adds an error detection code to at least a portion of the first data. At least one receiver is coupled to the link to receive second data. A first error detection logic determines if the second data received by the controller contains at least one error and, if an error is detected, asserts a first error condition. The system includes a memory device having at least one memory device transmitter coupled to the link to transmit the second data. A second error protection generator coupled to the memory device transmitter dynamically adds an error detection code to at least a portion of the second data.Type: GrantFiled: September 15, 2015Date of Patent: October 9, 2018Assignee: Rambus Inc.Inventors: Ely K. Tsern, Mark A. Horowitz, Frederick A. Ware
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Patent number: 10095566Abstract: An operator control element in a motor vehicle generates an activation signal as a function of the activation of the operating element, and a control unit receives the activation signal and measures a signal length of the activation signal, and signals the activation if the signal length becomes greater than a predetermined debounce time. Despite possible incorrect triggering of the activation signal owing to voltage fluctuations, the debounce time is to be short. The control unit determines for this purpose an operating parameter, and on the basis of the operating parameter it is detected that a supply voltage, made available at the control unit, satisfies a predetermined instability criterion, and when the instability criterion is satisfied the control unit delays the measurement of the signal length for a predetermined blocking time.Type: GrantFiled: April 8, 2016Date of Patent: October 9, 2018Assignee: AUDI AGInventors: Jürgen Hartmann, Patrick Sassmannshausen
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Patent number: 10095567Abstract: A micro controller unit including an error indicator hardware module, the error indicator module being arranged to respond to event signals representative of internal and external fault and error events perturbing the micro controller unit function by registering in non-volatile memory a record of the nature of each of the events, wherein the record of the events is inaccessible to alteration.Type: GrantFiled: May 2, 2016Date of Patent: October 9, 2018Assignee: NXP USA, Inc.Inventors: Norbert Pickel, Axel Bahr, Derek Beattie, Andrew Birnie, Carl Culshaw
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Patent number: 10095568Abstract: Method and apparatus for managing data in a semiconductor memory, such as but not limited to a three dimensional (3D) NAND flash memory array. In some embodiments, the memory has non-volatile memory cells arranged into addressable blocks. Each memory cell is configured to store multiple bits. A program/read control circuit programs data sets to and reads data sets from the memory cells in the addressable blocks to service a sequence of host access commands. The circuit concurrently performs background reads in conjunction with the servicing of the host access commands. The background reads result in the reading of a different data set from each of the addressable blocks over each of a succession of time intervals of selected duration. The background reads condition the memory cells prior to a first read operation associated with the host access commands.Type: GrantFiled: April 27, 2017Date of Patent: October 9, 2018Assignee: Seagate Technology LLCInventors: Antoine Khoueir, Stacey Secatch, Kevin Gomez, Ryan Goss
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Patent number: 10095569Abstract: Systems and methods for generating a graphical display region including a synchronized display of alert data and impact data indicative of conditions of a computing infrastructure are herein disclosed as comprising, in an implementation, identifying alerts, each alert having a timestamp indicative of a first time at which it was identified, performing an impact calculation to generate the impact data based on alerts valid as of a second time proximate to an impact calculation start time, and generating a graphical display region including impact data valid as of a display time and alert data indicative of the alerts valid as of the second time.Type: GrantFiled: June 10, 2016Date of Patent: October 9, 2018Assignee: ServiceNow, Inc.Inventors: Adar Margalit, Yuval Rimar, Amir Schnabel
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Patent number: 10095570Abstract: The present invention aims to provide a programmable device with a configuration memory that can hold the state of the occurrence abnormal situation that is difficult to assume such as a failure occurring in the programmable device due to the terrestrial radiation of the configuration memory, even during power off, in order to improve the reproducibility in device testing based on the held error information. The programmable device with the configuration memory includes: an error detection section for detecting an error in the configuration memory, and outputting the detected error as well as an address in which the error occurred, as error information; and an error information holding section provided with a non-volatile memory to store the output error information.Type: GrantFiled: January 24, 2014Date of Patent: October 9, 2018Assignee: Hitachi, Ltd.Inventors: Tadanobu Toba, Kenichi Shimbo, Yusuke Kanno, Nobuyasu Kanekawa, Kotaro Shimamura, Hiromichi Yamada
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Patent number: 10095571Abstract: The embodiments herein provide a system and a method managing, auditing and troubleshooting an IP device. The system comprises a bridge device that (a) initiates a first secure connection with, or responds to a connection request from an admin device, (b) connects to a device registry and downloads information associated with the IP device, (c) downloads and installs a connector to connect with the IP device as a plug-in module, (d) forms or joins a second secure connection with the agent device to manage, audit and troubleshoot IP device, (e) forms, on approval from the admin device, a third secure connection, between the bridge device and the IP device and (f) secures and relays information from the second secure connection to the third secure connection when the second secure connection and the third secure connection are connected together.Type: GrantFiled: January 4, 2017Date of Patent: October 9, 2018Inventors: Srinivasan Narayanan, Pradeep Vasudev
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Patent number: 10095572Abstract: A method and system are disclosed for providing integrated circuit chip cards (e.g. transaction cards) pursuant to an order placed by or on behalf of a card issuer wherein a testing data file is provided in conjunction with prepersonalization data encoding for use in conjunction with subsequent testing of the accuracy of the encoded prepersonalization data. Such testing may be completed prior to personalization data encoding to facilitate the identification of prepersonalization data encoding errors, thereby further facilitating remedial action and reduction of production disruptions.Type: GrantFiled: December 16, 2016Date of Patent: October 9, 2018Assignee: CPI CARD GROUP—COLORADO, INC.Inventor: Barry Mosteller
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Patent number: 10095573Abstract: Memory corruption detection technologies are described. A processor can include a memory to store a memory corruption detection (MCD) table. A processor core of the processor can receive, from an application, an allocation request for an allocation of a memory object within a contiguous memory block in the memory. The processor core can allocate the contiguous memory block in view of a size of the memory object requested and write MCD meta-data into the MCD table, including a MCD identifier (ID) associated with the contiguous memory block and a MCD border value indicating a size of a memory region of the contiguous memory block.Type: GrantFiled: September 18, 2017Date of Patent: October 9, 2018Assignee: Intel CorporationInventors: Tomer Stark, Ady Tal, Ron Gabor, Joseph Nuzman
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Patent number: 10095574Abstract: Apparatuses and methods for comparing a sense current representative of a number of failing memory cells of a group of memory cells and a reference current representative of a reference number of failing memory cells is provided. One such apparatus includes a comparator configured to receive the sense current and to receive the reference current. The comparator includes a sense current buffer configured to buffer the sense current and the comparator is further configured to provide an output signal having a logic level indicative of a result of the comparison.Type: GrantFiled: December 13, 2017Date of Patent: October 9, 2018Assignee: Micron Technology, Inc.Inventor: Jae-Kwan Park
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Patent number: 10095575Abstract: A user equipment node, upon determining that the data loss in a requested file is above, or likely to be above a threshold value, transmits a delivery missing report to a server node indicating that the data loss in the requested file is above the threshold value. The delivery missing report is used by the server node for determining whether or not a multicast file repair procedure should be enabled, based on the number of delivery missing reports it has received from other user equipment nodes. This enables a point-to-multipoint file repair procedure to be enabled sooner, and prevent a flood of point-to-point file repairs.Type: GrantFiled: July 27, 2012Date of Patent: October 9, 2018Assignee: Telefonaktiebolaget LM Ericsson (publ)Inventors: Robbie Ling, Emer Chen, Jinyang Xie
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Patent number: 10095576Abstract: The invention proposes a virtual machine abnormity recovering method in distributed environment, comprising: running an independent computing assembly on each physical machine on which a virtual machine resides, wherein the computing assembly periodically reports the current running state of the corresponding physical machine to a state database; periodically polling the state database by a highly available controller so as to check the running state of all the physical machines in a physical machine group under the control of the highly available controller; and executing subsequent abnormity processing operation if the running state of only one physical machine in the physical machine group is abnormal so as to ensure that virtual machines on the physical machine whose running state is abnormal continues running normally.Type: GrantFiled: May 5, 2015Date of Patent: October 9, 2018Assignee: CHINA UNIONPAY CO., LTD.Inventors: Hongfeng Chai, Zhijun Lu, Lijun Zu, Yixing Yan
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Patent number: 10095577Abstract: Provided herein is a memory system and an operation method thereof. The memory system may include a memory controller including a read retry table in which a plurality of codes are stored, and configured to output a selected code among the plurality of codes during a read retry operation. The memory system may include a memory device configured to store data, and perform the read retry operation according to the codes received from the memory controller.Type: GrantFiled: June 29, 2017Date of Patent: October 9, 2018Assignee: SK hynix Inc.Inventor: Heon Jin Choo
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Patent number: 10095578Abstract: A method for modifying data stored in a dispersed storage network (DSN). In various embodiments, a data object is received for storage in DSN memory. A dispersed storage processing unit determines a number of data segments for the data object and divides the data object into a plurality of data blocks. The data blocks are allocated to the data segments in a column-row orientation (for example, columns may be populated with successive data blocks of the data object). The data segments are encoded to produce a plurality of sets of encoded data slices. Additional data received for the data object is divided into additional data blocks that are allocated to data segments to create one or more new columns, which are encoded to produce a plurality of encoded data slice addendums. The encoded data slice addendums are then appended to existing encoded data slices corresponding to the data object.Type: GrantFiled: August 6, 2014Date of Patent: October 9, 2018Assignee: International Business Machines CorporationInventor: Jason K. Resch
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Patent number: 10095579Abstract: According to one embodiment, a computer program embodied on a tangible computer readable medium includes computer code for identifying a first write to a first persistent memory on a first channel and a second write to a second persistent memory on a second channel, computer code for performing a third write to a third persistent memory on a third channel, where the third write includes parity data associated with the first write and the second write, computer code for identifying a failure of the second persistent memory, and computer code for generating recovery data for the second persistent memory, using the first channel, the third channel, and the parity data.Type: GrantFiled: June 29, 2016Date of Patent: October 9, 2018Assignee: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.Inventors: Makoto Ono, Sumeet Kochar, Nagananda Chumbalkar
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Patent number: 10095580Abstract: A method includes sending, in response to read operation, read requests regarding a read threshold number of encoded data slices of a set of encoded data slices to storage units, where the read threshold number is between a decode threshold number and a total number of encoded data slices of the set of encoded data slices. The method further includes sending status inquiries regarding a remaining number of encoded data slices of the set of encoded slices to other storage units, where the remaining number equals the total number minus the read threshold number. The method further includes receiving responses from the storage units regarding the read requests and the status inquires. The method further includes determining, based on the responses, that an encoded data slice of the set of encoded data slices requires rebuilding, and rebuilding the encoded data slice while processing the read operation.Type: GrantFiled: November 15, 2016Date of Patent: October 9, 2018Assignee: International Business Machines CorporationInventors: Brennan James Trichardt, Jason K. Resch
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Patent number: 10095581Abstract: A storage manager may be used to perform a decoding operation using a transmission time refinement technique on a data object stored in a storage system, such as an object-redundant storage system. The decoding operation may include requesting groups of corresponding blocks from storage devices of the storage system. The storage manager may maintain connections to a connection group of the storage devices and may iteratively request corresponding blocks of the data object from one or more various request groups of the storage devices of the connection group. The storage manager may evaluate performance of the request groups in sending the corresponding blocks of the data object and may modify the membership of the request groups for requests for subsequent blocks of the data object based at least in part on the performance of the request groups.Type: GrantFiled: June 2, 2017Date of Patent: October 9, 2018Assignee: Amazon Technologies, Inc.Inventor: Rajesh Shanker Patel
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Patent number: 10095582Abstract: Methods for use in a dispersed storage network (DSN) to rebuild data. In various examples, at least one data segment of a data object is dispersed storage error encoded to produce a set of encoded data slices that includes an information dispersal algorithm (IDA) width number of encoded data slices, wherein the IDA width number is at least twice the number of storage units of a set of storage units utilized to store the data object. At least two encoded data slices are stored in each of the storage units. In response to detecting a storage error indicating an error slice, a partial threshold number of partial encoded data slices (generated by performing a partial encoding function on stored encoded data slices) are generated. The partial threshold number of partial encoded data slice responses are combined to produce a rebuilt encoded data slice corresponding to the error slice.Type: GrantFiled: December 19, 2017Date of Patent: October 9, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Greg R. Dhuse, Trevor J. Vossberg, Jason K. Resch
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Patent number: 10095583Abstract: During checkpointing of a virtual computing instance running in a first host computer, memory pages that have been modified during a checkpoint time interval are lazily transmitted from the first host computer to a second, backup, host computer. The lazy transmission technique includes the steps of stunning the virtual computing instance at the end of the time interval, and after said stunning, (i) detecting at the first host computer the memory pages that have been modified during the time interval, and (ii) copying one or more of the modified memory pages to a memory region in the first host computer. Then, after the virtual computing instance resumes execution, i.e., while the virtual computing instance is running in the first host computer, the copied memory pages are transmitted from the memory region in the first host computer to the second host computer.Type: GrantFiled: December 17, 2015Date of Patent: October 9, 2018Assignee: VMWARE, INC.Inventor: James E. Chow
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Patent number: 10095584Abstract: The amount of data to be backed up and recovered is reduced when supply of power to a semiconductor device is stopped and restarted. A backup need determination circuit provided in the semiconductor device reads the kind of instruction decoded by a decoder and determines whether data needs to be backed up from a volatile register to a nonvolatile register. With a structure according to one embodiment of the present invention, it is possible to select necessary data from data used for operation in a logic circuit before the power supply is stopped and after the power supply is restarted. Data that is necessary after the power supply is restarted can be backed up from the volatile register to the nonvolatile register before the power supply is stopped. Data that is unnecessary is not backed up from the volatile register to the nonvolatile register before the power supply is stopped.Type: GrantFiled: April 23, 2014Date of Patent: October 9, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Seiichi Yoneda
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Patent number: 10095585Abstract: A technique rebuilds data from a group of hard disk drives (HDDs). The technique is performed in data storage equipment and involves storing data on a group of HDDs. The group of HDDs is constructed and arranged to maintain data availability following a HDD failure. The technique further involves, after storing the data on the group of HDDs, detecting a failure of a particular HDD of the group of HDDs. The technique further involves, after detecting the failure of the particular HDD, rebuilding a particular portion of data onto a solid state drive (SSD) based on other portions of the data residing on remaining HDDs of the group of HDDs other than the particular HDD, the particular portion of the data having resided on the particular HDD that failed.Type: GrantFiled: June 28, 2016Date of Patent: October 9, 2018Assignee: EMC IP Holding Company LLCInventor: Ronald D. Proulx
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Patent number: 10095587Abstract: A method for backing up and recovering data is disclosed. Data representing an allocation of a plurality of backup resources to a plurality of restricted data zones is stored in a storage device. Any of the plurality of backup resources allocated to one restricted data zone is not allocated to another restricted data zone. A user is associated with one of the plurality of restricted data zones. Backup and recovery services are provided to the user using one or more backup resources allocated to the restricted data zone associated with the user. The backup and recovery services provided to the user are segregated from backup and recovery services provided to other users associated with restricted data zones that are different from the restricted data zone associated with the user.Type: GrantFiled: December 23, 2011Date of Patent: October 9, 2018Assignee: EMC IP Holding Company LLCInventors: Daniel Varrin, Michael Jacek Drozd, Michael G. Roche
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Patent number: 10095588Abstract: In one example, a method for data backup includes surveying a database availability group (DAG) that includes multiple nodes which are each associated with one or more databases, to determine a distribution of the databases across the nodes. Next, federated logic is used to create a profile of the DAG based on the survey, and the profile is used to generate a dynamic preferred server order list (PSOL). Load balancing for the DAG is performed using the dynamic PSOL, and the dynamic PSOL is updated based on results of the load balancing. Finally, a federated backup of the databases is performed based on the updated dynamic PSOL.Type: GrantFiled: April 24, 2017Date of Patent: October 9, 2018Assignee: EMC IP HOLDING COMPANY LLCInventors: Shelesh Chopra, Shoukathali Chandrakandi, Gajendran Raghunathan, Sainath Gonugunta
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Patent number: 10095589Abstract: A method and system is provided for optimization of restoration and loading of an operating system of a computer. An exemplary method includes initiating a loading of the operating system of the computer and intercepting a read request of data of a data volume from the operating system. Furthermore, the method includes determining whether the data has previously been restored during the loading of the operating system, and, if the data has previously been restored, performing the read request and returning to the loading of the operating system of the computer. Alternatively, if the data has not previously been restored, determining whether the data is stored in cache of the computer. If the data is not be stored in the cache, the method includes reading the data from a data archive and storing the data read from the data archive to the cache.Type: GrantFiled: June 8, 2016Date of Patent: October 9, 2018Assignee: ACRONIS INTERNATIONAL GMBHInventors: Maxim V. Lyadvinsky, Andrey Redko, Ivan Kukhta, Anatoly Stupak, Serguei Beloussov, Stanislav M. Protassov, Mark Shmulevich