Abstract: There is provided a distributed object storage system that includes several performance optimizations with respect to efficiently storing data objects when coping with a desired concurrent failure tolerance of concurrent failures of storage elements which is greater than two and with respect to optimizing encoding/decoding overhead and the number of input and output operations at the level of the storage elements.

Abstract: Headstart restore of a first volume to a second volume. In one example embodiment, a method for headstart restore of a first volume to a second volume may include invalidating, on disk, a boot segment of a volume boot record of the second volume, storing headstart restore information in the second volume, while the boot segment of the volume boot record of the second volume remains invalidated, writing data from one or more backups of the first volume to a data segment of the second volume, removing the headstart restore information from the second volume, and revalidating, on disk, the boot segment of the volume boot record of the second volume.

Abstract: A HA computer system is configured to support the operation of an active and a standby virtual machine, and the active virtual machine supports one or more first computer processes and the standby virtual machines supports duplicates of the one or more first computer processes. Each active virtual machine monitors and stores a state of the first computer processes and periodically pauses to only synchronize some of the state of the first computer processes running on the active VM with state associated with the duplicate processes running on the standby VM stored in a first region of virtual memory.

Abstract: An approach for at least one service processor to receive a notification of at least one failure during an initial program load of a server and to identify at least one step failing the initial program load. The at least one service processor determines whether a set of conditions are met to switch the initial program load responsibility from a master processor to a service processor. Furthermore, responsive to the at least one service processor determining that the set of one or more conditions are met to switch initial program load responsibility, the at least one service processor assumes the initial program load responsibility.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for cooperative fault tolerance and load balancing. In one aspect, a method includes receiving a request from an entity wherein the request includes metadata specifying a plurality of non-responsive servers to which the entity sent the request but that could not process the request; determining that the data processing apparatus is not a current home server for the entity based on information cached in the data processing apparatus, wherein the current home server is a server within a plurality of preferred servers that processes requests for the entity and, in response thereto: assigning the data processing apparatus as the current home server so that the entity will send subsequent requests to the data processing apparatus for processing; and sending a response to the entity.

Abstract: A data storage system includes a controller, a hot spare storage device and a plurality of primary storage devices. The controller utilizes the hot spare storage device to mirror only a subset of each stripe of logical pages written across the data storage array, where the subset includes a logical page determined by a write input/output operation (IOP) policy. In response to receipt of a write IOP, the controller writes a stripe including a plurality of logical data pages and a logical data protection page across the plurality of primary storage devices and mirrors the logical page determined by the write IOP policy on the hot spare storage device. In response to a failure of a storage device among the plurality of primary storage devices, contents of the failed storage device not already mirrored on the hot spare storage device are rebuilt on the hot spare storage device.

Abstract: A system and method is disclosed for storing a block of data in a distributed data-storage system. An example method includes identifying a list of a plurality of disks in the distributed data-storage system, randomly selecting a disk from the list of the plurality of disks and adding the selected disk to a subset of disks allocated for a copyset, and continuously performing the step of randomly selecting the disk and adding the disk to the subset of disks until the copyset contains a predetermined amount of allocated disks from the distributed data-storage system. Furthermore, this process is repeated to perform a plurality of copysets. Once the copysets are defined, the method further includes dividing the block of data into a number of data chunks equal to the predetermined amount of allocated disks, and, distributing the data chunks onto disks of one of the plurality of the copysets.

Abstract: Debugging operations may utilize a dedicated debug port associated with a baseboard management controller. The baseboard management controller executes software programming that eliminates any need for a debugging cable. The baseboard management controller also permits debugging between virtual machines.

Abstract: Embodiments disclose techniques for scheduling test cases without regeneration to verify and validate a computing system. In one embodiment, a testing engine generates a test case for a plurality of processors. Each test case includes streams of instructions. The testing engine also allocates at least one cache line associated with the streams of instructions of the generated test case such that each of the plurality of processors accesses different memory locations within the at least one cache line. The testing engine further schedules the generated test case for execution by the plurality of processors to achieve at least a first test coverage among the plurality of processors. The testing engine further re-schedules the generated test case for re-execution by the plurality of processors to achieve at least a second test coverage among the plurality of processors.

Abstract: A combination of one or more monitoring devices and a central processor at a hosted service gathers data from a customer site, identifies energy system events of interest, and analyzes the energy system event of interest to determine and recommend or implement vendor services designed to increase energy savings and/or energy system reliability.

Abstract: A method, computer program product, and computer system for identifying a current amount of resources used by a computing device. A future amount of resources may be estimated for executing a trace for a subsystem of the computing device. One or more rules may be identified for executing the trace for the subsystem of the computing device, wherein the one or more rules may be based upon, at least in part, at least one of the current amount of resources used by the computing device and the future amount of resources for executing the trace for the subsystem of the computing device. It may be determined whether to execute the trace for the subsystem of the computing device based upon, at least in part, the one or more rules.

Abstract: A method and apparatus of monitoring computer devices operating on a network is disclosed. Computer devices are all different and require monitoring settings that are tailored to their specific requirements. One example of the present invention may include a method of monitoring at least one computer device operating on a network. The method may include receiving audit information representing attributes of the computer device and storing the audit information in memory. The method may also include comparing the audit information to a predefined monitor set of objects to be monitored. The method may further include creating a new monitor set based on the comparison of the audit information and the predefined monitor set. The new monitor set is different from the predefined monitor set and is generally used to monitor objects which are included in the audited device. The method may also include monitoring the at least one computer device based on the new monitor set.

Abstract: An information processing apparatus includes a memory, and a processor coupled to the memory and configured to obtain performance data of the information processing apparatus at a first time interval repetitively, write the performance data in the memory when a particular value of the performance data indicates a performance decrement of the information processing apparatus, and set a second time interval longer than the first time interval instead of the first time interval for obtaining the performance data when the particular value does not indicate a performance decrement of the information processing apparatus.

Abstract: In one embodiment, a field programmable gate array (FPGA) includes: programmable logic to perform at least one function for a processor coupled to the FPGA; a performance monitor circuit including a set of performance monitors to be programmably associated with a first kernel to execute on the FPGA; and a monitor circuit to receive kernel registration information of the first kernel from the processor and program a first set of performance monitors for association with the first kernel based on the kernel registration information. Other embodiments are described and claimed.

Abstract: Embodiments of the present invention provide a method, system and computer program product for application performance perception metering. In an embodiment of the invention, an application performance perception metering method includes initially monitoring resource performance in a computing device during utilization of a computer program through the computing device. Thereafter, the monitored resource performance is compared with historical resource performance during past utilization of the computer program through the computing device. Finally, a prompt can be displayed in the computing device responsive to a determination that the monitored resource performance is deficient relative to the historical resource performance. However, a prompt also can be displayed in the computing device indicating that the computer program is performing poorly based upon a determination that the monitored resource consumption is comparable to the historical resource consumption.

Abstract: This disclosure presents computational systems and methods for detecting anomalies in data output from any type of monitoring tool. The data is aggregated and sent to an alerting system for abnormality detection via comparison with normalcy bounds. The anomaly detection methods are performed by construction of normalcy bounds of the data based on the past behavior of the data output from the monitoring tool. The methods use data quality assurance and data categorization processes that allow choosing a correct procedure for determination of the normalcy bounds. The methods are completely data agnostic, and as a result, can also be used to detect abnormalities in time series data associated with any complex system.

Abstract: A method is presented to verify correctness of computer system software and hardware components. The method includes: operating a test environment with a verified system software and hardware version; monitoring and recording each hardware access during operation of the test environment with the verified system software and hardware version to generate a corresponding verified trace file; operating the test environment with a modified system software and/or hardware version; monitoring and recording each hardware access to generate a corresponding new trace file during operation of the test environment with the modified system software and/or hardware version; defining an arbitrary order for target chips in the verified and the modified hardware model or hardware system version; sorting sequences of entries in both trace files according to the target chip order; and comparing the sorted trace files by comparing their entries each by each and outputting a corresponding comparison result.

Abstract: A processor system tracks, in at least one counter, a number of cycles in which at least one execution unit of at least one processor core is idle and at least one thread of the at least one processor core is waiting on at least one off-core memory access during run-time of the at least one processor core during an interval comprising multiple cycles. The processor system evaluates an expected performance impact of a frequency change within the at least one processor core based on the current run-time conditions for executing at least one operation tracked in the at least one counter during the interval.

Abstract: Computer program, methods, and systems for code modification of a programming language platform and a software application in an intermediate language at different times are disclosed. The methods and system may modify a portion of the programming language platform in the intermediate language at a first time to alter a functionality of or add a new functionality to the programming language platform; and may modify the software application in the intermediate language at a second time different from the first time, where the software application may be modified based on a runtime analysis rule that uses the altered or added new functionality of the programming language platform. The modified programming language platform may be included in a first package, and the modified software application may be included in a second package, and executed on the modified programming language platform.

Abstract: Identification and dynamic ranking of performance issues. For an instance of a performance anti-pattern, identifying and recording information relating to a resultant performance issue, quantifying the magnitude of the performance issue, and dynamically ranking the performance issue against other performance issues.

Abstract: Embodiments include methods, systems, and computer program products for using static analysis to issue complaints. Aspects include generating, using a processing unit, a first complaint during static analysis of program code, wherein the first complaint corresponds to a program error. Aspects also include generating, using the processing unit, a second complaint when the first complaint is not encountered during subsequent static analysis of the program code. Aspects further include outputting, using the processing unit, the second complaint to a non-transitory computer readable medium.

Abstract: A streams analysis tool allows a user to define one or more buckets according to a specified tuple collection criteria for each bucket. The specified tuple collection criteria for each bucket defines some way to distinguish one data tuple from another. The specified tuple collection criteria for each bucket is therefore used to distinguish data tuples that satisfy the specified tuple collection criteria from data tuples that do not satisfy the specified tuple collection criteria. When a data tuple satisfies the specified tuple collection criteria for a bucket, the data tuple is stored in the bucket. In addition, data tuples preceding or succeeding the data tuple may also be stored in the bucket, as determined by the specified tuple collection criteria. The data tuples in each bucket are analyzed, and based on the analysis a streams manager can change how future data tuples are processed by the streaming application.

Abstract: A dynamic shared-memory data race detection tool with data-scoping capabilities to reduce runtime overheads is disclosed. The tool allows users to restrict analysis of memory locations to heap and/or stack variables that are of interest to them using explicit calls to functions provided in a library that is part of the race detection tool. The application code is instrumented to insert probes at all memory instructions and linked with the data race detection library to perform data-scoped race detection.

Abstract: The present technology monitors events that allocate and deallocate virtual memory regions in a device, wherein the events include system calls from user space. The system can generate a log of events, and based on the log of events, track regions of virtual memory allocated and deallocated via the events. The system can also record events with corresponding stack traces. Next, the system can group recorded events having matching stack traces to yield event groupings, and instrument functions in a compiled code associated with the process to determine retain counts of respective events associated with the functions. The system can then automatically pair at least one of a first portion of the events and a second portion of the respective events based on the event groupings and the retain counts of the respective events to yield paired events.

Abstract: Systems and methods are provided for creating a sandbox for an original tenant at a point in time, the original tenant having original tenant data stored in an immutable storage associated with an original tenant identifier, the original tenant data as of the sandbox creation point in time being a virtual snapshot of the original tenant data accessible by a sandbox tenant, where the sandbox tenant data can be changed without changing the original tenant data, and the original tenant data can be changed without changing the sandbox tenant data. A sandbox tenant is created by associating a sandbox tenant identifier with the virtual snapshot of the original tenant data and with sandbox tenant data created by the sandbox tenant subsequent to the sandbox creation point in time. Original tenant data is subsequently created and associated with the original tenant identifier, and is not accessible to the sandbox tenant.

Abstract: Systems and techniques are described for identifying test gaps. A described technique includes identifying production code paths for an application. Each production code path specifies a respective sequence of code of the application that was executed in a production environment. Test code paths are identified for the application. Each test code path specifies a respective sequence of the application that was tested in a test environment. The production code paths are compared to the test code paths to identify a set of test gaps for the application. Each test gap specifies a respective production code path that is not included in the test code paths. Test gap data specifying the test gaps for the application can be provided for presentation to a user.

Abstract: The present disclosure relates to a method and a system for enabling self-maintainable test automation. In one embodiment, the system creates a test automation suite using historical test scenarios and automatically updates the test automation suite based on functional changes in one or more related applications. The system determines one or more reusable automation units and one or more test data units that are affected by the functional changes identified in test scenarios received as input and accordingly updates the one or more reusable automation units and one or more test data units. Thus, the system enables self-maintainable test automation, thereby eliminating the effort and expertise required to create automation test suite, build automation scripts, and modify automation scripts for future enhancements.

Abstract: A test input information search device searches for a candidate for test inputting in a database, and stores information of the database including a plurality of elements configured with a first structure, stores screen information including the plurality of elements configured with a second structure and displayed, identifies, from the second structure, relation between the elements in the plurality of elements included in the screen information, and searches for, based on the identified relation between the elements, the plurality of elements as the candidate for the test inputting from the information of the database.

Abstract: A computer-implemented method includes accessing a plurality of data records, each data record having a plurality of data fields. The method further includes analyzing values for one or more of the data fields for at least some of the plurality of data records and generating a profile of the plurality of data records based on the analyzing. The method further includes formulating at least one subsetting rule based on the profile; and selecting a subset of data records from the plurality of data records based on the at least one subsetting rule.

Abstract: A system for performance testing a web application initializes to be instrumented a subset of methods of the web application to be tested in response to a request, and then tests the application based on the subset of methods. The system generates an instrumented call tree and corresponding stack traces for each request in response to the testing, and determines one or more methods that take longer than a predetermined time period to execute using the instrumented call trees and the stack traces. The system then determines additional methods to be tested and adds the determined additional methods to the subset of methods and repeats the testing.

Abstract: Systems and methods for benchmark based cross platform service demand prediction includes generation of performance mimicking benchmarks that require only application level profiling and provide a representative value of service demand of an application under consideration on a production platform, thereby eliminating need for actually deploying the application under consideration on a production platform. The PMBs require only a representative estimate of service demand of the application under test and can be reused to represent multiple applications. The PMBs are generated based on a skeletal benchmark corresponding to the technology stack used by the application under test and an input file generated based on application profiling that provides pre-defined lower level method calls, data flow sequences between multi-tiers of the application under test and send and receive network calls made by the application under consideration.

Abstract: An optimized test data selection strategy references a sampling file that identifies data attributes that serve as the basis of the test data selection strategy. By analyzing fields and the corresponding field values of the sample imprint, a total number of test data selected for inclusion into a sample dataset is reduced. The test data selection strategy provides an efficient methodology for implementing a data comparison testing process.

Abstract: The factorization of test components when performing component-level regression testing in iterative builds of a computing system that consists of many working components. Performance metrics for test components are maintained across multiple builds of the computing program. To perform factorization, multiple factorings of a test component are identified and evaluated until a suitable improvement in the maintained performance metric for each corresponding test component is achieved (e.g., via simulation). This may be performed, across multiple of the test components. This process may be iterated through such that the set of test components being factored and evaluated in a subsequent iteration may in fact be a test component created by factorization in a prior iteration. The net result is that the factorization achieves improvement in performance metrics of the test components.

Abstract: Methods and apparatus for managing an effective address table (EAT) in a multi-slice processor including receiving, from an instruction sequence unit, a next-to-complete instruction tag (ITAG); obtaining, from the EAT, a first ITAG from a tail-plus-one EAT row, wherein the EAT comprises a tail EAT row that precedes the tail-plus-one EAT row; determining, based on a comparison of the next-to-complete ITAG and the first ITAG, that the tail EAT row has completed; and retiring the tail EAT row based on the determination.

Abstract: Systems and methods are provided for implementing a memory subsystem to augment physical memory of a computing system. For example, a system comprises a memory subsystem, and a computing system coupled to the memory subsystem. The computing system comprises a processor, a first memory module, and a second memory module. The first memory module comprises random access memory which is utilized by the processor to store data associated with an application executing on the computing system. The second memory module comprises control logic circuitry that is configured to control access to the memory subsystem on behalf of the processor to store and retrieve data associated with the application executing on the computing system.

Abstract: A system includes reception of an instruction to create a data block associated with a portion of a database table in a non-volatile memory system, creation, in response to the instruction to create the data block, of a file associated with the data block in the non-volatile memory system, where a filename of the file comprises an indication that the data block is a temporary block, creation of an entry in a data block map table indicating that the data block is a temporary block, reception of an instruction to commit the data block, and, in response to the instruction to commit the data block, flush data associated with the data block to the file in the non-volatile memory system, rename the file to remove the indication that the data block is a temporary block, and update the entry in the data block map to indicate that the data block is a committed block.

Abstract: Dynamically varying Over-Provisioning (OP) enables improvements in lifetime, reliability, and/or performance of a Solid-State Disk (SSD) and/or a flash memory therein. A host coupled to the SSD writes newer data to the SSD. If the newer host data is less random than older host data, then entropy of host data on the SSD decreases. In response, an SSD controller dynamically alters allocations of the flash memory, decreasing host allocation and increasing OP allocation. If the newer host data is more random, then the SSD controller dynamically increases the host allocation and decreases the OP allocation. The SSD controller dynamically allocates the OP allocation between host OP and system OP proportionally in accordance with a ratio of bandwidths of host and system data writes to the flash memory. Changes in allocations are selectively made in response to improved compression or deduplication of the host data, or in response to a host command.

Abstract: A write frequency of a non-volatile memory is determined at a fine granularity while suppressing consumption of the volatile memory. When it is determined that a copy of specified data from a specified physical storage area to another physical storage area is to be executed, a controller reads the specified data and specified write frequency information, selects a write destination physical storage area group from a plurality of physical storage area groups based on the specified write frequency information and classification information, selects a write destination physical storage area from the write destination physical storage area group, changes the specified write frequency information, writes the specified data to the write destination physical storage area, writes the changed specified write frequency information to the non-volatile memory, and updates translation information based on the write destination physical storage area group and the write destination physical storage area.

Abstract: An enhanced dynamic address translation facility product is created such that, in one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. Dynamic address translation of the virtual address proceeds. In response to a translation interruption having occurred during dynamic address translation, bits are stored in a translation exception qualifier (TXQ) field to indicate that the exception was either a host DAT exception having occurred while running a host program or a host DAT exception having occurred while running a guest program. The TXQ is further capable of indicating that the exception was associated with a host virtual address derived from a guest page frame real address or a guest segment frame absolute address. The TXQ is further capable of indicating that a larger or smaller host frame size is preferred to back a guest frame.

Abstract: Examples described herein relate to caching in a system with multiple nodes sharing a globally addressable memory. The globally addressable memory includes multiple windows that each include multiple chunks. Each node of a set of the nodes includes a cache that is associated with one of the windows. One of the nodes includes write access to one of the chunks of the window. The other nodes include read access to the chunk. The node with write access further includes a copy of the chunk in its cache and modifies multiple lines of the chunk copy. After a first line of the chunk copy is modified, a notification is sent to the other nodes that the chunk should be marked dirty. After multiple lines are modified, an invalidation message is sent for each of the modified lines of the set of the nodes.

Abstract: A system and method are described for integrating a memory and storage hierarchy including a non-volatile memory tier within a computer system. In one embodiment, PCMS memory devices are used as one tier in the hierarchy, sometimes referred to as “far memory.” Higher performance memory devices such as DRAM placed in front of the far memory and are used to mask some of the performance limitations of the far memory. These higher performance memory devices are referred to as “near memory.

Abstract: Aspects include creating a network multicast group in a storage area network (SAN) for a first computer system and a second computer system that are connected by the SAN and that each include a local cache for a shared storage device. Prior to one of the first or second computer system writing write data to the shared storage device: the write data is written to the local cache of the one of the first or second computer system; the write data is sent to the multicast group; based on the send operation completing, the write data is written to the shared storage device; and based on the write operation completing, the write completion is signaled to an operating system or hypervisor of the first and second computer systems.

Abstract: Provided are an apparatus, system, and method for sparse superline removal. In response to occupancy of a replacement tracker (RT) exceeding an RT eviction watermark, an eviction process is triggered for evicting a superline from a sectored cache storing at least one superline. An eviction candidate is selected from superlines that have: 1) a sector usage below or equal to a superline low watermark and 2) an RT timestamp that is greater than a superline age watermark.

Abstract: A method for identifying, in a system including two or more computing devices that are able to communicate with each other, with each computing device having with a cache and connected to a corresponding memory, a computing device accessing one of the memories, includes monitoring memory access to any of the memories; monitoring cache coherency commands between computing devices; and identifying the computing device accessing one of the memories by using information related to the memory access and cache coherency commands.

Abstract: Provided are a computer program product, system, and method for considering a frequency of access to groups of tracks to select groups of tracks to destage. A first scanning of groups of tracks in the cache is performed to destage each of the groups of tracks having a group frequency satisfying a first frequency requirement. The group frequency indicates a frequency with which the tracks in the group are modified. A second scanning of groups of tracks in the cache is performed to destage each of the groups of tracks having the group frequency satisfying a second frequency requirement.

Abstract: A data caching method and a computer system are provided. In the method, when a miss of an access request occurs and a cache needs to determine a to-be-replaced cache line, not only a historical access frequency of the cache line but also a type of a memory corresponding to the cache line needs to be considered. A cache line corresponding to a DRAM type may be preferably replaced, which reduces a caching amount in the cache for data stored in a DRAM and relatively increase a caching amount for data stored in an NVM. For an access request for accessing the data stored in the NVM, corresponding data can be found in the cache whenever possible, thereby reducing cases of reading data from the NVM. Thus, a delay in reading data from the NVM is reduced, and access efficiency is effectively improved.

Abstract: Implementations described and claimed herein provide a coordination of interdependent asynchronous reads. In one implementation, an input/output request for a target data block stored on a block device at a virtual address is received. A highest level indirect block from which the target data block depends in a hierarchical data structure pointing to the virtual address of the target data block is identified. The highest level indirect block is uncached. A context item is recorded to an input/output structure for the highest level indirect block. The context item indicates that an ultimate objective of a read request for the highest level indirect block is to retrieve the target data block. The input/output request is asynchronously reissued for the target data block upon receipt of the read request for the highest level indirect block.

Abstract: Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive, in a read/modify/write (RMW) pipeline, a cache access request from a requestor, wherein the cache request comprises a cache set identifier associated with requested data in the cache set, determine whether the cache set associated with the cache set identifier is in an inaccessible invalid state, and in response to a determination that the cache set is in an inaccessible state or an invalid state, to terminate the cache access request. Other embodiments are also disclosed and claimed.

Abstract: Provided is a processor including a plurality of devices. The processor includes a source processing device configured to identify data to request from another device, and a destination processing device configured to, in response to a request for the identified data from the source processing device using credit-based flow control, transmit the identified data to the source processing device using the credit-based flow control. The source processing device includes a credit buffer used for the credit-based flow control, the credit buffer being allocable to include a cache region configured to cache the transmitted identified data received by the source processing device.

Abstract: In response to a determination to allocate additional storage, within a real address space employed by a system memory of a data processing system, for translation control entries (TCEs) that translate addresses from an input/output (I/O) address space to the real address space, a determination is made whether or not a first real address range contiguous with an existing TCE data structure is available for allocation. In response to determining that the first real address range is available for allocation, the first real address range is allocated for storage of TCEs, and a number of levels in the TCE data structure is retained. In response to determining that the first real address range is not available for allocation, a second real address range discontiguous with the existing TCE data structure is allocated for storage of the TCEs, and a number of levels in the TCE data structure is increased.