Abstract: A method of orchestrated shuffling of data in a non-uniform memory access device that includes a plurality of processing nodes that are connected by interconnects. The method includes running an application on a plurality of threads executing on the plurality of processing nodes. Data to be shuffled is identified from source threads running on source processing nodes among the processing nodes to target threads executing on target processing nodes among the processing nodes. The method further includes generating a plan for orchestrating the shuffling of the data among the all of the memory devices associated with the threads and for simultaneously transmitting data over different interconnects to a plurality of different target processing nodes from a plurality of different source processing nodes. The data is shuffled among all of the memory devices based on the plan. The data includes operand data and operational state data of the source threads.

Abstract: An aspect includes receiving a request to write data to a memory that includes a stack of memory devices, each of the memory devices communicatively coupled to at least one other of the memory devices in the stack via a through silicon via (TSV). The write request is received by a hypervisor from an application executing on a virtual machine managed by the hypervisor. In response to receiving the request a latency requirement of accesses to the write data is determined. A physical location on a memory device in the stack of memory devices is assigned to the write data based at least in part on the latency requirement and a position of the memory device in the stack of memory devices. A write command that includes the physical location and the write data is sent to a memory controller.

Abstract: A storage system having an adaptive workload-based command processing clock is provided. In one embodiment, a storage system has a memory, a command processing path, and a controller in communication with the memory and the command processing path. The controller is configured to adapt an input clock signal based on a current workload of the controller and provide the adapted clock signal to the command processing path in the controller.

Abstract: A System, computer program product, and computer-executable method of transitioning replication on a data storage system including a production site and a replication site from asynchronous replication to synchronous replication, the System, computer program product, and computer-executable method including receiving a request to transition from asynchronous replication to synchronous replication and changing the data storage system to a transition mode, wherein the data storage system transitions the data storage system from using asynchronous replication to synchronous replication.

Abstract: A method for ensuring appropriate content formatting of data prior to storage in a dispersed storage network (DSN) includes sending a content format verification code (“code”) to a secure execution module. The method further includes signing the code with a secure execution module signature to produce a trusted code and sending the trusted code to a trusted computing module. The method further includes sending, by the trusted computing module, the secure execution module signature and a trusted content format verification code identification to a dispersed storage (DS) processing unit. When the secure execution module signature and the trusted code ID are verified, the method includes sending a write request to the trusted computing module, determining whether the data is in the appropriate content format based on the trusted code, and when the data of the write request is in the appropriate format, sending the data to the DS processing unit.

Abstract: A system maintains a consistency database that maintains a status (current, down, stale) for copies of logical storage volumes stored on storage nodes. As failures are detected, the consistency database is updated. Copies are synchronized with one another using information in the consistency database. Write operations on a primary node for a slice of a logical storage node are assigned a virtual block address (VBA) that is mapped to a logical block address (LBA) within the slice. Consistency of the VBAs of the primary node and that of a secondary node is evaluated and used to detect currency. VBA holes are detected and corresponding write commands resent to maintain currency. Physical segments on the primary node are assigned virtual segment identifiers (VSID) that are maintained consistent with VSIDs on clone nodes so that they can be used for garbage collection and synchronization.

Abstract: According to an embodiment, an information processing apparatus includes a non-volatile memory manager. The non-volatile memory manager is configured to save, in a non-volatile memory section, information of a plurality of storage sections to be read after rebooting. The non-volatile memory section is configured to keep storing information even if power is off.

Abstract: Exemplary methods, apparatuses, and systems include a memory controller detecting that an asynchronous power loss event has occurred. Upon determining that a write operation is in progress to a first type of non-volatile memory element, the memory controller cancels the write operation and retrieves data associated with the write operation. The memory controller sends a request for a second physical address pointing to a second type of non-volatile memory element. Upon receiving a second physical address corresponding to a logical address, the memory controller stores the data at the second physical address.

Abstract: An SR-IOV-supported storage resource access method is disclosed, the method includes: consolidating a storage medium as a unified storage resource, and dividing the unified storage resource into multiple storage sub-resources; allocating the storage sub-resources to at least one of a PF or a VF according to a preset allocation rule, and maintaining a resource allocation table including a mapping relationship between the storage sub-resources and at least one of PF or VF; receiving a host command sent by a virtual machine to a destination VF or by a virtual machine monitor to a destination PF; and searching the resource allocation table according to destination VF or destination PF, and performing, on a storage sub-resource corresponding to destination PF or destination VF and according to the mapping relationship between the storage sub-resources and the PF or the VF in the resource allocation table, an operation corresponding to the host command.

Abstract: Apparatuses and methods for memory array accessibility can include an apparatus with an array of memory cells. The array can include a first portion accessible by a controller of the array and inaccessible to devices external to the apparatus. The array can include a second portion accessible to the devices external to the apparatus. The array can include a number of registers that store row address that indicate which portion of the array is the first portion. The apparatus can include the controller configured to access the number of registers to allow access to the second portion by the devices external to the apparatus based on the stored row addresses.

Abstract: Apparatus, and an associated method, for enhancing security and preventing hacking of a flash memory device. The apparatus and method use a random number to offset the read or write address in a memory cell. The random number is generated by determining the leakage current of memory cells. In another embodiment, random data can be written or read in parallel to thwart hackers from determining contents of data being written or read by monitoring sense amplifiers.

Abstract: One or more memory systems, architectural structures, and/or methods of storing information in memory devices is disclosed to improve the data bandwidth and or to reduce the load on the communications links in a memory system. The system may include one or more memory devices, one or more memory control circuits and one or more data buffer circuits. In one embodiment, the Host only transmits data (and CRC) and does not transmit control signals, over its communications link with the data buffer circuits. In one aspect, the memory control circuit does not send the store data tag to the data buffer circuits. In one embodiment, the Host and the data buffer circuits each maintain a separate state machine-driven address pointer or local address sequencer, e.g., local store tag FIFO, which contains the same tags in the same sequence. A periodic system check and resynchronization method is also disclosed.

Abstract: Techniques for scavenging blocks may include: determining, in accordance with a selected option, a set of candidate upper deck file systems, wherein at least a first of the candidate upper deck file systems has storage allocated from at least one block of a lower deck file system; and performing, in accordance with the selected option, scavenging of the set of candidate upper deck file systems to attempt to free blocks of the lower deck file system. Scavenging may include issuing a request to perform hole punching of a backed free block of the first candidate upper deck file system, wherein the backed free block has first provisioned storage that is associated with a block of the lower deck file system. The selected option may be one of multiple options each specifying a different candidate set of upper deck file systems upon which hole punching is performed when selected.

Abstract: A system and method for implementing a servicing instruction for a plurality of counters that includes determining a counter set based on the servicing instruction, whether access is authorized to the counter set, and a block of storage in a memory based on the service instruction. In response to the determining that the access is authorized, the system and method extracts the plurality of counters within the counter set in response to the determining that the access is authorized and storing the plurality of counters in the block of storage.

Abstract: A storage array uses paged metadata. Each storage director has access to a plurality of object storage systems which describe locations of paged metadata in backing storage. Each object storage system includes different types of inodes which describe objects in backing storage. The object storage systems are used to locate and relocate metadata for loading into global memory, and creation and deletion of objects. An object storage system may be selected based on factors including ratio of different inode types, locality of object usage and anticipated object activity level.

Abstract: A data storage system includes multiple tiers of data storage accessible by multiple hosts. The multiple tiers include an upper tier having a lower access latency and a lower tier having a higher access latency. For each extent among a plurality of extents of file system objects in the data storage, the storage controller separately tracks, for each of one or more hosts that access the extent, a respective heat indicative of a frequency of access by that host. In response to an event disassociating a first host among the multiple hosts from a particular extent among the plurality of extents, the storage controller recalculates an overall heat of the particular extent while excluding a first heat of the first host for the particular extent. The storage controller migrates extents among the multiple tiers based on overall heats of the plurality of extents.

Abstract: A data storage device includes a first controller; a scale-out storage device; and an interface connected between the first controller and the scale-out storage device, wherein the first controller is configured to transmit, to the scale-out storage device through the interface, a first command including a command type and command information having a parameter with respect to the command type, wherein the scale-out storage device is configured to perform an operation corresponding to the first command, and wherein the scale-out storage device includes, a scale-out controller connected to the interface, a volatile memory connected to the scale-out controller, and a non-volatile memory connected to the scale-out controller.

Abstract: A storage apparatus and a storing method are provided. The storage apparatus includes one or more storage devices, an interface expander and a master controller. The storage device includes a storage module, a storage control circuit and a ready/busy pin. The storage control circuit outputs an operational state signal according to an operational state of the storage module through the ready/busy pin. The master controller outputs an interface signal to indicate the interface expander to provide the operational state signal. The interface expander detects the ready/busy pin of the storage device to receive and transmit the operational state signal from the storage device to the master controller according to the interface signal. The master controller determines whether the storage device is in a busy state or a ready state according to the operational state signal, and accordingly outputs a control signal to control operations of the storage devices.

Abstract: A memory stores data, a memory interface circuit reads the data from the memory, and an arithmetic circuit performs a prescribed arithmetic operation on the data. A host interface circuit outputs an arithmetic request to the arithmetic circuit, and also outputs a reading instruction to the memory via the memory interface circuit, upon receipt of an arithmetic instruction from a host device. The host interface circuit receives, from the arithmetic circuit, an arithmetic result of the prescribed arithmetic operation performed on the data read from the memory via the memory interface circuit, and outputs the arithmetic result to the host device.

Abstract: A solid-state drive (SSD) for handling an Asynchronous Event Request (AER) command includes a command receiving circuit and a command management circuit. The command receiving circuit is configured to receive at least one command from at least one host. The command management circuit is configured to determine if the received at least one command from the at least one host is an AER command, store the AER command into an AER queue reserved for deferred AER command handling, if the received at least one command is the AER command, and generate a dummy response for the AER command and release resources occupied by the AER command.

Abstract: A multi-platform data storage system configured to accessing a plurality of storage platforms that use different storage access and/or storage management protocols. The multi-platform data storage system can, for example, include a storage mobility and management layer providing virtual management of data stored in the plurality of storage platforms, and a storage protocol converter operatively coupled between the storage mobility and management layer and the plurality of storage platforms. During access and/or management communication from the storage mobility and management layer to a particular one of the storage platforms, the storage protocol converter can operate to convert the access and/or management communication from a layer protocol used by the storage mobility and management layer to the storage access protocol used by the particular one of the storage platforms.

Abstract: A device including an address extraction for a data burst associated with a host processor and to map the data burst to a memory according to a rotation is provided. The device includes a splitter to separate a first command that associates the data burst with a first round in the rotation, and a selection logic to select, from the first round in the rotation, a first bank group at the address in the memory to execute the first command, and execution logic to receive the data burst and the address in the memory to activate the first bank group at the address in the memory, and to schedule an execution of the first command based on an availability of a second bank group from the first round in the rotation. A system and a non-transitory computer readable medium storing instructions to use the device are also provided.

Abstract: A storage tiering system comprises a set of storage tiers, each of the storage tiers comprising a respective set of storage drives configured to store data based on an access frequency associated with the data. The set of storage tiers comprises one or more storage tiers forming at least one storage array configured to store block-based data in association with the respective sets of storage drives of the one or more storage tiers. The set of storage tiers further comprises a storage tier utilizing a cloud infrastructure configured to store object-based data in association with the set of storage drives of the storage tier. An application programming interface is configured to convert block-based data and object-based data for moving data between the one or more storage tiers associated with the storage array and the storage tier associated with the cloud infrastructure.

Abstract: An image forming apparatus includes a generating unit configured to generate an image corresponding to at least part of a plurality of pages included in the print data according to acquisition of the print data, a holding unit configured to hold the image generated by the generating unit into a storage, and an obtaining unit configured to obtain images of all pages to be printed among the pages included in the print data according to the print instruction from the user, wherein the obtaining unit obtains the image of the page of which the image is already generated by the generating unit among the pages to be printed from the storage, and generates, after acceptance of the print instruction, an image of the page of which an image is not generated by the generating unit.

Abstract: An image forming apparatus includes a first device having first circuitry and a printer and/or a scanner, and a second device to operate the first device, the second device including second circuitry to install, on a memory of the second device, one or more applications for executing image processing using the printer or the scanner. When determining that a current time is equal to an update time set within an update time range defined by a user, the second circuitry acquires, from a server via the first device and a network, update target application information indicating a target application among the one or more applications installed in the second device, requests, to the server via the first device, downloading of the target application, acquires the target application from the server via the first device, and installs the acquired target application in the second device.

Abstract: Apparatus and methods for providing downgraded fonts for VDP printing application are described. A server system may be configured to generate and/or select a set of downgraded rasterized fonts for delivery to a client system in order to provide limited client-side WYSIWIG display functionality using the downgraded fonts. A client side application may use the downgraded fonts to provide a display-only or draft print only rendering of a VDP print job.

Abstract: An image forming system comprises: an application server installed on an internet; multiple image forming devices installed on a local network; multiple relay servers, installed on the local network, relaying communication between at least one of the multiple image forming devices and the application server; and a connection mediation server, installed on the internet, sending an access request to one of the multiple relay servers, and connecting the relay server to the application server. The connection mediation server includes: a relay server identifying part configured to identify the relay server which relays the communication between one of the multiple image forming devices and the application server from among the multiple relay servers; and an access request sending part configured to send the access request to the relay server identified by the relay server identifying part, and establish the communication between the image forming device and the application server.

Abstract: A presentation system is described herein. The system can include a room for playing a scene and can be made up of a collection of displays. The system can also include media players to manage the playing of content on a corresponding display of the collection of displays. The system can also include a server to distribute objects to the media players. The scene can include the objects, which may be selectively played on the displays when the scene is played on the room. The media players can receive the objects and can determine whether the objects are intended to be played on the corresponding displays as part of the scene to be played. If so, the objects can be rendered on the corresponding displays on which the objects are intended to be played, which can bypass the rendering of the scene as a whole by the system.

Abstract: A control device includes a control circuit or a processor, that performs various tasks/steps, including displaying, in a GUI, an image of an operation element operable by a user to input a user instruction, and receiving a device assigned to the operation element, a parameter, including an ON or OFF state or a level of the device assigned to the operation element, and a setting value of the parameter corresponding to an operation state of the operation element. A setting command is transmitted to the device assigned to the operation element when the operation element is operated to be in a predetermined operation state. The setting command changes the setting value of the parameter from a current value to a setting value associated to the operation element.

Abstract: Systems, methods and software for sample rate conversion with unknown input and output clocks are disclosed. In one embodiment, a method for an asynchronous transfer of audio data includes: receiving the audio data by an antenna of a receiver (RX); storing the audio data in an input buffer of the RX; and receiving data words from the input buffer by a sample rate converter (SRC). The consecutive data words are received from the input buffer at an adjustable period T. The method further includes tracking a filling level of the input buffer; and based on the filling level of the input buffer, adjusting the adjustable period T. When the filling level of the input buffer is below the target level of the input buffer, the adjustable period T is increased. When the filling level of the input buffer is above the target level of the input buffer, the adjustable period T is decreased.

Abstract: An acoustic system comprises an operation condition determination part for determining an operation condition of an operating element for controlling sound volume of a sound reproduction device which reproduces sounds from a plurality of sound sources, and a control part for changing a control object of the sound volume by the operating element in accordance with the sound source which is reproduced by the sound reproduction device, based on the operation condition determined by the operation condition determination part. The control part prohibits switching of the control object of the sound volume by operation of the operating element even when the sound source to be reproduced has been changed while it is determined by the operation condition determination part that the operation of the operating element is continuously performed.

Abstract: A system, a method, and computer program product for performing buffering operations. A data update is received at a buffering location. The buffering location includes a first buffer portion and a second buffer portion. The data update includes an address tag. The buffering location is communicatively coupled to a memory location configured to receive the data update. A target address of the data update in the memory location is determined using the first buffer portion and compared to the address tag. The data update is applied using the first buffer portion to update data in the first buffer portion upon determination that the target address matches the address tag. The target address of the data update is pre-fetched from the memory location upon determination that the target address does not match the address tag. The first and second buffer portions buffer the data update using the pre-fetched target address.

Abstract: A storage unit holds context information including a minimum energy state, a current state, a minimum energy, a current energy, a temperature, and a bias about each of a plurality of trials. A control unit includes a counting unit counting update processing repeated in each trial and another counting unit counting trials performed. The control unit repeats update control about the update processing a certain number of times in each trial on the context information, based on spin information and an update target energy change. A calculation unit calculates energy change candidates based on a generated random number, a stored weight, the spin information, and the current state and temperature updated by the update control. A selection unit selects the update target energy change from the candidates calculated by the calculation unit based on a random number.

Abstract: A method to reconcile multiple instances of a single computer resource identified by resource discovery operations includes: (1) accessing information describing one or more resources; (2) identifying, via the accessed information, at least one resource that has been detected or discovered by at least two of the discovery operations; and (3) merging attributes associated with the identified resource from each of the at least two discovery operations into a single, reconciled resource object. Illustrative “resources” include, but are not limited to, computer systems, components of computer systems, data storage systems, switches, routers, memory, software applications (e.g., accounting and database applications), operating systems and business services (e.g., order entry or change management and tracking services).

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for a circuit configured to perform computations using multiple inputs. The circuit includes multiple adder circuits and a selection circuit that includes multiple input selector. Each adder circuit performs an addition operation using sets of inputs derived from the multiple inputs. The input selectors are configured to select one or more inputs from a set of inputs derived from the multiple inputs based on a sign bit for an input in the set and pass the selected inputs to an adder circuit that generates a sum using the selected inputs. The circuit determines a routing of the sum to another adder circuit based in part on a sign bit for the input in the set of inputs.

Abstract: A system according to one embodiment includes a pinned layer; a spacer layer above the pinned layer; a free layer above the spacer layer; a heating device, for heating the free layer to induce a paramagnetic thermal instability in the free layer whereby a magnetization of the free layer randomly switches between different detectable magnetic states upon heating thereof; and a magnetoresistance detection circuit for detecting an instantaneous magnetic state of the free layer.

Abstract: Processing circuitry is provided for comparing a number of adjacent widths having a common value and extending from a starting position within an input number with a runlength specified by a variable number. The circuitry includes a mask generator for generating a mask value in dependence upon the variable number, combination circuitry for performing a logical combination operation upon respective bits within the input number starting from the starting position and corresponding bits within the mask value so as to generate an intermediate value. Result circuitry then generates a result indicative of whether or not the number of adjacent bits is less than or equal to the run length in dependence upon a determination if any bits within the intermediate value have a predetermined value.

Abstract: A method, a computer program product, and a computer system for deploying an application in a distributed processing environment. A computer analyzes an application so as to determine one or more requirements for executing the application. The computer generates an application profile based on the one or more requirements, wherein the application profile is a representative of the one or more requirements for a platform of the distributed processing environment to host the application. The computer controls deployment of the application on the platform of the distributed processing environment based on the application profile.

Abstract: A computer program product and a computer system for deploying an application in a distributed processing environment. A computer analyzes an application so as to determine one or more requirements for executing the application. The computer generates an application profile based on the one or more requirements, wherein the application profile is a representative of the one or more requirements for a platform of the distributed processing environment to host the application. The computer controls deployment of the application on the platform of the distributed processing environment based on the application profile.

Abstract: A method for automatically generating sample code for an API for payment processing in a payment network includes reading an acquirer processor-specific API for payment processing in a payment network using an acquirer processor-specific API reader, generating acquirer processor-specific API data using the acquirer processor-specific API reader, converting the acquirer processor-specific API data into a format compatible with an output generator, and generating language-specific sample code by the output generator using the converted acquirer processor-specific API data and a language-specific template.

Abstract: An ecosystem supporting the design and the construction of software applications (Apps) is described. Such an ecosystem supports rapid and efficient design of Apps that provide a consistent user experience through one or more user interfaces.

Abstract: At an Operational Insights and Development Recommendation (OIDR) system, development artifacts from a central artifacts repository are received. At the OIDR system, statistical data from a central data analysis infrastructure is received. The statistical data is retrieved from application systems running software created from the development artifacts, and the statistical data is correlated with the development artifacts. Data insights and recommendations based on the correlated statistical data and development artifacts are provided by the OIDR system to an enhanced integrated development environment (IDE). Recommendations are derived using an analysis algorithm.

Abstract: A method, apparatus and system for achieving visual programming of interaction workflows for customer contact centers which eliminates the need for skilled computer telephony interaction programmers to program the screen pops and workflows that are presented to live-agent customer service representatives in a contact center. Further, the disclosed method and apparatus enables integration of contact information from omni-channel systems, as well as customer relationship management (“CRM”) data, data collected from interactive voice response (“IVR”) systems, and data pulled from third-party databases, into the screen pops and workflows in a way that is agnostic as to the type or protocol of the PBX switch, the IVR system and the CRM system utilized by a particular call center, by facilitating a level of abstraction and data flow between and among these components.

Abstract: This disclosure relates to deploying centralized design data in a development system. An exemplary system generally includes a server configured to perform the following steps. The server receives a style element and a reference name paired with the style element. The server then generates a visual definition comprising design data associated with the style element and paired with the reference name. The server then identifies a development environment for use with the visual definition and formats the visual definition into a local definition compatible with the development environment. Finally, the server transmits the local definition to a developer device associated with the development environment.

Abstract: A method and system including an application server; a framework including a simulator module; a display; a storage device; and a simulator processor in communication with the simulator module and operative to execute processor-executable process steps to cause the system to: receive a metadata file for an application; receive a request from a user interface associated with the application; transmit the request to the simulator module; generate, in response to the received request, one or more simulated data elements at the simulator module based on the metadata and a communication protocol; and display the one or more simulated data elements on the display. Numerous other aspects are provided.

Abstract: Provided are a method, system, and article of manufacture for specifying user defined or translator definitions to use to interpret mnemonics in a computer program. A mnemonic is processed in the computer program having a user defined definition and a translator definition. The mnemonic is interpreted according to the user defined definition in response to previously processing a mnemonic command specifying the mnemonic and the user defined definition. The mnemonic is interpreted according to the translator definition in response to previously processing a mnemonic command specifying the mnemonic and the translator definition.

Abstract: The embodiments described herein relate to recompiling an execution plan of a machine-learning program during runtime. An execution plan of a machine-learning program is compiled. In response to identifying a directed acyclic graph of high-level operations (HOP DAG) for recompilation during runtime, the execution plan is dynamically recompiled. The dynamic recompilation includes updating statistics and dynamically rewriting one or more operators of the identified HOP DAG, recomputing memory estimates of operators of the rewritten HOP DAG based on the updated statistics and rewritten operators, constructing a directed acyclic graph of low-level operations (LOP DAG) corresponding to the rewritten HOP DAG based in part on the recomputed memory estimates, and generating runtime instructions based on the LOP DAG.

Abstract: Systems and methods which implement workflows for providing reconfigurable processor core algorithms operable with associated capabilities using description files, thereby facilitating the development and generation of instruction sets for use with reconfigurable processors, are shown. Embodiments implement a multistage workflow in which program code is parsed into custom instructions and corresponding capability descriptions for generating reconfigurable processor loadable instruction sets. The multistage workflow of embodiments includes a hybrid threading complier operable to compile input program code into custom instructions using a hardware timing agnostic approach. A timing manager of the multistage workflow of embodiments utilizes capabilities information provided in association with the custom instructions generated by the hybrid threading complier to impose hardware timing on the custom instructions.

Abstract: Technologies are provided for creating and using template constraint expressions in constraint-based systems. Template constraint expressions can be created that can be used to define multiple usages of a same constraint rule in a configuration model. Using the template constraint expression, the constraint rule can be translated once and used multiple times as different instances of the rule are activated. Updates to the rule can be made to the template constraint expression and applied to all of the related instances. Constraint expressions can be created based on the template constraint expression. Multiple object instances in a configuration model can be identified that satisfy matching criteria of the template constraint expression. Variables of the matching object instances can be mapped to variable placeholders in the template constraint expression to create constraint expressions. A constraint solver can be used to evaluate the constraint expressions.

Abstract: Embodiments relate to optimizing an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler is provided to identify potential target functions and indicate the potential target functions in the program code. Additionally, the compiler determines and indicates in the program code that the function pointer value resulting from a non-call reference of a function symbol is solely used to perform indirect calls in the same module. A linker can read the indication the compiler made in the program code and optimize the indirect call function.