Abstract: Systems and techniques are described for a sensor designed to connect to and monitor devices in an ecosystem. In some implementations, a system monitors a property that includes the sensor configured to generate sensor data reflecting an attribute of the property. The sensor includes a host board that generates the sensor data and a core board connected to the host board. The core board identifies a type of the host board and communicates with a monitor control unit. The monitor control unit receives a request for firmware associated with the type of the host board from the sensor. In response, the monitor control unit accesses the firmware and transmits the firmware to the sensor. The core board of the sensor receives the firmware and stores the firmware. The core board receives the sensor data from the host board and transmits the sensor data to the monitor control unit.

Abstract: An embedded device, a software updating system for an embedded device, and a method for updating software of an embedded device. The method includes activating the embedded device and automatically triggering a software update for the embedded device upon activation of the embedded device. Usage of an operative component of the embedded device is restricted while the software is updating. The embedded device connects to a remote server, which has a staged update stored therein that comprises one or more data packages arranged as a first stage and a second stage. The first stage of the staged update is downloaded and installed. Normal use of the operative component of the embedded device is permitted after installing the first stage. Installation of the second stage is delayed until a later time.

Abstract: In one embodiment, an apparatus includes: a control circuit to enable a comparison circuit based on a dynamic update to a hook table and a patch table; and the comparison circuit coupled to the control circuit to compare an address of a program counter to at least one address stored in the hook table, and in response to a match between the address of the program counter and the at least one address stored in the hook table, cause a jump from code stored in a read only memory to patch code stored in a patch storage. Other embodiments are described and claimed.

Abstract: A system for application integration into a unified code system includes an interface and a processor. The interface is configured to receive a source code bundle. The processor is configured to create an application bundle based at least in part on the source code bundle and integrate the application bundle into the unified code system. The system for application integration executes the unified code system. The unified code system includes a plurality of application bundles. Only one version of each application bundle is available for execution as part of the unified code system.

Abstract: In one embodiment, a computer-implemented method comprises receiving, at a server computer, a plurality of commit records of a source code management system (SCM), wherein a first commit record of the plurality of commit records includes a first parent commit identifier (ID) that identifies a parent commit record of the first commit record; storing, in one or more data repositories, a full commit record for each commit record of the plurality of commit records; in response to determining that the first commit record includes a parent commit ID, storing, in the one or more data repositories, a first partial commit record for the first commit record, wherein the first partial commit record comprises a partial commit record that is identified by the first parent commit ID; generating and submitting a database query to a digital data repository associated with the SCM, based on determining that a partial commit record is stored in the one or more digital repositories, and receiving first partial commit update dat

Abstract: Described herein is a computer implemented method. The method comprises receiving, by an issue tracking system, a build update from a build system which includes build information in respect of one or more issues maintained by the issue tracking system. The method further comprises associating one or more issues maintained by the issue tracking system with build information by identifying the one or more issues to which the build information in the build update relates, extracting the build information from the build update, and associating the build information with each of the identified issues.

Abstract: A software framework is provided for building a software-based intelligent agent. A configuration file may be written in the format of a configuration language to specify how an agent is constructed, for example by specifying a set of configuration elements and their parameters. To build the intelligent agent, the configuration file may be parsed to create an internal representation of how the agent is structured. This internal representation may be used by an agent builder to create a functional intelligent agent, e.g. one that is executable on a particular target platform. The built intelligent agent may allow its state to be retrieved, for example by the intelligent agent being capable of autonomously outputting a state file. The configuration file together with the description of the intelligent agent's state may allow a ‘stateful’ copy of the intelligent agent to be created.

Abstract: A processor may generate a UI. The processor may instantiate a plurality of collectors. Each collector may be configured to collect data in real time from a separate one of a plurality of data sources. Each data source may include a different type of data relating to at least one of a plurality of software delivery pipeline tasks. The processor may separately and continuously collect data from each of the plurality of data sources using the plurality of collectors. The processor may separately and continuously analyze the stored data from each of the plurality of data sources to generate a plurality of code quality metrics for the plurality of software delivery pipeline tasks. The processor may continuously report the plurality of code quality metrics through the UI.

Abstract: Described herein is a computer implemented method. The method comprises receiving, by an issue tracking system, a deployment update from a deployment system which includes deployment information in respect of one or more issues maintained by the issue tracking system. The method further comprises associating one or more issues maintained by the issue tracking system with deployment information by identifying the one or more issues to which the deployment information in the deployment update relates, extracting the deployment information from the deployment update, and associating the deployment information with each of the identified issues.

Abstract: An apparatus and method for performing efficient, adaptable tensor operations.

Abstract: A novel coding technique, referred to herein as Generalized PolyDot, for calculating matrix-vector products that advances on existing techniques for coded matrix operations under storage and communication constraints is disclosed. The method is resistant to soft errors and provides a trade-off between error resistance and communication cost.

Abstract: Embodiments of processors, methods, and systems for a processor core supporting processor identification instruction spoofing are described. In an embodiment, a processor includes an instruction decoder and processor identification instruction spoofing logic. The processor identification spoofing logic is to respond to a processor identification instruction by reporting processor identification information from a processor identification spoofing data structure. The processor identification spoofing data structure is to include processor identification information of one or more other processors.

Abstract: A model conversion method is disclosed. The model conversion method includes obtaining model attribute information of an initial offline model and hardware attribute information of a computer equipment, determining whether the model attribute information of the initial offline model matches the hardware attribute information of the computer equipment according to the initial offline model and the hardware attribute information of the computer equipment and in the case when the model attribute information of the initial offline model does not match the hardware attribute information of the computer equipment, converting the initial offline model to a target offline model that matches the hardware attribute information of the computer equipment according to the hardware attribute information of the computer equipment and a preset model conversion rule.

Abstract: A generation apparatus includes a memory configured to store variable value information indicating variable value candidates for each variable name, and a processor configured to generate a first machine language instruction corresponding to a first code in response to receiving designation of the first code included in codes generated by a compiler, and when the generated first machine language instruction includes a variable name of a specific type, by reference to the variable value information stored in the memory, perform generation of a plurality of machine language instructions based on a plurality of pieces of variable value information associated with each of one or more variable names included in the generated first machine language instruction.

Abstract: The present invention includes a method for operating a data processing system to compute an approximation to a scalar product between first and second vectors in which each vector is characterized by N components. The method includes replacing the first vector by a third vector that is a pyramid integer vector characterized by N components and an integer K equal to the sum of the absolute values of the N components, and computing a scalar product of the third vector with the second vector to provide the approximation to the scalar product between the first and second vectors. Computing the scalar product of the second and third vectors can be carried out by K additions followed by one floating point multiply.

Abstract: Disclosed embodiments relate to systems and methods for performing instructions structured to compute a min/max value of a vector. In one example, a processor executes a decoded single instruction to determine on a per data element position of the identified first and second operands a maximum or minimum, store the determined maximum or minimums in corresponding data element positions of the identified first operand, and determine and store, in each data element position of the identified third operand, an indication of where the maximum or minimum came from.

Abstract: The present disclosure provides a method, computer system and computer program product for branch optimization. According to the method, execution possibilities of instruction blocks corresponding to at least one branch of in a program can be determined. Then, the instruction blocks can be loaded according to the execution possibilities.

Abstract: Disclosed are various embodiments for computing 2-body statistics on graphics processing units (GPUs). Various types of two-body statistics (2-BS) are regarded as essential components of data analysis in many scientific and computing domains. However, the quadratic complexity of these computations hinders timely processing of data. According, various embodiments of the present disclosure involve parallel algorithms for 2-BS computation on Graphics Processing Units (GPUs). Although the typical 2-BS problems can be summarized into a straightforward parallel computing pattern, traditional wisdom from (general) parallel computing often falls short in delivering the best possible performance. Therefore, various embodiments of the present disclosure involve techniques to decompose 2-BS problems and methods for effective use of computing resources on GPUs. We also develop analytical models that guide users towards the appropriate parameters of a GPU program.

Abstract: Disclosed embodiments relate to systems for performing instructions to quickly convert and use matrices (tiles) as one-dimensional vectors. In one example, a processor includes fetch circuitry to fetch an instruction having fields to specify an opcode, locations of a two-dimensional (2D) matrix and a one-dimensional (1D) vector, and a group of elements comprising one of a row, part of a row, multiple rows, a column, part of a column, multiple columns, and a rectangular sub-tile of the specified 2D matrix, and wherein the opcode is to indicate a move of the specified group between the 2D matrix and the 1D vector, decode circuitry to decode the fetched instruction; and execution circuitry, responsive to the decoded instruction, when the opcode specifies a move from 1D, to move contents of the specified 1D vector to the specified group of elements.

Abstract: Micro-architecture designs and methods are provided. A computer processing architecture may include an instruction cache for storing producer instructions, a half-instruction cache for storing half instructions, and eager shelves for storing a result of a first producer instruction. The computer processing architecture may fetch the first producer instruction and a first half instruction; send the first half instruction to the eager shelves; based on execution of the first producer instruction, send a second half instruction to the eager shelves; assemble the first producer instruction in the eager shelves based on the first half instruction and the second half instruction; and dispatch the first producer instruction for execution.

Abstract: Methods and apparatuses relating to dynamic asymmetric scaling of branch predictor tables are described. Branch predictor circuits to perform dynamic asymmetric scaling of branch predictor tables are also described.

Abstract: Methods, systems and apparatuses may provide for technology that triggers an idle state in a first command streamer in response to a request to reset a second command streamer that shares graphics hardware with the first command streamer. The technology may also determine an event type associated with the request and conduct the request based on the event type.

Abstract: An apparatus and method for data parallel single program multiple data (SPMD) execution. For example, one embodiment of a processor comprises: instruction fetch circuitry to fetch instructions of one or more primary threads; a decoder to decode the instructions to generate uops; a data parallel cluster (DPC) to execute microthreads comprising a subset of the uops, the DPC further comprising: a plurality of execution lanes to perform parallel execution of the microthreads; an instruction decode queue (IDQ) to store the uops prior to execution; and a scheduler to evaluate the microthreads based on associated variables including instruction pointer (IP) values, the scheduler to gang microthreads into fragments for parallel execution on the execution lanes based on the evaluation.

Abstract: A method may be provided for use in an information handling system comprising a processor, one or more storage resources communicatively coupled to the processor, and a basic input/output system (BIOS) comprising a program of instructions executable by the processor and configured to cause the processor to initialize one or more information handling resources of the information handling system, the BIOS further configured to determine identities of each of the one or more storage resources and which of the one or more storage resources comprises a bootable operating system. The method may include receiving information regarding identities of each of the one or more storage resources and which of the one or more storage resources comprises a bootable operating system and communicating via the one or more management interfaces an alert indicating which of the one or more storage resources comprises the bootable operating system.

Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and a computer system are provided. The computer system includes a BMC. The BMC receives, through a management platform on the BMC, a first part of initialization data from an initialization component of a host of the BMC. The BMC also receives an indication of a location at an initialization storage device of the host. The BMC then obtains access to the initialization storage device. The BMC reads a second part of the initialization data from the location of the initialization storage device.

Abstract: An information processing apparatus according to an aspect of the present invention includes an information processing circuit configured to generate a finite state machine based on a predetermined matching condition with respect to sequence data of an event that is input to the information processing apparatus; to process the sequence data so as to substantially remove data that does not match the matching condition from the sequence data; and to output the processed sequence data.

Abstract: A computer implemented method, a computer program product and a data processing system for executing an application written in a dynamic language are provided. An execution point of the application is loaded. A list of classes associated with the execution point is generated. The loading of each class in the list of classes is simulated. New execution points and new classes accessible from each execution point within each class in the list of classes are identified by recursively parsing instructions associated with each execution point. The list is modified to include the identified new execution points and new classes. Responsive to a determination that new execution points and new classes have been identified, the steps of identifying new execution points and new classes and modifying the list is repeated. The list is saved.

Abstract: Starting execution of a mobile application on a mobile device includes creating a process that is used by the operating system of the mobile device to execute the mobile application on the mobile device. An initialization method is invoked by the mobile application that i) instantiates a replacement instrumentation object, and ii) assigns the replacement instrumentation object to the process used by the operating system to execute the mobile application on the mobile device. The replacement instrumentation object processes calls from the operating system to the mobile application and redirects at least one call made by the operating system to the mobile application to at least one call to mobile application management logic executing on the mobile device.

Abstract: Starting execution of a mobile application on a mobile device causes the mobile application to invoke an initialization method that i) creates a substitute application class loader, and ii) replaces a default application class loader for the mobile application with the substitute application class loader. The substitute application class loader processes a request for a requested object class defined by the mobile application by returning, instead of the requested object class, an alternate object class that is different from the requested object class and that is defined by mobile application management logic also executing on the mobile device. Continued execution of the mobile application on the mobile device includes performing at least one mobile application management action using the alternate object class returned by the substitute application class loader.

Abstract: A server system, the server system including: a memory processor; and a communication link, where the server system includes a program designed to construct a user interface experience graph from a plurality of prior user experience interfacing with a specific software application, and where the prior user experience interfacing had been received into a memory of the memory processor by the communication link.

Abstract: A method of providing electronic instructions comprises defining the steps of a task and executing, by a script engine, a script. The script comprises a sequence of steps stored on a computer readable medium. The script is executed by a computing device and the sequence of steps instructs a user how to perform a task. Each of the sequence of steps comprises a question step or a timed step. The execution of the question step proceeds to a next step based on a user activated button. The execution of a timed step proceeds to the next step in response to the expiration of a timer. Each of the sequence of steps is represented by one of a plurality of multi-media interfaces illustrating one of the sequence of steps.

Abstract: Disclosed herein are system, method, and computer program product embodiments for measuring graphical user interface (GUI) usage, generating visual depictions of the GUI usage, and providing GUI modification recommendations based on the GUI usage. A user interface (UI) usage measurement system may monitor user interactions with an application from one or more user devices. The UI usage measurement system may data such as button clicks or other icon interactions on a GUI. After aggregating this information, the UI usage measurement system may apply machine learning techniques to determine a GUI object recommendation. The recommendation may include the movement of one or more GUI objects to different locations so that the user may more quickly access GUI objects that are more heavily utilized. In this manner, the UI usage measurement system may modify the GUI used by a particular user to access elements of an application.

Abstract: The present disclosure provides a virtual endpoint software system. The virtual endpoint software system may be implemented by a computing system comprising a workstation, processors, and memory. The computing system being configured to instantiate a virtual endpoint software system. The virtual endpoint software system comprises a virtual endpoint tool. The virtual endpoint tool comprises a plurality of virtual endpoint devices wherein each virtual endpoint device is a digital representation of a hardware endpoint device. Each of the plurality of virtual endpoint device is associated with at least one of a plurality of configuration files. In some implementations, each configuration file when executed virtually represents the device functionality and operating conditions of the hardware endpoint device. In addition, the virtual endpoint tool comprises a central engine wherein the central engine comprises at least one processor to process instructions stored in the plurality of configuration files.

Abstract: The present disclosure relates to systems and methods for updating virtual machines without rebuilding distributed databases thereon. In one example, a system for updating a virtual machine on a cloud service may include at least one processor configured to: generate and transmit, to the cloud service, a first command to disconnect a virtual storage from a first virtual machine; after the virtual storage is disconnected, generate and transmit, to the cloud service, a second command to offline the first virtual machine; generate and transmit, to the cloud service, a third command to build a second virtual machine; after the second virtual machine is built, generate and transmit, to the cloud service, a fourth command to connect the virtual storage to the second virtual machine; and generate and transmit, to the cloud service, a fifth command to online the second virtual machine with the address of the virtual machine.

Abstract: Provided is a resource allocation determination method for a VM/container, volume, and the like created as a new VM/container or volume without exceeding an upper limit of a computer resource of a node in an HCI environment. In order to determine allocation of at least one of a virtual machine, a container, and a volume in a system of the HCI environment, a use state of a computer resource shared by a virtual machine and a storage controller operating on each node is managed, and an allocation destination node of the new virtual machine, container, or volume is determined based on the use state without exceeding an upper limit of a computer resource of the allocation destination node.

Abstract: In one aspect, a computerized method includes the step of providing a first virtual machine on first server. The method includes the step of, with the first virtual machine, communicating a network traffic to a second virtual machine on a second server using a virtual network identified with a virtual local area network (VLAN). The method includes the step of, with a virtual function (VF) on a physical network interface controller (pNIC) of the second server, assigning to the VLAN to a specified VF. The method includes the step of, sending a data packet is sent out of the pNIC towards a TOR switch, wherein the TOR switch has the VLAN enabled and other user specific policies configured. The method includes the step of, sending the data packet to a second TOR switch. The method includes the step of, with the second TOR switch, sending the data packet towards the pNIC on the second server based on a destination the second virtual machine's MAC address.

Abstract: Provided is a resource allocation determination method for a VM/container, volume, and the like created as a new VM/container or volume without exceeding an upper limit of a computer resource of a node in an HCl environment. In order to determine allocation of at least one of a virtual machine, a container, and a volume in a system of the HCl environment, a use state of a computer resource shared by a virtual machine and a storage controller operating on each node is managed, and an allocation destination node of the new virtual machine, container, or volume is determined based on the use state without exceeding an upper limit of a computer resource of the allocation destination node.

Abstract: This disclosure describes systems, methods, and apparatuses related to network function virtualization infrastructure (NFVI) performance. An apparatus may receive performance data from a network function virtualization infrastructure (NFVI) associated with one or more virtualized resources (VRs) of the NFVI. The apparatus may determine a collection method based on the received performance data. The apparatus may determine a performance measurement associated with the collection method. The apparatus may perform the performance measurement using the received performance data and the collection method. The apparatus may generate one or more outputs based on the performance measurement. The apparatus may cause to send the one or more outputs to a VNF manager (VNFM).

Abstract: Approaches for managing how the passage of time is observed by a software execution environment, such as a virtual machine or a sandbox environment. A computer system maintains a set of physical time sources. A set of virtual time sources are computed based on the set of physical time sources. The virtual time sources operate independently of the set of physical time sources. For example, the virtual time sources may observe time passing faster or slower than the set of physical time sources. The set of virtual time sources are presented to the software execution environment as the set of time sources. Many benefits may be obtained such as higher utilization of allocated resources and avoidance of timeouts.

Abstract: Systems and transaction-enabled methods for providing provable access to a distributed ledger with serverless code logic are disclosed. A transaction-enabling system may include a controller configured to access a distributed ledger comprising serverless code logic, tokenize the serverless code logic, interpret an access request for the serverless code logic and, in response to the access request, provide a provable access to the serverless code logic.

Abstract: Systems and methods related to resource distribution for a fleet of machines are disclosed. A system may include a fleet of machines each having an associated resource capacity and a resource requirement to perform a task. The system may further include a controller having a resource requirement circuit to determine an aggregated amount of the resource requirement and an aggregated amount of the resource capacity. A resource distribution circuit may adaptively improve, in response to an aggregated amount of the resource capacity, an aggregated resource delivery of the resource.

Abstract: Transaction-enabled systems and methods for identifying and acquiring machine resources on a forward resource market are disclosed. An example system may include a controller having a resource requirement circuit to determine an amount of a resource required for a machine to service a task requirement, a forward resource market circuit to access a forward resource market, a resource market circuit to access a resource market, and a resource distribution circuit to execute a transaction of the resource on at least one of the resource market or the forward resource market in response to the determined amount of the resource required.

Abstract: One embodiment provides a method for optimizing data read-ahead for workflow and analytics applications including obtaining, by a processor, next file information from a workflow scheduler for next files for a next processing stage that are to be accessed by a process. Data for the next processing stage for at least one application and at least one system job is prefetched. The next files are prefetched as the prefetching data reaches an end of current inputs.

Abstract: The disclosed embodiments provide a system for evaluating targeting conditions for A/B tests. During operation, the system obtains a test configuration containing targeting conditions for an A/B test, wherein the targeting conditions include attributes of one or more segments of users and operators to be applied to the attributes. Next, the system identifies an operator between a first targeting condition that can be evaluated locally and a second targeting condition that requires a remote call to evaluate. The system then evaluates the first targeting condition without evaluating the second targeting condition to produce an output value of the first targeting condition. When application of the operator to the output value produces a Boolean value, the system returns the Boolean value as an evaluation result for a portion of the test configuration represented by the operator, the first targeting condition, and the second targeting condition.

Abstract: Techniques are described for detecting failure of one or more virtual computing environments and causing a migration of workloads. In some examples, a computing system includes a storage medium and processing circuitry having access to the storage medium. The processing circuitry is configured to communicate with a plurality of virtual computing environments (VCEs), including a first VCE and a second VCE, wherein each of the plurality of VCEs is operated by a different public cloud provider. The processing circuitry is further configured to deploy a group of workloads to the first VCE, detect a failure of at least a portion of the first VCE, and output, to the first VCE and responsive to detecting the failure, an instruction to transfer a set of workloads of the group of workloads to the second VCE to thereby cause a migration of the set of workloads to the second VCE.

Abstract: Computer systems, data processing methods, and computer-readable media are provided to run original networks. An exemplary computer system includes first and second processors a memory storing offline models and corresponding input data of a plurality of original networks, and a runtime system configured to run on the first processor. The runtime system, when runs on the first processor, causes the first processor to implement a plurality of virtual devices comprising a data processing device configured to obtain an offline model and corresponding input data of an original network from the memory, an equipment management device configured to control turning on or off of the second processor, and a task execution device configured to control the second processor to run the offline model of the original network.

Abstract: Providing predictive instruction dispatch throttling to prevent resource overflow in out-of-order processor (OOP)-based devices is disclosed. In this regard, an OOP-based device includes a system resource that may be consumed or otherwise occupied by instructions, as well as an execution pipeline comprising a decode stage and a dispatch stage. The OOP further maintains a running count and a resource usage threshold. Upon receiving an instruction block, the decode stage extracts a proxy value that indicates an approximate predicted count of instructions within the instruction block that will consume a system resource. The decode stage then increments the running count by the proxy value. The dispatch stage compares the running count to the resource usage threshold before dispatching any younger instruction blocks. If the running count exceeds the resource usage threshold, the dispatch stage blocks dispatching of younger instruction blocks until the running count no longer exceeds the resource usage threshold.

Abstract: Disclosed embodiments relate to an improved memory system architecture for multi-threaded processors. In one example, a system includes a system comprising a multi-threaded processor core (MTPC), the MTPC comprising: P pipelines, each to concurrently process T threads; a crossbar to communicatively couple the P pipelines; a memory for use by the P pipelines, a scheduler to optimize reduction operations by assigning multiple threads to generate results of commutative arithmetic operations, and then accumulate the generated results, and a memory controller (MC) to connect with external storage and other MTPCs, the MC further comprising at least one optimization selected from: an instruction set architecture including a dual-memory operation; a direct memory access (DMA) engine; a buffer to store multiple pending instruction cache requests; multiple channels across which to stripe memory requests; and a shadow-tag coherency management unit.

Abstract: In one embodiment, a method for scheduling tasks comprises, at a task scheduler of a processing node of a plurality of processing nodes: retrieving a first task descriptor from a local memory of the task scheduler, the task descriptor corresponding to a task scheduled for execution at the current time and comprising at least a task execution time, a frequency for performing the task, and a task identifier; determining whether the task descriptor is assigned to the task scheduler for execution; if it is determined that the task descriptor is assigned to the task scheduler for execution: executing the task; updating the task execution time based on the current task execution time and the frequency for performing the task; and re-queuing the task descriptor in the local memory.

Abstract: A mechanism is described to facilitate microcontroller-based flexible thread scheduling launching in computing environments. An apparatus of embodiments, as described herein, includes facilitating a graphics processor hosting a microcontroller having a thread scheduling unit, and detection and observation logic to detect a scheduling algorithm associated with an application at the apparatus. The apparatus may further include reading and dispatching logic to facilitate the microcontroller to prepare a flexible dispatch routine based on the scheduling algorithm. The apparatus may further include scheduling and launching logic to facilitate the thread scheduling unit to dynamically schedule and launch threads based on the flexible dispatch routine, where the threads are hosted by the graphics processor.