Patents Issued in July 21, 2020
  • Patent number: 10719302
    Abstract: A first set of code origination data which corresponds to a first computing object and a second set of code origination data which corresponds to a second computing object may be detected for utilization to develop a streaming application in the stream computing environment. Based on the first and second sets of code origination data, a code assembly arrangement with respect to the first and second computing objects may be determined. Based on the first and second sets of code origination data, a consistent region may be determined to utilize for the code assembly arrangement. The code assembly arrangement may be established, in the consistent region, with respect to the first and second computing objects to develop the streaming application.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: July 21, 2020
    Assignee: International Business Machines Corporation
    Inventors: Alexander Cook, Manuel Orozco, Christopher R. Sabotta, John M. Santosuosso
  • Patent number: 10719303
    Abstract: The disclosure pertains to the operation of graphics systems and to a variety of architectures for design and/or operation of a graphics system spanning from the output of an application program and extending to the presentation of visual content in the form of pixels or otherwise. In general, many embodiments of the invention envision the processing of graphics programming according to an on-the-fly decision made regarding how best to use the specific available hardware and software. In some embodiments, a software arrangement may be used to evaluate the specific system hardware and software capabilities, then make a decision regarding what is the best graphics programming path to follow for any particular graphics request. The decision regarding the best path may be made after evaluating the hardware and software alternatives for the path in view of the particulars of the graphics program to be processed.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: July 21, 2020
    Assignee: Apple Inc.
    Inventors: Jacques P. Gasselin de Richebourg, Domenico P. Porcino, Timothy R. Oriol
  • Patent number: 10719304
    Abstract: A method of generating computer-readable code may include receiving multiple user functions as designated by a user. The method may also include, for each of the user functions, locating at least one library associated with a given user function within a domain interface file (DIF), where the at least one library identifies a constructor of the given user function. The method may additionally include, based on the constructor, identifying one or more constructor libraries in the DIF that include functions that yield the constructor when executed. The method may additionally include retrieving code from the libraries associated with the user functions and the one or more constructor libraries that include functions that yield the constructor when executed. The method may also include combining the retrieved code into a single program, and providing the single program such that the single program is accessible by an end-user different from the user.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: July 21, 2020
    Assignee: FUJITSU LIMITED
    Inventor: Ajay Chander
  • Patent number: 10719305
    Abstract: In one embodiment, a system for managing a virtualization environment comprises a plurality of host machines, one or more virtual disks comprising a plurality of storage devices, a virtualized file server (VFS) comprising a plurality of file server virtual machines (FSVMs), wherein each of the FSVMs is running on one of the host machines, and a backup system configured to, in response to a request to access a data item, determine an access frequency for the data item. The backup system is further configured to, in response a request to store a data item, determine a storage tier at which the data item is to be stored in a cloud storage service, wherein the tier is determined based on the access frequency associated with the data item, and store the data item at the determined tier of the cloud storage service.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: July 21, 2020
    Assignee: Nutanix, Inc.
    Inventors: Vishal Sinha, Richard James Sharpe, Kalpesh Ashok Bafna, Anil Kumar Gopalapura Venkatesh, Durga Mahesh Arikatla, Shyamsunder Prayagchand Rathi
  • Patent number: 10719306
    Abstract: Particular embodiments provide a plurality of host machines, one or more virtual disks comprising a plurality of storage devices, and a virtualized file server (VFS) comprising a plurality of file server virtual machines (FSVMs), wherein each of the FSVMs is running on one of the host machines and conducts I/O transactions with the one or more virtual disks. A distributed health monitoring service (HMS) may be running on each of the host machines running a FSVM. The HMS may monitor the FSVMs to determine whether any of the FSVMs has failed or is having problems. The HMS may detect that a plurality of the FSVMs have failed, wherein the failed FSVMs form a portion of the FSVMs comprising the VFS. For each of the failed FSVMs, the HMS may reassign an IP address corresponding to the failed FSVM to a live one of the FSVMs.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: July 21, 2020
    Assignee: Nutanix, Inc.
    Inventors: Satyajit Sanjeev Deshmukh, Richard James Sharpe, Durga Mahesh Arikatla, Shyamsunder Prayagchand Rathi, Rishabh Sharma
  • Patent number: 10719307
    Abstract: In one embodiment, a system for managing a virtualization environment comprises a plurality of host machines, one or more virtual disks comprising a plurality of storage devices, a virtualized file server (VFS) comprising a plurality of file server virtual machines (FSVMs), wherein each of the FSVMs is running on one of the host machines, wherein the VFS is configured to detect a failure of one of the FSVMs on a first one of the host machines, wherein the first host machine is located within a first block of host machines. The VFS may then identify a failover path to a second FSVM. For each storage resource associated with the first FSVM, the VFS may migrate the storage resource to the second FSVM.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: July 21, 2020
    Assignee: Nutanix, Inc.
    Inventors: Devyani Suryakant Kanada, Richard James Sharpe, Durga Mahesh Arikatla, Satyajit Sanjeev Deshmukh
  • Patent number: 10719308
    Abstract: Described herein are features pertaining to generating and presenting a log entry based upon configuration data received from a monitoring service of an electronic health record application (EHR) executing at a server computing device. A monitoring application can receive configuration data from the server computing device that hosts a feature of an EHR that is implemented in a healthcare enterprise, wherein the configuration data comprises an indication of a modification to the server computing device, and further wherein the monitoring application is configured to facilitate presenting the modification to an EHR support engineer. Exemplary modifications to the server computing device can be: a hardware change to the server computing device (e.g., replacement of a processor, addition of RAM, etc.), an upgrade to a feature hosted by the EHR on the server computing device, etc.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: July 21, 2020
    Assignee: ALLSCRIPTS SOFTWARE, LLC
    Inventors: Peter C. Putre, Heidi Birchard Turner, Christopher P. Trapeni
  • Patent number: 10719309
    Abstract: A computer system includes a processor, a communications subsystem, and a non-transitory computer-readable storage medium. The computer-readable medium stores instructions that when executed by the processor adapt the computer system to receive an indication of a second device selected, at a first device, for update; send an indication signalling the second device to send state information about the second device; receive state information about the second device; determine, based on the state information, that the second device is ready to perform an update; send, to the first device, an indication that the second device is ready to perform the update; receive, from the first device, an indication to update the second device; and, send a corresponding indication to the second device. The second device is configured to begin updating in response to such an indication without any direct interaction with it. Related methods and computer-readable media are also described.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: July 21, 2020
    Assignee: BlackBerry Limited
    Inventors: Edward Snow Willis, David Alan Inglis, Hashim Mohammad Qaderi, Scott Hutchens, Christopher Scott Travers, Conrad Delbert Seaman
  • Patent number: 10719310
    Abstract: Embodiments of systems and methods for reducing Keyboard, Video, and Mouse (KVM) downtime during firmware update or failover events are discussed. In some embodiments, a chassis may include: a plurality of Information Handling Systems (IHSs); a first Enclosure controller (EC); and a second EC coupled to the first EC, where the first and second ECs comprise program instructions stored thereon that, upon execution, cause the chassis to: establish a KVM session with a selected IHS via the first EC; in response to the first EC receiving a firmware update command, update and restart the second EC; notify the first EC, by the second EC, that the update and restart is completed; trigger by a first KVM process in the first EC, a second KVM process in the second EC; and take control, by the second EC, of the KVM session.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: July 21, 2020
    Assignee: Dell Products, L.P.
    Inventors: Senthil Kumar Raju, Rajeshkumar Ichchhubhai Patel, Sundar Shanmugam, Rajkumar Nagarajan
  • Patent number: 10719311
    Abstract: A library may include serverless artifacts that support execution of respective serverless functions. For each of the artifacts, a build parameter may have a library artifact identifier, a respective execution environment specifier, and a respective component specifier. An infrastructure realization knowledge base may define an environment mapping for each of the serverless artifacts. A build execution engine may create a build script that can be executed on a serverless artifact build infrastructure. To implement the build script the build script may be transmitted over a build communication channel to a cloud based serverless infrastructure provider.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: July 21, 2020
    Assignee: Accenture Global Solutions Limited
    Inventors: Roger Foskett, Thomas W. Myers
  • Patent number: 10719312
    Abstract: Techniques for assessing and managing versions of a configuration file associated with a modular control system of a process plant are described. According to certain aspects, systems and methods device may access data associated with multiple versions of a configuration file, including a computing device version and a control version, as well as a last backup instance of the configuration file. The systems and methods may compare the versions and determine any discrepancies between the versions, including which of the versions is the most recent. The systems and methods may present information associated with the comparison to enable a user to select which of the versions may be need to be updated, resolved, or provided to the controller so that the modular control system may be properly configured.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: July 21, 2020
    Assignee: FISHER-ROSEMOUNT SYSTEMS, INC.
    Inventors: Aaron C. Jones, Michael G. Ott, Julian K. Naidoo, Deborah R. Colclazier, Karen Johnson
  • Patent number: 10719313
    Abstract: An apparatus, and a method, performed by one or more processors are disclosed. The method may comprise receiving a build request associated with performing an external data processing task on a first data set, the first data set being stored in memory associated with a data processing platform to be performed at a system external to the data processing platform. The method may also comprise generating a task identifier for the data processing task, and providing, in association with the task identifier, the first data set to an agent associated with the external system with an indication of the data processing task, the agent being arranged to cause performance of the task at the external system, to receive a second data set resulting from performance of the task, and to provide the second data set and associated metadata indicative of the transformation.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: July 21, 2020
    Assignee: Palantir Technologies Inc.
    Inventors: Audrey Kuan, Andrew Kaier, Eric Lee, Jasjit Grewal, Mark Elliot, Nitish Kulkarni, Robert Fink, Samuel Rogerson, Thomas Pearson, Thomas Powell, Lawrence Manning, Corey Garvey
  • Patent number: 10719314
    Abstract: Embodiments construct a precise and scalable call graph that models potentially incomplete object-oriented program code, including libraries. The call graph encodes the probabilities of call relationships in the graph, where the probabilities are based on context information from the program, and are adjusted based on client configurations. Embodiments derive topics to associate with unknown elements, as well as probabilities for those topics, from declared types of the unknown elements. Configuration information encodes sets of feature conditions that direct the weighting of the unknown element types. As embodiments propagate type tuples through the graph, the probabilities of the types for each node are recalculated based on the type/probability information for the predecessors of the node. Type/probability information joins are necessary for nodes with multiple dependencies, where the manner of the join is configurable by the client.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: July 21, 2020
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Yi Lu, Daniel Wainwright, Michael Reif
  • Patent number: 10719315
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media for automatically determining developer team composition. One of the methods includes obtaining a reference set of snapshots for a code base, each snapshot comprising a representation of source code of the code base at a particular time and being associated with a particular project and a particular developer of a team of developers of the code base; selecting a subset of snapshots; dividing the subset into a plurality of time windows; for each time window and for each developer that committed a snapshot to the reference collection of snapshots during the time window, determining a normalized rating of the developer's skills in each of a plurality of developer activity metrics; and aggregating, for each time window, the normalized ratings for each developer to generate a developer team composition for the fixed period of time.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: July 21, 2020
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventor: Ian Paul Wright
  • Patent number: 10719316
    Abstract: An apparatus is described having instruction execution logic circuitry. The instruction execution logic circuitry has input vector element routing circuitry to perform the following for each of three different instructions: for each of a plurality of output vector element locations, route into an output vector element location an input vector element from one of a plurality of input vector element locations that are available to source the output vector element. The output vector element and each of the input vector element locations are one of three available bit widths for the three different instructions. The apparatus further includes masking layer circuitry coupled to the input vector element routing circuitry to mask a data structure created by the input vector routing element circuitry. The masking layer circuitry is designed to mask at three different levels of granularity that correspond to the three available bit widths.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: July 21, 2020
    Assignee: INTEL CORPORATION
    Inventors: Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal, Bret L. Toll, Mark J. Charney, Zeev Sperber, Amit Gradstein
  • Patent number: 10719317
    Abstract: Methods and apparatuses relating to a vector instruction with a register operand with an elemental offset are described. In one embodiment, a hardware processor includes a decode unit to decode a vector instruction with a register operand with an elemental offset to access a first number of elements in a register specified by the register operand, wherein the first number is a total number of elements in the register minus the elemental offset, access a second number of elements in a next logical register, wherein the second number is the elemental offset, and combine the first number of elements and the second number of elements as a data vector, and an execution unit to execute the vector instruction on the data vector.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: July 21, 2020
    Assignee: INTEL CORPORATION
    Inventors: Victor Lee, Ugonna Echeruo, George Chrysos, Naveen Mellempudi
  • Patent number: 10719318
    Abstract: The present application provides a method of randomly accessing a compressed structure in memory without the need for retrieving and decompressing the entire compressed structure.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: July 21, 2020
    Assignee: Movidius Limited
    Inventor: David Moloney
  • Patent number: 10719319
    Abstract: In one embodiment, a processor comprises a decoder to decode a first instruction, the first instruction comprising an opcode and at least one parameter, the opcode to identify the first instruction as an instruction associated with an indirect branch, the at least one parameter indicative of whether the indirect branch is allowed; and circuitry to generate an error message based on the at least one parameter.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: July 21, 2020
    Assignee: Intel Corporation
    Inventors: Kekai Hu, Ke Sun, Rodrigo Branco
  • Patent number: 10719320
    Abstract: An apparatus is provided which comprises: a component; a voltage generator to supply load current to the component; first one or more circuitries to predict that the load current is to increase from a first time; and second one or more circuitries to, in anticipation of the increase in the load current from the first time, cause the component to execute first instructions during a time period that occurs prior to the first time.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: July 21, 2020
    Assignee: Intel Corporation
    Inventors: Federico Ardanaz, Roger Gramunt, Jesus Corbal, Dennis R. Bradford, Jonathan M. Eastep
  • Patent number: 10719321
    Abstract: Technology related to prefetching instruction blocks is disclosed. In one example of the disclosed technology, a processor comprises a block-based processor core for executing a program comprising a plurality of instruction blocks. The block-based processor core can include prefetch logic and a local buffer. The prefetch logic can be configured to receive a reference to a predicted instruction block and to determine a mapping of the predicted instruction block to one or more lines. The local buffer can be configured to selectively store portions of the predicted instruction block and to provide the stored portions of the predicted instruction block when control of the program passes along a predicted execution path to the predicted instruction block.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: July 21, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventor: Douglas C. Burger
  • Patent number: 10719322
    Abstract: A technique includes determining whether one or more instructions in an instruction group require cracking. Whether the instructions that require cracking are associated with a decode-time instruction optimization (DTIO) sequence is also determined. In response to a first instruction, included in the one or more instructions, requiring cracking and the first instruction not being part of a DTIO sequence, the first instruction is cracked into internal operations (IOPs). In response to a second instruction, included in the one or more instructions, requiring cracking and the second instruction being part of a DTIO sequence, an IOP sequence (that includes at least one IOP that is associated with at least a cracked version of the second instruction and at least a third instruction that is included in the one or more instructions and at least one other IOP that is associated with the cracked version of the second instruction) is generated.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: July 21, 2020
    Assignee: International Business Machines Corporation
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10719323
    Abstract: Disclosed embodiments relate to matrix compress/decompress instructions. In one example, a processor includes fetch circuitry to fetch a compress instruction having a format with fields to specify an opcode and locations of decompressed source and compressed destination matrices, decode circuitry to decode the fetched compress instructions, and execution circuitry, responsive to the decoded compress instruction, to: generate a compressed result according to a compress algorithm by compressing the specified decompressed source matrix by either packing non-zero-valued elements together and storing the matrix position of each non-zero-valued element in a header, or using fewer bits to represent one or more elements and using the header to identify matrix elements being represented by fewer bits; and store the compressed result to the specified compressed destination matrix.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: July 21, 2020
    Assignee: Intel Corporation
    Inventors: Dan Baum, Michael Espig, James Guilford, Wajdi K. Feghali, Raanan Sade, Christopher J. Hughes, Robert Valentine, Bret Toll, Elmoustapha Ould-Ahmed-Vall, Mark J. Charney, Vinodh Gopal, Ronen Zohar, Alexander F. Heinecke
  • Patent number: 10719324
    Abstract: Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: July 21, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven R. Carlough, Reid T. Copeland, Charles W. Gainey, Jr., Marcel Mitran, Eric M. Schwarz, Timothy J. Slegel
  • Patent number: 10719325
    Abstract: Very long instruction word (VLIW) instruction processing using a reduced-width processor is disclosed. In a particular embodiment, a VLIW processor includes a control circuit configured to receive a VLIW packet that includes a first number of instructions and to distribute the instructions to a second number of instruction execution paths. The first number is greater than the second number. The VLIW processor also includes physical registers configured to store results of executing the instructions and a register renaming circuit that is coupled to the control circuit.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: July 21, 2020
    Assignee: Qualcomm Incorporated
    Inventors: Peter Sassone, Christopher Koob, Suresh Kumar Venkumahanti
  • Patent number: 10719326
    Abstract: In one embodiment, a processor includes: a core to execute instructions, the core including a plurality of mailbox storages and a trust table to store a trust indicator for each of the plurality of mailbox storages; a first core perimeter logic coupled to the core and including a first storage to store state information of the core when the core is in a low power state; and a second core perimeter logic coupled to the first core perimeter logic and the core, the second core perimeter logic including a second storage to store the state information of the core when the first core perimeter logic is in a low power state. Other embodiments are described and claimed.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: July 21, 2020
    Assignee: Intel Corporation
    Inventors: Alexander Gendler, Larisa Novakovsky, Ariel Szapiro
  • Patent number: 10719327
    Abstract: In some embodiments, a branch prediction unit includes a plurality of branch prediction circuits and selection logic. At least two of the branch prediction circuits are configured, based on an address of a branch instruction and different sets of history information, to provide a corresponding branch prediction for the branch instruction. At least one storage element of the at least two branch prediction circuits is set associative. The selection logic is configured to select a particular branch prediction output by one of the branch prediction circuits as a current branch prediction output of the branch prediction unit. In some instances, the branch prediction unit may be less likely to replace branch prediction information, as compared to a different branch prediction unit that does not include a set associative storage element. In some embodiments, this arrangement may lead to increased performance of the branch prediction unit.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: July 21, 2020
    Assignee: Apple Inc.
    Inventors: Muawya M. Al-Otoom, Ian D. Kountanis, Conrado Blasco
  • Patent number: 10719328
    Abstract: A predicted value to be used in register-indirect branching is predicted. The predicted value is to be stored in one or more locations based on the prediction. An offset for a predicted derived value is obtained. The predicted derived value is to be used as a pointer to a reference data structure providing access to variables used in processing. The predicted derived value is generated using the predicted value and the offset. The predicted derived value is used to access the reference data structure during processing.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: July 21, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10719329
    Abstract: An apparatus and method are provided for using predicted result values. The apparatus has a processing unit that comprises processing circuitry for executing a sequence of instructions, and value prediction circuitry for identifying a predicted result value for at least one instruction. A result producing structure is provided that is responsive to a request issued from the processing unit when the processing circuitry is executing a first instruction, to produce a result value for the first instruction and return that result value to the processing unit. While waiting for the result value from the result producing structure, the processing circuitry can be arranged to speculatively execute at least one dependent instruction using a predicted result value for the first instruction as obtained from the value prediction circuitry.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: July 21, 2020
    Assignee: Arm Limited
    Inventors: Vladimir Vasekin, David Michael Bull, Chiloda Ashan Senarath Pathirane, Alexei Fedorov
  • Patent number: 10719330
    Abstract: A communication device includes: a communication unit which receives control data; and a main control unit which controls an operation of the communication device, based on the control data received by the communication unit. The communication device operates in a first standby state where the main control unit stops at least a part of operations and where the communication unit detects only an access to a specific port that designates the communication device as a destination, and in a second standby state where the main control unit can execute the operations and controls the operation of the communication device, based on the control data. The communication unit wakes up the main control unit if an access to the specific port is detected in the first standby state.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: July 21, 2020
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Kenichiro Tomita
  • Patent number: 10719331
    Abstract: A microcontroller includes a core and a unit for managing the power supply of the core that includes an input for receiving an external signal indicating a leaving of a stand-by mode of operation. A signal intercepting unit intercepts the external signal and transmitting it with a delay to the unit for managing.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: July 21, 2020
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Nicolas Froidevaux, Jean-Michel Gril-Maffre, Jean-Pierre Leca
  • Patent number: 10719332
    Abstract: Systems and methods are disclosed for providing a multi-component application, including a first and second component. A client device may be provisioned with the application in a manner that, from the point of view of an end user, is similar to access a single component application. A user may use a client device to attempt to access a second component to provide the application. The second component can instruct the client device to first obtain a first component from a different network location. The client device can obtain the first component and execute the first component to use the second component, thereby providing the multi-component application. Other than submission of an initial request to access the application, provisioning of the multi-component application may be programmatic and potentially invisible to an end user, thereby providing an experience similar to accessing a single component application.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: July 21, 2020
    Assignee: Splunk Inc.
    Inventors: Akash Dwivedi, Simon Foster Fishel, Eric Tschetter, Joshua Walters
  • Patent number: 10719333
    Abstract: A BIOS startup method is disclosed, the method includes: in a first access mode, allocating, by a current node, a local MMCFG in a space below a local access address of the current node that is a first address, and completing memory initialization; and when performing unified memory addressing of a system, moving positions of addresses of a part or an entirety of the MMCFG space of the current node from the original space below the first address in a global access address of the system to a space that is above the first address and can be accessed in a second access mode.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: July 21, 2020
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yezu Gan, Liangen Qiu, Yi Li
  • Patent number: 10719334
    Abstract: Methods and systems are disclosed where an FPGA offloads a plurality of processing tasks from a processor. The FPGA can process streaming data received via a network interface, and the FPGA can be controllable in response to control instructions received from the processor. The FPGA comprises resident hardware logic for a plurality of data processing engines that are combinable as a processing pipeline within the FPGA. In response to the control instructions, the FPGA can control which of the data processing engines are activated and which of the data processing engines are deactivated to selectively tap into the streaming data to perform pipelined processing operations on the streaming data via the activated data processing engines. The deactivated data processing engines remain on the FPGA and provide a pass through path for the streaming data whereby the deactivated data processing engines do not perform processing operations on streaming data received thereby.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: July 21, 2020
    Assignee: IP Reservoir, LLC
    Inventors: Roger D. Chamberlain, Mark Allen Franklin, Ronald S. Indeck, Ron K. Cytron, Sharath R. Cholleti
  • Patent number: 10719335
    Abstract: An industrial plant module-based engineering system includes a group module library navigator that contains: a plurality of group class modules and a respective plurality of child class modules under an associated group class module of the plurality of group class modules. A group module instantiation engine is configured to instantiate the group class module with reflecting a hierarchy of the group class modules to generate, in an application structure navigator, a group application module (group APM) and a hierarchy of the group application module (group APM) from the group class module, and to instantiate the child class module to generate, in the application structure navigator, a child application module (child APM) from the child class module. The group module update engine is configured to update the allocation of each group class module and a respective topology of the complex loops of each group class module.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: July 21, 2020
    Assignee: Yokohawa Electric Corporation
    Inventors: Mark Anthony De Castro Cu-Unjieng, Isao Hirooka, Hideki Murata, Naing Oo Lin, Archie Sambitan Orido, Takeshi Mori, Wilfred Woon Yew Teo, Ying Tzu Huang, Daisuke Yasunami
  • Patent number: 10719336
    Abstract: Described herein is a system and method for dependency version conflict auto-resolution for executing job(s). During execution of a particular version of a workflow comprising tasks, information regarding a particular task to be executed is received. The particular task is dependent on another task. Information regarding the dependency is retrieved from a global dependency data structure (e.g., graph) that stores current dependency information regarding the tasks. When it is determined that the conflict exists with respect to the dependency of the particular task on the another task, information regarding the dependency and workflows is retrieved, information regarding a dependency change history regarding at least one of the plurality of tasks, information regarding the particular version of the workflow and a different version of the workflow. A resolution to the conflict can be identified based, at least in part, upon the retrieved information, and, a correct action performed.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: July 21, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Vitalii Tsybulnyk, Aritra Dattagupta, Marwan Elias Jubran, Willy Tanimihardja
  • Patent number: 10719337
    Abstract: Embodiments include a code loader method for loading attributes corresponding to an isolated method by a container-based language runtime. The attributes are received by the container-based language runtime without any specified container for storage of the isolated method attributes. The attributes received as parameters of code loader method and include instructions, live objects, and parameter types corresponding to the isolated method. The container-based language runtime selects a first-order container for storing the attributes of the isolated method.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: July 21, 2020
    Assignee: Oracle International Corporation
    Inventors: Michael Haupt, John Rose, Brian Goetz
  • Patent number: 10719338
    Abstract: An electronic device includes a display configured to display a user interface; a user input unit configured to receive a user input through the user interface; a processor electrically connected to the display and the user input unit; and at least one memory electrically connected to the processor, wherein the at least one memory stores instructions to allow the at least one processor to display a plurality of user interfaces for content recommendation on the display, and if interest information of the user and identification information of another party associated with the interest information are input through the plurality of user interfaces, then the processor acquires at least one recommendation content based on the interest information, history information of the user, history information of the other party, and a recommendation weight between the user and the other party, and displays the at least one acquired recommendation content on the display.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: July 21, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Horyong Jung
  • Patent number: 10719339
    Abstract: A device that includes a sensor engine and a node engine. The sensor engine is configured to receive an input signal representing a data sample and identify a real world value entry in a sensor table based on the input signal. The sensor engine is further configured to fetch an input correlithm object in the sensor table linked with the real world value entry and send the input correlithm object to a node engine. The node engine is configured to determine distances between the input correlithm object and each of the child correlithm objects in a node table in response to receiving the input correlithm object and identify a child correlithm object from the node table with the shortest distance. The node engine is further configured to fetch a parent correlithm object from the node table linked with the identified child correlithm object and output the identified parent correlithm object.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: July 21, 2020
    Assignee: Bank of America Corporation
    Inventor: Patrick N. Lawrence
  • Patent number: 10719340
    Abstract: Disclosed in some examples, are methods, systems, GUIs, and machine-readable mediums for providing an improved command bar interface that assists a user in entering commands by implementing a scope operator to specify a command scope and also visual controls for entering parameters of commands. The command bar may have a default global scope that may be modified by users by entering a scope operator and a scope identifier. The command bar may render a set of parameter segments to assist users in entering parameters for the commands.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: July 21, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Luis Carrasco, Darya Valchonak Kishylau, Methil Harysh Menon, Michael Hill, Paul Y Sim, Sharad Goel
  • Patent number: 10719341
    Abstract: Some embodiments provide a method for a managed forwarding element (MFE). At the MFE, the method receives a first packet from a particular tunnel endpoint. The first packet originates from a particular data compute node associated with multiple tunnel endpoints including the particular tunnel endpoint. Based on the first packet, the method stores an association of the particular tunnel endpoint with the particular data compute node. The method uses the stored association to encapsulate subsequent packets received at the MFE and having the particular data compute node as a destination address with the particular tunnel endpoint as a destination tunnel endpoint.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: July 21, 2020
    Assignee: NICIRA, INC.
    Inventors: Jianjun Shen, Alexander Tessmer, Mukesh Hira, Pankaj Thakkar, Hua Wang
  • Patent number: 10719342
    Abstract: A method, system, and computer program product are disclosed for creating an in-memory application image. Embodiments can include receiving an application from a storage. Embodiments can also include loading the received application into a memory storage pool. Embodiments can also include receiving an indication of a request to execute the in-memory application image on a first virtual machine of a plurality of virtual machines. Embodiments can also include receiving an indication to execute the in-memory application image on the first virtual machine. Embodiments can also include removing the in-memory application image from the memory storage pool, in response to the receiving the indication to execute the in-memory application. Embodiments can also include assigning the removed in-memory application image to the first virtual machine.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: July 21, 2020
    Assignee: International Business Machines Corporation
    Inventors: Rafael C. S. Folco, Breno H. Leitão, Tiago N. d. Santos
  • Patent number: 10719343
    Abstract: Placement of instances of virtual machine (VM) images in a cloud computing environment is optimized. A request is received to deploy a new VM image instance. VM resource usage profiles are read that indicate predicted resource consumption data of the VM image. Resource pool profiles for multiple resource pools are read that indicate predicted resource consumption data for the resource pools. For each of the resource pools, the VM resource usage profile is aligned with the respective resource pool profile. An aggregated resource consumption profile is calculated as an aggregation of the predicted resource consumptions of the aligned profiles. A determination is made of one of multiple resource pools with the least predicted aggregated resource consumption, and the VM image is instantiated on the determined one of the multiple resource pools with the least predicted aggregated resource consumption over time.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: July 21, 2020
    Assignee: International Business Machines Corporation
    Inventors: Amadeus Podvratnik, Thomas Spatzier, Torsten Teich
  • Patent number: 10719344
    Abstract: A multi-layer compute sizing correction stack may generate prescriptive compute sizing correction tokens for controlling sizing adjustments for computing resources. The input layer of the compute sizing correction stack may generate cleansed utilization data based on historical utilization data received via network connection. A prescriptive engine layer may generate a compute sizing correction trajectory detailing adjustments to sizing for the computing resources. Based on the compute sizing correction trajectory, the prescriptive engine layer may generate the compute sizing correction tokens that that may be used to control compute sizing adjustments prescriptively.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: July 21, 2020
    Assignee: Acceture Global Solutions Limited
    Inventors: Madhan Kumar Srinivasan, Arun Purushothaman, Guruprasad Pv, Michael S. Eisenstein, Vijay Desai
  • Patent number: 10719345
    Abstract: Methods, computer program products, and systems are presented. The method, computer program products, and systems can include, for instance: obtaining configuration data that specifies a designated runtime container image; selecting a first subset of content of a first container image stored in a system memory, the selecting based on an action referenced in the configuration data; extracting the first subset of content from the first container image, the extracting including providing a second container image that includes the first subset of content of the first container image and is absent of a second subset of content of the first container image; and running the designated runtime container image to provide a runtime container, the designated runtime container image having the first subset of content of the first container image.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: July 21, 2020
    Assignee: International Business Machines Corporation
    Inventors: Yan Du, Lan Luo, Jun Li Zhao, Jian Dong Yin, Li Long Chen
  • Patent number: 10719346
    Abstract: A computer implemented method of providing whole disk encryption for a virtualized computer system including providing a software component executing in a first virtual machine for instantiation in a first hypervisor, the software component invoking a second hypervisor within the first virtual machine for instantiating a disk image of the virtualized computer system as a second virtual machine, and the software component being configured to install a software agent in the second virtual machine, the software agent being adapted to: a) encrypt the instantiated disk image; b) encrypt data written, by the second virtual machine, to the instantiated disk image at a runtime of the second virtual machine; and c) decrypt data read, by the second virtual machine, from the instantiated disk image at a runtime of the second virtual machine, wherein the software component is configured to migrate the second virtual machine at a runtime of the second virtual machine to the first hypervisor so as to provide a wholly encry
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: July 21, 2020
    Assignee: British Telecommunications Public Limited Company
    Inventors: Fadi El-Moussa, Theo Dimitrakos
  • Patent number: 10719347
    Abstract: A control apparatus comprises first to third parts. The first part manages an image, which is information required for execution of a container. The second part requests the third part to start a container corresponding to an image of a predetermined version. The third part instructs the container corresponding to the image of the predetermined version to be created in response to the request from the second part on the basis of the image managed by the first part.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: July 21, 2020
    Assignee: NEC CORPORATION
    Inventors: Mayo Oohira, Tomohito Iguchi, Kazuhiro Egashira
  • Patent number: 10719348
    Abstract: A network function virtualization management and orchestration apparatus includes a VIM(s) and an upper entity(ies) of the VIM(s). The VIM(s) performs resource management and control of an NFVI(s) that provides an execution infrastructure(s) for a VNF(s) implemented and virtualized by software that operates on a virtual machine(s). The upper entity(ies) collects resource information about the NFVI(s) from the VIM(s) and determines a virtual machine allocation destination(s) based on the collected resource information about the NFVI(s). The VIM(s) generates a virtual machine(s) at the determined virtual machine allocation destination(s).
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: July 21, 2020
    Assignee: NEC CORPORATION
    Inventors: Hajime Zembutsu, Yuki Miyata, Yuki Yoshimura
  • Patent number: 10719349
    Abstract: Aspects of peripheral device sharing for virtual machines are described. In some aspects, a virtual machine requires access to a peripheral device. The virtual machine is executed in a first host computing system. A table is accessed, and includes a list of peripheral devices, an indication that the peripheral device is connected to a second host computing system, a bandwidth requirement of the peripheral device, and a network bandwidth allocated to the virtual machine. The virtual machine is provided with access to the peripheral device based on a comparison between the bandwidth requirement of the peripheral device, and a threshold percentage of the network bandwidth allocated to the virtual machine.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: July 21, 2020
    Assignee: VMWare, Inc.
    Inventors: Jinto Antony, Sudhish Panamthanath Thankappan, Madhusudhanan Gangadharan
  • Patent number: 10719350
    Abstract: A system includes determination of whether a current number of active worker threads of a client application is less than a maximum active worker thread limit, retrieval, if the number of active worker threads is less than the maximum active worker thread limit, of a first job associated with a first context from a job pool, determination of whether an inactive worker thread is associated with the first context, and, if an inactive worker thread is associated with the first context, execution of the first job on the inactive worker thread.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: July 21, 2020
    Assignee: SAP SE
    Inventor: Johnson Wong
  • Patent number: 10719351
    Abstract: A method for controlling process is provided. The method for controlling process includes the follows. When it is determined that a duration that each of N processes in a kernel space of a terminal device is in an uninterruptible sleep state reaches or exceeds a preset period, whether the N processes have undergone a searched and killed operation within the preset period is detected. N is an integer greater than or equal to 1. When the N processes have undergone the searched and killed operation within the preset period, states of the N processes are changed, and an operating system is controlled to run the N processes according to the changed states of the N processes. Related terminal devices are also provided.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: July 21, 2020
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventors: Hui Li, Yuanqing Zeng