Patents Issued in January 2, 2024
  • Patent number: 11860670
    Abstract: Techniques and mechanisms for identifying a memory access resource which is to be a target of an access request. In an embodiment, a processor comprises route tables which are to provide entries corresponding to different respective memory access resources which are coupled to the processor. The processor further comprises a list of items which each correspond to a different respective range of addresses, wherein the items each include an identifier of a respective route table, and an identifier of a respective index offset. Based on an address of the access request, a decoder circuit of the processor searches the list to identify a corresponding one of the items. In another embodiment, the decoder circuit accesses a route table entry, based on the search, to determine how the access request is to be directed to a particular memory access resource.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: January 2, 2024
    Assignee: Intel Corporation
    Inventors: Monam Agarwal, Anand K. Enamandram, Wei Chen, Kerry Vander Kamp, Robert A. Branch, Yen-Cheng Liu
  • Patent number: 11860671
    Abstract: A memory-control logic, disposed in a memory circuit, is provided. The memory circuit includes a memory-cell array that is divided into a plurality of regions that include a damaged region. The memory-control logic includes a one-time-programmable (OTP) memory array, an array-control circuit, and an address-redirecting circuit. The array-control circuit programs a memory-size type of the memory-cell array, a region-failure flag corresponding to each region, and a redirecting mapping table corresponding to each region in the OTP memory array. The array-control circuit programs the redirecting mapping table corresponding to each region according to the memory-size type to direct the redirecting mapping table corresponding to each damaged region to non-repetitive good regions.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: January 2, 2024
    Assignee: Winbond Electronics Corp.
    Inventor: Chih-Chiang Lai
  • Patent number: 11860672
    Abstract: A topology is disclosed. The topology may include at least one Non-Volatile Memory Express (NVMe) Solid State Drive (SSD), a Field Programmable Gate Array (FPGA) to implement one or more functions supporting the NVMe SSD, such as data acceleration, data deduplication, data integrity, data encryption, and data compression, and a Peripheral Component Interconnect Express (PCIe) switch. The PCIe switch may communicate with both the FPGA and the NVMe SSD.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: January 2, 2024
    Inventors: Sompong Paul Olarig, Fred Worley, Oscar P. Pinto
  • Patent number: 11860673
    Abstract: A distributed database encrypts tables using table encryption keys protected by a client master encryption key. The client may revoke and subsequently restore authorization to access the client master encryption key. A sweeper process of the distributed database examines encrypted tables and identifies changes to the status of a corresponding client master encryption key. A response to an identified change in status is initiated.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: January 2, 2024
    Assignee: Amazon Technologies, Inc.
    Inventors: Avinash Kodakandla, Akshat Vig, Ravi Math, Sroaj Sosothikul, Nicholas Gordon, Somasundaram Perianayagam, Mazen Moez Ali, Sharan Rajesh Munyal
  • Patent number: 11860674
    Abstract: A system and method for efficient query processing using a real index of a queried table are described. In one embodiment, the real index is used in an offset query type in order to reduce the number of rows that are sorted and thereby increases efficiency for processing offset query types. In another embodiment, the real index is used in a set operation query type where existing systems utilize a table scan and thereby increases efficiency of set operation query types.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: January 2, 2024
    Assignee: PROGRESS SOFTWARE CORPORATION
    Inventor: Raja Sekhar Chunduru
  • Patent number: 11860675
    Abstract: Embodiments of the present invention provide systems, methods, and computer storage media for latent summarization of a graph. Structural features can be captured from feature vectors associated with each node of the graph by applying base functions on the feature vectors and iteratively applying relational operators to successive feature matrices to derive deeper inductive relational functions that capture higher-order structural information in different subgraphs of increasing size (node separations). Heterogeneity can be summarized by performing capturing features in appropriate subgraphs (e.g., node-centric neighborhoods associated with each node type, edge direction, and/or edge type). Binning and/or dimensionality reduction can be applied to the resulting feature matrices.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: January 2, 2024
    Assignee: ADOBE INC.
    Inventors: Di Jin, Ryan A. Rossi, Eunyee Koh, Sungchul Kim, Anup Rao
  • Patent number: 11860676
    Abstract: The present disclosure provides systems and methods for modifying and controlling access to private data objects. A system can maintain a node graph comprising nodes that each maintains an association with one or more neighbor nodes. The system can maintain private data objects that are generated based on a request from an organizer node, and include a list of authorized nodes and a setting to enable neighbors of authorized nodes to request inclusion in the list of authorized nodes. The system can receive a request for private data objects from a first node, and identify private data objects that include one or more neighbor nodes of the first node. The system can present a list of private data objects to the first node, and add the first node to the list of authorized nodes of the private data object subsequent to receiving a request from the first node.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: January 2, 2024
    Assignee: DK CROWN HOLDINGS INC.
    Inventor: Jordan Mendell
  • Patent number: 11860677
    Abstract: A computer-implemented method and system for managing media content in a playback queue. A processing system receives a plurality of data samples generated from a media application in a user device for a plurality of media files, where the plurality of data samples may be based on a plurality of contextual features associated with a user's interaction with a least one media file of the plurality of media files. The plurality of contextual features can be collected utilizing at least one sensing module in communication with the user device. Further, one or more of the data samples can be associated with an affinity measure indicative of a user's interaction with at least one of the plurality of media files.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: January 2, 2024
    Assignee: Melodia, Inc.
    Inventor: Omid Aryan
  • Patent number: 11860678
    Abstract: A technology for the optimized capturing of resource file content for resources referred in recorded user interaction sequences is disclosed. Individual resource files are typically referred in multiple recorded resources, therefore it is desired to capture those resources only once and reuse them for all recorded session capturing them. As user interaction sequences are executed and captured in independently operating web-browsers, a direct coordination between recording web-browsers to avoid multiple captures of the same resource is not possible. Data about the global resource capturing and demand situation is generated on a monitoring server that receives all session recording data and transferred to session recording browsers in form of lists identifying resources that are referred in sessions but are still unresolved and should therefore be captured, and for resources that should not captured, because they are already available and capturing them again should be avoided.
    Type: Grant
    Filed: November 23, 2022
    Date of Patent: January 2, 2024
    Assignee: Dynatrace LLC
    Inventors: Bernhard Lackner, Jordi Masramon, Otmar Ertl
  • Patent number: 11860679
    Abstract: A method for detecting a security vulnerability in code may include obtaining (i) a permitted information flow graph for a permitted query and (ii) a target information flow graph for a target query in the code, determining, by traversing the permitted information flow graph, a permitted information flow including permitted disclosed columns, permitted accessed columns, and a permitted predicate, determining, by traversing the target information flow graph, a target information flow including target disclosed columns, target accessed columns, and a target predicate, comparing the permitted information flow and the target information flow to obtain a comparison result, and determining, based on the comparison result, that the target query includes the security vulnerability.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: January 2, 2024
    Assignee: Oracle International Corporation
    Inventors: Kostyantyn Vorobyov, Padmanabhan Krishnan
  • Patent number: 11860680
    Abstract: The present disclosure provides systems, methods, and computer readable storage devices for validating that a software release has successfully completed multiple development stages of a development process without alteration. To illustrate, as software (e.g., one or more files or artifacts) completes at least a portion of a development process including the development stages, data components are generated. Digital signatures are generated based on the data components and a private key, and the digital signatures are stored in a secure data structure, such as a blockchain or a tree structure. Upon receipt of the data components (e.g., as validation data of a software release) by a node device, the node device generates validation signatures based on the data components and a public key and compares the validation signatures to the digital signatures stored in the secure data structure to validate the software before processing the software.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: January 2, 2024
    Assignee: JFrog Ltd.
    Inventor: Yoav Landman
  • Patent number: 11860682
    Abstract: The techniques discussed herein generally relate to a method and system for qualitative modeling of and reasoning about the behavior of spatio-temporal physical systems. In some embodiments, qualitative representations based on Tonti diagrams are used to describe lumped or distributed parameter systems. Using a topological structure of the physical system, some embodiments generate qualitative governing equations as symbolic constraints on qualitative state variables. The qualitative constraints may be used to produce a qualitative simulation of the physical system. The qualitative simulation may be used to guide conceptual design iterations with given design criteria, or for instantiation of quantitative or hybrid (qualitative and quantitative) models and simulations.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: January 2, 2024
    Assignee: XEROX CORPORATION
    Inventors: Morad Behandish, Johan de Kleer, Randi Wang
  • Patent number: 11860683
    Abstract: Disclosed subject matter benchmarks and aligns content with target audiences. A user may provide content to a language intelligence platform. Scores are then generated by analyzing the content based on values-specific dictionaries, which reflect values of targeted audiences. Based on a comparison between a generated score and a benchmark values score for the target audience, appropriate action may be taken. Disclosed teachings support multiple layers of comparisons and score calculations including comparisons and scoring of all text, segments of text, and specific phrases to achieve a more comprehensive analysis. Embodiments may determine whether headers or other sections that may garner more attention, are aligned with a benchmark.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: January 2, 2024
    Assignee: Pluralytics, Inc.
    Inventors: Alisa Miller, Richard Byrne, Morteza Shahriari Nia
  • Patent number: 11860684
    Abstract: A first named entity recognition (NER) system may be adapted to create a second NER system that is able to recognize a new named entity using few-shot learning. The second NER system may process support tokens that provide one or more examples of the new named entity and may process input tokens that may contain the new named entity. The second NER system may use a classifier of the first NER system to compute support token embeddings from the support tokens and input token embeddings from the input tokens. The second NER system may then recognize the new named entity in the input tokens using abstract tag transition probabilities and/or distances between the support token embeddings and the input token embeddings.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: January 2, 2024
    Assignee: ASAPP, INC.
    Inventors: Yi Yang, Arzoo Katiyar
  • Patent number: 11860685
    Abstract: A system and method for efficiently generating clock signals are described. In various implementations, an integrated circuit includes multiple clock frequency dividers both at its I/O boundaries and across its die. A clock frequency divider utilizes a first clock divider and a second clock divider that receive input clock signals with an initial phase difference between them. The first clock divider and the second clock divider generate output clock signals that have frequencies that are a fraction of the frequencies of the received input clock signals. The second clock divider uses a combined multiplexer and flip-flop (combined mux-flop) circuit. The combined mux-flop circuit receives a reset signal that is asserted asynchronously with respect to an input clock signal received by the second clock divider. The second clock divider generates an output clock signal that has the initial phase difference with an output clock signal of the first clock divider.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: January 2, 2024
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Luke Jereme Whitaker, Edoardo Prete
  • Patent number: 11860686
    Abstract: A clock oscillator control circuit is provided. The clock oscillator control circuit includes a signal processor configured to receive a composite clock request signal and output an altered composite clock request signal. The clock oscillator control circuit also includes logic circuitry configured to receive the altered composite clock request signal from the signal processor and a clock oscillator valid signal from a clock oscillator, and to output set and reset signals based on the altered composite clock request signal and the clock oscillator valid signal. The clock oscillator control circuit further includes a set-reset latch configured to receive the set and reset signals from the logic circuitry and to output an enable signal to the clock oscillator.
    Type: Grant
    Filed: October 5, 2022
    Date of Patent: January 2, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Atul Ramakant Lele, Dirk Preikszat, Sudhanshu Khanna, John Joseph Seibold
  • Patent number: 11860687
    Abstract: A semiconductor device includes an intellectual property (IP) block, a clock management unit, a critical path monitor (CPM), and a CPM clock manager included in the clock management unit. The clock management unit is configured to receive a clock request signal, indicating whether the IP block requires a clock signal, from the IP block and perform clock gating for the IP block based on the received clock request signal. The CPM is configured to monitor the clock signal provided to the IP block to adjust at least one of a frequency of the clock signal provided to the IP block and a voltage supplied to the IP block. The CPM clock manager is configured to perform the clock gating for the CPM.
    Type: Grant
    Filed: January 19, 2023
    Date of Patent: January 2, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae Gon Lee, Jae Young Lee, Se Hun Kim
  • Patent number: 11860688
    Abstract: Synchronization of precision timing signals maintained by multiple communication networks is described. A precision timing signal may be generated based on the change in state of a plurality of processors. Synchronization of the precision timing signals may be facilitated by a computing device monitoring at least two communication networks. The computing device may generate time offsets that are derived from the precision timing signals associated with each communication network. The time offsets may be communicated by the computing devices to remote devices communicatively coupled to the computing device via a first communication network. The remote devices may adjust locally maintained application clocks based on the time offset. The adjustment may synchronize the local application clock with the precision timing signal of a second communication network. In response, a remote device may communicatively couple with the second communication network.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: January 2, 2024
    Assignee: T-MOBILE INNOVATIONS LLC
    Inventors: Lyle W. Paczkowski, Peter Paul Dawson, Walter F. Rausch
  • Patent number: 11860689
    Abstract: In a time synchronization method, after clock board times between service boards are synchronized, a service board obtains a CPU time and the clock board time of the service board according to a preset periodicity, and makes a record. When performing CPU time synchronization between the service boards, the service board obtains a current CPU time of the service board, calculates a synchronization time of the CPU based on the current CPU time, a last recorded CPU time and clock board time, and adjusts the CPU time of the service board to the synchronization time. After the clock board times between the service boards that need to implement CPU high-precision time synchronization are synchronized by using a high-precision time synchronization protocol, the CPU time of each service board is adjusted to a corresponding synchronization time.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: January 2, 2024
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Fei Liu
  • Patent number: 11860690
    Abstract: In some embodiments, a computer peripheral mounting device for connecting a peripheral device to a support, wherein the support defines a thickness, comprises a fixed tubing extending in a longitudinal direction; a clamp coupled to a first end of the fixed tubing; an adjustment mechanism positioned at a second end of the fixed tubing, opposite the first end, and a shaft positioned within the fixed tubing and coupled between the adjustment mechanism and the clamp, wherein the adjustment mechanism is configured to rotate around the longitudinal direction relative to the fixed tubing in order to rotate the shaft within the fixed tubing and without the adjustment mechanism nor the shaft translating along the longitudinal direction relative to the fixed tubing, and wherein rotation of the shaft is configured to cause the distance between the first surface and the second surface to change.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: January 2, 2024
    Assignee: Logitech Europe S.A.
    Inventors: James Edward Renwick, Adam Bennett, Steven Takayama, Branko Lukic, Homin Lee
  • Patent number: 11860691
    Abstract: A display device may include a window module and a display module including a first non-folding region, a second non-folding region, and a folding region disposed between the first non-folding region and the second non-folding region. The display module may include a damping layer, a color filter layer, a display panel, and a lower member, which are sequentially stacked below the window module, and the damping layer may include polymer.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: January 2, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sojeong La, Dongjin Park, Jaiku Shin, Jongmin Yang, Gyeongho Jeong, Sung Chul Choi
  • Patent number: 11860692
    Abstract: A wearable contact tracing wristband has a main body with at an indicator light, a location tracker, and a processor. The indicator light provides a visual indication, such as a red light, of when the user is exposed to the condition and until testing or clearance occurs. A wireless communication module is connected to the processor, for remote and automatic activation of the indicator light.
    Type: Grant
    Filed: February 20, 2023
    Date of Patent: January 2, 2024
    Inventor: Shari L. Edwards
  • Patent number: 11860693
    Abstract: An electronic apparatus includes a display layer including a folding area and non-folding areas, a digitizer disposed under the display layer and including first sensing coils, second sensing coils insulated from the first sensing coils, and data lines connected to the second sensing coils, and a support layer disposed under the digitizer, where openings are defined in a portion of the support layer overlapping the folding area. Each first sensing coil includes a long side extending in the first direction and a short side extending in the second direction, each second sensing coil includes a long side extending in the second direction and a short side extending in the first direction, and a width in the second direction of a portion of the data lines overlapping the folding area is greater than a width in the second direction of a portion of the data lines not overlapping the folding area.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: January 2, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dasom Gu, Hirotsugu Kishimoto, Chul Ho Jeong, Jeongil Yoo, Jang Doo Lee
  • Patent number: 11860694
    Abstract: The disclosure relates to an electronic device including a rollable display, the electronic device including: a first housing; a second housing configured to slide in a first direction from the first housing in a second state and slide in a second direction opposite to the first direction in a first state so as to be coupled to the first housing; a rollable display having a display area varying depending on sliding of the second housing, the rollable display including a first portion visible to the outside in the first state and the second state, and a second portion visible to the outside in the second state, movements of the second portion being guided by a bendable support; a sliding support configured to slide based on movements of the second housing and support the second portion by supporting the bendable support in the second state; a bracket including a recess providing a space into which the sliding support is configured to slide in the first state; and a support plate disposed above the space to sup
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: January 2, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moonchul Shin, Youngmin Kang, Yeonggyu Yoon, Seungjoon Lee, Joongyeon Cho, Junyoung Choi, Byounguk Yoon
  • Patent number: 11860695
    Abstract: An electronic device includes: a display panel including a first region having a pixel therein, a bending region bent with respect to a virtual axis, and a second region with the bending region between the first region and the second region, wherein the first region and the second region are configured to face each other in a bent configuration; a lower plate below the display panel; a flexible circuit board connected to the second region, and including insulating layers with an opening portion in at least part thereof, a ground signal line, and a ground pattern exposed from the insulating layers by the opening portion and connected to the ground signal line; a resin layer on a first surface of the flexible circuit board, and covering the opening portion, the resin layer having a flat surface; and an adhesive layer bonding the resin layer to the lower plate.
    Type: Grant
    Filed: August 23, 2022
    Date of Patent: January 2, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sungyeon Cho, Jin Yong Sim, Taekwang Kim, Kukbin Lim
  • Patent number: 11860696
    Abstract: A foldable electronic device has a foldable region and includes a supporting film including a recess portion in the foldable region, a flexible substrate disposed on the supporting film, a control unit disposed under the supporting film, and a biometric sensing structure electrically connected to the control unit.
    Type: Grant
    Filed: November 10, 2022
    Date of Patent: January 2, 2024
    Assignee: InnoLux Corporation
    Inventors: Yuan-Lin Wu, Kuan-Feng Lee
  • Patent number: 11860697
    Abstract: A foldable touch screen display device with a flexible display made up of segments that can be folded from a compact state to an expanded state which also includes a peripheral enclosure mechanism. The peripheral enclosure mechanism can be automatically repositioned to rotate out of a channel as the device is being folded in such a way that it can close the gap at the sides of the device between two flexible display segments when the device is fully configured to a folded state. The device may further include sensors to indicate the state of configuration and mechanisms for alignment, locking, and further structural support. In one embodiment, a module attached to, situated within, or otherwise associated with at least one segment of the flexible display or rigid display may contain all or substantially all processing and memory, along with a communications system, which may be used in any state.
    Type: Grant
    Filed: February 6, 2023
    Date of Patent: January 2, 2024
    Assignee: LEPTON COMPUTING LLC
    Inventor: Stephen E. Delaporte
  • Patent number: 11860698
    Abstract: A system for determining remaining useful energy in an electric aircraft, the system including a computing device where the computing device is configured to measure a internal state datum of a battery as a function of at least a sensor, receive the internal state datum from the at least a sensor, generate a useful energy remaining datum as a function of the internal state datum and a battery model, and display the useful energy remaining datum to a user.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: January 2, 2024
    Assignee: BETA AIR, LLC
    Inventors: Steven J. Foland, Herman Wiegman
  • Patent number: 11860699
    Abstract: An electrical transmitter (100) is provided that comprises an ethernet connection (118) and a power source. Electronics (112) are configured to receive the ethernet connection (118) and the power source. The electronics (112) comprise logic operable to detect the power source and accept power from either the ethernet connection (118) or a dedicated power connection (116). A remappable power connection terminal (114) with the electronics (112) is operable to accept power when the dedicated power connection (116) is detected, and operable to accept a non-power connection when power from the ethernet connection (118) is detected.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: January 2, 2024
    Assignee: MICRO MOTION, INC.
    Inventors: Andrew S. Kravitz, Tonya L. Wyatt, Anthony Gentile
  • Patent number: 11860700
    Abstract: Apparatuses for transferring power from a power source to a computing device are provided for. The apparatuses include an entropy-generator for generating entropy. The apparatus is adapted for transferring the entropy to the computing device (such as a mobile computing device) when it is connected to the computing device. The device is adapted to power the entropy-generator with power received from the power source. Methods are also provided for. The methods include providing power and/or entropy to a computing device.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: January 2, 2024
    Assignee: QUSIDE TECHNOLOGIES S.L.
    Inventor: Carlos Abellan
  • Patent number: 11860701
    Abstract: An electronic device includes: a plurality of connection ports to which external devices are able to be connected; and a controller configured to control whether or not to supply power to an external device connected to a connection port in preference to an external device connected to another connection port on the basis of a priority level assigned to each of the plurality of connection ports.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: January 2, 2024
    Assignee: SHARP NEC DISPLAY SOLUTIONS, LTD.
    Inventors: Hideki Motoi, Tomohisa Ukegawa, Isamu Kenmochi
  • Patent number: 11860702
    Abstract: Methods and systems for controlling current consumption by an electrical load of a first circuit board are described. In an example, a device of a first circuit board can measure a current being drawn by the electrical load of the first circuit board from a second circuit board. The device can generate a control signal based on a current difference between the measured current and a target current. The control signal can represent a load control parameter. The device can apply the control signal to the electrical load of the first circuit board to adjust a current consumption by the electrical load.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: January 2, 2024
    Assignee: International Business Machines Corporation
    Inventors: Xin Zhang, Bruce Fleischer, Leland Chang
  • Patent number: 11860703
    Abstract: The technology disclosed herein determining one or more vulnerable instructions in workload code and determining one or more additional instructions to be inserted in the workload code based at least in part on a power model of a system bus of a processor, when a power model of a processor is dependent on an order of instructions of workload code, inserting the one or more additional instructions with dependency to the workload code to produce complementary power consumption of the system bus to power consumption of the system bus from executing the one or more vulnerable instructions; and when the power model is not dependent on the order of instructions of workload code, inserting the one or more additional instructions without dependency to the workload code to produce complementary power consumption of the system bus to power consumption of the system bus from executing the one or more vulnerable instructions.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: January 2, 2024
    Assignee: INTEL CORPORATION
    Inventors: Abhishek Chakraborty, Chen Liu, Jason Fung, Neer Roggel
  • Patent number: 11860704
    Abstract: Methods and apparatus to determine user presence are disclosed. A disclosed example monitoring device to determine of a presence of a user in a metering environment includes a mount to couple the monitoring device to a wearable device to be worn by the user, the wearable device to receive content from a content device, a sensor to detect motion of the user, and a transmitter to transmit motion data pertaining to the detected motion of the user for the determination of the presence of the user.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: January 2, 2024
    Assignee: The Nielsen Company (US), LLC
    Inventors: Timothy Christian, Garrett Sloop
  • Patent number: 11860705
    Abstract: A power consumption control method for an electronic device, an electronic device, and a storage medium, and the method includes: obtaining a current state of the electronic device; determining a target integration time of an ADC sampling circuit based on the obtained current state; and adjusting an integration time of the ADC sampling circuit to the target integration time, and adjusting a power-on time of a hidden function key based on the adjusted integration time to control actual power consumption of the electronic device, wherein the integration time is positively correlated with the power-on time.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: January 2, 2024
    Assignee: VIVO MOBILE COMMUNICATION CO., LTD.
    Inventor: Deshun Min
  • Patent number: 11860706
    Abstract: Communication systems including a case and an accessory are disclosed. In one example, the case supplies electric power. The accessory is connectable to the case with a charging line and a GND line. The charging line transmits and receives a charging signal. The GND line is set to a reference voltage. The accessory includes a requested-operation determination circuit that, based on a voltage level of the charging signal and on a duration time of the voltage level, determines one operation requested of the accessory. In another example, a power management IC is included in the accessory and connected to the case with a charging line and a GND line. The power management IC includes a requested-operation determination circuit that, based on a voltage level of the charging signal and on a duration time of the voltage level, determines one operation requested of the accessory.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: January 2, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Satoshi Sugiyama, Naoya Arisaka
  • Patent number: 11860707
    Abstract: A system and method for managing energy consumption of one or more processor cores in a multicore processing device. The method includes translating each activity level of the one or more processor cores to a respective charge value. The method also includes generating, at least partially subject to each translated charge value, one or more charge replenishment requests associated with the one or more processor cores. The method further includes transmitting the one or more charge replenishment requests to a pending queue prior to a delay queue.
    Type: Grant
    Filed: February 15, 2023
    Date of Patent: January 2, 2024
    Assignee: International Business Machines Corporation
    Inventors: Brian Thomas Vanderpool, Gerald Mark Grabowski, Jeffrey A. Stuecheli, Michael Stephen Floyd, Matthew A. Cooke
  • Patent number: 11860708
    Abstract: A mobile terminal and an application processor are provided. The mobile terminal includes a power management module, an application processor, a display driver chip, and a display panel. The power management module is used to output a power supply voltage to the application processor, the display driver chip, and display panel. The application processor includes a graphics processor, a graphics random access memory and a display serial interface, where the graphics random access memory is communicably connected with a codec overlay hardware of the graphic processor, and is used to receive and store an image frame outputted by the graphic processor. The graphic random access memory is communicably connected to the display serial interface to output a stored image frame to the display driver chip through a display serial interface. The display driver chip controls the display panel to display the received image frame.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: January 2, 2024
    Assignee: VIVO MOBILE COMMUNICATION CO., LTD.
    Inventor: Chialin Lu
  • Patent number: 11860709
    Abstract: The present invention discloses a power supply apparatus having power limiting mechanism. A switch transistor is controlled by a control voltage such that a power supply unit supplies a power to a powered device when the switch transistor is controlled to be conducted, wherein the switch transistor has an operation current, an operation voltage and an operation power under conduction. A voltage detection circuit detects the operation voltage. A power-limiting circuit performs analog-to-digital conversion on the operation voltage, generates a current-limiting signal related to a current-limiting value according to the operation voltage based on a predetermined voltage-current curve and performs digital-to-analog conversion on the current-limiting signal to generate a reference voltage.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: January 2, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Rui Wang, Min Zhang, He Li, Qi-Cai Tang, Teng-Yue Zhang
  • Patent number: 11860710
    Abstract: Systems and methods associated with incident prediction using machine learning techniques are disclosed. In one embodiment, an exemplary method may comprise obtaining current raw log data from at least one application log of at least one software application, converting the current raw log data into current tabular log data, applying one or more sampling techniques to the current tabular log data to form current balanced log data, the current balanced log data including incidents of failures, applying one or more machine learning techniques to the current balanced log data to generate an application failure predictive model, and predicting, based on future balanced log data, at least one future failure of the software application using the application failure predictive model.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: January 2, 2024
    Assignee: Capital One Services, LLC
    Inventors: Suvro Choudhury, Cameron Stinson, Kellie Meshell, Henry Real, Rajarshi Kar
  • Patent number: 11860711
    Abstract: Methods and apparatus for rebuilding and storing data in a storage network that includes a plurality of storage units. In an embodiment, a processing module(s) of storage network identifies a storage error associated with a data object stored in a first storage unit of a set of storage units. In response, the processing module obtains storage network configuration information associated with the data object, and rebuilds the data object to produce a rebuilt data object. The processing module further identifies, based on the storage network configuration information, a candidate storage unit(s) for storage of the rebuilt data object and determines an available storage capacity level of the candidate storage unit. In response to determining that the available storage capacity level of the candidate storage unit is sufficient to store the rebuilt data object, the processing module facilitates storage of the rebuilt data object in the candidate storage unit.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: January 2, 2024
    Assignee: Pure Storage, Inc.
    Inventors: Jason K. Resch, Ravi V. Khadiwala, Wesley B. Leggette
  • Patent number: 11860712
    Abstract: A computer-implemented method to identify and remediate a failing sensor. The method includes identifying a set of sensors in an Internet of Things (IoT) system including a first sensor, where the IoT system is configured to perform at least one action, the IoT system includes one or more IoT devices, each sensor is correlated to one IoT device of the one or more IoT devices, and each sensor sends an output data feed to the IoT system including a first data feed for the first sensor. The method further includes predicting, by a generative adversarial network (GAN), an expected output of the first sensor. The method also includes determining that a difference between the expected output and an actual output of the first sensor exceeds a first threshold. The method includes replacing, in response the difference exceeding the first threshold, the first data feed with a first generated data feed.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: January 2, 2024
    Assignee: International Business Machines Corporation
    Inventors: Zachary A. Silverstein, Jacob Ryan Jepperson, Jeremy R. Fox, Spencer Thomas Reynolds
  • Patent number: 11860713
    Abstract: In an example embodiment, a workflow engine is introduced within a cloud landscape. Runbooks re then implemented as workflow templates within the workflow engine. The workflow engine allows for creation of workflows from the workflow templates as well as composing workflows from individual steps. The workflow engine provides a mechanism to describe workflow templates and workflow sets as code.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: January 2, 2024
    Assignee: SAP SE
    Inventors: Daniel Kirmse, Henning Zahn
  • Patent number: 11860714
    Abstract: Methods, systems, and devices for error notification using an external channel are described. In some cases, a memory system having a host-driven logical block interface may issue a notification of a detected error using an out of band channel. For example, after receiving a data unit from a host system but prior to storing the data in a memory array of the memory system, the memory system may transmit an acknowledgment to host system to indicate that the data was successfully received. As part of storing the data, the memory system may transfer the data along data paths between various components and perform parity checks at each component. If the memory system detects an error along a data path, the memory system may issue a notification of the error to the host system over the out of band channel.
    Type: Grant
    Filed: October 20, 2022
    Date of Patent: January 2, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Yoav Weinberg, Chandrakanth Rapalli, Tal Sharifie
  • Patent number: 11860715
    Abstract: Provided are systems and methods which provide an OData messaging protocol for HTTP messages that are processed successfully but with some errors. In one example, the method may include transmitting a HTTP request to an OData service, the HTTP request comprising identifiers of one or more input fields and one or more values for the one or more input fields, receiving, from the OData service, an HTTP response indicating that the HTTP request was processed successfully with one or more errors, identifying an input field which is a target of the error and a reason for the error from a field in the HTTP response indicating that the HTTP request was processed successfully with one or more errors, and rendering, via the application, a visual identifier of the error in association with a display of the input field on the user interface.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: January 2, 2024
    Assignee: SAP SE
    Inventors: Arley Triana Morin, Ralf Handl
  • Patent number: 11860716
    Abstract: According to one embodiment, an information processing apparatus includes a processing circuit. The processing circuit calculates a first input/output error related to normal data and a second input/output error related to pseudo abnormal data different from the normal data, for each of a plurality of autoencoders having different network structures. The processing circuit outputs relational data indicating a relation between the network structure and the first input/output error and the second input/output error.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: January 2, 2024
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuichi Kato, Kentaro Takagi, Kouta Nakata
  • Patent number: 11860717
    Abstract: Various methods and systems for tracking incomplete purchases in correlation with application performance, such as application errors or crashes, are provided. In this regard, aspects of the invention facilitate monitoring transaction and application error events and analyzing data associated therewith to identify data indicating an impact of incomplete purchases in relation to an error(s) such that application performance can be improved. In various implementations, application data associated with an application installed on a mobile device is received. The application data is used to determine that an error that occurred in association with the application installed on the mobile device correlates with an incomplete monetary transaction initiated via the application. Based on the error correlating with the incomplete monetary transaction, a transaction attribute associated with the error is determined.
    Type: Grant
    Filed: October 11, 2022
    Date of Patent: January 2, 2024
    Assignee: Splunk Inc.
    Inventor: Konstantinos Polychronis
  • Patent number: 11860718
    Abstract: A register reading method and apparatus, a device and a medium. After a server is crashed, a CPU-register collecting request is triggered. Different types of CPUs correspond to different types and quantities of registers that require data collection. Therefore, by firstly determining the register required to be read corresponding to the CPU type, and determining the reading mode of the register, the disadvantage that the reading mode that may merely use a single instruction may not satisfy the demand on field crashing analysis is prevented. Subsequently, by using a PECI bus, the register data of a plurality of registers are read. By collecting the registers of the CPU directly by using the PECI bus, the problem that the performance excessively relies on the stability of the ME due to the intermediate transfer via the ME is prevented, which greatly increases the reading success rate of the registers.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: January 2, 2024
    Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.
    Inventor: Zhili Hou
  • Patent number: 11860719
    Abstract: A method for implementing storage service continuity in a storage system includes a front-end interface detecting a status of a first storage controller. The storage system includes the front-end interface card and a plurality of storage controllers. The front-end interface card communicates with the storage controllers, and the front-end interface card communicates with a host. When the first storage controller is in an abnormal state, the front-end interface card selects a second storage controller from the storage controllers for the host to process an access request of the host.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: January 2, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Qiming Xu, Can Chen, Song Yang, Linan Zhou, Dahong Yan, Juntao Yang
  • Patent number: 11860720
    Abstract: Techniques for causal modeling. Historical feature data is received, relating to a plurality of nodes in a system. A machine learning (ML) model is generated, for a node of the plurality of nodes. The ML model is trained to predict a plurality of future feature values for the node based on at least a portion of the historical feature data. A causal graph is generated, for the plurality of nodes, using a feature selection mechanism within the ML model. The feature selection mechanism includes a regularization term encouraging sparsity of nodes in selected features in the ML model.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: January 2, 2024
    Assignee: International Business Machines Corporation
    Inventors: Georgios Kollias, Aurelie Chloe Lozano, Naoki Abe