Patents Issued in February 1, 2024
  • Publication number: 20240036848
    Abstract: Disclosed methods may push a capsule update including a best known configuration—compute express link (BKC-CXL) firmware update to a boot time memory area. Following a platform reboot, BKC-CXL firmware update operations are performed. The update operations include mapping a BKC-CXL runtime memory area to a non-volatile BKC store, identifying current CXL attributes from the runtime memory area, extracting the firmware update, creating one or more BKC-CXL objects from the firmware update to enable dynamic configuration of CXL parameters, comparing current CXL attributes with stored CXL attributes to identify CXL attribute changes, and saving information indicative of the CXL attribute changes back to the non-volatile BKC store.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 1, 2024
    Applicant: Dell Products L.P.
    Inventors: Shekar Babu SURYANARAYANA, Sumanth VIDYADHARA
  • Publication number: 20240036849
    Abstract: A system, method, and computer-readable medium are disclosed for performing a data center connectivity management operation. The connectivity management operation includes: providing a data center asset with a data center asset client module; establishing a connection between the data center asset client module and a connectivity management system, the connectivity management system comprising a connectivity management system aggregator; updating the data center asset client module to a new version of the data center asset client module, the new version of the data center asset client module including new data center asset module state information and new data center asset connectivity information; and, providing the connectivity management system aggregator with the new data center asset module connectivity information.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 1, 2024
    Applicant: Dell Products L.P.
    Inventors: Kirk Frey, Tommi Salli, Dominique Prunier, Eric Williams, Elie A. Jreij
  • Publication number: 20240036850
    Abstract: An information handling system may include at least one processor and a memory. The information handling system may be configured to: receive an update package for applying an update to at least one information handling resource of the information handling system, wherein the update package includes metadata regarding at least one dependency of the update package; subsequent to receiving the update package, retrieve a revised version of the metadata, wherein the revised version of the metadata indicates a revised at least one dependency; based on the revised at least one dependency, carry out a configuration change; and apply the update.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 1, 2024
    Applicant: Dell Products L.P.
    Inventors: Balakrishna PADHY, Chandrasekhar REVURI, Penchal Reddy T Y, Raveendra Babu MADALA, Rama Rao BISA, Shankar MARIMUTHU
  • Publication number: 20240036851
    Abstract: A hybrid cloud package build architecture can be provided for a computer system. For instance, a trigger can be determined for fetching an external package component for integration with a local package component. Based on the trigger, a request can be transmitted to an external package repository to obtain the external package component. The external package component can be received responsive to the request. The external package component can be cached for integration with the local package component.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 1, 2024
    Inventors: Leigh Griffin, Leonardo Rossetti
  • Publication number: 20240036852
    Abstract: Systems and methods are provided for in-service software upgrades using centralize database versioning and migrations. The systems and methods described herein can intercept protocol messages between a client and a network device and run a first control plane comprising an origin state database and a plurality of un-migrated services. The system can generate a target state data model, wherein an origin state data model associated with the origin state database migrates to the target state data model, and copy the origin state database. The system can migrate second control plane software to the target state database and operate un-migrated services in accordance with the first control plane software and the copied origin state database while operating migrated services in accordance with the second control plane software and the target state database.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 1, 2024
    Inventors: FRANCISCO JOSE ROJAS FONSECA, NICK E. DEMMON, DAVID CORRALES LOPEZ
  • Publication number: 20240036853
    Abstract: In one aspect, a disclosed method includes learning one or more chip agnostic parameters across a plurality of best known configuration (BKC) firmware versions, performing BKC attributes tuning based on said learning, implementing platform specific BKC table offsets and a handoff block to pass the table offsets to update routines by creating a trusted session for platform firmware table updates, and dynamically publishing changes in BKC policy. A BKC firmware serialization protocol may be implemented to ensure gaps in firmware versions at an end user platform are resolved by synchronizing each BKC version attribute. The serialization protocol may employ node-based cloud ecosystem learning. The method may further include reloading memory map parameters for uninterrupted services. The uninterrupted services may include, as examples, user presence detection after power resume and central processing unit (CPU) power cap functions.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 1, 2024
    Applicant: Dell Products L.P.
    Inventors: Shekar Babu SURYANARAYANA, Vivek Viswanathan IYER
  • Publication number: 20240036854
    Abstract: A method and an electronic device of updating and testing multiple embedded controllers (ECs) are provided. First, in the electronic device, a basic input output system (BIOS) executes an updating software to read an embedded-controller read-only file (ECROF) in an external read-only memory (ROM). A first embedded controller (first EC) writes the ECROF from the external ROM into the first EC. The first EC uses the ECROF to update a first firmware of the first EC. Then, the first EC updates a second firmware of a second embedded controller (second EC) with the ECROF. Next, the first EC or another hardware device compares the first summary information stored in the first EC and the second summary information of the updated second EC. When the first summary information and the second summary information are different, the first EC or the hardware device generates a warning message.
    Type: Application
    Filed: October 21, 2022
    Publication date: February 1, 2024
    Inventors: MING-LUN YANG, TING-KU TUNG, YUNG-HSIEN HO
  • Publication number: 20240036855
    Abstract: Exemplary embodiments provide a method and a system for updating firmware based on a blockchain which store information about heterogeneous IoT firmware in a distributed block node to build an authentication blockchain and automatically update the heterogeneous IoT firmware using a consensus algorithm based on a block node which forms the authentication block chain.
    Type: Application
    Filed: June 2, 2023
    Publication date: February 1, 2024
    Inventors: Cheol Hee YOON, Jang Mook KANG, Jee Rhyang KIM, Dae Il JANG, Yong Hee SHIN
  • Publication number: 20240036856
    Abstract: A vehicle system includes: a vehicle device having a first function that is commonly implemented regardless of a type of the vehicle system; and an external device that operates alone and independently from the vehicle device, has a second function that is selectively implemented in accordance with the type, and is connected to the vehicle device via a communication line. The vehicle device is configured to execute the second function via the external device. The external device is configured to execute the first function via the vehicle device.
    Type: Application
    Filed: October 11, 2023
    Publication date: February 1, 2024
    Inventors: Akira TANIMOTO, Hiroyoshi KUNIEDA
  • Publication number: 20240036857
    Abstract: Disclosed embodiments relate to identifying Electronic Control Unit (ECU) anomalies in a vehicle. Operations may include monitoring, in the vehicle, data representing real-time processing activity of the ECU; accessing, in the vehicle, historical data relating to processing activity of the ECU, the historical data representing expected processing activity of the ECU; comparing, in the vehicle, the real-time processing activity data with the historical data, to identify at least one anomaly in the real-time processing activity of the ECU; and implementing a control action for the ECU when the at least one anomaly is identified.
    Type: Application
    Filed: October 11, 2023
    Publication date: February 1, 2024
    Applicant: Aurora Labs Ltd.
    Inventor: Zohar Fox
  • Publication number: 20240036858
    Abstract: A computer-based method for managing a dataflow pipeline across a plurality of environments, includes the steps of: receiving, for a first environment, a check-in comprising source code, a task definition, a configuration, and a flow definition; receiving a definition of an application secret and an associated credential; storing the application secret and credential in a dataflow pipeline deployer data store; creating a data flow pipeline package, further comprising the steps of: merging the source code, the configuration, and the secrets; and defining a pipeline graph in the first environment pipeline flow registry.
    Type: Application
    Filed: July 28, 2023
    Publication date: February 1, 2024
    Inventors: Srinivasa Subramanyam Pulugurtha, Pritish Prashant Pai, Misha Smirnov, Juan Yin
  • Publication number: 20240036859
    Abstract: A computer-implemented method for verifying a software component of an automated driving function. The native program code of the software component to be verified is limited to a set of authorized operations of the programming language used, and the following steps are performed: a) translating the native program code into a model checker representation of the software component to be verified, and b) analyzing the model checker representation of the software component to be verified using a model checking method. The native program code is converted into a finite-state machine, the states and state transitions of which are one-to-one assignable to the code structure of the native program code. The model checker representation is generated on the basis of this finite-state machine, such that the code structure of the native program code is largely retained when it is translated into the model checker representation.
    Type: Application
    Filed: July 17, 2023
    Publication date: February 1, 2024
    Inventors: Christian Schildwaechter, Lukas Koenig
  • Publication number: 20240036860
    Abstract: The present disclosure discloses a method and system for automatically and quickly deploying a front-end processor based on gray release. The system includes a user management module, a front-end processor engineering configuration module, a version iteration module and an engineering code version management repository, where the version iteration module is connected with the engineering code version management repository, the user management module and the front-end processor engineering configuration module, a code is obtained through the engineering code version management repository to perform updating or rollback of a current code, an operating permission of the front-end processor is obtained by using the user management module, an engineering configuration parameter is obtained from the front-end processor engineering configuration module for engineering gray release of a plurality of front-end processors, and a task scheduling function therein is called.
    Type: Application
    Filed: July 28, 2023
    Publication date: February 1, 2024
    Inventors: Jingsong LI, Hongyi NI, Tianshu ZHOU, Yu TIAN
  • Publication number: 20240036861
    Abstract: A plurality of invoking units of software instructions that each directly invoke one or more functions of an invoked unit of software instructions are identified. Based on at least one criterion a first function of the one or more functions is selected for inclusion in an interface. An interfacing unit of software instructions that implements the interface is generated, the interface being configured to be invoked by at least one of the plurality of invoking units of software instructions, and when invoked, to invoke the first function.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 1, 2024
    Inventors: Janos Bonic, Sanja Bonic, Leigh Griffin
  • Publication number: 20240036862
    Abstract: A method for transmitting a packet vector across compute nodes implementing a packet processing graph on a vector packet processor is disclosed. The method includes determining that a packet vector processed by a previous graph node in a first compute node is ready to be processed by a next graph node in a second compute node. The packet vector includes a plurality of data packets and the previous and next graph nodes are graph nodes of a packet processing graph implemented as a directed acyclic graph (“DAG”) that extends across the first and second compute nodes. The first and second compute nodes each run an instance of a vector packet processor. The method includes transmitting the packet vector from the first compute node to the second compute node using remote direct memory access (“RDMA”).
    Type: Application
    Filed: August 1, 2022
    Publication date: February 1, 2024
    Inventors: Corneliu-Ilie Calciu, Gavril-Ioan Florian
  • Publication number: 20240036863
    Abstract: The present disclosure discloses a method for vector reading-writing, a vector-register system, a device and a medium. When a vector-writing instruction is obtained, by using a vector-register controller, a to-be-written-vector address space is converted into a to-be-written-vector-register-file bit address, and, for a nonstandard vector, by using a nonstandard-vector converting unit, after the nonstandard vector is converted into a to-be-written nonstandard vector, and, subsequently, writing is performed, to realize the saving of vector data of any format. When a vector-reading instruction is obtained, by using the vector-register controller, according to the to-be-read width and the to-be-read length, after the to-be-read-vector address space is converted into a to-be-read-vector-register-file bit address, and, subsequently, reading is performed, to realize the reading of vector data of any format.
    Type: Application
    Filed: April 28, 2022
    Publication date: February 1, 2024
    Inventors: Lingjun KONG, Zhaochun PANG, Qi SONG
  • Publication number: 20240036864
    Abstract: An apparatus includes a circular buffer which includes a fixed number of entries and allows data overflow to occur while maintaining the most recently stored entries in order. The circular buffer could be used as a return address stack used to push and pop return addresses for subroutine calls in a processor. Additional circuitry dynamically links entries to maintain a last-in first-out stack. A system return pointer tracks the next entry to be returned when an entry is to be read. When data is pushed to an entry in the circular buffer, that entry stores a pointer to the entry for the previous system return pointer. By tracking the previous system return pointer in the pushed entry, the dynamically linked entries may skip intervening entries that have been previously popped and, thus, track the order of most recently written non-popped entries without having to separately maintain free and used lists.
    Type: Application
    Filed: August 1, 2022
    Publication date: February 1, 2024
    Inventors: Aniket Bhivasen Bhor, Huzefa Sanjeliwala, Ajay Kumar Rathee
  • Publication number: 20240036865
    Abstract: Systems, methods, and apparatuses relating to performing hashing operations on packed data elements are described.
    Type: Application
    Filed: June 17, 2023
    Publication date: February 1, 2024
    Inventors: Regev Shemy, Zeev Sperber, Wajdi Feghali, Vinodh Gopal, Amit Gradstein, Simon Rubanovich, Sean Gulley, Ilya Albrekht, Jacob Doweck, Jose Yallouz, Ittai Anati
  • Publication number: 20240036866
    Abstract: Disclosed herein are systems and methods for executing multiple instruction set architectures (ISAs) on a singular processing unit. In an implementation, a processor that includes a first decoder, a second decoder, instruction fetch circuitry, and instruction dispatch circuitry is configured to execute two separate instruction set architectures. In an implementation, the instruction fetch circuitry is configured to fetch instructions from an associated memory. In an implementation the instruction dispatch circuitry is coupled to the instruction fetch circuitry, the first decoder, and the second decoder and is configured to route instructions associated with a first ISA to the first decoder, and route instructions associated with a second ISA to the second decoder.
    Type: Application
    Filed: July 20, 2023
    Publication date: February 1, 2024
    Inventors: Duc Bui, Timothy D. Anderson, Paul Gauvreau
  • Publication number: 20240036867
    Abstract: Techniques related to executing a plurality of instructions by a processor comprising receiving a first instruction configured to cause the processor to output a first data value to a first address in a first data cache, outputting, by the processor, the first data value to a second address in a second data cache, receiving a second instruction configured to cause a streaming engine associated with the processor to prefetch data from the first data cache, determining that the first data value has not been outputted from the second data cache to the first data cache, stalling execution of the second instruction, receiving an indication, from the second data cache, that the first data value has been output from the second data cache to the first data cache, and resuming execution of the second instruction based on the received indication.
    Type: Application
    Filed: October 10, 2023
    Publication date: February 1, 2024
    Inventors: Naveen BHORIA, Kai CHIRCA, Timothy D. ANDERSON, Duc BUI, Abhijeet A. CHACHAD, Son Hung TRAN
  • Publication number: 20240036868
    Abstract: Processing methods is provided. A method is designated as schedulable. A completion stage is generated for the method. A return of the completion stage corresponding to the method is received. It is determined whether a state of the completion stage indicates continued execution of the method. In response to determining that the state of the completion stage does indicate continued execution of the method, a set of executions of the method is continued based on an execution return of the method being a null return.
    Type: Application
    Filed: July 27, 2022
    Publication date: February 1, 2024
    Inventors: Nathan Jon Rauh, Alex Seitzinger Motley, James Stephens, Mark Swatosh
  • Publication number: 20240036869
    Abstract: Configuration information is sent from a configuration controller to a processor module in a System On Chip (SOC) and associated with firmware. In response to receiving the configuration information, context switching associated with an interrupt pin in the processor module is disabled. Hardware state information is sent from a hardware functional module in the SOC to the interrupt pin. In response to receiving the hardware state information, the processor module determines, based at least in part on the hardware state information and after completing any active firmware operations per the disabled context switching, a response. The response is received at a responding module and the responding module performs a process associated with the response.
    Type: Application
    Filed: July 12, 2023
    Publication date: February 1, 2024
    Inventors: Priyanka Nilay Thakore, Lyle E. Adams, Haibo Zhu
  • Publication number: 20240036870
    Abstract: In an embodiment, a processor includes a buffer in an interface unit. The buffer may be used to accumulate coprocessor instructions to be transmitted to a coprocessor. In an embodiment, the processor issues the coprocessor instructions to the buffer when ready to be issued to the coprocessor. The interface unit may accumulate the coprocessor instructions in the buffer, generating a bundle of instructions. The bundle may be closed based on various predetermined conditions and then the bundle may be transmitted to the coprocessor. If a sequence of coprocessor instructions appears consecutively in a program, the rate at which the instructions are provided to the coprocessor (on average) at least matches the rate at which the coprocessor consumes the instructions, in an embodiment.
    Type: Application
    Filed: July 28, 2023
    Publication date: February 1, 2024
    Inventors: Aditya Kesiraju, Brett S. Feero, Nikhil Gupta, Viney Gautam
  • Publication number: 20240036871
    Abstract: A placer and router for an iterative placement and routing of a sorted operation unit graph on a reconfigurable processor is presented as well as a method of operating a placer and router for an iterative placement and routing of a sorted operation unit graph on a reconfigurable processor. The placer and router is configured to receive an architectural specification of the reconfigurable processor and the sorted operation unit graph having an ordered sequence of nodes and edges that interconnect nodes in the ordered sequence of nodes. The placer and router is further configured to provide an assignment of nodes of the sorted operation unit graph to locations on the reconfigurable processor and an assignment of edges of the sorted operation unit graph to physical links and switches of the reconfigurable processor.
    Type: Application
    Filed: July 25, 2023
    Publication date: February 1, 2024
    Applicant: SambaNova Systems, Inc.
    Inventors: Hong SUH, Sumti JAIRATH
  • Publication number: 20240036872
    Abstract: A cellular modem processor can include dedicated processing engines that implement specific, complex data processing operations. The processing engines can be arranged in pipelines, with different processing engines executing different steps in a sequence of operations. Flow control or data synchronization between pipeline stages can be provided using a hybrid of firmware-based flow control and hardware-based data dependency management. Firmware instructions can define data flow by reference to a virtual address space associated with pipeline buffers. A hardware interlock controller within the pipeline can track and enforce the data dependencies for the pipeline.
    Type: Application
    Filed: July 27, 2023
    Publication date: February 1, 2024
    Applicant: Apple Inc.
    Inventors: Steve Hengchen Hsu, Thirunathan Sutharsan, Mohanned Omar Sinnokrot, On Wa Yeung
  • Publication number: 20240036873
    Abstract: An information handling system may include at least one processor and a memory. The information handling system may be configured to: receive an instruction from a user; cause the instruction to be executed, wherein executing the instruction generates a response; parse the response to determine whether any failures are associated therewith; and provide a recommended instruction to the user, wherein the recommended instruction is executable to locate and/or remediate an issue associated with the information handling system.
    Type: Application
    Filed: July 26, 2022
    Publication date: February 1, 2024
    Applicant: Dell Products L.P.
    Inventors: Chandrasekhar REVURI, A Anis AHMED, Pallavi SATPATHY
  • Publication number: 20240036874
    Abstract: A data processor is disclosed in which groups of execution threads comprising a thread group can execute a set of instructions in lockstep, and in which a plurality of execution lanes can perform processing operations for the execution threads. In response to an execution thread issuing circuit determining whether a portion of active threads of a first thread group and a portion of active threads of a second thread group use different execution lanes of the plurality of execution lanes, the execution thread issuing circuit issuing both the portion of active threads of a first thread group and a portion of active threads of a second thread group for execution. This can have the effect of increasing data processor efficiency, thereby increasing throughput and reducing latency.
    Type: Application
    Filed: July 24, 2023
    Publication date: February 1, 2024
    Applicant: Arm Limited
    Inventors: Daren Croxford, Isidoros Sideris
  • Publication number: 20240036875
    Abstract: Systems, apparatuses, and methods for organizing bits in a memory device are described. In a number of embodiments, an apparatus can include an array of memory cells, a data interface, a multiplexer coupled between the array of memory cells and the data interface, and a controller coupled to the array of memory cells, the controller configured to cause the apparatus to latch bits associated with a row of memory cells in the array in a number of sense amplifiers in a prefetch operation and send the bits from the sense amplifiers, through a multiplexer, to a data interface, which may include or be referred to as DQs. The bits may be sent to the DQs in a particular order that may correspond to a particular matrix configuration and may thus facilitate or reduce the complexity of arithmetic operations performed on the data.
    Type: Application
    Filed: October 9, 2023
    Publication date: February 1, 2024
    Inventors: Glen E. Hush, Aaron P. Boehm, Fa-Long Luo
  • Publication number: 20240036876
    Abstract: Techniques related to executing a plurality of instructions by a processor comprising a method for executing a plurality of instructions by a processor. The method comprises detecting a pipeline hazard based on one or more instructions provided for execution by an instruction execution pipeline, beginning execution of an instruction, of the one or more instructions on the instruction execution pipeline, stalling a portion of the instruction execution pipeline based on the detected pipeline hazard, storing a register state associated with the execution of the instruction based on the stalling, determining that the pipeline hazard has been resolved, and restoring the register state to the instruction execution pipeline based on the determination.
    Type: Application
    Filed: October 16, 2023
    Publication date: February 1, 2024
    Inventors: Timothy D. ANDERSON, Duc BUI, Joseph ZBICIAK, Reid E. TATGE
  • Publication number: 20240036877
    Abstract: Examples of the present disclosure provide apparatuses and methods related to generating and executing a control flow. An example apparatus can include a first device configured to generate control flow instructions, and a second device including an array of memory cells, an execution unit to execute the control flow instructions, and a controller configured to control an execution of the control flow instructions on data stored in the array.
    Type: Application
    Filed: August 10, 2023
    Publication date: February 1, 2024
    Inventors: Kyle B. Larson, Richard C. Murphy, Troy A. Manning, Dean A. Klein
  • Publication number: 20240036878
    Abstract: A method for booting an electronic control unit (ECU). The ECU includes a host interacting with a Hardware Security Module (HSM). At least one software component is checked by the HSM, in case a manipulation is detected the host sends a request to HSM to check whether the manipulation has occurred, the host decides whether an intervention is necessary.
    Type: Application
    Filed: July 11, 2023
    Publication date: February 1, 2024
    Inventors: Prajakta Pandit, Gautam Pai
  • Publication number: 20240036879
    Abstract: During a boot process of a computing device, a boot loader loads a kernel and an initial RAM disk image from a persistent storage device into RAM. The initial RAM disk image includes a file system that includes a camera application. The kernel is invoked, and the kernel mounts a RAM disk from the initial RAM disk image as a root file system. The kernel causes an initiation of the camera application into a user space. The camera application obtains an image frame from a camera. The camera application processes the image frame to generate a processed image frame, and provides the processed image frame to a frame buffer for presentation of the processed image frame on a display device.
    Type: Application
    Filed: October 13, 2023
    Publication date: February 1, 2024
    Inventors: Eric Curtin, Leigh Griffin
  • Publication number: 20240036880
    Abstract: An information processing apparatus includes a foldable display; a camera which captures a direction to face at least part of the display surface; a sensor for detecting the posture of the information processing apparatus; a first processor which controls the operation of the system; a second processor which detects a face area from an image captured by the camera; and a third processor which processes while switching, based on the posture, between first processing to output first information when the face area is detected by the second processor, or output second information when the face area is not detected, and second processing to output either one of the first information and the second information regardless of the detection of the face area by the second processor. The operation of the system is controlled based on the first processing and the second processing.
    Type: Application
    Filed: July 6, 2023
    Publication date: February 1, 2024
    Applicant: Lenovo (Singapore) Pte. Ltd.
    Inventors: Masashi Nishio, Kazuhiro Kosugi
  • Publication number: 20240036881
    Abstract: An information handling system includes a memory device, a memory, a chipset, and a basic input/output system (BIOS). The chipset includes a main processor and a hybrid processor. During a first pre-boot phase, the BIOS memory maps the hybrid processor to a first portion of the memory device, and stores an embedded operating system in the memory. During a second pre-boot phase, the BIOS memory maps the main processor to a second portion of the memory device, stores a host operating system in the memory, and loads the embedded operating system on the hybrid processor. The second portion is a larger portion of the memory device than the first portion.
    Type: Application
    Filed: October 10, 2023
    Publication date: February 1, 2024
    Inventors: Shekar Babu Suryanarayana, Sumanth Vidyadhara, Vivek Viswanathan Iyer
  • Publication number: 20240036882
    Abstract: A method of operating a network device is provided. In response to an unplanned reboot, the network device can determine whether an unplanned reboot expedited recovery feature has been enabled on the network device. After determining that the unplanned reboot expedited recovery feature is enabled, the network device can identify a cause of the unplanned reboot. If the cause of the unplanned reboot is from a first set of events, a first bootup sequence can be performed. If the cause of the unplanned reboot is from a second set of events, a second bootup sequence that is expedited relative to the first bootup sequence can be performed.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 1, 2024
    Inventors: Gil Adrian Torres, Zihao Wang
  • Publication number: 20240036883
    Abstract: In some examples, a client system, in response to a request to modify a first data page at a memory server in a remote access by a client over a network, sends, to the memory server, a request to update a data modification tracking structure stored by the memory server to indicate that the first data page is modified. The client system initiates an incremental data backup from the memory server to a backup storage system of data pages indicated as modified by the data modification tracking structure stored at the memory server.
    Type: Application
    Filed: July 27, 2022
    Publication date: February 1, 2024
    Inventors: Mashood Abdulla Kodavanji, Syed Ismail Faizan Barmawer, Clarete Riana Crasta, Gautham Bhat Kumbla, Soumya Palakkattiri Narayanan, Sharad Singhal, Ramya Ahobala Rao, Rishi Kesh K Rajak
  • Publication number: 20240036884
    Abstract: A package maintenance architecture can be provided for a computing system. For instance, a change status can be determined, the change status corresponding to a difference between reference content and endpoint content of at least one package storage location of a plurality of package storage locations. An update for the at least one package storage location can be determined based on the change status, wherein the update is configured according to a respective configuration scheme of a plurality of configuration schemes respectively associated with the plurality of package storage locations, and wherein the respective configuration scheme is associated with the at least one package storage location. Updating of the at least one package storage location according to the update can be initiated.
    Type: Application
    Filed: July 27, 2022
    Publication date: February 1, 2024
    Inventors: Leigh Griffin, Leonardo Rossetti
  • Publication number: 20240036885
    Abstract: A communication device may include: a memory configured to store management information in which, for each of a plurality of OIDs of a MIB, the OID and a setting value are associated with each other; and a controller, wherein the controller may be configured to: receive a setting command which conforms to TCP; write the setting value included in the setting command to the management information in association with the OID included in the setting command; and send a response command which conforms to the TCP. In a case where the setting command including a first OID and a first setting value is received, the controller may be configured to: write the first setting value to the management information in association with the first OID after the response command has been sent, and send the response command before the first setting value is written to the management information.
    Type: Application
    Filed: July 27, 2023
    Publication date: February 1, 2024
    Inventors: Koki IZUMI, Satoshi MATSUSHITA, Satoru YANAGI, Munehisa MATSUDA, Kiyotaka OHARA, Katsunori ENOMOTO, Yuki YADA, Kyohei MORI, Hideki NOGAWA, Tetsuya OKUNO
  • Publication number: 20240036886
    Abstract: An application platform comprises: a user interface used for realizing interaction with users; an application container connector used for accessing an application container instance according to an interactive operation performed by the users through the user interface; at least one application container instance comprising an application, an application connector interface connected to the application container connector, a user data interface connected to a user data set, and a base system environment and dependency for running the application, wherein after being started, the application container instance receives an access from the application container connector through the application connector interface and accesses user data corresponding to the application through the user data interface; and the user data set used for storing user data to be accessed by the application container instance.
    Type: Application
    Filed: October 16, 2023
    Publication date: February 1, 2024
    Applicant: Hangzhou Jindoutengyun Technologies Co., Ltd.
    Inventors: Yang YANG, Jie DING
  • Publication number: 20240036887
    Abstract: A method, including loading, to a first address in a memory of a computer, an interposing method having an interposing name that is identical to an original name of an original method in a library of original methods that are to be dynamically loaded by a software application running on the computer, and identifying a second address in the memory of a dynamic linking method associated with the library. A request is then intercepted from the application, the request including a specified name for one of the methods in the library. When the specified name matches the interposing name, the application is directed to the first address so as to run the interposing method. However, when the specified name does not match any interposing name, the application is directed to the second address so as to run the dynamic linking method to run one of the original methods.
    Type: Application
    Filed: July 31, 2022
    Publication date: February 1, 2024
    Inventors: Ronen Dar, Raz Rotenberg, Noa Neria, Menny Hamburger, Yoed Ginzburg
  • Publication number: 20240036888
    Abstract: This information processing device for executing applications holds, for each of the applications, a manifest file (user interface definition file) in which a user interface for the application is defined. The manifest file is designated with an attribute of data type for each item for defining a user interface object through which a setting item of the application is inputted/outputted. The information processing device generates the user interface object at which setting of the application is performed on the basis of the manifest file. Accordingly, for each of the applications, the user interface regarding setting of the application is unified, operability of a user is improved, and development efficiency of an application developer is improved.
    Type: Application
    Filed: August 24, 2021
    Publication date: February 1, 2024
    Inventors: Hiroki YAMADA, Takayoshi FUJIOKA, Hajime KIHARA
  • Publication number: 20240036889
    Abstract: The present invention relates to a method for providing an object-oriented application execution interface, a service server for performing the same, and a computer-readable medium thereof, wherein object-oriented service information is provided differently from a conventional configuration of providing application-oriented service information in an operating system in smart phone, PC, etc. by receiving reality information on each of real objects in reality, projecting virtual objects generated based on the reality information on 3D map, providing a map interface including the 3D map to a user terminal, deriving app list information on one or more applications related to a specific virtual object to provide to the user terminal when selecting the virtual object on a map interface displayed in the user terminal, and executing any one application to derive service information on the selected virtual object and provide to the user terminal when selecting the corresponding application included in app list.
    Type: Application
    Filed: July 25, 2023
    Publication date: February 1, 2024
    Inventor: Hak Kyung LEE
  • Publication number: 20240036890
    Abstract: A method for passing a View-Model from a backend system to a frontend system, includes: providing a schema that includes information for building one or more queries; verifying a user access against requested queries; acquiring data from the requested queries; and processing data of a plurality of returned records. A system for standardizing how data is received and processed by a component, a method for passing a View-Model from a backend system to a frontend system, and a method for storing changes to database records are also described.
    Type: Application
    Filed: September 29, 2023
    Publication date: February 1, 2024
    Inventor: Edward M. Montalbano
  • Publication number: 20240036891
    Abstract: In a sub-application running method, page data of a target sub-application is obtained in response to an instruction to run the target sub-application on a target operating system. A runtime environment of the target sub-application is based on a parent application. The page data of the target sub-application is rendered via a browser to obtain a display page of the target sub-application, the browser being executed in the target operating system. The display page of the target sub-application is displayed based on the browser.
    Type: Application
    Filed: October 12, 2023
    Publication date: February 1, 2024
    Applicant: Tencent Technology (Shenzhen) Company Limited
    Inventors: Peiran GUO, Deming ZHANG, Zhaopeng LIANG, Haojun HU, Jisheng HUANG, Jingwei CAI, Zheng LIN, Yuhui HUANG, Jingchen ZHAO
  • Publication number: 20240036892
    Abstract: A non-transitory computer readable medium, a system, and a method for displaying a remote browser isolation (RBI) configuration window are disclosed. In an embodiment, a non-transitory computer readable medium includes instructions to be executed in a computer system, where the instructions when executed in the computer system perform a method comprising displaying an RBI configuration window, displaying an on/off activation feature within the RBI configuration window, and displaying an RBI profile selection menu within the RBI configuration window, where the RBI profile selection menu includes a plurality of spatially grouped sets that include an RBI profile selector, RBI profile identifier text, and selectable RBI protected browsing action icons that indicate to a user whether a corresponding RBI protected browsing action is included in an RBI policy.
    Type: Application
    Filed: August 1, 2022
    Publication date: February 1, 2024
    Inventors: Harnish Narendra Goradia, Barbara Torres, Akshay Adhikari, Ratik Kapoor
  • Publication number: 20240036893
    Abstract: An intelligent virtual assistant (IVA) is deployed to place a call/chat to customer service on behalf of the customer, thus saving them time and frustration. The IVA contacts a specific company over one or more channels, for example, chat, phone call, Application Programming Interface (API), or email, in order to complete open-ended task(s) requested by its user. Before the IVA contacts the company, a specific user profile is injected into an IVA dialog state. The IVA contacts the company or agency and answers customer service agent (CSA) questions by using the specific user profile provided for the call. The IVA then stores the task outcome for the user to review. If something prevents the task from succeeding, the IVA alerts the user that either it needs more information or the user may need to perform some action before the task can be completed, such as filling out or emailing a form.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 1, 2024
    Inventors: Ian Beaver, Vladislav Luzin
  • Publication number: 20240036894
    Abstract: A computer system for just-in-time rendering using distributed cache servers can receive at least one edited photo comprising at least one available selection of a customization option. The computer system can also cache the at least one edited photo of the at least one available selection of the customization option. Further, the computer system can receive a user request comprising the at least one available selection of the customization option and at least one available selection of at least one additional customization option. The computer system can also stitch the at least one edited photo comprising the at least one available selection of the customization option with at least one additional edited photo comprising the at least one available selection of the at least one additional customization option to render a product photo. Finally, the computer system can cache the requested product photo and send display instructions for the cached requested product photo to a user over a network.
    Type: Application
    Filed: October 9, 2023
    Publication date: February 1, 2024
    Inventors: Matt Jeffrey Isaacson, William Edwin Rappleye, III
  • Publication number: 20240036895
    Abstract: Techniques for providing adaptive virtual function (VF) drivers capable of operating with physical devices having a plurality of different hardware configurations are described. In one embodiment, for example, an apparatus may include logic to implement a virtual machine (VM), the logic to initialize an adaptive virtual function (VF) driver to facilitate communication between the VM and a physical device to be virtualized, establish communication between the adaptive VF driver and a physical function (PF) driver of the hypervisor for the physical device, activate a standard feature set for the adaptive VF driver to execute on a PF of the physical device, and negotiate activation of an advanced feature set for the adaptive VF driver to execute on the PF, the adaptive VF driver to provide the advanced feature set to the PF, the PF activate each feature of the advanced feature set supported by the PF.
    Type: Application
    Filed: June 1, 2023
    Publication date: February 1, 2024
    Applicant: INTEL CORPORATION
    Inventors: ANJALI SINGHAI JAIN, MITU AGGARWAL, PARTHASARATHY SARANGAM, DONALD WOOD, JESSE BRANDEBURG, MITCHELL A. WILLIAMS
  • Publication number: 20240036896
    Abstract: Disclosed are various embodiments provisioning a data processing unit in a host machine. There can be multiple data processing units within the host machine with varying hardware or software requirements for an installation image that can be utilized to provision the device. Multiple installation images can be generated for different data processing units having varying requirements in a heterogeneous environment.
    Type: Application
    Filed: November 17, 2022
    Publication date: February 1, 2024
    Inventors: KARTHIK RAMACHANDRA, Aravinda Haryadi
  • Publication number: 20240036897
    Abstract: The technology provides efficient and secure virtualized execution of software compiled for a first (guest) operating system to run on a second (host) operating system. This includes delineating a kernel space and a separate user space, the kernel space including a handle table and kernel of a host operating system. In the user space, a restricted space is separate from an unrestricted space. The restricted space corresponds to a restricted mode and the unrestricted space corresponding to an unrestricted mode. A hyperprocess is implemented and a hyperprocess handle table is created in the unrestricted space. A set of child processes is loaded into separate memory address spaces in the restricted space, wherein the set of child processes is associated with a guest operating system. The hyperprocess handle table is shared among the child processes and includes a file descriptor tables each associated with a specific child process.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 1, 2024
    Inventors: Travis Kirk Geiselbrecht, Nicholas J. Maniscalco