Patents Issued in February 6, 2024
  • Patent number: 11892946
    Abstract: Apparatuses, systems, and techniques to allocate portions of a virtual address space to allow virtual machines to share data. In at least one embodiment, at least a portion of a virtual memory address space is made accessible to multiple virtual machines and is mapped to memory addresses of different physical devices using, at least in part, a cache-coherent protocol.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: February 6, 2024
    Assignee: NVIDIA Corporation
    Inventor: Shirish Bahirat
  • Patent number: 11892947
    Abstract: A data operation method of a memory system is provided. The method includes, based on an obtained logical to physical mapping table, determining whether address values of a plurality of target physical addresses in the logical to physical mapping table corresponding to a plurality of target logical addresses are continuous; if so, selecting one of the plurality of target physical addresses as a base physical address, and setting a base physical address offset based on address values of remaining target physical addresses; and storing the base physical address and the base physical address offset into a cache of a memory controller, as a mapping relationship of the plurality of target logical addresses corresponding to the plurality of target physical addresses.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: February 6, 2024
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventor: Hua Tan
  • Patent number: 11892948
    Abstract: In a typical data plane application, there is a packet dispatcher which receives packets from the underlying subsystem for distribution among various threads/processes for further processing. These threads/processes may run on various processing elements (PEs) and pass through multiple stages of processing. As new generation system-on-a-chip (SoC) architectures have multiple heterogeneous clusters with corresponding PEs, packet processing may traverse through multiple PEs in different clusters. Since latencies/performance for different clusters/PEs may be different, packet processing on the SoC may take a variable amount of time, which may lead to unpredictable latencies. The present disclosure provides embodiments to solve the problem of packet processing on heterogeneous clusters/PEs by providing a fast path enabler to the applications for SoC architecture awareness.
    Type: Grant
    Filed: March 27, 2022
    Date of Patent: February 6, 2024
    Assignee: EdgeQ, Inc.
    Inventors: Ankit Jindal, Pranavkumar Govind Sawargaonkar, Sriram Rajagopal
  • Patent number: 11892949
    Abstract: A method and a system detects a cache line as a potential or confirmed hot cache line based on receiving an intervention of a processor associated with a fetch of the cache line. The method and system include suppressing an action of operations associated with the hot cache line. A related method and system detect an intervention and, in response, communicates an intervention notification to another processor. An alternative method and system detect a hot data object associated with an intervention event of an application. The method and system can suppress actions of operations associated with the hot data object. An alternative method and system can detect and communicate an intervention associated with a data object.
    Type: Grant
    Filed: January 13, 2023
    Date of Patent: February 6, 2024
    Assignee: International Business Machines Corporation
    Inventors: Christian Zoellin, Christian Jacobi, Chung-Lung K. Shum, Martin Recktenwald, Anthony Saporito, Aaron Tsai
  • Patent number: 11892950
    Abstract: Embodiments are generally directed to data prefetching for graphics data processing. An embodiment of an apparatus includes one or more processors including one or more graphics processing units (GPUs); and a plurality of caches to provide storage for the one or more GPUs, the plurality of caches including at least an L1 cache and an L3 cache, wherein the apparatus to provide intelligent prefetching of data by a prefetcher of a first GPU of the one or more GPUs including measuring a hit rate for the L1 cache; upon determining that the hit rate for the L1 cache is equal to or greater than a threshold value, limiting a prefetch of data to storage in the L3 cache, and upon determining that the hit rate for the L1 cache is less than a threshold value, allowing the prefetch of data to the L1 cache.
    Type: Grant
    Filed: July 15, 2022
    Date of Patent: February 6, 2024
    Assignee: INTEL CORPORATION
    Inventors: Vikranth Vemulapalli, Lakshminarayanan Striramassarma, Mike MacPherson, Aravindh Anantaraman, Ben Ashbaugh, Murali Ramadoss, William B. Sadler, Jonathan Pearce, Scott Janus, Brent Insko, Vasanth Ranganathan, Kamal Sinha, Arthur Hunter, Jr., Prasoonkumar Surti, Nicolas Galoppo von Borries, Joydeep Ray, Abhishek R. Appu, ElMoustapha Ould-Ahmed-Vall, Altug Koker, Sungye Kim, Subramaniam Maiyuran, Valentin Andrei
  • Patent number: 11892951
    Abstract: A key value (KV) store, a method thereof, and a storage system are provided herein. The KV store may include a key logger; and a processor configured to receive a first command for storing a first KV in the KV store, write a first value of the first KV to a first NAND page, generate an extent map for identifying the first memory page including the first value, write the extent map to a second memory page, append an entry for storing the first KV to the key logger, and update a device hashmap of the KV store to include a first key of the first KV, upon a threshold being met within the key logger.
    Type: Grant
    Filed: May 11, 2023
    Date of Patent: February 6, 2024
    Inventors: Kedar Shrikrishna Patwardhan, Nithya Ramakrishnan
  • Patent number: 11892952
    Abstract: A processor of an aspect includes a plurality of packed data registers, and a decode unit to decode a no-locality hint vector memory access instruction. The no-locality hint vector memory access instruction to indicate a packed data register of the plurality of packed data registers that is to have a source packed memory indices. The source packed memory indices to have a plurality of memory indices. The no-locality hint vector memory access instruction is to provide a no-locality hint to the processor for data elements that are to be accessed with the memory indices. The processor also includes an execution unit coupled with the decode unit and the plurality of packed data registers. The execution unit, in response to the no-locality hint vector memory access instruction, is to access the data elements at memory locations that are based on the memory indices.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: February 6, 2024
    Assignee: Intel Corporation
    Inventor: Christopher J. Hughes
  • Patent number: 11892953
    Abstract: An interprocess communication (IPC) method and an IPC system for transmit communication data from a first process to a second process, where the method includes performing initialization configuration on the first process and the second process, including creating first memory space in shared memory space, selecting a communication manner based on a length of the communication data and a value of a threshold, where the threshold is a size of the first memory space, performing interprocess data exchange in the selected communication manner, selecting a memory sharing manner for communication when the length of the communication data is less than the threshold, and selecting a data file manner for communication when the length of the communication data reaches or exceeds the threshold.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: February 6, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Qibin Yang, Senyu Liu, Xiaohui Bie
  • Patent number: 11892954
    Abstract: A downloaded app controls a device to recognize whether a connected card reader is an unsupported card reader or whether an unsupported card is supplied to the connected card reader. The app automatically generates support for the unsupported card reader or unsupported card by reading the identifying information from the unsupported card reader or unsupported card, modifying an existing driver support file by adding the identifying information to the existing driver support file to create a modified driver support file, and testing the unsupported card reader or unsupported card using the modified driver support file. If the tests are successful, the app then supplies the modified driver support file to other devices separate from the printer.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: February 6, 2024
    Assignee: Xerox Corporation
    Inventors: Joseph H. Lang, Christopher L. Stone
  • Patent number: 11892955
    Abstract: System and method for analyzing CXL flits at read bypass detection logic to identify bypass memory read requests and transmitting the identified bypass memory read requests over a read request bypass path directly to a transaction/application layer of the CXL memory controller, wherein the read request bypass path does not include an arbitration/multiplexing layer and a link layer of the CXL memory controller, thereby reducing the latency inherent in a CXL memory controller.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: February 6, 2024
    Assignee: Microchip Technology Inc.
    Inventors: Sanjay Goyal, Larrie Simon Carr, Patrick Bailey
  • Patent number: 11892956
    Abstract: Various examples are directed to devices and methods involving a host device and a memory system, the memory system comprising a memory controller and a plurality of memory locations. The memory system may send to the host device a first message describing background operations to be performed at the memory system. The memory system may receive from the host device a second message indicating permission to execute the background operations and may begin to execute at least one background operation.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: February 6, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Kulachet Tanpairoj, Christian M. Gyllenskog, David Aaron Palmer
  • Patent number: 11892957
    Abstract: A system is disclosed. An upstream interface enables communication with a processor; a downstream interface enables communication with a storage device. The system may also include an acceleration module implemented using hardware to execute an acceleration instruction. The storage device may include an endpoint of the storage device for communicating with the acceleration module, a controller to manage operations of the storage device, storage for data, and a storage device acceleration module to assist the acceleration module in executing the acceleration instruction.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: February 6, 2024
    Inventors: Ramdas P. Kachare, Fred Worley, Harry Rogers, Wentao Wu, Nagarajan Subramaniyan
  • Patent number: 11892958
    Abstract: The present description concerns attribution, on a communication over an I2C bus, of a first address to a first device by a second device, wherein the second device sends the first address over the I2C bus and, if the second device receives no acknowledgment data, then the first device records the first address.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: February 6, 2024
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: François Tailliet
  • Patent number: 11892959
    Abstract: According to examples, an apparatus may include a processor that may access an assignment of a capability to a hardware port such as a Universal Serial Bus (“USB”) port. The apparatus may virtualize a USB port, assign capabilities to the virtual USB port, and provide electrical communication via the USB port subject to the assigned capabilities. The electrical communication may include power delivered via the USB port, or data communicated via the USB port.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: February 6, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: John W. Frederick, Syed S. Azam, Alexander Williams
  • Patent number: 11892960
    Abstract: A display includes a keyboard, video mouse (KVM) switch that interfaces plural peripheral communication ports and plural information handling system ports. The KVM switch in a first configuration accepts video from one of the information handling system ports for presentation as visual images at a display panel and interfaces all of the plural peripheral communication ports with the one of the information handling system ports. When an end user commands a change to a different information handling system port and the KVM switch detects that a predetermined information transfer is taking place at the one of the information handling system ports, such as a bulk isochronous transfer or greater than a predetermined bandwidth utilization, the KVM switch changes the interface of peripheral devices and video to the second information handling system port while maintaining the transfer of the predetermined type of information with the first information handling system port.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: February 6, 2024
    Assignee: Dell Products L.P.
    Inventors: Vui Khen Thien, Tze Fung Chung
  • Patent number: 11892961
    Abstract: A magnetic tape drive and an assembly for a tape drive are disclosed herein. The disclosed magnetic tape drive comprises a SAS-compliant tape drive module; and a USB-C to SAS assembly having one or more controllers operatively coupled to a USB-C connector and a SAS connector. The SAS connector of the USB-C to SAS assembly is operatively coupled to the SAS-compliant tape drive module. The USB-C to SAS assembly is configured to enable the magnetic tape drive to interface a USB-C-compliant computing device with the SAS-compliant tape drive module, and the USB-C to SAS assembly is configured to transmit tape commands received at the USB-C connector to the SAS-compliant tape drive module via the one or more controllers and the SAS connector. The assembly includes a SAS connector, a USB-C connector, and one or more controllers operatively coupled to the SAS connector and the USB-C connector.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: February 6, 2024
    Assignee: MagStor Inc.
    Inventor: Aleksandr Mindlin
  • Patent number: 11892962
    Abstract: A GENZ port structure includes a body, a plurality of high-speed input pins, a plurality of high-speed output pins, a plurality of ground pins, a power supply pin, a plurality of differential clock pins, and a plurality of parameter setting pins. The main body includes a first side and a second side. The plurality of high-speed input pins are arranged on the first side. The plurality of high-speed output pins are arranged on the second side. The plurality of ground pins are interspersed between the plurality of high-speed input pins and the plurality of output pins. The power supply pins, the plurality of differential clock pins and the plurality of parameter setting pins are respectively arranged on one of the first side or the second side. The plurality of parameter setting pins are used to adjust an internal parameter setting of the GENZ port structure.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: February 6, 2024
    Assignee: LeRain TECHNOLOGY CO., LTD.
    Inventors: Miaobin Gao, Chia-Chi Hu
  • Patent number: 11892963
    Abstract: A device is configured to receive, from a controller, an instruction requesting data for the device and determine a comparison result value based on a comparison of the data for the device and a reference value. The device is further configured to determine whether to respond to the instruction based on the comparison result value and, in response to a determination to respond to the instruction, output, to the controller, the comparison result value, wherein, to output the comparison result value, the device is configured to refrain from outputting the data for the device.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: February 6, 2024
    Assignee: Infineon Technologies AG
    Inventors: Markus Ekler, Christian Walther, Christian Heiling
  • Patent number: 11892964
    Abstract: A peripheral device includes a host interface and processing circuitry. The host interface is configured to communicate with a host over a peripheral bus. The processing circuitry is configured to expose on the peripheral bus a peripheral-bus device that communicates with the host using a bus storage protocol, to receive, using the exposed peripheral-bus device, Input/Output (I/O) transactions that are issued by the host, and to complete the I/O transactions for the host in accordance with a network storage protocol, by running at least part of a host-side protocol stack of the network storage protocol.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: February 6, 2024
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Oren Duer, Dror Goldenberg
  • Patent number: 11892965
    Abstract: In an example in accordance with the present disclosure, a system is described that includes a hub for routing data traffic between a first computing device and a second computing device. A detection device of the system detects a communication protocol between the computing devices. A switch of the system routes traffic directly between the computing devices when a first communication protocol is detected. When a second communication protocol is detected, the switch re-routes traffic of the first type from the first computing device back to the hub to convert the traffic of the first type to a second type and routes converted traffic directly to the second computing device.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: February 6, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Mark A Lessman, Glen Douglas Dower, Christopher Tabarez
  • Patent number: 11892966
    Abstract: Systems, methods, and apparatuses are described that enable IC architectures to enable a single anchor to connect to and accept a variety of chiplets at any port by way of a programming model that enables the anchor or chiplet to dynamically adapt to configurations, requirements, or aspects of any coupled component and provide an interface for the coupled components.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: February 6, 2024
    Assignee: XILINX, INC.
    Inventors: Krishnan Srinivasan, Ygal Arbel, Sagheer Ahmad
  • Patent number: 11892967
    Abstract: Apparatus and methods are disclosed herein for remote, direct memory access (RDMA) technology that enables direct memory access from one host computer memory to another host computer memory over a physical or virtual computer network according to a number of different RDMA protocols. In one example, a method includes receiving remote direct memory access (RDMA) packets via a network adapter, deriving a protocol index identifying an RDMA protocol used to encode data for an RDMA transaction associated with the RDMA packets, applying the protocol index to a generate RDMA commands from header information in at least one of the received RDMA packets, and performing an RDMA operation using the RDMA commands.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: February 6, 2024
    Assignee: Amazon Technologies, Inc.
    Inventors: Erez Izenberg, Leah Shalev, Nafea Bshara, Guy Nakibly, Georgy Machulsky
  • Patent number: 11892968
    Abstract: A circuit having multiple inputs and multiple outputs the circuit being for switching signals received at any of the inputs to any of the outputs, the circuit comprising: a first switch matrix, the first switch matrix being capable of directing signals received at the inputs of the circuit to multiple first intermediate ports; a second switch matrix, the second switch matrix being capable of directing signals received at multiple second intermediate ports to multiple third intermediate ports, the number of the second intermediate ports being less than the number of the inputs of the circuit; one or more primary bypass links, each primary bypass link being capable of coupling one or more of the first intermediate ports to a respective one or more of the outputs of the circuit independently of the second switch matrix; a first redirection layer, the first redirection layer being capable of, for each first intermediate port, directing a signal received at that first intermediate port to a primary bypass link or
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: February 6, 2024
    Assignee: Silicon Tailor Limited
    Inventor: Paul James Metzgen
  • Patent number: 11892969
    Abstract: Apparatuses, methods and storage medium for providing access from outside a multicore processor System on Chip (SoC) are disclosed herein. In embodiments, an SoC may include a memory to store a plurality of embedded values correspondingly associated with a plurality of architecturally identical cores. Each embedded value may indicate a default voltage for a respective one of the plurality of architecturally identical cores. In embodiments, an apparatus may include one or more processors, devices, and/or circuitry to provide access from outside the multicore processor SoC to individually configure voltages of the plurality of architecturally identical cores to values that are different than the values of the default voltages. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: February 6, 2024
    Assignee: Intel Corporation
    Inventors: Daniel J. Ragland, Guy M. Therien, Kirk Pfaender
  • Patent number: 11892970
    Abstract: A method for data processing, a processor chip. The method includes: acquiring a first relationship instruction; executing at least one first computing instruction acquired before the first relationship instruction based on the first relationship instruction; and sending acknowledgment information based on the first relationship instruction in response to completing executing the at least one first computing instruction, to cause a second coprocessor receiving the acknowledgment information to revert to a state of acquiring a second computing instruction after the second relationship instruction acquired by a second coprocessor based on the acknowledgment information.
    Type: Grant
    Filed: July 19, 2022
    Date of Patent: February 6, 2024
    Assignee: KUNLUNXIN TECHNOLOGY (BEIJING) COMPANY
    Inventors: Jing Wang, Jiaxin Shi, Hanlin Xie, Xiaozhang Gong
  • Patent number: 11892971
    Abstract: A method is disclosed for maintaining a current operating state of an enclosure when a controller card of the enclosure is repaired and/or replaced. In one embodiment, such a method maintains, within a controller card of an enclosure, operating parameters used to establish an operating state of the enclosure. The method further offloads, from the controller card while the controller card is installed in the enclosure, the operating parameters to a location external to the controller card. Upon removal of the controller card from the enclosure, the method maintains the operating state of the enclosure using the operating parameters stored in the external location. Upon reinstalling the controller card in the enclosure, the method optionally retrieves the operating parameters from the external location and initializes the controller card with the operating parameters. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: February 6, 2024
    Assignee: International Business Machines Corporation
    Inventors: John C. Elliott, Gary W. Batchelor, Enrique Q. Garcia, Ronald D. Martens, Todd C. Sorenson
  • Patent number: 11892972
    Abstract: Systems, apparatuses and methods suitable for optimizing synchronization mechanisms for multi-core processors are provided. The synchronizing mechanisms may be optimized by receiving a command stream which comprises a plurality of commands including one or more wait commands, wherein each wait command has an associated state and one or more associated conditions; sequentially processing each command in the command stream until a wait command is reached; checking the state associated with the wait command to be processed, wherein if said state is a blocking state, further processing of commands in the command stream is paused until each of said wait command's associated conditions are met, and wherein if said state is a non-blocking state, the next command in the command stream is retrieved and processed.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: February 6, 2024
    Assignee: Arm Limited
    Inventors: Aaron Debattista, Jared Corey Smolens
  • Patent number: 11892973
    Abstract: A method and apparatus for converting code-description table data to an enumerated data type in a schema record referencing the code-description table. A record of a table is identified that references the code-description table, and a portion of a schema describing the record is updated to include the relevant data of the code-description table as an enumerated type of the record schema. The enumerated type schema element includes data elements of the code-description table relevant to the record, each element having its own type. As additional records of the same table that are related to the code-description table are called, the enumerated type schema element may be updated to include additional code-description table data elements.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: February 6, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Israel Zimmerman, Eyal Hakoun, Judah Gamliel Hahn
  • Patent number: 11892974
    Abstract: A file management system includes a communication device and a control device. The control device acts as a file manager, a file outputter, an information file generator, and a file merger. The file manager manages various files. The file outputter outputs a file based on a target file among the various files, to outside of the computer via the communication device. The information file generator generates an information file which is a document file containing information linked with the target file. The file merger generates a merged target file, by merging the information file with the target file, when the target file is of a specific file format. The file outputter outputs, when the file merger generates the merged target file, the merged target file to outside of the computer via the communication device, as the file based on the target file.
    Type: Grant
    Filed: December 24, 2022
    Date of Patent: February 6, 2024
    Assignee: KYOCERA Document Solutions Inc.
    Inventor: Koichi Shono
  • Patent number: 11892975
    Abstract: Disclosed are various embodiments for asynchronously generating consistent snapshots in a distributed system. In one embodiment, a snapshotting agent receives a respective local snapshot for individual processes in a distributed system. The respective local snapshot for a corresponding process includes a corresponding vector clock that comprises respective values indicating respective state changes in the corresponding process and other processes. The snapshotting agent determines whether a collection of the respective local snapshots for the individual processes represents a global consistent snapshot for the distributed system based at least in part on a comparison of the respective values of the corresponding vector clocks.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: February 6, 2024
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventor: Eric Andrew Rubin-Smith
  • Patent number: 11892976
    Abstract: Embodiments described herein facilitate enhancement of data model acceleration, including generating data model summaries and performing searches in an accelerated manner. In one implementation, obtaining a search query from a user device. A determination may be made to execute a search, in association with the search query, via an external computing service. As such, the search query, or a variant thereof, can be provided to the external computing service, wherein the external computing service executes the search using data model summaries stored in a remote data store that is separate from a set of events from which the data model summaries were generated. A set of search results are received from the external computing service, and such search results are provided to the user device.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: February 6, 2024
    Assignee: Splunk Inc.
    Inventors: Alexandros Batsakis, Ankit Jain, Manu Jose, Jonah Pan, Hailun Yan
  • Patent number: 11892977
    Abstract: A method that includes instructing multiple compute entities, by an expansion manager and during a first phase of the stored entity metadata re-balancing, to: lookup any stored entity metadata by using: (a) a current translation function for linking identifiers of stored entities to stored entities metadata; wherein the current translation function is based on a size of a current storage space allocated to stored entities metadata; and (b) a next translation function for linking identifiers of stored entities to stored entities metadata; wherein the next translation function is based on a size of a next storage space allocated to stored entities metadata; wherein the current space is expanded during the expansion of the storage system to provide the next storage space, and to update any stored entity metadata accessed using the current translation function without updating stored entity metadata accessed using the next translation function.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: February 6, 2024
    Assignee: VAST DATA LTD.
    Inventors: Ido Yellin, Avi Goren, Oded Sonin
  • Patent number: 11892978
    Abstract: A client application sends an application programming interface call to an interface of a content management system. The call specifies one or more content item search criteria. Sending the call causes the content management system to perform a lookup in a content item index to identify at least one content item that satisfies the one or more content item search criteria. Based on sending the call, the client application receives from the content management system a suggestion to attach the at least one content item to a text being displayed by at the computing system.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: February 6, 2024
    Assignee: Dropbox, Inc.
    Inventors: Sean Lynch, Ilya Fushman
  • Patent number: 11892979
    Abstract: Metadata of each file of a group of files of a storage and chunk file metadata are analyzed to identify one or more file segment data chunks that are not referenced by the group of files of the storage. Fragmented chunk files to be combined together are identified based at least in part on the one or more identified file segment data chunks. The chunk file metadata is updated with an update that concurrently reflects the removal of at least a portion of the one or more file segment data chunks that are not referenced by the group of files and the combination of the identified fragmented chunk files.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: February 6, 2024
    Assignee: Cohesity, Inc.
    Inventors: Anubhav Gupta, Anirvan Duttagupta
  • Patent number: 11892980
    Abstract: One example method includes performing a hash of data to generate a hash value, checking a binary trie to determine if the hash value has previously been entered into the binary trie, if the hash value has previously been entered in the binary trie, declaring the data as a duplicate of other data, and if the hash value has not been previously entered in the binary trie, updating the binary trie to include the hash value.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: February 6, 2024
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Amro Magdi Mahmoud Sayed Khalifa, Angelo Reis
  • Patent number: 11892981
    Abstract: Disclosed are various examples for downloading data objects by enforcing a threshold amount of allocated data. In one example, among others, an application downloads a first subset of the files from a remote file management system. A user interface displays file system entries that represent the first subset of downloaded files and a second subset of undownloaded files from the remote file management system. The application detects an event for a respective file system entry associated with a respective file from the second subset of undownloaded files. The respective file is downloaded from the remote management system.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: February 6, 2024
    Assignee: AirWatch LLC
    Inventors: Gerard Murphy, Daniel James Beveridge, Blake Watts, Nicholas Grivas
  • Patent number: 11892982
    Abstract: Systems and methods for reducing delays between the time at which a need for a resynchronization of data replication between a volume of a local CG and its peer volume of a remote CG is detected and the time at which the resynchronization is triggered (Reseed Time Period) are provided. According to an example, information indicative of the direction of data replication between the volume and the peer volume is maintained within a cache of a node. Responsive to a disruptive operation (e.g., relocation of the volume from an original node to a new node), the Reseed Time Period is lessened by proactively adding a passive cache entry to a cache within the new node at the time the CG relationship is created when the new node represents an HA partner of the original node and prior to the volume coming online when the new node represents a non-HA partner.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: February 6, 2024
    Assignee: NetApp, Inc.
    Inventors: Murali Subramanian, Sohan Shetty, Rakesh Bhargava, Akhil Kaushik
  • Patent number: 11892983
    Abstract: A method for processing requests, the method comprising: receiving, from a client application node and by a metadata node, a request for a data layout, determining a QoS tag associated with the request, identifying at least one file system block (FSB) in a sparse virtual space, wherein the FSB is mapped to a location in a storage pool that is associated with the QoS tag, generating the data layout based on the at least one identified FSB; and providing the data layout to the client application, wherein the client application node uses the data layout to directly write data to the location in the storage pool, wherein the metadata node does not participate in the writing of the data to the location in the storage pool.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: February 6, 2024
    Assignee: EMC IP Holding Company LLC
    Inventors: Jean-Pierre Bono, Marc A. De Souter
  • Patent number: 11892984
    Abstract: A method for creating a link between hyperledger blocks by a block link server. The method comprises receiving by a block link server executing on a computer system a first link creation message from a first network element, the first link creation message comprising first block information comprising a first hyperledger identifier and a first block identifier, both associated with a first hyperledger, receiving by the block link server a second link creation message, comprising second block information comprising a second hyperledger identifier and a second block identifier, both associated with a second hyperledger, storing by the block link server a link data structure comprising the first block information and the second block information, and sending by the block link server a link identifier of the link data structure to the first network element.
    Type: Grant
    Filed: October 25, 2022
    Date of Patent: February 6, 2024
    Assignee: T-Mobile Innovations LLC
    Inventors: Lyle T. Bertz, Ronald R. Marquardt, Lyle W. Paczkowski
  • Patent number: 11892985
    Abstract: Disclosed are systems and methods for improving interactions with and between computers in content providing, searching and/or hosting systems supported by or configured with devices, servers and/or platforms. The disclosed systems and methods provide a novel framework that automatically and bi-directionally enables applications and devices to upload and access files from remote locations on a network, while synchronizing the stored files for access from the various applications, devices and locations. The disclosed framework enables files sharing and file synchronization between location to location, cloud to cloud, network to network, device to device, location to cloud and vice-versa, and some combination thereof. The disclosed synchronization framework is a cloud-based multi-tenant infrastructure that securely, efficiently and accurately hosts shared files for administrative, read/write and/or read only access from devices, locations and applications with access to the associated drive(s) in/on the cloud.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: February 6, 2024
    Assignee: AVEVA Software, LLC
    Inventor: Jose Lourenco Teodoro
  • Patent number: 11892986
    Abstract: Systems and methods for determining activated neural pathways in knowledge graphs are disclosed. In an embodiment, a computer system may retrieve data associated with a user account and generate a knowledge graph centered around an account under a current adjudication. The computer system may determine paths based on the knowledge graph using similarity and sentiment scores. By reducing the amount of data in the knowledge graph to specific data associated with paths of interest, unnecessary computer operations may be avoided, which increases processing times related to the knowledge graph and allows near real-time outputs based on the knowledge graph to be utilized. The computer system may rank the paths based on their similarity scores and sentiments scores to determine which paths are considered activated neural pathways in the knowledge graph. The computer system may base a determination of the current adjudication for the account on the activated neural pathways.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: February 6, 2024
    Assignee: PAYPAL, INC.
    Inventor: Sudha Jenslin Kanagaraj
  • Patent number: 11892987
    Abstract: Various technologies described herein pertain to automated data splitting using predictive program synthesis. Input-only examples for splitting an input column of an input data set can be received. The input-only examples can include example entries from the input column of the input data set to be split into multiple output columns without specification of how the example entries are to be split into multiple output columns. Further, a program for splitting the input column of the input data set into the multiple output columns can be synthesized based on the input-only examples. The program can be synthesized, given the input-only examples, in a domain-specific language (DSL) for splitting an entry into a tuple of fields utilizing a predictive program synthesis algorithm. Moreover, the program can be executed on the input data set to split the input column of the input data set into the multiple output columns.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: February 6, 2024
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Mohammad Raza, Sumit Gulwani
  • Patent number: 11892988
    Abstract: A method includes selecting, from content packs in a centralized content management system, a content pack to update in a data intake and query system. The content pack includes utility objects. For each utility object of at least a subset of the utility objects determining whether the utility object already exists in the data intake and query system, and loading the utility object to the data intake and query system when the utility object does not exist to obtain an updated utility object. The method further includes monitoring, by the data intake and query system, an endpoint of an endpoint type using the updated utility object.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: February 6, 2024
    Assignee: Splunk Inc.
    Inventors: Kan Wu, Ian Edward Torbett, James Wang
  • Patent number: 11892989
    Abstract: Embodiments of the invention are directed to a system, method, or computer program product for an approach to predictive structuring of electronic data. The system uses data mining and data clustering techniques using classification models to organize feature column groups comprising feature columns. The system identifies and flags feature column groups and/or feature columns based on regulatory data standards provided by regulatory bodies. Thereafter, data objects are imported into the system and prediction algorithms are implemented to characterize the feature columns containing the data objects.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: February 6, 2024
    Assignee: BANK OF AMERICA CORPORATION
    Inventors: Deepak Jain, Bhakti Sanjay Gavhane, Simranjeet Singh Sandhu, Aditya Sharma
  • Patent number: 11892990
    Abstract: Embodiments of the present invention provide a computer system a computer program product, and a method that comprises converting received data from a time-based domain to a frequency-based domain using a signal processing algorithm; identifying transactional noise within the converted data by identifying contextual factors based on a determined pattern, wherein the transactional noise is data associated with an identified fraudulent transaction; filtering the identified transactional noise by removing datapoints within the converted data that reaches a predetermined threshold of signal strength using the signal processing algorithm; and generating a line graph depicting removal of the data that is indicative of the identified transactional noise from the converted data.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: February 6, 2024
    Assignee: International Business Machines Corporation
    Inventors: Shuyan Lu, Yi-Hui Ma, Eugene Irving Kelton, John H. Walczyk, III
  • Patent number: 11892991
    Abstract: Described herein are techniques for better understanding problems arising in an illustrative information management system, such as a data storage management system, and for issuing appropriate alerts and reporting to data management professionals. The illustrative embodiments include a number of features that detect and raise awareness of anomalies in system operations, such as in deduplication pruning operations. Such anomalies can include delays in the processing of archive files to be deleted and/or delays in the generation of the list of archive files to delete. Anomalies are characterized by frequency anomalies and/or by occurrence counts. Utilization is also of interest for certain key system resources, such as deduplication databases, CPU and memory at the storage manager, etc., without limitation.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: February 6, 2024
    Assignee: Commvault Systems, Inc.
    Inventors: Pavan Kumar Reddy Bedadala, Marcelo dos Reis Mansano, Rajiv Kottomtharayil, Anand Vibhor, Bhavyan Bharatkumar Mehta, Mrityunjay Upadhyay
  • Patent number: 11892992
    Abstract: Techniques are disclosed relating to implementing synthetic identifiers (IDs) for a non-relational database. A server system may operate a database, which includes receiving requests to access records of the database using synthetic IDs. But the database may be searchable using natural IDs. The server system may receive a request to insert a record. In response, the server system may obtain, from a first instance of multiple ID generator instances that implement a distributed ID generator service, a synthetic ID generated based on an identifier assigned to the first ID generator instance. The server system may insert the record with the synthetic ID and a natural ID that corresponds to one or more values of the record. The server system may cause the synthetic ID and the natural ID to be stored in an index of the database to enable the record to be accessed via the synthetic ID.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: February 6, 2024
    Assignee: Salesforce, Inc.
    Inventors: Danielle Elise Gaydorus, Benjamin Busjaeger, Sharath Gilbuena Babu
  • Patent number: 11892993
    Abstract: The present disclosure relates to a system and techniques for resolving dangling references resulting from a dependency relationship between computing resource objects uncovered during a harvesting process. In embodiments, a harvester application adds computing resource objects associated with a client to a resource collection as those computing resource objects are identified. Dependencies are identified as each computing resource object is added to the resource collection, which are resolved only if the computing resource objects associated with those dependencies have already been added to the resource collection. If the computing resource objects associated with the dependencies have not already been added to the resource collection, then the dependency is added to an observer pool. Observer modules are configured to check each computing resource object as it is processed during the harvest process in order to match those computing resource objects to unresolved dependencies.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: February 6, 2024
    Assignee: Oracle International Corporation
    Inventors: Ganesh Seetharaman, Robert Costin Velisar, Yuen Sheung Chan
  • Patent number: 11892994
    Abstract: An information management method executed by an information management apparatus that manages a space-time database which uses, as a key, a forward bit string of a bit string converted from space-time data including time data and positional data and which stores, as a value, corresponding data that corresponds to the space-time data, includes converting a range criterion of space-time data being a search object into a bit string, converting, when an index pattern of a first index that corresponds to a forward bit string of a bit string converted and an index pattern of a second index that corresponds to the key stored in the space-time database differ from each other, the first index into a third index of a same index pattern as the index pattern of the second index, and searching for the key using the third index and outputting, as a search result, corresponding data.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: February 6, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Kazuhiro Miyahara, Atsushi Isomura, Ichibe Naito
  • Patent number: 11892995
    Abstract: Techniques for cloning, writing to, and reading from file system metadata. Cloning involves identifying a first set of pointers included h a first root node in a file system metadata tree structure that stores file system metadata n leaf nodes of the tree structure, creating a first copy of the first root node that includes the first set of pointers, creating a second copy of the first root node that includes the first set of pointers, associating the first copy with a first view, and associating the second copy with a second view. Reading generally involves traversing the tree structure towards a target leaf node that contains data to be read. Writing generally involves traversing the tree structure in the same manner, but also creating copies of any nodes to be modified if those nodes are deemed to have a different treeID than a particular root node.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: February 6, 2024
    Assignee: Cohesity, Inc.
    Inventors: Mohit Aron, Ganesha Shanmuganathan