With Movement Of Substrate Or Vapor Or Gas Supply Means During Growth Patents (Class 117/107)
  • Patent number: 11774306
    Abstract: Embodiments of the present disclosure generally relate to apparatus and methods for semiconductor processing, more particularly, to a system and method for monitoring a rotation-lift assembly of a process chamber. The rotation-lift assembly outputs a torque feedback signal which is processed by a controller to determine if the rotation-lift assembly has a fault or is near failure. The controller determines torque data from the torque feedback signal, compares the torque data to preexisting torque data, and, based on the comparison, issue a notice of a state of the rotation-lift assembly.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: October 3, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Thomas Ackermann, Torsten Fankhaenel
  • Patent number: 11732349
    Abstract: A transport system of the in-line coater moves the substrate holder from chamber to chamber in a direction perpendicular to the axis of its rotation and in each process chamber. The system moves the substrate holder to the working area along its axis of rotation. The process chamber has a cavity the size of which is determined by the dimensions of the substrate holder and is sufficient to place technology devices and monitoring instruments in it. In the first embodiment of the in-line coater, the supporting frame of the transport system on which the substrate holder is cantilevered, is configured to move from the chamber to the chamber both in horizontal and vertical positions. In the second embodiment of the in-line coater the supporting frame is configured to move only in a vertical position, and the in-line coater comprises additionally a substrate holder return chamber.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: August 22, 2023
    Assignee: OOO IZOVAK TEHNOLOGII
    Inventors: Vladimir J. Shiripov, Yaughen A. Khakhlou, Sergei P. Maryshev
  • Patent number: 10950474
    Abstract: A laser irradiation apparatus includes a laser generation device, a levitation unit to levitate an object to which the laser light is applied, and a conveyance unit to convey the levitated object. The conveyance unit includes a holding mechanism for holding the object by absorption, and a moving mechanism for moving the holding mechanism in a conveyance direction. The holding mechanism includes a base including a plurality of through holes, a plurality of pipes respectively connected to the through holes, a vacuum generation device configured to evacuate air from the f pipes, and a plurality of absorption assistance valves each disposed in the middle of a respective one of the pipes, each of the plurality of absorption assistance valves being configured to be closed when a flow rate of a gas flowing into the pipe through the through hole becomes equal to or higher than a threshold.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: March 16, 2021
    Assignee: THE JAPAN STEEL WORKS, LTD.
    Inventors: Hiroaki Imamura, Takahiro Fuji, Yoshihiro Yamaguchi
  • Patent number: 10851458
    Abstract: A substrate support for a plasma system includes a first layer being made of a ceramic and having a first surface and a second surface opposite the first surface. The first layer is configured to support a substrate on the first surface during processing. A thermal heating element is embedded within the ceramic. A temperature sensor that is embedded within the ceramic. Electrically conductive pads are: electrically connected to the temperature sensor via first wires embedded in the ceramic; and formed on the second surface of the first layer. A second layer includes a through hole through the second layer. A connector extends through the through hole and that includes: a retainer; and electrical conductors that are held by the retainer and that include: first ends that are electrically connected to the electrically conductive pads, respectively; and second ends that are electrically connected to a temperature controller by wire.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: December 1, 2020
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Siyuan Tian, Donald J. Miller
  • Patent number: 10312133
    Abstract: A method of manufacturing a silicon on insulator substrate includes: preparing a semiconductor substrate including a rear side semiconductor layer, an insulating layer, and a front side semiconductor layer, a first surface of the insulating layer being in contact with a surface of the rear side semiconductor layer, and a first surface of the front side semiconductor layer being in contact with a second surface of the insulating layer; forming a high concentration region in which an impurity concentration is increased in the front side semiconductor layer, by injecting impurities into the front side semiconductor layer; heating the semiconductor substrate having the high concentration region; and epitaxially growing an additional semiconductor layer on a second surface of the front side semiconductor layer of the heated semiconductor substrate, the additional semiconductor layer having a lower impurity concentration than the high concentration region.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: June 4, 2019
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, SUMCO CORPORATION
    Inventors: Tetsuya Yamada, Hiromichi Kinpara, Shinjirou Uchida, Masamitsu Fukuda
  • Patent number: 10301745
    Abstract: An ultralow defect gallium-containing nitride crystal and methods of making ultralow defect gallium-containing nitride crystals are disclosed. The crystals are useful as substrates for light emitting diodes, laser diodes, transistors, photodetectors, solar cells, and photoelectrochemical water splitting for hydrogen generators.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: May 28, 2019
    Assignee: SLT TECHNOLOGIES, INC.
    Inventors: Mark P. D'Evelyn, Dirk Ehrentraut, Wenkan Jiang, Bradley C. Downey
  • Patent number: 9853292
    Abstract: Disclosed are a composite electrode material for a rechargeable battery; a method of making a composite electrode material; an electrode including the composite electrode material; cells including such electrodes; and devices including the cells. A composite electrode material for a rechargeable battery cell includes an electroactive material; and a polymeric binder including pendant carboxyl groups. The electroactive material includes one or more components selected from the group including an electroactive metal, an electroactive semi-metal, an electroactive ceramic material, an electroactive metalloid, an electroactive semi-conductor, an electroactive alloy of a metal, an electroactive alloy of a semi-metal and an electroactive compound of a metal or a semi-metal. The polymeric binder has a molecular weight in the range 300,000 to 3,000,000. 40 to 90% of the carboxyl groups of the binder are in the form of a metal ion carboxylate salt.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: December 26, 2017
    Assignee: Nexeon Limited
    Inventors: Melanie J. Loveridge, Michael Jonathan Lain, Fazil Coowar, Mamdouh Elsayad Abdelsalam
  • Patent number: 9396942
    Abstract: A substrate includes a base substrate including a processed portion processed by irradiation with an ultrashort-pulse laser light and an unprocessed portion which is not irradiated with the ultrashort-pulse laser light, the processed portion and the unprocessed portion are on a surface of the base substrate, and a semiconductor crystal layer crystal-grown at least on the unprocessed portion of the base substrate.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: July 19, 2016
    Assignee: AISIN SEIKI KABUSHIKI KAISHA
    Inventor: Tatsuya Tanigawa
  • Patent number: 8980000
    Abstract: In a rotating disk reactor for growing epitaxial layers on substrate or other CVD reactor system, gas directed toward the substrates at gas inlets at different radial distances from the axis of rotation of the disk has both substantially the same gas flow rate/velocity and substantially the same gas density at each inlet. The gas directed toward portions of the disk remote from the axis may include a higher concentration of a reactant gas than the gas directed toward portions of the disk close to the axis, so that portions of the substrate surfaces at different distances from the axis receive substantially the same amount of reactant gas per unit area, and a combination of carrier gases with different relative molecular weights at different radial distances from the axis of rotation are employed to substantially make equal the gas density in each region of the reactor.
    Type: Grant
    Filed: October 6, 2006
    Date of Patent: March 17, 2015
    Assignee: Veeco Instruments Inc.
    Inventors: Bojan Mitrovic, Alex Gurary, William Quinn, Eric A. Armour
  • Patent number: 8945302
    Abstract: Method for crystal growth from a surfactant of a metal-nonmetal (MN) compound, including the procedures of providing a seed crystal, introducing atoms of a first metal to the seed crystal thus forming a thin liquid metal wetting layer on a surface of the seed crystal, setting a temperature of the seed crystal below a minimal temperature required for dissolving MN molecules in the wetting layer and above a melting point of the first metal, each one of the MN molecules being formed from an atom of a second metal and an atom of a first nonmetal, introducing the MN molecules which form an MN surfactant monolayer, thereby facilitating a formation of the wetting layer between the MN surfactant monolayer and the surface of the seed crystal, and regulating a thickness of the wetting layer, thereby growing an epitaxial layer of the MN compound on the seed crystal.
    Type: Grant
    Filed: March 4, 2012
    Date of Patent: February 3, 2015
    Assignee: Mosaic Crystals Ltd.
    Inventor: Moshe Einav
  • Patent number: 8551363
    Abstract: A method of producing a Group II-VI compound semiconductor. The method involves generating a pulsed electrical discharge plasma between metallic electrodes in sulfur to produce a Group II-VI compound semiconductor. A method of producing a Group II-VI compound semiconductor phosphor using a pulsed electrical discharge plasma. A hexagonal crystal of Group II-VI compound semiconductor composed of a plurality of twin crystals.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: October 8, 2013
    Assignees: National University Corporation Kumamoto University, Kuraray Co., Ltd.
    Inventors: Tsutomu Mashimo, Omurzak Uulu Emil, Makoto Okamoto, Hideharu Iwasaki
  • Publication number: 20130255569
    Abstract: A film-forming apparatus and film-forming method comprising, a chamber, a first gas supply unit supplying a reaction gas for a film-forming process to the chamber, a substrate-supporting portion supporting a substrate placed in the chamber, a heating unit heating the substrate from below the substrate-supporting portion, a rotary drum supporting the substrate-supporting portion on a top thereof, and including the heating unit disposed therein, a rotary shaft disposed in a lower part of the chamber, and rotating the rotary drum, a reflector reflecting heat from the heating unit, surrounding the rotary drum, and being disposed so as to have an upper end higher in height than an upper end of the substrate-supporting portion, and a second gas supply unit supplying a hydrogen gas or an inert gas between the rotary drum and the reflector.
    Type: Application
    Filed: March 26, 2013
    Publication date: October 3, 2013
    Applicant: NuFlare Technology, Inc
    Inventors: Takumi Yamada, Yuusuke Sato
  • Patent number: 8409349
    Abstract: A film thickness measurement method for measuring a change in film thickness of 0.3 ?m or less in a silicon wafer by FTIR, having an auxiliary film formation step for depositing an auxiliary film for measurement on a surface to be measured for the change in film thickness, an auxiliary film thickness measurement step for measuring the film thickness of the auxiliary film, a measurement step for measuring the film thickness of the auxiliary film after the change in film thickness, and a calculation step for calculating a change in film thickness of a back surface deposit from the result of the measurement step and the result of the auxiliary film thickness measurement step.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: April 2, 2013
    Assignee: Sumco Corporation
    Inventor: Kazuhiro Ohkubo
  • Patent number: 8382897
    Abstract: Methods for gas delivery to a process chamber are provided herein. In some embodiments, a method may include flowing a process gas through one or more gas conduits, each gas conduit having an inlet and an outlet for facilitating the flow of gas through the gas conduits and into a gas inlet funnel having a second volume, wherein each gas conduit has a first volume less than the second volume, and wherein each gas conduit has a cross-section that increases from a first cross-section proximate the inlet to a second cross-section proximate the outlet but excluding any intersection points between the gas inlet funnel and the gas conduit, and wherein the second cross-section is non-circular; and delivering the process gas to the substrate via the gas inlet funnel.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: February 26, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Kedarnath Sangam, Anh N. Nguyen
  • Publication number: 20130036968
    Abstract: A film-forming apparatus and method comprising a film-forming chamber for supplying a reaction gas, a cylindrical shaped liner provided in the film-forming chamber, a straightening vane provided above the liner for the reaction gas to pass through, wherein the outside of the film-forming chamber connects the inside of the liner via a substrate transfer portion provided at the wall of the film-forming chamber by moving the straightening vane from the position that the straightening vane closes the upper opening of the liner. A substrate supporting portion provided in the liner, for supporting the substrate before the film-forming to move the substrate in a vertical direction, a substrate transfer unit capable of moving inside the film-forming chamber through the substrate transfer portion, wherein the substrate is transferred between the substrate supporting portion and the substrate transfer unit.
    Type: Application
    Filed: August 7, 2012
    Publication date: February 14, 2013
    Inventors: Kunihiko Suzuki, Shinichi Mitani, Yuusuke Sato
  • Patent number: 8361226
    Abstract: This III-nitride single-crystal growth method, being a method of growing a AlxGa1-xN single crystal (4) by sublimation, is furnished with a step of placing source material (1) in a crucible (12), and a step of sublimating the source material (1) to grow AlxGa1-xN (0<x?1) single crystal (4) in the crucible (12), with the AlyGa1-yN (0<y?1) source (2) and an impurity element (3), which is at least one selected from the group consisting of IVb elements and IIa elements, being included in the source material (1). This growth method makes it possible to stably grow bulk III-nitride single crystals of low dislocation density and of favorable crystallinity.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: January 29, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Michimasa Miyanaga, Naho Mizuhara, Shinsuke Fujiwara, Hideaki Nakahata, Tomohiro Kawase
  • Patent number: 8357241
    Abstract: There is provided a method of vacuum evaporation comprising causing evaporated material (5) from vacuum evaporation source (20) furnished with container (1) with its one side open accommodating organic material (2) to form a film on opposed substrate (7), wherein the vacuum evaporation source has heating element (3) not fixed to the container, and being in contact with the surface of organic material held in the container, and wherein the organic material is evaporated by heating of the heating element only, the evaporated material released through at least one hole (6) or at least one slit made in the heating element.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: January 22, 2013
    Assignee: Canon Tokki Corporation
    Inventors: Eiichi Matsumoto, Yoshiko Abe, Yuji Yanagi
  • Patent number: 8334015
    Abstract: A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.
    Type: Grant
    Filed: January 14, 2008
    Date of Patent: December 18, 2012
    Assignee: Intermolecular, Inc.
    Inventors: Tony P. Chiang, Sunil Shanker, Chi-I Lang
  • Patent number: 8231724
    Abstract: The reactor for polycrystalline silicon is a reactor for polycrystalline silicon in which a silicon seed rod installed inside the reactor is heated by supplying electricity, a raw material gas supplied inside the reactor is allowed to react, thereby producing polycrystalline silicon on the surface of the silicon seed rod, and specifically, the reactor for polycrystalline silicon is provided with a raw material gas supply port installed on the bottom of the reactor and a raw material gas supply nozzle attached to the raw material gas supply port so as to be communicatively connected and extending upward, in which the upper end of the raw material gas supply nozzle is set to a height in a range from ?10 cm to +5 cm on the basis of the upper end of the electrode which retains the silicon seed rod.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: July 31, 2012
    Assignee: Mitsubishi Materials Corporation
    Inventors: Toshihide Endoh, Toshiyuki Ishii, Masaaki Sakaguchi, Naoki Hatakeyama
  • Patent number: 8226767
    Abstract: “Super-hetero-epitaxial” combinations comprise epitaxial growth of one material on a different material with different crystal structure. Compatible crystal structures may be identified using a “Tri-Unity” system. New bandgap engineering diagrams are provided for each class of combination, based on determination of hybrid lattice constants for the constituent materials in accordance with lattice-matching equations. Using known bandgap figures for previously tested materials, new materials with lattice constants that match desired substrates and have the desired bandgap properties may be formulated by reference to the diagrams and lattice matching equations. In one embodiment, this analysis makes it possible to formulate new super-hetero-epitaxial semiconductor systems, such as systems based on group IV alloys on c-plane LaF3; group IV alloys on c-plane langasite; Group III-V alloys on c-plane langasite; and group II-VI alloys on c-plane sapphire.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: July 24, 2012
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Yeonjoon Park, Sang H. Choi, Glen C. King, James R. Elliott
  • Patent number: 8216367
    Abstract: A method for producing a silicon carbide layer on a surface of a silicon substrate includes the step of irradiating the surface of the silicon substrate heated in a high vacuum at a temperature in a range of from 500° C. to 1050° C. with a hydrocarbon-based gas as well as an electron beam to form a cubic silicon carbide layer on the silicon substrate surface.
    Type: Grant
    Filed: May 23, 2006
    Date of Patent: July 10, 2012
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Patent number: 8043687
    Abstract: A method for forming a graphene layer is disclosed herein. The method includes establishing an insulating layer on a substrate such that at least one seed region, which exposes a surface of the substrate, is formed. A seed material in the seed region is exposed to a carbon-containing precursor gas, thereby initiating nucleation of the graphene layer on the seed material and enabling lateral growth of the graphene layer along at least a portion of a surface of the insulating layer.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: October 25, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore I. Kamins, R. Stanley Williams, Nathaniel Quitoriano
  • Publication number: 20110083602
    Abstract: A susceptor apparatus for use in a CVD reactor includes a main platter with a central gear. The main platter has opposite first and second sides, a central recess formed in the second side, and a plurality of circumferentially spaced-apart pockets formed in the first side. The central gear is positioned within the central recess and the satellite platters are individually rotatable within the respective pockets. Each pocket has a peripheral wall with an opening in communication with the central recess. The central gear teeth extend into each of the pockets via the respective wall openings and engage a planet gear associated with each satellite platter. Rotation of the main platter about its rotational axis causes the satellite platters to rotate about their individual rotational axes.
    Type: Application
    Filed: October 8, 2010
    Publication date: April 14, 2011
    Inventors: Michael John Bergmann, David Todd Emerson, David Dean Seibel
  • Patent number: 7862657
    Abstract: A crystal growth method for forming a semiconductor film, the method includes: while revolving one or more substrates about a rotation axis, passing raw material gas and carrier gas from the rotation axis side in a direction substantially parallel to a major surface of the substrate. The center of the substrate is located on a side nearer to the rotation axis than a position at which growth rate of the semiconductor film formed by thermal decomposition of the raw material gas is maximized.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: January 4, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaaki Onomura, Yoshiyuki Harada
  • Patent number: 7816764
    Abstract: Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply.
    Type: Grant
    Filed: May 22, 2009
    Date of Patent: October 19, 2010
    Assignee: The Regents of the University of California
    Inventors: Hugues Marchand, Brendan Jude Moran
  • Patent number: 7763529
    Abstract: A method of fabricating a silicon carbide (SiC) layer is disclosed, which comprises steps: (S1) heating a silicon-based substrate at a temperature of X ° C.; (S2) carburizating the silicon-based substrate with a first hydrocarbon-containing gas at a temperature of Y ° C. to form a carbide layer on the silicon-based substrate; (S3) annealing the silicon-based substrate with the carbide layer thereon at a temperature of Z ° C.; and (S4) forming a silicon carbide layer on the carbide layer with a second hydrocarbon-containing gas and a silicon-containing gas at a temperature of W ° C.; wherein, X is 800 to 1200; Y is 1100 to 1400; Z is 1200 to 1500; W is 1300 to 1550; and X<Y?Z?W. In the method of the present invention, since no cooling steps between respective steps are required, the full process time can be reduced and the cost is lowered because no energy consumption occurs for the cooling and the re-heating steps.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: July 27, 2010
    Assignee: National Tsing Hua University
    Inventors: Wei-Yu Chen, Jenn-Chang Hwang, Chih-Fang Huang, Chien-Cheng Chen
  • Patent number: 7709103
    Abstract: The present invention provides a nano particle phosphor with superior luminous characteristic formed using nitride semiconductor material, a method of manufacturing the phosphor with high production yield, and a light emitting device using the phosphor. The phosphor is formed of a columnar crystal having a diameter of at most 3 nm, a light emitting region and a light absorbing region are defined in the columnar crystal, and the light emitting region and the light absorbing region are adjacent to each other along a longitudinal direction of the columnar crystal.
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: May 4, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hajime Saito
  • Patent number: 7687888
    Abstract: Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: March 30, 2010
    Assignee: The Regents of the University of California
    Inventors: Hugues Marchand, Brendan Jude Moran
  • Patent number: 7678194
    Abstract: A method and apparatus for generating gas for a processing system is provided. In one embodiment, an apparatus for generating gas for a processing system includes a canister having at least one baffle disposed between two ports and containing a precursor material. The precursor material is adapted to produce a gas vapor when heated to a defined temperature at a defined pressure. The baffle forces a carrier gas to travel an extended mean path between the inlet and outlet ports. In another embodiment, an apparatus for generating gas includes a canister having a tube that directs a carrier gas flowing into the canister away from a precursor material disposed within the canister.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: March 16, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Seshadri Ganguli, Ling Chen, Vincent W. Ku
  • Patent number: 7582161
    Abstract: An apparatus and methods of forming the apparatus include a film of transparent conductive titanium-doped indium oxide for use in a variety of configurations and systems. The film of transparent conductive titanium-doped indium oxide may be structured as one or more monolayers. The film of transparent conductive titanium-doped indium oxide may be formed using atomic layer deposition.
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: September 1, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Publication number: 20090139448
    Abstract: A vapor phase growth apparatus and a vapor phase growth method capable of improving the yield rate of wafers by stopping infiltration of metal contaminants generated below a horizontal disk-like susceptor is provided. The vapor phase growth apparatus according to embodiments of the present invention includes a holder having an annular shape and on which a wafer can be placed, a disk-shaped susceptor on which the holder can be placed and provided on an upper surface thereof with circumferential steps inscribed in inner circumferential edge of the holder when the holder is placed, a rotation driving mechanism for rotating the susceptor and the holder at a predetermined rotational speed, a heating mechanism for heating the wafer placed on the holder, and a wafer push-up mechanism to push up an undersurface of the holder outside the rotation driving mechanism.
    Type: Application
    Filed: November 25, 2008
    Publication date: June 4, 2009
    Inventors: Hironobu HIRATA, Masayoshi Yajima
  • Patent number: 7485583
    Abstract: The invention provides a method for fabricating a superlattice semiconductor structure capable of achieving excellent interfacial properties and uniformity. For the superlattice semiconductor structure according to the invention, a substrate is mounted on a susceptor within a process chamber. First and second source gases are supplied simultaneously to two different areas on the susceptor within the chamber to form first and second source gas areas separate from each other. The susceptor is rotated to revolve the substrate through the first and second source gas areas.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: February 3, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Bum Joon Kim, Young Min Kim, Young Chul Shin
  • Publication number: 20080314311
    Abstract: A method and apparatus that may be utilized in deposition processes, such as hydride vapor phase epitaxial (HVPE) deposition of metal nitride films, are provided. A first set of passages may introduce a metal containing precursor gas. A second set of passages may provide a nitrogen-containing precursor gas. The first and second sets of passages may be interspersed in an effort to separate the metal containing precursor gas and nitrogen-containing precursor gas until they reach a substrate. An inert gas may also be flowed down through the passages to help keep separation and limit reaction at or near the passages, thereby preventing unwanted deposition on the passages.
    Type: Application
    Filed: June 24, 2007
    Publication date: December 25, 2008
    Inventors: Brian H. Burrows, Alexander Tam, Ronald Stevens, Jacob Grayson, Kenric T. Choi, Sumedh Acharya, Sandeep Nijhawan, Olga Kryliouk, Yuriy Melnik
  • Patent number: 7399359
    Abstract: Method and system for generating a metal thin film with a uniform crystalline orientation and a controlled crystalline microstructure are provided. For example, a metal layer is irradicated with a pulsed laser to completely melt the film throughout its entire thickness. The metal layer can then resolidify to form grains with a substantially uniform orientation. The resolidified metal layer can be irradiated with a sequential lateral solidification technique to modify the crystalline microstructure (e.g., create larger grains, single-crystal regions, grain boundary controlled microstructures, etc.) The metal layer can be irradiated by patterning a beam using a mask which includes a first region capable of attenuating the pulsed laser and a second region allowing complete irradiation of sections of the thin film being impinged by the masked laser beam. An inverse dot-patterned mask can be used, the microstructure that may have substantially the same as the geometric pattern as that of the dots of the mask.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: July 15, 2008
    Assignee: The Trustees of Columbia University in theCity of New York
    Inventors: James S. Im, Jae Beom Choi
  • Patent number: 7387679
    Abstract: A method of producing a silicon carbide single crystal has storing a sublimation law material on a first end portion in a reaction container; disposing a seed crystal of a silicon carbide single crystal on a second end portion substantially facing the sublimation law material in the reaction container; and re-crystallizing the sublimated sublimation law material on the seed crystal to grow a silicon carbide single crystal, wherein a sealing portion is provided in the reaction container to grow a silicon carbide single crystal on the seed crystal provided in the sealing portion while preventing the leak of the sublimated sublimation law material from the atmosphere for sublimation.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: June 17, 2008
    Assignee: Bridgestone Corporation
    Inventors: Takayuki Maruyama, Yoshinori Kobayashi, Takuya Monbara
  • Patent number: 7387677
    Abstract: The substrate is used for opto-electric or electrical devices and comprises a layer of nitride grown by means of vapor phase epitaxy growth wherein both main surfaces of the nitride substrate are substantially consisting of non N-polar face and N-polar face respectively and the dislocation density of the substrate is 5×105/cm2 or less. Therefore, the template type substrate has a good dislocation density and a good value of FWHM of the X-ray rocking curve from (0002) plane less than 80, so that the resulting template type substrate is very useful for the epitaxy substrate from gaseous phase such as MOCVD, MBE and HVPE, resulting in possibility of making good opto-electric devices such as Laser Diode and large-output LED and good electric devices such as MOSFET.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: June 17, 2008
    Assignees: AMMONO Sp. z o.o., Nichia Corporation
    Inventors: Robert Dwilinski, Roman Doradzinski, Jerzy Garczynski, Leszek Sierzputowski, Yasuo Kanbara
  • Patent number: 7377978
    Abstract: It is to provide a method for producing a silicon epitaxial wafer, which can prevent fine unevenness from occurring on a rear main surface of a silicon epitaxial wafer and which suppresses the haze level of the whole rear main surface to 50 ppm or less. A method for producing a silicon epitaxial wafer, includes: a hydrogen heat treatment step of arranging within a reactor a susceptor capable of mounting a silicon single crystal substrate and subjecting the silicon single crystal substrate mounted on the susceptor to heat treatment in a hydrogen atmosphere, and a vapor phase epitaxy step of epitaxially growing a silicon epitaxial layer after the hydrogen heat treatment step, wherein the silicon single crystal substrate is separated from the susceptor during the hydrogen heat treatment step, and the silicon single crystal substrate is mounted on the susceptor during the vapor phase epitaxy step.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: May 27, 2008
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventor: Tsuyoshi Nishizawa
  • Patent number: 7341628
    Abstract: Gallium Nitride layers grown as single crystals by epitaxy such as Hydride Vapor Phase Epitaxy (HVPE) contain large numbers of crystal defects such as hexagonal pits, which limit the yield and performance of opto- and electronic devices. In this method, the Gallium Nitride layer is first coated with an Aluminum layer of approximate thickness of 0.1 microns. Next, Nitrogen is ion implanted through the Aluminum layer so as to occupy mostly the top 0.1 to 0.5 microns of the Gallium Nitride layer. Finally, through a pulsed directed energy beam such as electron or photons, with a fluence of approximately 1 Joule/cm2 the top approximately 0.5 microns are converted to a single crystal with reduced defect density.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: March 11, 2008
    Inventor: Andreas A. Melas
  • Publication number: 20080053371
    Abstract: A silicon carbide manufacturing device includes a graphite crucible, in which a seed crystal is disposed, a gas-inducing pipe coupled with the graphite crucible, and an attachment prevention apparatus. The gas-inducing pipe has a column-shaped hollow part, through which a source gas flows into the graphite crucible. The attachment prevention apparatus includes a rod extending to a flow direction of the source gas, and a revolving and rotating element for revolving the rod along an inner wall of the gas-inducing pipe while rotating the rod on an axis of the rod in parallel to the flow direction.
    Type: Application
    Filed: September 4, 2007
    Publication date: March 6, 2008
    Applicant: DENSO CORPORATION
    Inventors: Masao Nagakubo, Fusao Hirose, Yasuo Kitoh
  • Patent number: 7335260
    Abstract: A laser annealing apparatus for sequential lateral solidification (SLS) to uniformly crystallize silicon on an entire silicon substrate by minimizing the dislocation of the silicon substrate during laser beam irradiation is disclosed. During the laser annealing, a vacuum chuck holds the silicon substrate on a movable stage. The device includes a laser source, an optical system patterning the shape and energy of a laser beam irradiated from the laser source, a vacuum chuck supporting a silicon substrate, and a movable stage supporting the vacuum chuck as well as transferring the vacuum chuck in a predetermined direction. Accordingly, the apparatus improves the degree of crystallization because it is able to uniformly carry out SLS on an entire surface of the silicon substrate.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: February 26, 2008
    Assignee: LG.Philips LCD Co., Ltd.
    Inventor: Yun-Ho Jung
  • Patent number: 7255744
    Abstract: Concerns lithium-doped diamond: Low-resistivity n-type semiconductor diamond doped with lithium and nitrogen, and a method of manufacturing such diamond are provided. Low-resistivity n-type semiconductor diamond containing 1017 cm?3 or more of lithium atoms and nitrogen atoms together, in which are respectively doped lithium atoms into carbon-atom interstitial lattice sites, and nitrogen atoms into carbon-atom substitutional sites, with the lithium and the nitrogen holding arrangements that neighbor each other. To obtain low-resistivity n-type semiconductor diamond, in a method for the vapor synthesis of diamond, photodissociating source materials by photoexcitation utilizing vacuum ultraviolet light and irradiating a lithium source material with an excimer laser to scatter and supply lithium atoms enables the diamond to be produced.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: August 14, 2007
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Akihiko Namba, Takahiro Imai, Hisao Takeuchi
  • Patent number: 7141117
    Abstract: A method of fixing a seed crystal to be used for growing a silicon carbide single crystal from the seed crystal that has been fixed to a graphite base, wherein the method includes: forming a layered product by placing a metallic material whose melting point is not higher than growth temperature of the single crystal on the graphite base, disposing the seed crystal on the metallic material, and then further placing a pressing member for imposing a load on the seed crystal thereon; heat-treating the layered product at a temperature to fix the graphite base, the metallic material, and the seed crystal to each other to form one body, with the temperature being not lower than the melting point of the metallic material but not higher than the growth temperature of the single crystal; cooling the layered product; and then removing the pressing member from the layered product.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: November 28, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tetsuya Norikane, Hiroaki Hoshikawa
  • Patent number: 7115167
    Abstract: The invention provides a method of growing an (In, Ga)N multiplayer structure by molecular beam epitaxy. Each GaN or InGaN layer in the multilayer structure is grown at a substrate temperature of at least 650° C., and this provides improved material quality. Ammonia gas is used as the source of nitrogen for the growth process. Ammonia and gallium are supplied to the growth chamber at substantially constant rates, and the supply rate of indium to the growth chamber is varied to select the desired composition for the layer being grown. This allows the structure to be grown at a substantially constant growth rate. The substrate temperature is preferably kept constant during the growth process, to avoid the need to interrupt the growth process to vary the substrate temperature between the growth of one layer and the growth of another layer.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: October 3, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Stewart Edward Hooper, Jennifer Mary Barnes, Valerie Bousquet, Jonathan Heffernan
  • Patent number: 7083680
    Abstract: A glass bottle containing a sample of an organic material to be purified is located at a position surrounded by a heater near one end in an outer glass tube. An inner glass tube for catching organic crystals obtained by recrystallization is located at a position near the other end in the outer glass tube. When the sample of the organic material is sublimed and purified, the inside of the outer glass tube is kept in a higher vacuum state (lower pressure) than 200 Pa by a vacuum pump. The sample inside the outer glass tube is heated by the heater, to sublime organic molecules of the sample contained in the glass bottle. The outer glass tube is provided with a temperature gradient, so that organic molecule vapor is cooled near the other end in the outer glass tube, and is recrystallized inside the inner glass tube.
    Type: Grant
    Filed: September 23, 2002
    Date of Patent: August 1, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Yuji Hamada
  • Patent number: 7077904
    Abstract: The present invention relates to a method for forming silicon oxide films on substrates using an atomic layer deposition process. Specifically, the silicon oxide films are formed at low temperature and high deposition rate via the atomic layer deposition process using a Si2Cl6 source unlike a conventional atomic layer deposition process using a SiCl4 source. The atomic layer deposition apparatus used in the above process can be in-situ cleaned effectively at low temperature using a HF gas or a mixture gas of HF gas and gas containing —OH group.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: July 18, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byoung Ha Cho, Yong Il Kim, Cheol Ho Shin, Won Hyung Lee, Jung Soo Kim, Sang Tae Sim
  • Patent number: 7056383
    Abstract: A crucible is provided that is thermally stable at high temperatures and is suitable for use in the growth of large, bulk AlN, AlxGa1-xN or other nitride single crystals. The crucible is comprised of specially treated tantalum. During the initial treatment, the walls of the crucible are carburized, thus achieving a crucible that can be subjected to high temperatures without deformation. Once the carburization of the tantalum is complete, the crucible undergoes further treatment to protect the surfaces that are expected to come into contact with nitride vapors during crystal growth with a layer of TaN. If the crucible is to be used with a graphite furnace, only the inner surfaces of the crucible are converted to TaN, thus keeping TaC surfaces adjacent to the graphite furnace elements. If the crucible is to be used with a non-graphite furnace, both the inner and outer surfaces of the crucible are converted to TaN.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: June 6, 2006
    Assignee: The Fox Group, Inc.
    Inventors: Heikki I. Helava, Mark G. Ramm
  • Patent number: 6955719
    Abstract: A method for fabricating semiconductor devices with thin (e.g., submicron) and/or thick (e.g., between 1 micron and 100 microns thick) Group III nitride layers during a single epitaxial run is provided, the layers exhibiting sharp layer-to-layer interfaces. According to one aspect, an HVPE reactor is provided that includes one or more gas inlet tubes adjacent to the growth zone, thus allowing fine control of the delivery of reactive gases to the substrate surface. According to another aspect, an HVPE reactor is provided that includes at least one growth zone as well as a growth interruption zone. According to another aspect, an HVPE reactor is provided that includes extended growth sources such as slow growth rate gallium source with a reduced gallium surface area. According to another aspect, an HVPE reactor is provided that includes multiple sources of the same material, for example Mg, which can be used sequentially to prolong a growth cycle.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: October 18, 2005
    Assignee: Technologies and Devices, Inc.
    Inventors: Vladimir A. Dmitriev, Denis V. Tsvetkov, Aleksei Pechnikov, Yuri V. Melnik, Aleksandr Usikov, Oleg Kovalenkov
  • Patent number: 6932866
    Abstract: The invention relates to a method and a device for depositing especially crystalline layers on especially crystalline substrates in a process chamber of a reactor housing having a water-cooled wall. The floor of said process chamber is heated. At least one reaction gas as a process gas, and hydrogen as a carrier gas, are centrally introduced into the process chamber, and are extracted by a gas evacuation ring surrounding the process chamber. A flush gas flows between the cover of the reactor and the cover of the process chamber. Said flush gas and the flush gas which flushes the area between the reactor wall and the gas evacuation ring are introduced into the outer region of the process chamber, via a gap between the cover of the reactor and the gas evacuation ring which can be lowered for loading the process chamber, in order to be sucked through the openings in the gas evacuation ring with the process gas.
    Type: Grant
    Filed: June 23, 2003
    Date of Patent: August 23, 2005
    Assignee: Aixtron AG
    Inventor: Martin Dauelsberg
  • Patent number: 6932867
    Abstract: A method is provided for growing thin oxide films on the surface of a substrate by alternatively reacting the surface of the substrate with a metal source material and an oxygen source material. The oxygen source material is preferably a metal alkoxide. The metal source material may be a metal halide, hydride, alkoxide, alkyl, a cyclopentadienyl compound, or a diketonate.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: August 23, 2005
    Assignee: ASM International, N.V.
    Inventors: Mikko Ritala, Antti Rahtu, Markku Leskela, Kaupo Kukli
  • Patent number: 6902620
    Abstract: Atomic layer deposition systems and methods are disclosed utilizing a multi-wafer sequential processing chamber. The process gases are sequentially rotated among the wafer stations to deposit a portion of a total deposition thickness on each wafer at each station. A rapid rotary switching of the process gases eliminates having to divert the process gases to a system vent and provides for atomic layer film growth sufficient for high-volume production applications. Conventional chemical vapor deposition can also be performed concurrently with atomic layer deposition within the multi-wafer sequential processing chamber.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: June 7, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Thomas R. Omstead, Karl B. Levy