Processes Of Growth With A Subsequent Step Of Heat Treating Or Deliberate Controlled Cooling Of The Single-crystal Patents (Class 117/3)
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Patent number: 7332030Abstract: Process for the treatment of a component, at least one zone to be treated of which located in the depth of this component at a certain distance from the surface thereof, has at least one property that can be modified when this zone is subjected to a thermal energy density above a specified treatment level, comprises: placing the component to be treated at a thermal energy level below the specified level; and subjecting, through its aforementioned surface, for a specified time and in the form of at least one pulse, the component to a power flux generated by a particle emission unit, this emission unit being regulated so as to produce a thermal energy density that is concentrated on or has a localized maximum in the zone to be treated and reaching, in at least part of this zone, a level above the specified treatment level.Type: GrantFiled: January 15, 2003Date of Patent: February 19, 2008Inventor: Michel Bruel
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Patent number: 7332028Abstract: The invention relates to the handling of a composition comprising a rare-earth halide, especially within the context of the growth of crystals from said composition, said crystals generally being of formula AeLnfX(3f+e) in which Ln represents one or more rare earths, X represents one or more halogen atoms chosen from Cl, Br or I, and A represents one or more alkaline metals such as K, Li, Na, Rb or Cs, e and f representing values such that e, which may be zero, is less than or equal to 2f and f is greater than or equal to 1. It is possible in this way to grow single crystals exhibiting remarkable scintillation properties.Type: GrantFiled: June 11, 2003Date of Patent: February 19, 2008Assignee: Saint-Gobain Cristaux et DetecteursInventors: Alain Iltis, Vladimir Ouspenski
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Patent number: 7332027Abstract: A method for manufacturing an aluminum nitride single crystal is provided, including the steps of preparing a raw material composition containing aluminum oxide and/or an aluminum oxide precursor which is converted into aluminum oxide by heating, and aluminum nitride and/or an aluminum nitride precursor which is converted into aluminum nitride by heating, heating the raw material composition at 1600 to 2400° C. to synthesize aluminum nitride, and causing crystal growth of the aluminum nitride to obtain an aluminum nitride single crystal.Type: GrantFiled: June 30, 2005Date of Patent: February 19, 2008Assignee: NGK Insulators, Ltd.Inventors: Yoshimasa Kobayashi, Toru Hayase, Naohito Yamada
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Patent number: 7329316Abstract: A manufacturing method for quasi phase matching (QPM) wavelength converter elements using crystal quartz as a base material in which twins are periodically induced, comprises a step of periodically inducing the twins by applying a stress onto a crystal quartz substrate as the base material so that an angle ? of a direction in which the stress is applied relative to a Z axis of the crystal quartz is 60°<?<90°.Type: GrantFiled: March 9, 2004Date of Patent: February 12, 2008Assignees: National Institute for Materials Science, Nidek Co., Ltd.Inventors: Sunao Kurimura, Tsuyoshi Yamada
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Patent number: 7316747Abstract: A method is disclosed for producing a high quality bulk single crystal of silicon carbide in a seeded growth system and in the absence of a solid silicon carbide source, by reducing the separation between a silicon carbide seed crystal and a seed holder until the conductive heat transfer between the seed crystal and the seed holder dominates the radiative heat transfer between the seed crystal and the seed holder over substantially the entire seed crystal surface that is adjacent the seed holder.Type: GrantFiled: October 12, 2005Date of Patent: January 8, 2008Assignee: Cree, Inc.Inventors: Jason Ronald Jenny, David Phillip Malta, Hudson McDonald Hobgood, Stephan Georg Mueller, Mark Brady, Robert Tyler Leonard, Adrian Powell, Valeri F. Tsvetkov, George J. Fechko, Jr., Calvin H. Carter, Jr.
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Patent number: 7314515Abstract: An apparatus for fabricating a GaN single crystal and a fabrication method for producing GaN single crystal ingot are provided. The apparatus includes: a reactor including a ceiling, a floor and a wall with a predetermined height encompassing an internal space between the ceiling and the floor, wherein the ceiling is opposite to the floor; a quartz vessel on the floor containing Ga metal; a mount installed on the ceiling on which a GaN substrate is mounted, the GaN substrate being opposite to the quartz vessel; a first gas supplying unit supplying the quartz vessel with hydrogen chloride (HCl) gas; a second gas supplying unit supplying the internal space of the reactor with ammonia (NH3) gas; and a heating unit installed in conjunction with the wall of the reactor for heating the internal space, wherein the lower portion of the internal space is heated to a higher temperature than the upper portion.Type: GrantFiled: September 8, 2005Date of Patent: January 1, 2008Assignee: Samsung Corning Co., Ltd.Inventor: Jai-yong Han
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Patent number: 7309476Abstract: Novel diamondoid-based components that may be used in nanoscale construction are disclosed. Such components include rods, brackets, screws, gears, rotors, and impellers. Subassemblies (or subsystems) may comprise one or more diamondoid components. Exemplary subassemblies include atomic force microscope tips, molecular tachometers and signal waveform generators, and self-assembling cellular membrane pores and channels.Type: GrantFiled: July 16, 2003Date of Patent: December 18, 2007Assignee: Chevron U.S.A. Inc.Inventors: Robert M. Carlson, Jeremy E. Dahl, Shenggao Liu
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Patent number: 7309392Abstract: In a method of producing a lithium niobate substrate by the use of a lithium niobate crystal grown by the Czochralski process, the lithium niobate crystal is heat-treated at a temperature of from 300° C. or more to less than 500° C. in the state the lithium niobate crystal is buried in a powder constituted of at least one element selected from the group consisting of Al, Ti, Si, Ca, Mg and C, or in the state the lithium niobate crystal is held in a container constituted of at least one element selected from the group consisting of Al, Ti, Si, Ca, Mg and C.Type: GrantFiled: November 4, 2004Date of Patent: December 18, 2007Assignee: Sumitomo Metal Mining Co., Ltd.Inventors: Tomio Kajigaya, Takashi Kakuta
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Patent number: 7306671Abstract: Novel uses of diamondoid-containing materials in the field of microelectronics are disclosed. Embodiments include, but are not limited to, thermally conductive films in integrated circuit packaging, low-k dielectric layers in integrated circuit multilevel interconnects, thermally conductive adhesive films, thermally conductive films in thermoelectric cooling devices, passivation films for integrated circuit devices (ICs), and field emission cathodes. The diamondoids employed in the present invention may be selected from lower diamondoids, as well as the newly provided higher diamondoids, including substituted and unsubstituted diamondoids. The higher diamondoids include tetramantane, peritamantane, hexamantane, heptamantane, octamantane, nonamantane, decamantane, and undecamantane.Type: GrantFiled: February 24, 2004Date of Patent: December 11, 2007Assignee: Chevron U.S.A.. Inc.Inventors: Jeremy E. Dahl, Robert M. Carlson, Shenggao Liu
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Patent number: 7306670Abstract: In the case of the epitaxial growth according to the prior art, a number o strips often have to be produced in a plane in order to restore an area to be repaired. This leads to overlapping and misorientation of the crystalline structures. In the case of the method according to the invention, the strip is of such a width that no overlapping occurs, since the width is adapted to the contour of the area to be repaired.Type: GrantFiled: December 5, 2003Date of Patent: December 11, 2007Assignee: Siemens AktiengesellschaftInventors: Thomas Beck, Georg Bostanjoglo, Nigel-Philip Cox, Rolf Wilkenhöner
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Patent number: 7306673Abstract: The invention is directed to a method for growing metal fluoride crystals suitable for use in below 200 nm optical lithography systems, the method comprising including at least the step of heating a crystal growth furnace to a temperature in the range of 1400-2000° C. to purify the furnace by removal of sulfur and chlorine prior to using the furnace for growing metal fluoride single crystals.Type: GrantFiled: October 22, 2004Date of Patent: December 11, 2007Assignee: Corning IncorporatedInventors: Michelle M. L. Fredholm, Jeffrey T. Kohli, Nicholas LeBlond, Alexandre M. Mayolet, Viktoria Pshenitsyna, Pawan Saxena, Paul M. Schermerhorn
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Patent number: 7303627Abstract: A method is described for making an especially not-(111)-oriented low-stress large-volume crystal having a glide plane with reduced stress birefringence and more uniform refractive index. The method includes growing and tempering the crystal while heating and/or cooling to form a temperature gradient in order to relax stresses arising along the glide plane. During the tempering the heating and/or cooling occurs by heat transfer in a heat transfer direction and the heat transfer direction or temperature gradient is oriented at an angle of from 5° to 90° to the glide plane. Crystals with a uniform refractive index with variations of less than 0.025×10?6 (RMS value) are produced by the method.Type: GrantFiled: February 22, 2005Date of Patent: December 4, 2007Assignee: Schott AGInventors: Lutz Parthier, Joerg Staeblein, Gunther Wehrhan, Christian Kusch
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Patent number: 7300516Abstract: When a laser beam is radiated on a semiconductor film under appropriate conditions, the semiconductor film can be crystallized into single crystal-like grains connected in a scanning direction of the laser beam (laser annealing). The most efficient laser annealing condition is studied. When a length of one side of a rectangular substrate on which a semiconductor film is formed is b, a scanning speed is V, and acceleration necessary to attain the scanning speed V of the laser beam relative to the substrate is g, and when V=(gb/5.477)1/2 is satisfied, a time necessary for the laser annealing is made shortest. The acceleration g is made constant, however, when it is a function of time, a time-averaged value thereof can be used in place of the constant.Type: GrantFiled: October 13, 2004Date of Patent: November 27, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Koichiro Tanaka
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Patent number: 7282094Abstract: To precisely predict the distribution of densities and sizes of void defects comprising voids and inner wall oxide membranes in a single crystal. The computer-based simulation determines, at steps 1 to 7, the distribution of temperatures within a single crystal 14 growing from a melt 12 from the time of its pulling-up to the time of its completing cooling with due consideration paid to convection currents in the melt 12. The computer-based simulation, at steps 8 to 15, determines the density of voids considering the cooling process of the single crystal separated from the melt, that is, the pulling-up speed of the single crystal after the separation from the melt, and reflecting the effect of slow and rapid cooling of the single crystal in the result, and relates the radius of voids with the thickness of inner wall oxide membrane developed around the voids.Type: GrantFiled: May 30, 2003Date of Patent: October 16, 2007Assignee: Sumco CorporationInventors: Kounosuke Kitamura, Jun Furukawa, Naoki Ono
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Patent number: 7276222Abstract: Novel uses of diamondoid-containing materials in the field of microelectronics are disclosed. Embodiments include, but are not limited to, thermally conductive films in integrated circuit packaging, thermally conductive adhesive films, and thermally conductive films in thermoelectric cooling devices. The diamondoids employed in the present invention may be selected from lower diamondoids, as well as the newly provided higher diamondoids, including substituted and unsubstituted diamondoids. The higher diamondoids include tetramantane, pentamantane, hexamantane, heptamantane, octamantane, nonamantane, decamantane, and undecamantane. The diamondoid-containing material may be fabricated as a diamondoid-containing polymer, a diamondoid-containing sintered ceramic, a diamondoid ceramic composite, a CVD diamondoid film, a self-assembled diamondoid film, and a diamondoid-fullerene composite.Type: GrantFiled: July 14, 2004Date of Patent: October 2, 2007Assignee: Chevron U.S.A. Inc.Inventors: Jeremy E. Dahl, Robert M. Carlson, Shenggao Liu
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Patent number: 7273598Abstract: Novel uses of diamondoid-containing materials in the field of microelectronics are disclosed. Embodiments include, but are not limited to, passivation films for integrated circuit devices (ICs). The diamondoids employed in the present invention may be selected from lower diamondoids, as well as the newly provided higher diamondoids, including substituted and unsubstituted diamondoids. The higher diamondoids include tetramantane, pentamantane, hexamantane, heptamantane, octamantane, nonamantane, decamantane, and undecamantane. The diamondoid-containing material may be fabricated as a diamondoid-containing polymer, a diamondoid-containing sintered ceramic, a diamondoid ceramic composite, a CVD diamondoid film, a self-assembled diamondoid film, and a diamondoid-fullerene composite.Type: GrantFiled: July 14, 2004Date of Patent: September 25, 2007Assignee: Chevron U.S.A. Inc.Inventors: Jeremy E. Dahl, Robert M. Carlson, Shenggao Liu
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Patent number: 7229496Abstract: A thermal processing operation is performed for a silicon wafer W (silicon single-crystal layer) in an atmosphere gas which is formed by a hydrogen gas or an inert gas or a mixture gas of these gases at a temperature in a range of 600° C. to 950° C. (here, the temperature should not be greater than 950° C.). By doing this, a quality of a surface of the silicon single-crystal layer is improved.Type: GrantFiled: March 5, 2003Date of Patent: June 12, 2007Assignee: Sumitomo Mitsubishi Silicon CorporationInventors: Takashi Shibayama, Yoshio Murakami, Takayuki Shingyoji
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Patent number: 7229493Abstract: Provided is an excellent p-type nitride type 3-5 group compound semiconductor having escellent electrical properties such as a low contact resistance to an electrode metal, a low ohmic property, etc., by heat-treating a nitride type 3-5 group compound semiconductor doped with p-type dopant in an hydrogen-containing gas atmosphere of a specific concentration.Type: GrantFiled: January 29, 2003Date of Patent: June 12, 2007Assignee: Sumitomo Chemical Company, LimitedInventors: Yoshihiko Tsuchida, Yoshinobu Ono
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Patent number: 7226504Abstract: A method of forming a SiGe layer having a relatively high germanium content and a relatively low threading dislocation density includes preparing a silicon substrate; depositing a layer of SiGe to a thickness of between about 100 nm to 500 nm, wherein the germanium content of the SiGe layer is greater than 20%, by atomic ratio; implanting H+ ions into the SiGe layer at a dose of between about 1·1016 cm?2 to 5·1016 cm?2, at an energy of between about 20 keV to 45 keV; patterning the SiGe layer with photoresist; plasma etching the structure to form trenches about regions; removing the photoresist; and thermal annealing the substrate and SiGe layer, to relax the SiGe layer, in an inert atmosphere at a temperature of between about 650° C. to 950° C. for between about 30 seconds and 30 minutes.Type: GrantFiled: January 31, 2002Date of Patent: June 5, 2007Assignee: Sharp Laboratories of America, Inc.Inventors: Jer-Shen Maa, Douglas James Tweet, Tingkai Li, Jong-Jan Lee, Sheng Teng Hsu
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Patent number: 7214266Abstract: The present invention provides an automated method of optimising crystallisation conditions for macromolecules comprising forming a trial comprising a sample comprising a gel forming component and the macromelecule to be crystallized, wherein at least one component of the trial is dispensed using an automatic liquid dispensing system.Type: GrantFiled: October 2, 2003Date of Patent: May 8, 2007Assignee: Imperial Innovations LimitedInventor: Naomi E. Chayen
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Patent number: 7211141Abstract: The present invention is a method for producing a wafer comprising, at least, a BMD forming step of subjecting a silicon single crystal in a state of an ingot to heat treatment thereby to form bulk micro defects (BMDs) inside, and a wafer processing step of processing the ingot in which the bulk micro defects (BMDs) was formed into wafers. Thereby, there can be provided a method for producing a wafer, wherein heat treatment for providing IG capability in production of wafer can be shortened and wafers with high IG capability can be produced in large quantity. Also, the present invention can further comprise a wafer heat-treating step of subjecting the processed wafer to heat treatment, or an epitaxial growth step of forming an epitaxial layer on the wafer. Thereby, there is improved productivity of annealed wafers or epitaxial wafers that are excellent in gettering capability.Type: GrantFiled: August 4, 2004Date of Patent: May 1, 2007Assignee: Shin-Etsu Handotai Co., Ltd.Inventor: Takeshi Kobayashi
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Patent number: 7208041Abstract: An effective, simple and low-cost a method for growing single crystals of perovskite oxideshaving primary and secondary abnormal grain growths according to temperature condition higher than a determined temperature or an atmosphere of heat treatment, involves a perovskite seed single crystal being adjoined to a polycrystal of perovskite oxides and heating the adjoined combination whereby the seed single crystal grows into the polycrystal at the interface therebetween repressing secondary abnormal grain growths inside the polycrystal. 1) The composition ratio of the polycrystal is controlled and/or the specific component(s) of the polycrystal is(are) added in an excess amount compared to the amount of the component(s) of the original composition of the polycrystal, 2) the heating is performed in the temperature range which is over primary abnormal grain growths completion temperature and below secondary abnormal grain growths activation temperature, whereby the seed single crystal grows continuously.Type: GrantFiled: May 14, 2004Date of Patent: April 24, 2007Assignee: Ceracomp Co., Ltd.Inventors: Ho-Yong Lee, Jong-Bong Lee, Tae-Moo Hur
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Patent number: 7198673Abstract: A method of making below 250-nm UV light transmitting optical fluoride lithography crystals includes applying heat along a shortest path of conduction of a selected optical fluoride crystal, heating the optical fluoride crystal to an annealing temperature, holding the temperature of the optical fluoride crystal at the annealing temperature, and gradually cooling the optical fluoride crystal to provide a low-birefringence optical fluoride crystal for transmitting below 250-nm UV light.Type: GrantFiled: February 16, 2005Date of Patent: April 3, 2007Assignee: Corning IncorporatedInventors: John H. Brennan, Michael W. Price, Juergen Tinz, Liming Wang
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Patent number: 7198670Abstract: A polarization inverting region is formed by using a board comprising a single crystal of lithium tatalate of a stoichiometric composition or near to the stoichiometric composition and applying a direct current electric field having an electric field intensity equal to or lower than 5 [kV/mm] for 1 [second] or longer. A periodically poled region can be formed without needing a complicated constitution for applying a pulse voltage or a complicated constitution for applying a strong electric field.Type: GrantFiled: January 20, 2005Date of Patent: April 3, 2007Assignee: Shimadzu CorporationInventors: Katuhiko Tokuda, Kazutomo Kadokura
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Patent number: 7192480Abstract: A method for fabricating ion exchange waveguides, such as lithium niobate or lithium tantalate waveguides in optical modulators and other optical waveguide devices, utilizes pressurized annealing to further diffuse and limit exchange of the ions and includes ion exchanging the crystalline substrate with a source of ions and annealing the substrate by pressurizing a gas atmosphere containing the lithium niobate or lithium tantalate substrate above normal atmospheric pressure, heating the substrate to a temperature ranging from about 150 degrees Celsius to about 1000 degrees Celsius, maintaining pressure and temperature to effect greater ion diffusion and limit exchange, and cooling the structure to an ambient temperature at an appropriate ramp down rate. In another aspect of the invention a powder of the same chemical composition as the crystalline substrate is introduced into the anneal process chamber to limit the crystalline substrate from outgassing alkaline earth metal oxide during the anneal period.Type: GrantFiled: August 16, 2004Date of Patent: March 20, 2007Assignee: California Institute of TechnologyInventor: Lee J. Burrows
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Patent number: 7192479Abstract: A mask with sub-resolution aperture features and a method for smoothing an annealed surface using a sub-resolution mask pattern are provided. The method comprises: supplying a laser beam having a first wavelength; supplying a mask with a first mask section having apertures with a first dimension and a second mask section with apertures having a second dimension, less than the first dimension; applying a laser beam having a first energy density to a substrate region; melting a substrate region in response to the first energy density; crystallizing the substrate region; applying a diffracted laser beam to the substrate region; and, in response to the diffracted laser beam, smoothing the substrate region surface. In some aspects of the method, applying a diffracted laser beam to the substrate area includes applying a diffracted laser beam having a second energy density, less than the first energy density, to the substrate region.Type: GrantFiled: April 17, 2002Date of Patent: March 20, 2007Assignee: Sharp Laboratories of America, Inc.Inventors: Yasuhiro Mitani, Apostolos T. Voutsas, Mark A. Crowder
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Patent number: 7189293Abstract: The present invention is a method of producing an annealed wafer wherein a silicon single crystal wafer having a diameter of 200 mm or more produced by the Czochralski (CZ) method is subjected to a high temperature heat treatment in an atmosphere of an argon gas, a hydrogen gas, or a mixture gas thereof at a temperature of 1100–1350° C. for 10–600 minutes, and before the high temperature heat treatmen, a pre-annealing is performed at a temperature less than the temperature of the high temperature heat treatment, so that the growth of slip dislocations is suppressed by growing oxide precipitates. Thereby, there is provided a method of producing an annealed wafer wherein the generation and growth of slip dislocations generated in a high temperature heat treatment are suppressed and the defect density in the wafer surface layer is lowered even in the case of a silicon single crystal wafer having a large diameter of 200 mm or more, and the annealed wafer.Type: GrantFiled: June 25, 2002Date of Patent: March 13, 2007Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Norihiro Kobayashi, Masaro Tamatsuka, Takatoshi Nagoya, Wei Feig Qu, Hiroshi Takeno, Ken Aihara
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Patent number: 7172654Abstract: The present invention relates to the use of phase equilibria as shown in the phase diagram of Cu—In—Se for the preparation of solid compositions. Further, a new method for directly obtaining ? CulnSe2 from a liquid phase, preferably as a single phase composition and novel single phase ? CulnSe2 compositions are provided.Type: GrantFiled: June 29, 2001Date of Patent: February 6, 2007Assignee: Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V.Inventors: Tilo Gödecke, Frank Ernst
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Patent number: 7172655Abstract: A method of producing a single crystal CVD diamond of a desired color which includes the steps of providing single crystal CVD diamond which is colored and heat treating the diamond under conditions suitable to produce the desired color. Colors which may be produced are, for example, in the pink-green range.Type: GrantFiled: September 5, 2003Date of Patent: February 6, 2007Inventors: Daniel James Twitchen, Philip Maurice Martineau, Geoffrey Alan Scarsbrook
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Patent number: 7170671Abstract: A method is provided for forming a waveguide region within a periodically domain reversed ferroelectric crystal wherein the waveguide region has a refractive index profile that is vertically and horizontally symmetric. The symmetric profile produces effective overlapping between quasi-phasematched waves, a corresponding high rate of energy transfer between the waves and a symmetric cross-section of the radiated wave. The symmetric refractive index profile is produced by a method that combines the use of a diluted proton exchange medium at a high temperature which produces a region of high index relatively deeply beneath the crystal surface, followed by a reversed proton exchange which restores the original crystal index of refraction immediately beneath the crystal surface.Type: GrantFiled: August 24, 2004Date of Patent: January 30, 2007Assignee: HC Photonics CorporationInventors: Shang-Yi Wu, Vivien Tsai, Ming-Hsien Chou
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Patent number: 7160385Abstract: A silicon wafer and a method for manufacturing the same are provided, wherein the silicon wafer has no crystal defects in the vicinity of the surface and provides excellent gettering efficiency in the process of manufacturing devices without IG treatment. The oxygen concentration and the carbon concentration are controlled respectively within a range of 11×1017–17×1017 atoms/cm3 (OLD ASTM) and within a range of 1×1016–15×1016 atoms/cm3 (NEW ASTM). A denuded zone having no crystal defects due to the existence of oxygen is formed on the surface and in the vicinity thereof, and oxygen precipitates are formed at a density of 1×104–5×106 counts/cm2, when a heat treatment is carried out at a temperature of 500–1000° C. for 1 to 24 hours. In the method for manufacturing the silicon wafer, moreover, the silicon wafer having the oxygen and carbon concentrations as controlled above is heat-treated at a temperature of 1100° C.–1380° C. for 1 to 10 hours.Type: GrantFiled: February 20, 2003Date of Patent: January 9, 2007Assignee: Sumitomo Mitsubishi Silicon CorporationInventor: Yasuo Koike
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Patent number: 7156916Abstract: Monolithic integrated crystalline-structure-processed arrays of mechanical, and combined mechanical and electrical devices, and related systems and processing methods.Type: GrantFiled: April 23, 2002Date of Patent: January 2, 2007Assignee: Sharp Laboratories of America, Inc.Inventor: John W. Hartzell
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Patent number: 7153487Abstract: Methods and apparatus for preconditioning a lithium niobate or lithium tantalate crystal. At least a portion of a surface of the crystal is covered with a condensed material including one or more active chemicals. The crystal is heated in a non-oxidizing environment above an activating temperature at which the active chemicals contribute to reducing the crystal beneath the covered surface portion. The crystal is cooled from above the activating temperature to below a quenching temperature at which the active chemicals become essentially inactive for reducing the crystal.Type: GrantFiled: May 25, 2004Date of Patent: December 26, 2006Assignee: Crystal Technology, Inc.Inventors: Dieter Hans Jundt, Maria Claudia Custodio Kajiyama, Jason Louis Spitzer
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Patent number: 7150788Abstract: A method of adjusting the in-plane lattice constant of a substrate and an in-plane lattice constant adjusted substrate are provided. A crystalline substrate (1) made of SrTiO3 is formed at a first preestablished temperature thereon with a first epitaxial thin film (2) made of a first material, e. g., BaTiO3, and then on the first epitaxial thin film (2) with a second epitaxial thin film (6) made of a second material, e. g., BaxSr1?xTiO3 (where 0<x<1), that contains a substance of the first material and another substance which together therewith is capable of forming a solid solution in a preestablished component ratio. Thereafter, the substrate is heat-treated at a second preselected temperature. Heat treated at the second preestablished temperature, the substrate has dislocations (4) introduced therein and the second epitaxial thin film (6) has its lattice constant relaxed to a value close to the lattice constant of bulk crystal of the second material.Type: GrantFiled: August 21, 2002Date of Patent: December 19, 2006Assignee: Japan Science and Technology AgencyInventors: Hideomi Koinuma, Masashi Kawasaki, Tomoteru Fukumura, Kota Terai
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Patent number: 7147709Abstract: The present invention provides a method of forming a strained semiconductor layer. The method comprises growing a strained first semiconductor layer, having a graded dopant profile, on a wafer, having a first lattice constant. The dopant imparts a second lattice constant to the first semiconductor layer. The method further comprises growing a strained boxed second semiconductor layer having the second lattice constant on the first semiconductor layer and growing a sacrificial third semiconductor layer having the first lattice constant on the second semiconductor layer. The method further comprises etch annealing the third and second semiconductor layer, wherein the third semiconductor layer is removed and the second semiconductor layer is relaxed.Type: GrantFiled: November 4, 2003Date of Patent: December 12, 2006Assignee: Silicon Genesis CorporationInventors: Philip Ong, Francois Henley, Igor Malik
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Methods and devices for analyzing crystalline content of precipitates and crystals without isolation
Patent number: 7144457Abstract: Systems and methods are provided for evaluating a crystallization experiment, where a crystallization experiment of a molecule is to X-rays while housed within a container in which the crystallization experiment is performed; and one or more X-ray diffraction patterns from the X-ray exposure are used to evaluate whether crystalline material is present in the crystallization experiment.Type: GrantFiled: March 20, 2003Date of Patent: December 5, 2006Assignee: Takeda San Diego, Inc.Inventors: Duncan McRee, Leslie Tari -
Patent number: 7141113Abstract: A method for growing a silicon crystal by a Czochralsky method, wherein, let a pulling speed be V (mm/min) and an average value of an in-crystal temperature gradient in a pulling axis direction within a temperature range, a silicon melting point to 1350° C., be G (° C./mm), V/G ranges from 0.16 to 0.18 mm2/° C. min between a crystal center position and a crystal outer periphery position, and a ratio G outer/G center of an average value G of an in-crystal temperature gradient in a pulling axis direction within a temperature range, a silicon melting point to 1350° C., at a crystal outer surface to that at a crystal center is set to up to 1.10 to thereby obtain a high-quality perfect crystal silicon wafer. Such a perfect crystal silicon wafer, wherein an oxygen concentration is controlled to up to 13×1017 atoms/cm3, an initial heat treatment temperature is at least up to 500° C. and a temperature is raised at up to 1° C./min at least within 700 to 900° C.Type: GrantFiled: November 19, 1999Date of Patent: November 28, 2006Assignee: Komatsu Denshi Kinzoku Kabushiki KaishaInventors: Kozo Nakamura, Toshiaki Saishoji, Hirotaka Nakajima, Shinya Sadohara, Masashi Nishimura, Toshirou Kotooka, Yoshiyuki Shimanuki
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Patent number: 7135070Abstract: Monolithic stacked/layered room-temperature-processed materials whose internal crystalline structures are laser modification to create arrays of mechanical, and combined mechanical and electrical, devices with precision-established properties, such as important mechanical properties. Methodology and system configurations are disclosed.Type: GrantFiled: April 23, 2002Date of Patent: November 14, 2006Assignee: Sharp Laboratories of America, Inc.Inventor: John W. Hartzell
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Patent number: 7128783Abstract: Thin-film laser-effected internal crystalline structure modified materials suitable for the creation of various small-dimension mechanical devices, either singly or in monolithic arrays, such as MEMS devices. Processing is carried out at room temperature and atmospheric pressure.Type: GrantFiled: April 23, 2002Date of Patent: October 31, 2006Assignee: Sharp Laboratories of America, Inc.Inventor: John W. Hartzell
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Patent number: 7125451Abstract: Laser processing of various materials to create mechanical devices whose internal mechanical properties are provided in final useable form by adjustments made in internal crystalline structure.Type: GrantFiled: April 23, 2002Date of Patent: October 24, 2006Assignee: Sharp Laboratories of America, Inc.Inventor: John W. Hartzell
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Patent number: 7105049Abstract: A method for manufacturing calcium fluoride single crystal includes the step of cooling the calcium fluoride single crystal so that maximum shear stress inside the calcium fluoride single crystal caused by thermal stress is approximately equal to or smaller than critical resolved shear stress (?c) in a <1 1 0> direction of on a {0 0 1} plane of the calcium fluoride single crystal.Type: GrantFiled: September 9, 2003Date of Patent: September 12, 2006Assignee: Canon Kabushiki KaishaInventor: Keita Sakai
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Patent number: 7105048Abstract: Each region, which should be left on a substrate after patterning, of a semiconductor film is grasped in accordance with a mask. Then, each region to be scanned with laser light is determined so that at least the region to be obtained through the patterning is crystallized, and a beam spot is made to hit the region to be scanned, thereby partially crystallizing the semiconductor film. Each portion with low output energy of the beam spot is shielded by a slit. In the present invention, the laser light is not scanned and irradiated onto the entire surface of the semiconductor film but is scanned such that at least each indispensable portion is crystallized to a minimum. With the construction described above, it becomes possible to save time taken to irradiate the laser light onto each portion to be removed through the patterning after the crystallization of the semiconductor film.Type: GrantFiled: November 27, 2002Date of Patent: September 12, 2006Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Masaaki Hiroki, Koichiro Tanaka, Aiko Shiga, Satoshi Murakami, Mai Akiba
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Patent number: 7101431Abstract: A thermal treatment process for improving the resistance of a flux grown, periodically poled KTiOPO4 crystal to photorefractive or photochromic damage comprising the steps of: i) heating said crystal from ambient temperature up to an annealing temperature in the range of from about 200° C. to about 400° C.; ii) maintaining said crystal at said annealing temperature in an oxygen containing atmosphere; iii) allowing said crystal to slowly cool down from said annealing temperature to ambient temperature.Type: GrantFiled: August 3, 2004Date of Patent: September 5, 2006Assignee: Picarro, Inc.Inventor: Carla Miner
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Patent number: 7097718Abstract: Epitaxial wafers comprising a single crystal silicon substrate comprising agglomerated vacancy defects and having an axially symmetric region in which silicon self-interstitials are the predominant intrinsic point defect and which is substantially free of agglomerated defects, and an epitaxial layer which is deposited upon a surface of the substrate and which is substantially free of grown-in defects caused by the presence of agglomerated intrinsic point defects on the substrate surface upon which the epitaxial layer is deposited.Type: GrantFiled: May 20, 2003Date of Patent: August 29, 2006Assignee: MEMC Electronic Materials, Inc.Inventors: Luciano Mule'Stagno, Lu Fei, Joseph C. Holzer, Harold W. Korb, Robert J. Falster
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Patent number: 7090723Abstract: High temperature composites and thermal barrier coatings, and related methods, using anisotropic ceramic materials, such materials as can be modified to reduce substrate thermal mismatch.Type: GrantFiled: January 20, 2004Date of Patent: August 15, 2006Assignee: Applied Thin Films, Inc.Inventors: Sankar Sambasivan, Kimberly Steiner
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Patent number: 7087111Abstract: A method of forming a crystalline phase material includes, a) providing a stress inducing material within or operatively adjacent a crystalline material of a first crystalline phase; and b) annealing the crystalline material of the first crystalline phase under conditions effective to transform it to a second crystalline phase. The stress inducing material preferably induces compressive stress within the first crystalline phase during the anneal to the second crystalline phase to lower the required activation energy to produce a more dense second crystalline phase. Example compressive stress inducing layers include SiO2 and Si3N4, while example stress inducing materials for providing into layers are Ge, W and Co. Where the compressive stress inducing material is provided on the same side of a wafer over which the crystalline phase material is provided, it is provided to have a thermal coefficient of expansion which is less than the first phase crystalline material.Type: GrantFiled: October 27, 2004Date of Patent: August 8, 2006Assignee: Micron Technology, Inc.Inventors: Gurtej S. Sandhu, Sujit Sharan
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Patent number: 7083676Abstract: At least one amorphous silicon island is formed on a substrate first. A first step and a second step laser crystallization processes are thereafter performed in sequence. The amorphous silicon island is irradiated with a laser pulse having a first energy density to re-crystallize an edge portion of the amorphous silicon island into a polysilicon structure. The amorphous silicon island is then irradiated with a laser pulse having a second energy density to re-crystallize a center portion of the amorphous silicon island into a polysilicon structure.Type: GrantFiled: May 15, 2003Date of Patent: August 1, 2006Assignee: AU Optronics Corp.Inventor: Mao-Yi Chang
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Patent number: 7077900Abstract: Disclosed is a method of fabricating a photonic crystal fiber preform using an extrusion die, comprising the step of extruding a first optical material into a plurality of dispersed phases to axially orient the dispersed phases.Type: GrantFiled: June 12, 2002Date of Patent: July 18, 2006Assignee: Samsung Electronics Co. Ltd.Inventor: Joon Yong Park
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Patent number: 7074270Abstract: Techniques for predicting the behavior of dopant and defect components in a substrate lattice formed from a substrate material can be implemented in hardware or software. Fundamental data for a set of microscopic processes that can occur during one or more material processing operations is obtained. Such data can include data representing the kinetics of processes in the set of microscopic processes and the energetics and structure of possible states in the material processing operations. From the fundamental data and a set of external conditions, distributions of dopant and defect components in the substrate lattice are predicted.Type: GrantFiled: April 2, 2003Date of Patent: July 11, 2006Assignees: Seiko Epson Corporation, California Institute of TechnologyInventors: Yuzuru Sato, Masamitsu Uehara, Gyeong S. Hwang, William A. Goddard, III
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Patent number: 7067005Abstract: This silicon wafer production process has a step of cutting a silicon wafer from a silicon single crystal ingot in a perfect region which includes a perfect region P free of agglomerates of interstitial-silicon-type point defects and agglomerates of vacancy-type point defects and/or a region R in which there is occurrence of ring-shaped oxidation induced stacking faults, and a step of performing rapid thermal annealing on the silicon wafer in a hydrogen atmosphere, an argon atmosphere or an atmosphere containing a mixed gas thereof.Type: GrantFiled: August 6, 2004Date of Patent: June 27, 2006Assignee: Sumitomo Mitsubishi Silicon CorporationInventors: Takashi Shibayama, Yoshio Murakami, Takayuki Shingyoji