Abstract: A semiconductor device according to an embodiment includes: a substrate; a first nitride semiconductor layer that is provided above the substrate, has a first lattice period in a first direction parallel to a substrate plane, and includes nitrogen and aluminum; a second nitride semiconductor layer that is provided between the substrate and the first nitride semiconductor layer and includes nitrogen and aluminum and of which at least a portion has a second lattice period that is three times the first lattice period in the first direction parallel to the substrate plane; a third nitride semiconductor layer provided above the first nitride semiconductor layer; a fourth nitride semiconductor layer that is provided on the third nitride semiconductor layer and has a larger bandgap than the third nitride semiconductor layer; at least one main electrode provided on the fourth nitride semiconductor layer; and a control electrode provided above the third nitride semiconductor layer, the control electrode being configur

Abstract: The invention relates to a method for production of wafers of nitrides of element (13) (5a, 5b, 5c, 5d) from a self-supported crystal of nitride of element (13), extending longitudinally along a main axis orthogonal to a growth face of the crystal and passing through the centre of said growth face, the crystal (10) having a truncation angle with a non-zero value, remarkable in that the method comprises a phase of cutting the self-supported crystal along the transverse cutting planes of the crystal in order to obtain wafers of nitride of element (13), each wafer including a front face having a non-zero truncation angle in the vicinity of the centre of the front face.

Abstract: A silicon carbide ingot includes an end surface and an end surface opposite to the end surface. In the silicon carbide ingot, the end surface and the end surface face each other in a growth direction, and a gradient of a nitrogen concentration in the growth direction is not less than 1×1016 cm?4 and not more than 1×1018 cm?4.

Abstract: Provides is a C-plane GaN substrate which, although formed from a GaN crystal grown so that surface pits are generated, is free from any inversion domain, and moreover, has a low spiral dislocation density in a gallium polar surface. Provides is a C-plane GaN substrate wherein: the substrate comprises a plurality of facet growth areas each having a closed ring outline-shape on a gallium polar surface; the spiral dislocation density is less than 1×106 cm?2 anywhere on the gallium polar surface; and the substrate is free from any inversion domain. The C-plane GaN substrate may comprise a high dislocation density part having a dislocation density of more than 1×107 cm?2 and a low dislocation density part having a dislocation density of less than 1×106 cm?2 on the gallium polar surface.

Abstract: When FZ single crystal silicon is produced from polycrystalline silicon, which is synthesized by the Siemens method followed by being subjected to thermal treatment and includes crystal grains having a Miller index plane <111> or <220> as a principal plane and grown by the thermal treatment, and in which the X-ray diffraction intensity from either of the Miller index planes <111> and <220> after the thermal treatment is 1.5 times or less the X-ray diffraction intensity before the thermal treatment, as raw material, disappearance of crystal lines in the step of forming an FZ single crystal is markedly prevented.

Abstract: The present disclosure relates to a structure and method for reducing dangling bonds around quantum dots in a memory cell. In some embodiments, the structure has a semiconductor substrate having a tunnel dielectric layer disposed over it and a plurality of quantum dots disposed over the tunnel dielectric layer. A passivation layer is formed conformally over outer surfaces of the quantum dots and a top dielectric layer is disposed conformally around the passivation layer. The passivation layer can be formed prior to forming the top dielectric layer over the quantum dots or after forming the top dielectric layer. The passivation layer reduces the dangling bonds at an interface between the quantum dots and the top dielectric layer, thereby preventing trap sites that may hinder operations of the memory cell.

Abstract: The present invention provides a method of producing polycrystalline silicon in which silicon is precipitated on a silicon core wire to obtain a polycrystalline silicon rod. In an initial stage (former step) of a precipitation reaction, a reaction rate is not increased by supplying a large amount of source gas to a reactor but the reaction rate is increased by increasing a concentration of the source gas to be supplied, and in a latter step after the former step, the probability of occurrence of popcorn is reduced using an effect of high-speed forced convection caused by blowing the source gas into the reactor at high speed. Thus, a high-purity polycrystalline silicon rod with little popcorn can be produced without reducing production efficiency even in a reaction system with high pressure, high load, and high speed.

Abstract: An epitaxial structure includes a patterned epitaxial growth surface defining a plurality of grooves. A graphene layer covers the patterned epitaxial growth surface. An epitaxial layer is formed on the patterned epitaxial growth surface, wherein a first part of the graphene layer is sandwiched between the substrate, and a second part of the graphene layer is embedded into the epitaxial layer.

Abstract: A method for forming carbon nanotubes includes preparing a target object having a surface on which one or more openings are formed, each of the openings having a catalyst metal layer on a bottom thereof; performing an oxygen plasma process on the catalyst metal layers; and activating the surfaces of the catalyst metal layers by performing a hydrogen plasma process on the metal catalyst layers subjected to the oxygen plasma process. The method further includes filling carbon nanotubes in the openings on the target object by providing an electrode member having a plurality of through holes above the target object in a processing chamber, and then growing the carbon nanotubes by plasma CVD on the activated catalyst metal layer by diffusing active species in a plasma generated above the electrode member toward the target object through the through holes while applying a DC voltage to the electrode member.

Abstract: A method of determining a temperature in a deposition reactor includes the steps of depositing a first epitaxial layer of silicon germanium on a substrate, depositing a second epitaxial layer of silicon above the first epitaxial layer, measuring the thickness of the second epitaxial layer and determining the temperature in the deposition reactor using the measured thickness of the second epitaxial layer. The method may also include heating the deposition reactor to approximately a predetermined temperature using a heating device and a temperature measuring device and generating a signal indicative of a temperature within the deposition reactor. The method may also contain the steps of comparing the measured thickness with a predetermined thickness of the second epitaxial layer corresponding to the predetermined temperature and determining the temperature in the deposition reactor using the measured thickness of the second epitaxial layer and the predetermined thickness of the second epitaxial layer.

Abstract: A GaN nanorod and formation method. Formation includes providing a substrate having a GaN film, depositing SiNx on the GaN film, etching a growth opening through the SiNx and into the GaN film, growing a GaN nanorod through the growth opening, the nanorod having a nanopore running substantially through its centerline. Focused ion beam etching can be used. The growing can be done using organometallic vapor phase epitaxy. The nanopore diameter can be controlled using the growth opening diameter or the growing step duration. The GaN nanorods can be removed from the substrate. The SiNx layer can be removed after the growing step. A SiOx template can be formed on the GaN film and the GaN can be grown to cover the SiOx template before depositing SiNx on the GaN film. The SiOx template can be removed after growing the nanorods.

Abstract: A method for making an epitaxial structure is provided. The method includes the following steps. A substrate is provided. The substrate has an epitaxial growth surface for growing epitaxial layer. A carbon nanotube layer is placed on the epitaxial growth surface. An epitaxial layer is epitaxially grown on the epitaxial growth surface. The carbon nanotube layer is removed. The carbon nanotube layer can be removed by heating.

Abstract: An aluminum nitride single crystal in the form of polygonal columns, the polygonal columns having the following properties [a] to [c]: [a] the content of a metal impurity is below a detection limit, [b] the average bottom area is from 5×103 to 2×105 ?m2, and [c] the average height is 50 ?m to 5 mm. The above aluminum nitride single crystal is preferably obtainable in a method including the steps of sublimating an aluminum nitride starting material (A) containing 0.1 to 30% by mass of a rare earth oxide by heating the starting material at a temperature of not lower than 2000° C., depositing aluminum nitride on a hexagonal single crystal substrate and thereby growing aluminum nitride single crystal in the shape of polygonal columns.

Abstract: A method for forming wires, including providing catalytic seed particles suspended in a gas, providing gaseous precursors that comprise constituents of the wires to be formed and growing the wires from the catalytic seed particles. The wires may be grown in a temperature range between 425 and 525 C and may have a pure zincblende structure. The wires may be III-V semiconductor nanowires having a Group V terminated surface and a <111>B crystal growth direction.

Abstract: The invention provides a process for producing polycrystalline silicon, including introduction of a reaction gas containing a silicon-containing component and hydrogen by means of one or more nozzles into a reactor including at least one heated filament rod on which silicon is deposited, wherein an Archimedes number Arn which describes flow conditions in the reactor, as a function of the fill level FL which states the ratio of one rod volume to one empty reactor volume in percent, for a fill level FL of up to 5% is within the range limited at the lower end by the function Ar=2000×FL?0.6 and at the upper end by the function Ar=17 000×FL?0.9, and at a fill level of greater than 5% is within a range from at least 750 to at most 4000.

Abstract: Pillared particles of silicon or silicon-comprising material and a method of fabricating the same are disclosed. These particles may be used to create both a composite anode structure with a polymer binder, a conductive additive and a metal foil current collector, and an electrode structure. The structure of the particles overcomes the problems of charge/discharge capacity loss.

Abstract: A method for making silicon nanorods is provided. In accordance with the method, Au nanocrystals are reacted with a silane in a liquid medium to form nanorods, wherein each of said nanorods has an average diameter within the range of about 1.2 nm to about 10 nm and has a length within the range of about 1 nm to about 100 nm.

Abstract: Growth of GaP and III-V GaP alloys in the wurtzite crystal structure by vapor phase epitaxy (VPE) is provided. Such material has a direct band gap and is therefore much more useful for optoelectronic devices than conventional GaP and GaP alloys having the zincblende crystal structure and having an indirect band gap.

Abstract: An apparatus for fabricating an ingot includes a crucible for receiving a raw material, wherein the raw material has a shape extending in one direction.

Abstract: A manufacturing method for three-dimensional GaN epitaxial structure comprises a disposing step, in which a substrate of LiAlO2 and a source metal of Ga are disposed inside an vacuum chamber. An exposing step is importing N ions in plasma state and generated by a nitrogen source into the chamber. A heating step is heating up the source metal to generate Ga vapor. A growing step is forming a three-dimensional GaN epitaxial structure with hexagonal micropyramid or hexagonal rod having a broadened disk-like surface on the substrate by reaction between the Ga vapor and the plasma state of N ions.

Abstract: Heterogeneous nanowires having a core-shell structure consisting of single-crystal apatite as the core and graphitic layers as the shell and a synthesis method thereof are provided. More specifically, provided is a method capable of producing large amounts of heterogeneous nanowires, composed of graphitic shells and apatite cores, in a reproducible manner, by preparing a substrate including an element corresponding to X of X5(YO4)3Z is a chemical formula for apatite, adding to the substrate a gaseous source containing an element corresponding to Y of the chemical formula, adding thereto a gaseous carbon source, and allowing these reactants to react under optimized synthesis conditions using chemical vapor deposition (CVD), and to a method capable of freely controlling the structure and size of the heterogeneous nanowires and also to heterogeneous nanowires synthesized thereby.

Abstract: An object of the present invention is to provide more inexpensive high purity crystalline silicon which can satisfy not only a quality required to a raw material of silicon for a solar cell but also a part of a quality required to silicon for an up-to-date semiconductor and a production process for the same and provide high purity silicon tetrachloride used for production of high purity crystalline silicon and a production process for the same. The high purity crystalline silicon of the present invention has a boron content of 0.015 ppmw or less and a zinc content of 50 to 1000 ppbw. The production process for high purity crystalline silicon according to the present invention is characterized by that a silicon tetrachloride gas and a zinc gas are supplied to a vertical reactor to react them at 800 to 1200° C.

Abstract: Heterogeneous nanowires having a core-shell structure consisting of single-crystal apatite as the core and graphitic layers as the shell and a synthesis method thereof are provided. More specifically, provided is a method capable of producing large amounts of heterogeneous nanowires, composed of graphitic shells and apatite cores, in a reproducible manner, by preparing a substrate including an element corresponding to X of X6(YO4)3Z which is a chemical formula for apatite, adding to the substrate a gaseous source containing an element corresponding to Y of the chemical formula, adding thereto a gaseous carbon source, and allowing these reactants to react under optimized synthesis conditions using chemical vapor deposition (CVD), and to a method capable of freely controlling the structure and size of the heterogeneous nanowires and also to heterogeneous nanowires synthesized thereby.

Abstract: Engineered defects are reproduced in-situ with graphene via a combination of surface manipulation and epitaxial reproduction. A substrate surface that is lattice-matched to graphene is manipulated to create one or more non-planar features in the hexagonal crystal lattice. These non-planar features strain and asymmetrically distort the hexagonal crystal lattice of epitaxially deposited graphene to reproduce “in-situ” engineered defects with the graphene. These defects may be defects in the classic sense such as Stone-Wales defect pairs or blisters, ridges, ribbons and metacrystals. Nano or micron-scale structures such as planar waveguides, resonant cavities or electronic devices may be constructed from linear or closed arrays of these defects. Substrate manipulation and epitaxial reproduction allows for precise control of the number, density, arrangement and type of defects. The graphene may be removed and template reused to replicate the graphene and engineered defects.

Abstract: A method for making zinc oxide nano-structure, the method includes the following steps. Firstly, providing a growing device, the growing device comprising a heating apparatus and a reacting room. Secondly, providing a growing substrate and forming a metal layer thereon. Thirdly, depositing a catalyst layer on the metal layer. Fourthly, placing the growing substrate into the reacting room together with a quantity of zinc source material. Fifthly, introducing a oxygen-containing gas into the reacting room. Lastly, heating the reacting room to a temperature range of 500˜1100° C.

Abstract: Methods, devices, and compositions of matter related to high efficiency InGaN-based photovoltaic devices. The disclosed synthesis of semiconductor heterostructures may be exploited to produce higher efficiency, longer lasting, photovoltaic cells.

Abstract: A method of synthesizing a nanowire. The method includes disposing a first oxide layer including germanium (Ge) on a substrate, forming a second oxide layer including a nucleus by annealing the first oxide layer, and growing a nanowire including Ge from the nucleus by a chemical vapor deposition (“CVD”) method.

Abstract: An optical nanoantenna includes a single-crystalline silver (Ag) nanowire. The single-crystalline silver nanowire is configured to output an optical antenna radiation pattern based on incident lights. The optical antenna radiation pattern includes multilobe radiation patterns, and each multilobe radiation pattern has a plurality of lobes that are radially disposed centered on the single-crystalline silver nanowire. The incident lights are visible lights in entire visible wavelength bands. Accordingly, the optical nanoantenna according to example embodiments operates at multiple resonances in the full visible range.

Abstract: The present invention provides a method and a system for forming wires (1) that enables a large scale process combined with a high structural complexity and material quality comparable to wires formed using substrate-based synthesis. The wires (1) are grown from catalytic seed particles (2) suspended in a gas within a reactor. Due to a modular approach wires (1) of different configuration can be formed in a continuous process. In-situ analysis to monitor and/or to sort particles and/or wires formed enables efficient process control.

Abstract: Disclosed is a fabrication method of a metal nanoplate using metal, metal halide or a mixture thereof as a precursor. The single crystalline metal nanoplate is fabricated on a single crystalline substrate by performing heat treatment on a precursor including metal, metal halide or a mixture thereof and placed at a front portion of a reactor and the single crystalline substrate placed at a rear portion of the reactor under an inert gas flowing condition. A noble metal nanoplate of several micrometers in size can be fabricated using a vapor-phase transport process without any catalyst. The fabricated nanoplate is a single crystalline metal nanoplate having high crystallinity, high purity and not having a two-dimensional defect. Morphology and orientation of the metal nanoplate with respect to the substrate can be controlled by controlling a surface direction of the single crystalline substrate. The metal nanoplate of several micrometer size is mass-producible.

Abstract: The present invention relates to an electrode composed of carbon having at least two different zones, wherein an outer zone (A) forms the base of the electrode and carries one or more inner zones, wherein the innermost zone (B) projects from the zone (A) at the top and has a lower specific thermal conductivity than zone (A).

Abstract: Heterogeneous nanowires having a core-shell structure consisting of single-crystal apatite as the core and graphitic layers as the shell and a synthesis method thereof are provided. More specifically, provided is a method capable of producing large amounts of heterogeneous nanowires, composed of graphitic shells and apatite cores, in a reproducible manner, by preparing a substrate including an element corresponding to X of X6(YO4)3Z which is a chemical formula for apatite, adding to the substrate a gaseous source containing an element corresponding to Y of the chemical formula, adding thereto a gaseous carbon source, and allowing these reactants to react under optimized synthesis conditions using chemical vapor deposition (CVD), and to a method capable of freely controlling the structure and size of the heterogeneous nanowires and also to heterogeneous nanowires synthesized thereby.

Abstract: One provides nanocrystalline diamond material that comprises a plurality of substantially ordered diamond crystallites that are sized no larger than about 10 nanometers. One then disposes a non-diamond component within the nanocrystalline diamond material. By one approach this non-diamond component comprises an electrical conductor that is formed at the grain boundaries that separate the diamond crystallites from one another. The resultant nanowire is then able to exhibit a desired increase with respect to its ability to conduct electricity while also preserving the thermal conductivity behavior of the nanocrystalline diamond material.

Abstract: Methods for growing a three-dimensional nanorod network in three-dimensional growth spaces, including highly confined spaces, are provided. The methods are derived from atomic layer deposition (ALD) processes, but use higher temperatures and extended pulsing and/or purging times. Through these methods, networks of nanorods can be grown uniformly along the entire inner surfaces of confined growth spaces.

Abstract: Direct resistive heating is used to grow nanotubes out of carbon and other materials. A growth-initiated array of nanotubes is provided using a CVD or ion implantation process. These processes use indirect heating to heat the catalysts to initiate growth. Once growth is initiated, an electrical source is connected between the substrate and a plate above the nanotubes to source electrical current through and resistively heat the nanotubes and their catalysts. A material source supplies the heated catalysts with carbon or another material to continue growth of the array of nanotubes. Once direct heating has commenced, the source of indirect heating can be removed or at least reduced. Because direct resistive heating is more efficient than indirect heating the total power consumption is reduced significantly.

Abstract: A method of evaluating damage of a compound semiconductor member, comprising: a step of performing measurement of photoluminescence on a surface of the compound semiconductor member; and a step of evaluating damage on the surface of the compound semiconductor member, using a half width of a peak at a wavelength corresponding to a bandgap of the compound semiconductor member, in an emission spectrum obtained by the measurement of photoluminescence.

Abstract: A method for locally controlling the stoichiometry of an epitaxially deposited layer on a semiconductor substrate is provided. The method includes directing a first reactant gas and a doping gas across a top surface of a semiconductor substrate and directing a drive gas and a second reactant gas against the substrate separately from the first reactant gas in a manner that rotates the substrate while introducing the second reactant gas at an edge of the substrate to control each reactant separately, thereby compensating and controlling depletion effects and improving doping uniformity in resulting epitaxial layers on the substrate.

Abstract: A method of manufacturing a group III-nitride crystal substrate including the steps of introducing an alkali-metal-element-containing substance, a group III-element-containing substance and a nitrogen-element-containing substance into a reactor, forming a melt containing at least the alkali metal element, the group III-element and the nitrogen element in the reactor, and growing group III-nitride crystal from the melt, and characterized by handling the alkali-metal-element-containing substance in a drying container in which moisture concentration is controlled to at most 1.0 ppm at least in the step of introducing the alkali-metal-element-containing substance into the reactor is provided. A group III-nitride crystal substrate attaining a small absorption coefficient and the method of manufacturing the same, as well as a group III-nitride semiconductor device can thus be provided.

Abstract: A precursor chiral nanotube with a specified chirality is grown using an epitaxial process and then cloned. A substrate is provided of crystal material having sheet lattice properties complementary to the lattice properties of the selected material for the nanotube. A cylindrical surface(s) having a diameter of 1 to 100 nanometers are formed as a void in the substrate or as crystal material projecting from the substrate with an orientation with respect to the axes of the crystal substrate corresponding to the selected chirality. A monocrystalline film of the selected material is epitaxially grown on the cylindrical surface that takes on the sheet lattice properties and orientation of the crystal substrate to form a precursor chiral nanotube. A catalytic particle is placed on the precursor chiral nanotube and atoms of the selected material are dissolved into the catalytic particle to clone a chiral nanotube from the precursor chiral nanotube.

Abstract: A seed crystal is immersed in a melt containing a flux and a single crystal material in a growth vessel to produce a nitride single crystal on the seed crystal. A difference (TS-TB) of temperatures at a gas-liquid interface of the melt (TS) and at the lowermost part of the melt (TB) is set to 1° C. or larger and 8° C. or lower. Preferably, the substrate of seed crystal is vertically placed.

Abstract: Provided is a single-crystalline CoxGe1-x nanowire having x of at least 0.01 to less than 0.99, a germanium cobalt nanowire structure having a vertical alignment to the substrate and provided in the cathode of the electric field display and a method of fabricating them using the gas-phase transfer method. By providing the nanowire which uses the graphene or the highly ordered pyrolytic graphite as the substrate and has a vertical alignment to the substrate and uniform size and high density, it is possible to use the germanium cobalt nanowire as a field emission emitter and uses the substrate having the germanium cobalt nanowire formed as a cathode transparent electrode of the field emission display.

Abstract: A nanodevice including a nanorod and a method for manufacturing the same is provided. The nanodevice according to an embodiment of the present invention includes i) a substrate; ii) at least one crystal that is located on the substrate and includes a plurality of side surfaces forming an angle with each other; and iii) at least one nanorod that is located on the crystal and extends along a direction that is substantially perpendicular to a surface of the substrate.

Abstract: A method of fabricating a plurality of freestanding GaN wafers includes mounting a GaN substrate in a reactor, forming a GaN crystal growth layer on the GaN substrate through crystal growth, performing surface processing of the GaN crystal growth layer to form a GaN porous layer having a predetermined thickness on the GaN crystal growth layer, repeating the forming of the GaN crystal growth layer and the forming of the GaN porous layer a plurality of times to form a stack of alternating GaN crystal growth layers and GaN porous layers on the GaN substrate, and cooling the stack such that the GaN layers self-separate to form the freestanding GaN wafers. The entire process of forming a GaN porous layer and a thick GaN layer is performed in-situ in a single reactor. The method is very simplified compared to the prior art. In this way, the entire process is performed in one chamber, and in particular, GaN surface processing and growth proceed using an HVPE process gas such that costs are greatly reduced.

Abstract: A system (10) for monitoring and controlling a fabrication process includes at least a first subsystem (12), a crystallographic analysis subsystem (14), and a second subsystem (16), wherein the first subsystem and second subsystem perform respective fabrication steps on a workpiece. The crystallographic analysis subsystem may be coupled to both the first subsystem and second subsystem. The analysis subsystem acquires crystallographic information from the workpiece after the workpiece undergoes a fabrication step by the first subsystem and then provides information, based on the crystallographic information acquired, for modifying parameters associated with the respective fabrication steps. The system may also include neural networks (24, 28) to adaptively modify, based on historical process data (32), parameters provided to the respective fabrication steps. The analysis subsystem may include a electromagnetic source (61), a detector (66), a processor (67), a controller (68) and a scanning actuator (65).

Abstract: In the production process of the present invention for high purity polycrystal silicon, using a vertical reactor having a silicon chloride gas-feeding nozzle and a reducing agent gas-feeding nozzle which are disposed at an upper part and a waste gas discharge pipe, a silicon chloride gas and a reducing agent gas are fed into the reactor to form polycrystal silicon at a tip part of the silicon chloride gas-feeding nozzle by the reaction of the silicon chloride gas with the reducing agent gas, and the polycrystal silicon is allowed to grow from the tip part of the silicon chloride gas-feeding nozzle toward a lower part thereof.

Abstract: A boule formed by high rate vapor phase growth of Group III-V nitride boules (ingots) on native nitride seeds, from which wafers may be derived for fabrication of microelectronic device structures. The boule is of microelectronic device quality, e.g., having a transverse dimension greater than 1 centimeter, a length greater than 1 millimeter, and a top surface defect density of less than 107 defects cm?2. The Group III-V nitride boule may be formed by growing a Group III-V nitride material on a corresponding native Group III-V nitride seed crystal by vapor phase epitaxy at a growth rate above 20 micrometers per hour. Nuclear transmutation doping may be applied to an (Al,Ga,In)N article comprises a boule, wafer, or epitaxial layer.

Abstract: A method for creating a nanostructure according to one embodiment includes depositing material in a template for forming an array of nanocables; removing only a portion of the template such that the template forms an insulating layer between the nanocables; and forming at least one layer over the nanocables. A nanostructure according to one embodiment includes a nanocable having a roughened outer surface and a solid core. A nanostructure according to one embodiment includes an array of nanocables each having a roughened outer surface and a solid core, the roughened outer surface including reflective cavities; and at least one layer formed over the roughened outer surfaces of the nanocables, the at least one layer creating a photovoltaically active p-n junction. Additional systems and methods are also presented.

Abstract: An article having a biaxially textured substrate surface and a plurality of vertically-aligned, epitaxial nanopillars supported on the surface substrate is disclosed. The article can include a matrix phase deposited on the biaxially textured surface and between the plurality of vertically-aligned, epitaxial nanopillars. The nanopillars can include a coating. The matrix phase and the vertically-aligned, epitaxial nanopillars can form an electronically active layer selected from the group consisting of a superconducting material, a ferroelectric material, a multiferroic material, a magnetic material, a photovoltaic material, a electrical storage material, and a semiconductor material. A method of making the article is also disclosed.

Abstract: A method of forming a nanostructure having the form of a tree, comprises a first stage and a second stage. The first stage includes providing one or more catalytic particles on a substrate surface, and growing a first nanowhisker via each catalytic particle. The second stage includes providing, on the periphery of each first nanowhisker, one or more second catalytic particles, and growing, from each second catalytic particle, a second nanowhisker extending transversely from the periphery of the respective first nanowhisker. Further stages may be included to grow one or more further nanowhiskers extending from the nanowhisker(s) of the preceding stage. Heterostructures may be created within the nanowhiskers. Such nanostructures may form the components of a solar cell array or a light emitting flat panel, where the nanowhiskers are formed of a photosensitive material.

Abstract: There is provided a group III nitride crystal growth method capable of obtaining a material which is a GaN substrate of low defect density capable of being used as a power semiconductor substrate and in which characteristics of n-type and p-type requested for formation of transistor or the like. A growth method of group III nitride crystals includes: forming a mixed melt containing at least group III element and a flux formed of at least one selected from the group consisting of-alkaline metal and alkaline earth metal, in a reaction vessel; and growing group III nitride crystals from the mixed melt and a substance containing at least nitrogen, wherein after immersing a plurality of seed crystal substrates placed in an upper part of the reaction vessel in which the mixed melt is formed, into the mixed melt to cause crystal growth, the plurality of seed crystal substrates are pulled up above the mixed melt.