Separating From Substrate Patents (Class 117/915)
  • Patent number: 7488385
    Abstract: The invention concerns the preparation of gallium nitride films by epitaxy with reduced defect density levels. It concerns a method for producing a gallium nitride (GaN) film by epitaxial deposition of GaN. The invention is characterized in that it comprises at least a step of epitaxial lateral overgrowth and in that it comprises a step which consists in separating part of the GaN layer from its substrate by embrittlement through direct ion implantation in the GaN substrate. The invention also concerns the films obtainable by said method as well as the optoelectronic and electronic components provided with said gallium nitride films.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: February 10, 2009
    Assignee: Lumilog
    Inventors: Hacène Lahreche, Gilles Nataf, Bernard Beaumont
  • Patent number: 7479188
    Abstract: A process for producing an inexpensive large high-quality GaN substrate which comprises forming a MgO buffer layer on a high-quality substrate, generating a ZnO layer on the MgO buffer layer while performing polarity control, growing a GaN layer on the ZnO layer while performing polarity control, and melting the ZnO layer, thereby producing a GaN substrate.
    Type: Grant
    Filed: March 19, 2004
    Date of Patent: January 20, 2009
    Assignee: Tohoku Techno Arch Co., Ltd.
    Inventors: Takafumi Yao, Takuma Suzuki, Hang-ju Ko, Agus Setiawan
  • Patent number: 7468103
    Abstract: Disclosed herein is a method of manufacturing a gallium nitride-based (AlxInyGa(1?x?y)N, where 0?x?1, 0?y?1, 0?x+y?1) single crystal substrate. The method comprises the steps of preparing a ZnO substrate, primarily growing a gallium nitride-based single crystal layer, and secondarily growing an additional gallium nitride-based single crystal layer on the primarily grown gallium nitride-based single crystal layer while removing the ZnO substrate by etching the underside of the ZnO substrate.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: December 23, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Soo Min Lee, Hun Joo Hahm, Young Ho Park
  • Patent number: 7351906
    Abstract: It is often the case that a substrate suitable for epitaxial growth does not match a substrate desirable for the use in functional elements such as thermoelectric conversion elements or the like. The present invention makes it possible to separate a predetermined layered structure formed on a substrate therefrom through an action of water vapor. A method of manufacturing a crystalline film of the present invention includes the steps of: epitaxially growing on a substrate a crystalline film including a layered structure so that the layered structure comes into contact with the substrate; contacting water vapor supplied from a water vapor source with the layered structure in a chamber; and separating the layered structure that has been contacted with the water vapor from the substrate to obtain the crystalline film. The layered structure has a layer containing an alkali metal, and a layer containing an oxide of at least one element selected from the group consisting of Co, Fe, Ni, Mn, Ti, Cr, V, Nb, and Mo.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: April 1, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoshi Yotsuhashi, Hideaki Adachi, Yasunari Sugita, Tsutomu Kanno
  • Patent number: 7332031
    Abstract: A single crystal M*N article, which may be made by a process including the steps of: providing a substrate of material having a crystalline surface which is epitaxially compatible with M*N; depositing a layer of single crystal M*N over the surface of the substrate; and removing the substrate from the layer of single crystal M*N, e.g., with an etching agent which is applied to the substrate to remove same, to yield the layer of single crystal M*N as said single crystal M*N article. The bulk single crystal M*N article is suitable for use as a substrate for the fabrication of microelectronic structures thereon, to produce microelectronic devices comprising bulk single crystal M*N substrates, or precursor structures thereof.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: February 19, 2008
    Assignee: Cree, Inc.
    Inventors: Michael A. Tischler, Thomas F. Kuech, Robert P. Vaudo
  • Patent number: 7297209
    Abstract: A method of forming an anisotropic crystal film, comprising providing a donor which comprises a base and an anisotropic crystal film bounded to the base, and a receptor. At least a portion of the anisotropic crystal film is placed in contact with the receptor. A loading is applied to at least a portion of the base, whereby providing shear and compressive stresses onto the donor and receptor, and transferring at least a portion of the anisotropic crystal film onto the receptor and delaminating the at least portion of the anisotropic crystal film from the base.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: November 20, 2007
    Assignee: Nitto Denko Corporation
    Inventors: Pavel I. Lazarev, Michael V. Paukshto
  • Patent number: 7261777
    Abstract: A method for fabricating an epitaxial substrate. The technique includes providing a crystalline or mono-crystalline base substrate, implanting atomic species into a front face of the base substrate to a controlled mean implantation depth to form a zone of weakness within the base substrate that defines a sub-layer, and growing a stiffening layer on a front face of the base substrate by using a thermal treatment in a first temperature range. The stiffening layer has a thickness sufficient to form an epitaxial substrate. In addition, the method includes detaching the stiffening layer and the sub-layer from the base substrate by using a thermal treatment in a second temperature range higher than the first temperature range. An epitaxial substrate and a remainder of the base substrate are obtained. The epitaxial substrate is suitable for use in growing high quality homoepitaxial or heteroepitaxial films thereon.
    Type: Grant
    Filed: June 1, 2004
    Date of Patent: August 28, 2007
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventor: Bruce Faure
  • Patent number: 7232488
    Abstract: The present invention relates to a method of fabrication of a substrate for an epitaxial growth. A relaxed epitaxial base layer is obtained on an auxiliary substrate. The invention allows the fabrication of substrates with a more efficient epitaxial growth of a material with a desired lattice parameter on another material with a different lattice parameter. The material can be grown with a high thermodynamic and crystallographic stability. At least a part of the epitaxial base layer is transferred onto a carrier substrate, forming a base substrate, and growing the material of the epitaxial base layer is further grown on the carrier substrate.
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: June 19, 2007
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Takeshi Akatsu, Cecile Aulnette, Bruno Ghyselen
  • Patent number: 7226509
    Abstract: A method for fabricating a carrier substrate. The technique includes providing a crystalline or mono-crystalline base substrate, growing a stiffening layer on a front face of the base substrate at a thickness sufficient to form a carrier substrate for subsequent processing, and detaching the stiffening layer from the base substrate to obtain the carrier substrate and a remainder of the base substrate. The carrier substrate is suitable for use in growing high quality homo-epitaxial or hetero-epitaxial films thereon.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: June 5, 2007
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventor: Bruce Faure
  • Patent number: 6972051
    Abstract: A single crystal M*N article, which may be made by a process including the steps of: providing a substrate of material having a crystalline surface which is epitaxially compatible with M*N; depositing a layer of single crystal M*N over the surface of the substrate; and removing the substrate from the layer of single crystal M*N, e.g., with an etching agent which is applied to the substrate to remove same, to yield the layer of single crystal M*N as said single crystal M*N article. The bulk single crystal M*N article is suitable for use as a substrate for the fabrication of microelectronic structures thereon, to produce microelectronic devices comprising bulk single crystal M*N substrates, or precursor structures thereof.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: December 6, 2005
    Assignee: Cree, Inc.
    Inventors: Michael A. Tischler, Thomas F. Kuech, Robert P. Vaudo
  • Patent number: 6958093
    Abstract: A method of forming a free-standing (Al, Ga, In)N article, by the steps including: providing an expitaxially compatible sacrificial template; depositing single crystal (Al, Ga, In)N material on the template to form a composite sacrificial template/(Al, Ga, In)N article including an interface between the sacrificial template and the (Al, Ga, In)N material; and interfacially modifying the composite sacrificial template/(Al, Ga, In)N article to part the sacrificial template from the (Al, Ga, In)N material and yield the free-standing (Al, Ga, In)N article. The free-standing (Al, Ga, In)N article produced by such method is of superior morphological character, and suitable for use as a substrate, e.g., for fabrication of microelectronic and/or optoelectronic devices and device precursor structures.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: October 25, 2005
    Assignee: Cree, Inc.
    Inventors: Robert P. Vaudo, George R. Brandes, Michael A. Tischler, Michael K. Kelly
  • Patent number: 6923859
    Abstract: Disclosed are an apparatus for manufacturing GaN substrate and a manufacturing method thereof enabling to prevent micro-cracks or bending of a GaN substrate by separating a substrate and a GaN layer from each other after growing the GaN layer on the substrate in the same chamber. The present invention includes a chamber for loading a substrate therein, a heating means heating the chamber, a Ga boat installed inside the chamber to receive a Ga molecule producing material, an injection pipe injecting a nitrogen molecule producing gas in the chamber, the nitrogen molecule producing gas reacting chemically on the Ga molecule producing material to form a GaN layer on the substrate, and a transparent window at a circumference of the chamber to apply a laser beam to the substrate.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: August 2, 2005
    Assignee: LG Electronics Inc.
    Inventor: Chin Kyo Kim
  • Patent number: 6824610
    Abstract: A metal film is deposited on a starting substrate, which is any one of a single crystal sapphire substrate, a substrate comprising a single crystal gallium nitride film grown on a sapphire substrate, and a single crystal semiconductor substrate, and a gallium nitride film is deposited on the metal film to form a laminate substrate. By virtue of the above construction, after the growth of the gallium nitride film, the gallium nitride film can be easily separated from the starting substrate, and a gallium nitride crystal substrate, which has low defect density and has not been significantly contaminated with impurities, can be produced in a simple manner.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: November 30, 2004
    Assignees: NEC Corporation, Hitachi Cable Ltd.
    Inventors: Masatomo Shibata, Naotaka Kuroda
  • Patent number: 6689211
    Abstract: A SiGe monocrystalline etch-stop material system on a monocrystalline silicon substrate. The etch-stop material system can vary in exact composition, but is a doped or undoped Si1−xGex alloy with x generally between 0.2 and 0.5. Across its thickness, the etch-stop material itself is uniform in composition. The etch stop is used for micromachining by aqueous anisotropic etchants of silicon such as potassium hydroxide, sodium hydroxide, lithium hydroxide, ethylenediamine/pyrocatechol/pyrazine (EDP), TMAH, and hydrazine. These solutions generally etch any silicon containing less than 7×1019 cm−3 of boron or undoped Si1−xGex alloys with x less than approximately 18. Alloying silicon with moderate concentrations of germanium leads to excellent etch selectivities, i.e., differences in etch rate versus pure undoped silicon. This is attributed to the change in energy band structure by the addition of germanium.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: February 10, 2004
    Assignee: Massachusetts Institute of Technology
    Inventors: Kenneth C. Wu, Eugene A. Fitzgerald, Jeffrey T. Borenstein, Gianna Taraschi
  • Patent number: 6677249
    Abstract: A method for removing layers or layer systems from a substrate and subsequent application onto an alternative substrate. A porous breakaway layer is formed by anodization in hydrofluoric acid. Optionally, a stabilizing layer with lower porosity is previously produced on top of the breakaway layer. The oxide of the porous breakaway layer or the stabilizing layer is removed by brief contact with HF, and an epitaxial layer is applied on the porous breakaway layer or the stabilizing layer. The epitaxial layer or the layer system is then removed from the substrate, and the epitaxial layer or the layer system is applied onto an alternative substrate. Optionally, the stabilizing layer and/or residues of the breakaway layer are removed from the epitaxial layer.
    Type: Grant
    Filed: January 27, 1999
    Date of Patent: January 13, 2004
    Assignee: Robert Bosch GmbH
    Inventors: Franz Laermer, Wilhelm Frey, Hans Artmann
  • Patent number: 6673149
    Abstract: A method for the production of a crack-free epitiaxial film having a thickness greater than that which can be achieved by continuous epitaxial crystal growth. This epitaxial film can be used as is in a device, used as a substrate platform for further epitaxy, or separated from the initial substrate material and used as a free-standing substrate platform. The method utilizes a defect-rich initial layer that absorbs epitaxially derived stresses and another layer, which is not defect-rich, which planarizes the crystal growth front, if necessary and provides high quality epitaxial region near the surface.
    Type: Grant
    Filed: September 6, 2000
    Date of Patent: January 6, 2004
    Assignees: Matsushita Electric Industrial Co., LTD, CBL Technologies, Inc.
    Inventors: Glenn S. Solomon, David J. Miller, Tetsuzo Ueda
  • Patent number: 6666943
    Abstract: A device is formed by transferring a film onto a substrate when the film requires but the substrate is not adapted to a high temperature heat treatment process. The film having layers and formed on a first substrate having layers is transferred onto a second substrate having layers. The method of transferring the film comprises a first step of forming a lift-off layer and the film to be transferred on the first substrate, a second step of bonding the film to be transferred to the second substrate and a third step of separating the film to be transferred from the first substrate by etching the lift-off layer and transferring it onto the second substrate.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: December 23, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takatsugu Wada, Hidetoshi Nojiri, Masatake Akaike, Takehiko Kawasaki, Rei Kurashima, Satoshi Nozu, Kozo Hokayama
  • Patent number: 6666916
    Abstract: A mandrel for use in a diamond deposition process has surfaces with different diamond adhesion properties. According to one embodiment, a mandrel is provided and has first and second surfaces on which a diamond film is deposited, with the second surface forming a perimeter around the first surface. The first surface of the mandrel has a first diamond bonding strength which is less than a second diamond bonding strength of the second surface. In an embodiment for forming a cup-shaped diamond film, the mandrel is a titanium nitride (TiN) coated molybdenum (Mo) substrate having a stepped solid cylindrical shape with a central mesa having a side wall or flank. The side wall is etched near the top surface of the mesa to expose a molybdenum band and to form a second surface which bounds the TiN first surface.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: December 23, 2003
    Assignee: Saint-Gobain/Norton Industrial Ceramics Corporation
    Inventors: Randy D. Fellbaum, Volker R. Ulbrich
  • Patent number: 6652648
    Abstract: A method for fabricating a gallium nitride single crystal substrate is provided. The method involves: forming a GaN layer on the front side of a sapphire substrate; heating the sapphire substrate at a temperature of 600-1,000° C.; and separating the GaN layer from the sapphire substrate by radiating a laser onto the back side of the sapphire substrate. Before or after forming the GaN layer on the front side of the sapphire substrate, a silicon oxide layer may be formed on the back side of the sapphire substrate. In this case, the silicon oxide layer is removed from the back side of the sapphire substrate in a subsequent process. A high-quality GaN substrate having no crack is attained by the method.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: November 25, 2003
    Assignee: Samsung Corning Co., Ltd.
    Inventor: Sung-soo Park
  • Patent number: 6649494
    Abstract: A protector film is formed on the surface of a substrate to cover at least the side surface thereof. Then, a compound semiconductor film including nitrogen is grown through epitaxial growth on the substrate at an exposed portion. Then, the substrate and the compound semiconductor film are separated from each other by irradiation of laser light, polishing of the substrate, etching, cutting, etc. Consequently, the resulting compound semiconductor film is used as a free-standing wafer.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: November 18, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoshi Tamura, Masahiro Ogawa, Masahiro Ishida, Masaaki Yuri
  • Patent number: 6641662
    Abstract: A method for fabricating ultra-thin single-crystal metal oxide wave retarder plates, such as a zeroth-order X-cut single-crystal LiNbO3 half-wave plate, comprises ion implanting a bulk birefringent metal oxide crystal at normal incidence through a planar major surface thereof to form a damage layer at a predetermined distance d below the planar major surface, and detaching a single-crystal wave retarder plate from the bulk crystal by either chemically etching away the damage layer or by subjecting the bulk crystal having the damage layer to a rapid temperature increase to effect thermally induced snap-off detachment of the wave retarder plate. The detached wave retarder plate has a predetermined thickness d dependent on the ion implantation energy.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: November 4, 2003
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: Antonije M. Radojevic, Richard M. Osgood, Jr., Miguel Levy
  • Patent number: 6562127
    Abstract: A method for making an array of thin single-crystal substrates on a handle substrate comprising the steps: attaching a plurality of single-crystal substrates to a face of a support wafer; polishing said plurality of attached single-crystal substrates so that said single-crystal substrates surfaces are coplanar on said support surface and to a selected surface roughness; implanting a hydrogen to a selected depth into said attached single-crystal substrates; bonding said polished and hydrogen implanted attached single-crystal substrates to a first handle substrate; and splitting said polished and hydrogen implanted attached single-crystal substrates at said selected depth thereby forming an array of thin single-crystal substrates on said first handle substrate and a support wafer having a remaining portion of said attached single-crystal substrates.
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: May 13, 2003
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Francis Kud, Karl Hobart, Mike Spencer
  • Patent number: 6558802
    Abstract: A hybrid silicon-on-silicon substrate. A thin film (2101) of single-crystal silicon is bonded to a target wafer (46). A high-quality bond is formed between the thin film and the target wafer during a high-temperature annealing process. It is believed that the high-temperature annealing process forms covalent bonds between the layers at the interface (2305). The resulting hybrid wafer is suitable for use in integrated circuit manufacturing processes, similar to wafers with an epitaxial layer.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: May 6, 2003
    Assignee: Silicon Genesis Corporation
    Inventors: Francois J. Henley, Nathan W. Cheung
  • Patent number: 6544431
    Abstract: A method of forming thin film waveguide regions in lithium niobate uses an ion implant process to create an etch stop at a predetermined distance below the lithium niobate surface. Subsequent to the ion implantation, a heat treatment process is used to modify the etch rate of the implanted layer to be in the range of about 20 times slower than the bulk lithium niobate material. A conventional etch process (such as a wet chemical etch) can then be used to remove the virgin substrate material and will naturally stop when the implanted material is reached. By driving the ions only a shallow distance into the substrate, a backside etch can be used to remove most of the lithium niobate material and thus form an extremely thin film waveguide that is defined by the depth of the ion implant. Other structural features (e.g., ridge waveguides) may also be formed using this method.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: April 8, 2003
    Assignee: TriQuint Technology Holding Co.
    Inventors: Douglas M. Gill, Dale Conrad Jacobson
  • Patent number: 6540827
    Abstract: A method is provided for detaching a single-crystal film from an epilayer/substrate or bulk crystal structure. The method includes the steps of implanting ions into the crystal structure to form a damage layer within the crystal structure at an implantation depth below a top surface of the crystal structure, and chemically etching the damage layer to effect detachment the single-crystal film from the crystal structure. The thin film may be detached by subjecting the crystal structure with the ion implanted damage layer to a rapid temperature increase without chemical etching. The method of the present invention is especially useful for detaching single-crystal metal oxide films from metal oxide crystal structures. Methods for enhancing the crystal slicing etch-rate are also disclosed.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: April 1, 2003
    Assignee: Trustees of Columbia University in the City of New York
    Inventors: Miguel Levy, Richard M. Osgood, Jr., Antonije M. Radojevic
  • Patent number: 6521041
    Abstract: A SiGe monocrystalline etch-stop material system on a monocrystalline silicon substrate. The etch-stop material system can vary in exact composition, but is a doped or undoped Si1−xGex alloy with x generally between 0.2 and 0.5. Across its thickness, the etch-stop material itself is uniform in composition. The etch stop is used for micromachining by aqueous anisotropic etchants of silicon such as potassium hydroxide, sodium hydroxide, lithium hydroxide, ethylenediamine/pyrocatechol/pyrazine (EDP), TMAH, and hydrazine. For example, a cantilever can be made of this etch-stop material system, then released from its substrate and surrounding material, i.e., “micromachined”, by exposure to one of these etchants. These solutions generally etch any silicon containing less than 7×1019 cm−3 of boron or undoped Si1−xGex alloys with x less than approximately 18. Alloying silicon with moderate concentrations of germanium leads to excellent etch selectivities, i.e.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: February 18, 2003
    Assignee: Massachusetts Institute of Technology
    Inventors: Kenneth C. Wu, Eugene A. Fitzgerald, Jeffrey T. Borenstein
  • Patent number: 6503321
    Abstract: A method is provided for detaching a single-crystal film from an epilayer/substrate or bulk crystal structure. The method includes the steps of implanting ions into the crystal structure to form a damage layer within the crystal structure at an implantation depth below a top surface of the crystal structure, and chemically etching the damage layer to effect detachment the single-crystal film from the crystal structure. The thin film may be detached by subjecting the crystal structure with the ion implanted damage layer to a rapid temperature increase without chemical etching. The method of the present invention is especially useful for detaching single-crystal metal oxide films from metal oxide crystal structures. Methods for enhancing the crystal slicing etch-rate are also disclosed.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: January 7, 2003
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: Miguel Levy, Richard M. Osgood, Jr., Antonije M. Radojevic
  • Patent number: 6497763
    Abstract: A method for making a multilayered electronic device with at least one epitaxial layer grown on a single-crystal film bonded to a composite wherein at least one layer is polycrystalline, the method includes the step of bonding a single-crystal film at least one of the epitaxial layers on the single-crystal film wherein thermal coefficients of expansion for the substrate and the epitaxial layer are closely matched.
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: December 24, 2002
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Karl D. Hobart
  • Patent number: 6375738
    Abstract: A process of producing a semiconductor article is disclosed which comprises the steps of epitaxially growing on at least one surface of a single-crystal substrate a plurality of single-crystal semiconductor layers differing from each other in at least one of the kind and the concentration of an impurity, making porous the plurality of single-crystal semiconductor layers so as to form a high porosity layer and a low porosity layer, forming a non-porous single-crystal layer on a surface of the single-crystal semiconductor layer as made porous, and bonding and single-crystal substrate and a support substrate to each other, wherein the bonded single-crystal substrate and support substrate are separated at at least one of a location in the high porosity layer and an interface of the high porosity layer with a layer adjacent thereto.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: April 23, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventor: Nobuhiko Sato
  • Patent number: 6331208
    Abstract: A crystal silicon substrate is anodized to form a porous layer thereon, and a thin-film crystal is grown by epitaxial growth on the porous layer. Openings extending from the surface of the grown crystal and reaching the porous layer are provided by applying laser beams, and the porous layer is selectively etched through the openings to separate the thin-film crystal from the substrate. The thin-film crystal separated is transferred to another supporting substrate to form a solar cell. Also, porous silicon layers serving as separation layers are formed on a substrate silicon wafer on both sides, and thin-film semiconductor (thin-film single-crystal silicon) layers are formed by epitaxial growth on both porous silicon layers. Then, through openings are made in the thin-film single-crystal silicon layers. Thereafter, the porous silicon layers are removed by wet etching carried out through the openings to separate two thin-film single-crystal silicon layers simultaneously from the wafer.
    Type: Grant
    Filed: May 13, 1999
    Date of Patent: December 18, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shoji Nishida, Takao Yonehara, Kiyofumi Sakaguchi, Masaaki Iwane
  • Patent number: 6328796
    Abstract: A method for making a multilayered structure with a single crystal film bonded to a polycrystalline substrate has the steps of: bonding a single crystal film to a polycrystalline substrate; and growing an epitaxial layer on said single crystal film bonded to said polycrystalline substrate.
    Type: Grant
    Filed: February 1, 1999
    Date of Patent: December 11, 2001
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Karl D. Hobart
  • Patent number: 6280523
    Abstract: Light emitting devices having a vertical optical path, e.g. a vertical cavity surface emitting laser or a resonant cavity light emitting or detecting device, having high quality mirrors may be achieved using wafer bonding or metallic soldering techniques. The light emitting region interposes one or two reflector stacks containing dielectric distributed Bragg reflectors (DBRs). The dielectric DBRs may be deposited or attached to the light emitting device. A host substrate of GaP, GaAs, InP, or Si is attached to one of the dielectric DBRs. Electrical contacts are added to the light emitting device.
    Type: Grant
    Filed: February 5, 1999
    Date of Patent: August 28, 2001
    Assignee: LumiLeds Lighting, U.S., LLC
    Inventors: Carrie Carter Coman, Fred A. Kish, Jr., R. Scott Kern, Michael R. Krames, Paul S. Martin
  • Publication number: 20010003269
    Abstract: A SiGe monocrystalline etch-stop material system on a monocrystalline silicon substrate. The etch-stop material system can vary in exact composition, but is a doped or undoped Si1−xGex alloy with x generally between 0.2 and 0.5. Across its thickness, the etch-stop material itself is uniform in composition. The etch stop is used for micromachining by aqueous anisotropic etchants of silicon such as potassium hydroxide, sodium hydroxide, lithium hydroxide, ethylenediamine/pyrocatechol/pyrazine (EDP), TMAH, and hydrazine. For example, a cantilever can be made of this etch-stop material system, then released from its substrate and surrounding material, i.e., “micromachined”, by exposure to one of these etchants. These solutions generally etch any silicon containing less than 7×1019 cm−3 of boron or undoped Si1−xGex alloys with x less than approximately 18. Alloying silicon with moderate concentrations of germanium leads to excellent etch selectivities, i.e.
    Type: Application
    Filed: April 9, 1999
    Publication date: June 14, 2001
    Inventors: KENNETH C. WU, EUGENE A. FITZGERALD, JEFFREY T. BORENSTEIN
  • Patent number: 6238482
    Abstract: A method of making a wafer is provided. A first semiconductor film is formed onto a semiconductor substrate. An epitaxial film is formed onto an epitaxial wafer. The epitaxial wafer is placed with the epitaxial film on the first semiconductor film. The epitaxial film is debonded from the EPI wafer. The epitaxial film is bonded to the first semiconductor film.
    Type: Grant
    Filed: February 26, 1999
    Date of Patent: May 29, 2001
    Assignee: Intel Corporation
    Inventors: Brian S. Doyle, Kramadhati V. Ravi
  • Patent number: 6176925
    Abstract: An n-doped, high quality gallium nitride substrate suitable for further device or epitaxial processing, and method for making the same. The nitride substrate is produced by epitaxial deposition of first metal nitride layer on a non-native substrate followed by a second deposition of metal nitride. During the second deposition of metal nitride, a liquid metal layer is formed at the interface of the non-native substrate and the metal nitride layer form. The formed metal nitride layer may be detached from the non-native substrate to provide an metal nitride substrate with a high quality inverse surface. A epitaxial metal nitride layer may be deposited on the inverse surface of metal nitride substrate. The metal nitride substrate and the epitaxial metal nitride layer thereon may be deposited using the same hydride vapor-phase epitaxy system.
    Type: Grant
    Filed: May 7, 1999
    Date of Patent: January 23, 2001
    Assignees: CBL Technologies, Inc., Matsushita Electronics Corporation
    Inventors: Glenn S. Solomon, David J. Miller, Tetsuzo Ueda
  • Patent number: 6150239
    Abstract: A method for transferring of monocrystalline, thin layers from a first monocrystalline substrate onto a second substrate, with a reduced requirement with respect to the hydrogen dose needed for layer splitting is realized by co-implantation of hydrogen-trap inducing ions with hydrogen ions, by the high temperature implantation of hydrogen, and by their combination, followed by a heat-treatment to weaken the connection between the implanted layer and the rest of the first substrate, then forming a strong bond between the implanted first substrate and the second substrate and finally using another heat-treatment in order to split the monocrystalline thin layer from the rest of the first substrate by the formation, and growth of hydrogen filled microcracks.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: November 21, 2000
    Assignee: Max Planck Society
    Inventors: Ulrich M. Goesele, Qin-Yi Tong
  • Patent number: 6146457
    Abstract: A method for producing thick, high quality GaN substrates uses an epitaxially deposited film is used as a substrate material for further device or epitaxial processing. The film is deposited using an epitaxial technique on a thin substrate called the disposable substrate. The deposited film is thick enough so that upon cooling the thermal mismatched strain is relieved through cracking of the lower disposable substrate and not the newly deposited epitaxy. The epitaxial film now becomes a platform for either further epitaxial deposition or device processing.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: November 14, 2000
    Assignee: CBL Technologies, Inc.
    Inventor: Glenn S. Solomon
  • Patent number: 6120597
    Abstract: A method is provided for detaching a single-crystal film from an epilayer/substrate or bulk crystal structure. The method includes the steps of implanting ions into the crystal structure to form a damage layer within the crystal structure at an implantation depth below a top surface of the crystal structure, and chemically etching the damage layer to effect detachment the single-crystal film from the crystal structure. The method of the present invention is especially useful for detaching single-crystal metal oxide films from metal oxide crystal structures.
    Type: Grant
    Filed: February 17, 1998
    Date of Patent: September 19, 2000
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: Miguel Levy, Richard M. Osgood, Jr.
  • Patent number: 6110279
    Abstract: A (111) cubic silicon carbide single-crystal layer is formed on a (111) silicon wafer, and then the silicon wafer is removed. Thus prepared (111) cubic silicon carbide single-crystal layer is disposed in a graphite crucible to function as a seed crystal. Silicon carbide source material powder is also held in the graphite crucible and sublimated in an atmosphere including inert gas, while controlling a temperature of the (111) cubic silicon carbide single-crystal layer to be lower than a temperature of the silicon carbide source material powder. As a result, a (0001) .alpha.-type silicon carbide single-crystal layer can be formed on the (111) cubic silicon carbide single-crystal layer with a large diameter and high quality at low cost.
    Type: Grant
    Filed: March 30, 1998
    Date of Patent: August 29, 2000
    Assignee: Denso Corporation
    Inventors: Yasuo Kito, Youichi Kotanshi, Shoichi Onda, Tatuyuki Hanazawa, Eiji Kitaoka
  • Patent number: 6080240
    Abstract: Crystal of sublimable material is recovered by introducing a reaction gas containing sublimable material into a vertical recovery chamber kept at a temperature near a depositing temperature of the sublimable material to form a crystal deposit of the sublimable material on a surface of a wall of the chamber, and cooling the wall formed with the crystal deposit to a temperature below the previous temperature to cause a contraction difference between the crystal deposit and the wall formed with the crystal deposit, and break away the deposited crystal from the wall.
    Type: Grant
    Filed: April 6, 1998
    Date of Patent: June 27, 2000
    Assignee: Nippon Shokubai Co., Ltd.
    Inventors: Hiroshi Uchida, Hideki Sogabe, Teruaki Yabuuchi
  • Patent number: 5919305
    Abstract: A concept and process is disclosed by which an epitaxially deposited film is removed from its substrate at elevated temperatures to inhibit thermal mismatch strain induced defect generation in the epitaxial layer. The process occurs by gas phase reactions of an intermediate layer purposely deposited to react with a component in the gas stream during or after epitaxial growth. While the concept of an intermediate layer has been used extensively to improve the crystal quality of the epitaxial layer this is not the purpose of this interlayer. Although this interlayer may aid in nucleation of the epitaxial layer, the objective is to separate the epitaxial material on top of the interlayer from the substrate below the interlayer at or near the growth temperature to reduce the effects of the thermal mismatch between the substrate and epitaxial layers. An application is an addition to the above invention. A thick epitaxially deposited film can now be removed from its substrate at elevated temperatures.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: July 6, 1999
    Assignee: CBL Technologies, Inc.
    Inventor: Glenn S. Solomon
  • Patent number: 5877070
    Abstract: A method for transferring of monocrystalline, thin layers from a first monocrystalline substrate onto a second substrate, which may have a substantially different coefficient of thermal expansion than the first substrate is realized by producing hydrogen-traps in the first substrate by a first implantation and then implanting hydrogen followed by a heat-treatment to weaken the connection between the implanted layer and the rest of the first substrate, then forming a strong bond between the implanted first substrate and the second substrate and finally using another heat-treatment in order to split the monocrystalline thin layer from the rest of the first substrate by the formation, growth and overlapping of hydrogen filled microcracks.
    Type: Grant
    Filed: May 31, 1997
    Date of Patent: March 2, 1999
    Assignee: Max-Planck Society
    Inventors: Ulrich M. Goesele, Q.-Y. Tong
  • Patent number: 5846844
    Abstract: A nitrogen-group III compound semiconductor satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0 and x=y=0, and a method for producing the same comprising the steps of forming a zinc oxide (ZnO) intermediate layer on a sapphire substrate, forming a nitrogen-group III semiconductor layer satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0 and x=y=0 on the intermediate ZnO layer, and separating the intermediate ZnO layer by wet etching with an etching liquid only for the ZnO layer.
    Type: Grant
    Filed: February 7, 1996
    Date of Patent: December 8, 1998
    Assignees: Toyoda Gosei Co., Ltd., Isamu Akasaki, Hiroshi Amano, Kazumasa Hiramatsu
    Inventors: Isamu Akasaki, Hiroshi Amano, Kazumasa Hiramatsu, Theeradetch Detchprohm
  • Patent number: 5833748
    Abstract: A process and an apparatus for obtaining unfissured crystals of GaAs after the crystal has been formed by direction solidification from a melt in a quartz crucible. The quartz crucible is immersed in molten potassium hydroxide or sodium hydroxide at a temperature of 450.degree. to 600.degree. C.
    Type: Grant
    Filed: October 29, 1996
    Date of Patent: November 10, 1998
    Assignee: Forschungszentrum Julich GmbH
    Inventors: Martin Althaus, Eckhard Kussel, Klaus Sonnenberg
  • Patent number: 5792254
    Abstract: Diamond film is deposited by chemical vapor deposition on the surface of a graphite mandrel which is covered with a protective coating to which the diamond film adheres. After completion of the deposition, the diamond is removed from the mandrel by sawing through the substrate to saw off a layer thereof which includes the deposition surface and the diamond film. The graphite and protective coating may be left in place for some applications or be removed either chemically or by mechanical abrasion to separate the diamond therefrom.
    Type: Grant
    Filed: June 12, 1996
    Date of Patent: August 11, 1998
    Assignee: Saint-Gobain/Norton Industrial Ceramics Corp.
    Inventor: Henry Windischmann
  • Patent number: 5710057
    Abstract: A first region of a seed substrate is separated from a bonded handle substrate by etching and/or fracturing a second region of the seed substrate. A third region of the seed substrate remains bonded to the handle wafer. Etching and etch ant distribution are facilitated by capillary action in trenches formed in the seed substrate prior to bonding of the handle substrate. A portion of the second region may be removed by undercut etching prior to handle bonding. Elevated pressure and etchant composition are used to suppress bubble formation during etching. Alternatively, pressure from bubble formation is used to fracture a portion of the second region. First, second, and third regions are defined by a variety of methods.
    Type: Grant
    Filed: July 12, 1996
    Date of Patent: January 20, 1998
    Inventor: Donald M. Kenney
  • Patent number: 5653803
    Abstract: One or a plurality of silicon growth layers are formed on both sides of a silicon base substrate wafer and the product is then divided, with the dividing plane in said silicon base substrate wafer parallel to the main surface, into two pieces to obtain two substrates used for manufacturing silicon semiconductor elements. Said dividing-in-half process is a process in which said silicon base substrate wafer portion is cut along a plane parallel to the main surface, or a process which includes said cutting process followed by a process of treating the cut-surface. Said process which cuts the silicon base substrate wafer portion is a process in which the wafers are cut one by one, or cut after a plurality of them are laminated.
    Type: Grant
    Filed: March 1, 1995
    Date of Patent: August 5, 1997
    Assignee: Shin-Etsu Handotai Co. Ltd.
    Inventor: Tatsuo Ito
  • Patent number: 5641381
    Abstract: The present invention is directed toward a method of removing epitaxial substrates from host substrates. A sacrificial release layer of ternary material is placed on the substrate. A layer of InP is then placed on the ternary material. Afterward a layer of wax is applied to the InP layer to apply compressive force and an etchant material is used to remove the sacrificial release layer.
    Type: Grant
    Filed: March 27, 1995
    Date of Patent: June 24, 1997
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Sheila G. Bailey, David M. Wilt, Frank L. DeAngelo
  • Patent number: 5620557
    Abstract: A method of manufacturing two sapphireless layers (3a, 3b) at one time made of Group III nitride compound semiconductor satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0, and x=y=0, and a LED (10) utilizing one of the semiconductor layers (3a, 3b) as a substrate (3) includes the steps of forming two zinc oxide (ZnO) intermediate layers (2a, 2b) on each side of a sapphire substrate (1), forming two Group III nitride compound semiconductor layers (3a, 3b) satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0, and x=y=0, each laminated on each of the intermediate ZnO layers (2a, 2b), and separating the intermediate ZnO layers (2a, 2b) from the sapphire substrate (1) by etching with an etching liquid only for the ZnO layers (2a, 2b).
    Type: Grant
    Filed: June 26, 1995
    Date of Patent: April 15, 1997
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Katsuhide Manabe, Masayoshi Koike, Hisaki Kato, Norikatsu Koide, Isamu Akasaki, Hiroshi Amano
  • Patent number: 5527766
    Abstract: Novel structures and methods utilize layered copper oxide release materials to separate oxide films from growth substrates. Generally, the method comprises the steps of: first, forming a layered copper oxide sacrificial release material on a growth substrate, in the preferred embodiment being the high temperature superconductor YBCO grown on a compatible substrate such as LaAlO3, second, forming an oxide film on the layered copper oxide release material, in the preferred embodiment, a ferroelectric, an optical material or a oxide film compatible with further high temperature superconductor growth, such as SrTiO3 or CeO2, and third, etching the layered copper oxide release material so as to separate the oxide film from the growth substrate. Optionally, additional layers may be grown on the oxide film prior to etching.
    Type: Grant
    Filed: December 13, 1993
    Date of Patent: June 18, 1996
    Assignee: Superconductor Technologies, Inc.
    Inventor: Michael M. Eddy