Nitride Containing (e.g., Gan, Cbn) {c30b 29/38} Patents (Class 117/952)
  • Patent number: 7531038
    Abstract: A group-III nitride crystal growth method comprises the steps of: a) preparing a mixed molten liquid of an alkaline material and a substance at least containing a group-III metal; b) causing growth of a group-III nitride crystal from the mixed molten liquid prepared in the step a) and a substance at least containing nitrogen; and c) creating a state in which nitrogen can be introduced into the molten liquid prepared by the step a).
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: May 12, 2009
    Assignee: Ricoh Company, Ltd.
    Inventors: Seiji Sarayama, Hisanori Yamane, Masahiko Shimada, Masafumi Kumano, Hirokazu Iwata, Takashi Araki
  • Patent number: 7501023
    Abstract: A method and apparatus for growing low defect, optically transparent, colorless, crack-free, substantially flat, single crystal Group III nitride epitaxial layers with a thickness of at least 10 microns is provided. These layers can be grown on large area substrates comprised of Si, SiC, sapphire, GaN, AlN, GaAs, AlGaN and others. In one aspect, the crack-free Group III nitride layers are grown using a modified HVPE technique. If desired, the shape and the stress of Group III nitride layers can be controlled, thus allowing concave, convex and flat layers to be controllably grown. After the growth of the Group III nitride layer is complete, the substrate can be removed and the freestanding Group III nitride layer used as a seed for the growth of a boule of Group III nitride material. The boule can be sliced into individual wafers for use in the fabrication of a variety of semiconductor structures (e.g., HEMTs, LEDs, etc.).
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: March 10, 2009
    Assignee: Technologies and Devices, International, Inc.
    Inventors: Vladimir A. Dmitriev, Yuri V. Melnik
  • Patent number: 7488385
    Abstract: The invention concerns the preparation of gallium nitride films by epitaxy with reduced defect density levels. It concerns a method for producing a gallium nitride (GaN) film by epitaxial deposition of GaN. The invention is characterized in that it comprises at least a step of epitaxial lateral overgrowth and in that it comprises a step which consists in separating part of the GaN layer from its substrate by embrittlement through direct ion implantation in the GaN substrate. The invention also concerns the films obtainable by said method as well as the optoelectronic and electronic components provided with said gallium nitride films.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: February 10, 2009
    Assignee: Lumilog
    Inventors: Hacène Lahreche, Gilles Nataf, Bernard Beaumont
  • Patent number: 7482191
    Abstract: A method of forming a highly doped layer of AlGaN, is practiced by first removing contaminants from a MBE machine. Wafers are then outgassed in the machine at very low pressures. A nitride is then formed on the wafer and an AlN layer is grown. The highly doped GaAlN layer is then formed having electron densities beyond 1×1020 cm?3 at Al mole fractions up to 65% are obtained. These levels of doping application of n-type bulk, and n/p tunnel injection to short wavelength UV emitters. Some applications include light emitting diodes having wavelengths between approximately 254 and 290 nm for use in fluorescent light bulbs, hazardous materials detection, water purification and other decontamination environments. Lasers formed using the highly doped layers are useful in high-density storage applications or telecommunications applications. In yet a further embodiment, a transistor is formed utilizing the highly doped layer as a channel.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: January 27, 2009
    Assignee: Cornell Research Foundation, Inc.
    Inventors: William J. Schaff, Jeonghyun Hwang
  • Patent number: 7481881
    Abstract: Affords a method of manufacturing GaN crystal substrate in which enlargement of pit size in the growing of GaN crystal is inhibited to enable GaN crystal substrate with a high substrate-acquisition rate to be produced. The method of manufacturing GaN crystal substrate includes a step of growing GaN crystal (4) by a vapor growth technique onto a growth substrate (1), the GaN-crystal-substrate manufacturing method being characterized in that in the step of growing the GaN crystal (4), pits (6) that define facet planes (5F) are formed in the crystal-growth surface, and being characterized by having the pit-size increase factor of the pits (6) be 20% or less.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: January 27, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Takuji Okahisa
  • Patent number: 7473316
    Abstract: What is described here is a process for the initial growth of nitrogenous semiconductor crystal materials in the form AXBYCZNVMW wherein A, B, C is an element of group II or III, N is nitrogen, M represents an element of group V or VI, and X, Y, Z, W denote the molar fraction of each element of this compound, using a, which are deposited on sapphire, SiC or Si, using various ramp functions permitting a continuous variation of the growth parameters during the initial growth.
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: January 6, 2009
    Assignee: Aixtron AG
    Inventors: Bernd Schottker, Michael Heuken, Holger Jürgensen, Gerd Strauch, Bernd Wachtendorf
  • Patent number: 7445673
    Abstract: Gallium nitride substrates are grown by epitaxial lateral overgrowth using multiple steps. On a masked substrate having openings areas, selective growth produces first triangular stripes in which most of the threading dislocations are bent at 90°. In a second step, growth conditions are changed to increase the lateral growth rate and produce a flat (0001) surface. At this stage the density of dislocations on the surface is <5×107 cm 2. Dislocations are primarily located at the coalescence region between two laterally grown facets pinching off together. To further decrease the dislocation density a second masking step is achieved, with the openings exactly located above the first ones. Threading dislocations (TDs) of the coalescence region do not propagate in the top layer. Therefore the density of dislocations is lowered below <1×107 cm lover the entire surface.
    Type: Grant
    Filed: May 18, 2004
    Date of Patent: November 4, 2008
    Assignee: Lumilog
    Inventors: Bernard Beaumont, Jean-Pierre Faurie, Pierre Gibart
  • Patent number: 7438761
    Abstract: A hydrogen chloride gas and an ammonia gas are introduced with a carrier gas into a reactor in which a substrate and at least an aluminum metallic material through conduits. Then, the hydrogen gas and the ammonia gas are heated by heaters, and thus, a III-V nitride film including at least Al element is epitaxially grown on the substrate by using a Hydride Vapor Phase Epitaxy method. The whole of the reactor is made of an aluminum nitride material which does not suffer from the corrosion of an aluminum chloride gas generated by the reaction of an aluminum metallic material with a hydrogen chloride gas.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: October 21, 2008
    Assignee: NGK Insulators, Ltd.
    Inventors: Tomohiko Shibata, Keiichiro Asai, Mitsuhiro Tanaka
  • Patent number: 7435297
    Abstract: A method for growing Group III nitride materials using a molten halide salt as a solvent to solubilize the Group-III ions and nitride ions that react to form the Group III nitride material. The concentration of at least one of the nitride ion or Group III cation is determined by electrochemical generation of the ions.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: October 14, 2008
    Assignee: Sandia Corporation
    Inventors: Karen E. Waldrip, Jeffrey Y. Tsao, Thomas M. Kerley
  • Patent number: 7422633
    Abstract: The present invention provides a process for forming a bulk monocrystalline gallium-containing nitride, i.e. GaN etc., on the surface of heterogeneous substrate, i.e. SiC etc., comprising the steps of forming a supercritical ammonia solvent containing ion or ions of alkali metals in an autoclave, dissolving a gallium-containing feedstock in the supercritical ammonia solvent to form a supercritical solution in which the feedstock is dissolved, and crystallizing gallium-containing nitride on the face of a seed which contains no element of oxygen and has a lattice constant of 2.8 to 3.6 with respect to ao-axis from the supercritical solution, under a condition of a higher temperature and/or a lower pressure than the temperature and/or the pressure where the gallium-containing feedstock is dissolved in the supercritical solvent. Therefore nitride gallium system compound semiconductor device can be formed on a conductive substrate.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: September 9, 2008
    Assignees: Ammono SP. ZO. O., Nichia Corporation
    Inventors: Robert Dwilinski, Roman Doradzinski, Jerzy Garczynski, Leszek Sierzputowski, Yasuo Kanbara
  • Patent number: 7402206
    Abstract: A method of synthesizing or growing a compound having the general formula Mn+1AXn(16) where M is a transition metal, n is 1, 2, 3 or higher, A is an A-group element and X is carbon, nitrogen or both, which comprises the step of exposing a substrate to gaseous components and/or components vaporized from at least one solid source (13, 14, 15) whereby said components react with each other to produce the Mn+1AXn (16) compound.
    Type: Grant
    Filed: December 2, 2002
    Date of Patent: July 22, 2008
    Assignee: ABB AB
    Inventors: Peter Isberg, Jens-Petter Palmquist, Ulf Jansson, Lars Hultman, Jens Birch, Timo Seppänen
  • Publication number: 20080157090
    Abstract: An epitaxial layer regrowth method and device. A single crystal seed layer is deposited on a support wafer. An exfoliation layer is implanted in the single crystal seed layer. Trenches are etched in a portion of the single crystal seed layer and a portion of the exfoliation layer. The single crystal seed layer, on the support wafer, is bonded to a substrate. The support wafer and the exfoliation layer are removed leaving behind one or more single crystal seeds, generated from the single crystal seed layer, on the substrate. A first epitaxial layer is grown on the substrate from the single crystal seeds and a device layer is grown on the first epitaxial layer. In an alternative embodiment, a single crystal seed layer is deposited on a support wafer comprising an etch stop.
    Type: Application
    Filed: December 28, 2006
    Publication date: July 3, 2008
    Inventors: Darren Brent Thomson, Jeffrey D. Hartman
  • Patent number: 7390581
    Abstract: A III-V nitride, e.g., GaN, substrate including a (0001) surface offcut from the <0001> direction predominantly toward a direction selected from the group consisting of <10-10> and <11-20> directions, at an offcut angle in a range that is from about 0.2 to about 10 degrees, wherein the surface has a RMS roughness measured by 50×50 ?m2 AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm?2. The substrate may be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., of offcut sapphire. The substrate is usefully employed for homoepitaxial deposition in the fabrication of III-V nitride-based microelectronic and opto-electronic devices.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: June 24, 2008
    Assignee: Cree, Inc.
    Inventors: Xueping Xu, Robert P. Vaudo, Jeffrey S. Flynn, George R. Brandes
  • Patent number: 7387679
    Abstract: A method of producing a silicon carbide single crystal has storing a sublimation law material on a first end portion in a reaction container; disposing a seed crystal of a silicon carbide single crystal on a second end portion substantially facing the sublimation law material in the reaction container; and re-crystallizing the sublimated sublimation law material on the seed crystal to grow a silicon carbide single crystal, wherein a sealing portion is provided in the reaction container to grow a silicon carbide single crystal on the seed crystal provided in the sealing portion while preventing the leak of the sublimated sublimation law material from the atmosphere for sublimation.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: June 17, 2008
    Assignee: Bridgestone Corporation
    Inventors: Takayuki Maruyama, Yoshinori Kobayashi, Takuya Monbara
  • Patent number: 7387677
    Abstract: The substrate is used for opto-electric or electrical devices and comprises a layer of nitride grown by means of vapor phase epitaxy growth wherein both main surfaces of the nitride substrate are substantially consisting of non N-polar face and N-polar face respectively and the dislocation density of the substrate is 5×105/cm2 or less. Therefore, the template type substrate has a good dislocation density and a good value of FWHM of the X-ray rocking curve from (0002) plane less than 80, so that the resulting template type substrate is very useful for the epitaxy substrate from gaseous phase such as MOCVD, MBE and HVPE, resulting in possibility of making good opto-electric devices such as Laser Diode and large-output LED and good electric devices such as MOSFET.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: June 17, 2008
    Assignees: AMMONO Sp. z o.o., Nichia Corporation
    Inventors: Robert Dwilinski, Roman Doradzinski, Jerzy Garczynski, Leszek Sierzputowski, Yasuo Kanbara
  • Patent number: 7374618
    Abstract: A GaN substrate 1, a group III nitride semiconductor substrate, is provided with an OF portion 2 for the periphery thereof. The bevel 7 on the periphery of the nitric polarity face 5 side of the GaN substrate 1 is provided throughout the entire periphery of the GaN substrate 1 including the OF portion 2, wherein the beveling angle ?2 of the bevel 7 is given a value in the range over 30° to 60° inclusive.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: May 20, 2008
    Assignee: Hitachi Cable, Ltd.
    Inventor: Takehiro Yoshida
  • Patent number: 7357837
    Abstract: The method of making a GaN single crystal substrate comprises a mask layer forming step of forming on a GaAs substrate 2 a mask layer 8 having a plurality of opening windows 10 disposed separate from each other; and an epitaxial layer growing step of growing on the mask layer 8 an epitaxial layer 12 made of GaN.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: April 15, 2008
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kensaku Motoki, Takuji Okahisa, Naoki Matsumoto
  • Patent number: 7341628
    Abstract: Gallium Nitride layers grown as single crystals by epitaxy such as Hydride Vapor Phase Epitaxy (HVPE) contain large numbers of crystal defects such as hexagonal pits, which limit the yield and performance of opto- and electronic devices. In this method, the Gallium Nitride layer is first coated with an Aluminum layer of approximate thickness of 0.1 microns. Next, Nitrogen is ion implanted through the Aluminum layer so as to occupy mostly the top 0.1 to 0.5 microns of the Gallium Nitride layer. Finally, through a pulsed directed energy beam such as electron or photons, with a fluence of approximately 1 Joule/cm2 the top approximately 0.5 microns are converted to a single crystal with reduced defect density.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: March 11, 2008
    Inventor: Andreas A. Melas
  • Patent number: 7338555
    Abstract: A highly crystalline aluminum nitride multi-layered substrate comprising a single-crystal ?-alumina substrate, an aluminum oxynitride layer and a highly crystalline aluminum nitride film as the outermost layer which are formed in the mentioned order, wherein the aluminum oxynitride layer has a threading dislocation density of 6.3×107/cm2 or less and a crystal orientation expressed by the half-value width of its rocking curve of 4,320 arcsec or less; and a production process thereof.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: March 4, 2008
    Assignees: Tokuyama Corporation, The Circle for the Promotion of Science and Engineering
    Inventors: Hiroyuki Fukuyama, Wataru Nakao, Shinya Kusunoki, Kazuya Takada, Akira Hakomori
  • Patent number: 7332031
    Abstract: A single crystal M*N article, which may be made by a process including the steps of: providing a substrate of material having a crystalline surface which is epitaxially compatible with M*N; depositing a layer of single crystal M*N over the surface of the substrate; and removing the substrate from the layer of single crystal M*N, e.g., with an etching agent which is applied to the substrate to remove same, to yield the layer of single crystal M*N as said single crystal M*N article. The bulk single crystal M*N article is suitable for use as a substrate for the fabrication of microelectronic structures thereon, to produce microelectronic devices comprising bulk single crystal M*N substrates, or precursor structures thereof.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: February 19, 2008
    Assignee: Cree, Inc.
    Inventors: Michael A. Tischler, Thomas F. Kuech, Robert P. Vaudo
  • Patent number: 7323256
    Abstract: Large area, uniformly low dislocation density single crystal III-V nitride material, e.g., gallium nitride having a large area of greater than 15 cm2, a thickness of at least 1 mm, an average dislocation density not exceeding 5E5 cm?2, and a dislocation density standard deviation ratio of less than 25%. Such material can be formed on a substrate by a process including (i) a first phase of growing the III-V nitride material on the substrate under pitted growth conditions, e.g., forming pits over at least 50% of the growth surface of the III-V nitride material, wherein the pit density on the growth surface is at least 102 pits/cm2 of the growth surface, and (ii) a second phase of growing the III-V nitride material under pit-filling conditions.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: January 29, 2008
    Assignee: Cree, Inc.
    Inventors: Xueping Xu, Robert P. Vaudo
  • Patent number: 7323050
    Abstract: A method of producing a lithium-tantalate crystal, wherein at least a first material containing lithium tantalate, lithium niobate or hydrogen storage alloy storing hydrogen that is subjected to a heat treatment at a temperature of T1? that is Curie temperature or higher in a reducing atmosphere is superposed on a single-polarized lithium-tantalate crystal, and then the crystal is subjected to a heat treatment at a temperature of T2? that is lower than Curie temperature in a reducing atmosphere, thereby an electric conductivity of the single-polarized lithium-tantalate crystal is increased. There can be provided a method of producing a lithium-tantalate crystal wherein the surface charge generated by applying a temperature change to the lithium-tantalate crystal can be decayed quickly without accumulating by increasing the electric conductivity, and an effective piezoelectric property is exhibited by maintaining the single polarized structure.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: January 29, 2008
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventor: Yoshiyuki Shiono
  • Patent number: 7309534
    Abstract: The present invention provides a method of manufacturing Group III nitride crystals that are of high quality, are manufactured highly efficiently, and are useful and usable as a substrate that is used in semiconductor manufacturing processes.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: December 18, 2007
    Assignees: Matsushita Electric INdustrial Co., Ltd.
    Inventors: Yasuo Kitaoka, Hisashi Minemoto, Isao Kidoguchi, Takatomo Sasaki, Yusuke Mori, Fumio Kawamura, Masanori Morishita
  • Patent number: 7306675
    Abstract: A method for manufacturing a semiconductor substrate of the present invention includes the steps of: (a) providing a support substrate; (b) epitaxially growing a first semiconductor layer on the support substrate; (c) epitaxially growing a second semiconductor layer on the first semiconductor layer; and (d) forming a semiconductor substrate including the first semiconductor layer and the second semiconductor layer by removing the support substrate, wherein an interatomic distance of atoms of the support substrate to which atoms of the first semiconductor layer attach and an interatomic distance of atoms of the second semiconductor layer have the same magnitude relationship with respect to an interatomic distance of the atoms of the first semiconductor layer in an epitaxial growth plane.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: December 11, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Masaaki Yuri
  • Patent number: 7294200
    Abstract: A method for producing a nitride semiconductor crystal comprising steps (a), (b) and (c), which steps follow in sequence as follows: a step (a) for forming fine crystal particles made of a nitride semiconductor on a substrate; a step (b) for forming a nitride semiconductor island structure having a plurality of facets inclined relative to a surface of the substrate using the fine crystal particles as nuclei; and a step (c) for causing the nitride semiconductor island structure to grow in a direction parallel with a surface of the substrate to merge a plurality of the nitride semiconductor island structures with each other, thereby forming a nitride semiconductor crystal layer having a flat surface; the steps (a)-(c) being continuously conducted in the same growing apparatus.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: November 13, 2007
    Assignee: Hitachi Cable, Ltd.
    Inventors: Hajime Fujikura, Kazuyuki Iizuka
  • Patent number: 7294198
    Abstract: A process for producing single-crystal gallium nitride comprising the steps of performing congruent melting of gallium nitride at a high pressure between 6×104 atm. and 10×104 atm. and at a high temperature between 2,200° C. and 2,500° C. and then slowly cooling the obtained gallium nitride melt at the stated high pressure.
    Type: Grant
    Filed: July 16, 2004
    Date of Patent: November 13, 2007
    Assignee: Japan Atomic Energy Research Institute
    Inventors: Wataru Utsumi, Hiroyuki Saitoh, Katsutoshi Aoki
  • Patent number: 7294199
    Abstract: A method of producing a nitride single crystal includes the step of forming a material transport medium layer containing a compound of rare earth element on a surface of a nitride crystal, and the step of making a seed crystal in contact with the material transport medium layer to grow a nitride single crystal on the seed crystal. The material transport medium layer contains the compound of rare earth element and at least one compound selected from a group of aluminum compound, alkaline earth compound and transition metal compound. With this producing method, a large nitride single crystal having a crystal size of at least 10 mm is obtained.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: November 13, 2007
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Koji Uematsu, Seiji Nakahata
  • Publication number: 20070256630
    Abstract: A crystal growth setup within a physical vapor transport growth furnace system for producing AlN monocrystal boules at high temperatures includes a crucible effective to contain an AlN source material and a growing AlN crystal boule. This crucible has a thin wall thickness in at least that portion housing the growing AlN crystal boule. Other components include a susceptor, in case of an inductive heating, or a heater, in case of a resistive heating, a thermal insulation enclosing the susceptor or heater effective to provide a thermal gradient inside the crucible in the range of 5-100° C./cm and a furnace chamber capable of being operated from a vacuum (<0.1 torr) to a gas pressure of at least 4000 torr through filling or flowing a nitrogen gas or a mixture of nitrogen gas and argon gas. The high temperatures contribute to a high boule growth rate and the thin wall thickness contributes to reduced imparted stress during boule removal.
    Type: Application
    Filed: April 25, 2007
    Publication date: November 8, 2007
    Inventor: Shaoping Wang
  • Patent number: 7256110
    Abstract: A method of growing a crystal (for example, a GaN system compound semiconductor crystal) on a substrate at least includes forming a first crystalline layer (a GaN system buffer layer), forming a second crystalline layer (a GaN system intermediate layer) and forming a third crystalline layer (a GaN system thick film layer). The three crystalline layers are respectively reared on conditions different from one another.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: August 14, 2007
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Shinichi Sasaki, Masashi Nakamura, Kenji Sato
  • Patent number: 7229493
    Abstract: Provided is an excellent p-type nitride type 3-5 group compound semiconductor having escellent electrical properties such as a low contact resistance to an electrode metal, a low ohmic property, etc., by heat-treating a nitride type 3-5 group compound semiconductor doped with p-type dopant in an hydrogen-containing gas atmosphere of a specific concentration.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: June 12, 2007
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Yoshihiko Tsuchida, Yoshinobu Ono
  • Patent number: 7220311
    Abstract: A crystal growth method of a group III nitride includes the steps of forming a melt mixture of an alkali metal and a group III element in a reaction vessel, and growing a crystal of a group III nitride formed of the group III element and nitrogen from the melt mixture in the reaction vessel, wherein the step of growing the crystal of the group III nitride is conducted while controlling an increase rate of degree of supersaturation of a group III nitride component in the melt mixture in a surface region of the melt mixture.
    Type: Grant
    Filed: November 7, 2003
    Date of Patent: May 22, 2007
    Assignee: Ricoh Company, Ltd.
    Inventors: Hirokazu Iwata, Seiji Sarayama
  • Patent number: 7221037
    Abstract: The present invention provides a method of manufacturing a Group III nitride substrate that has less variations in in-plane carrier concentration and includes crystals grown at a high growth rate.
    Type: Grant
    Filed: January 15, 2004
    Date of Patent: May 22, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuo Kitaoka, Hisashi Minemoto, Isao Kidoguchi, Akihiko Ishibashi
  • Patent number: 7220314
    Abstract: A single crystalline aluminum nitride laminated substrate comprising a single crystalline ?-Al2O3 substrate such as a sapphire substrate, an aluminum oxynitride layer formed on the substrate and a single crystalline aluminum nitride film as the outermost layer, wherein the dislocation density in the single crystalline aluminum nitride is 108/cm2 or less. The above single crystalline aluminum nitride laminated substrate is formed by nitriding the substrate by heating in the presence of carbon, nitrogen and carbon monoxide. The above single crystalline aluminum nitride film has a law dislocation density, little lattice mismatching and excellent crystallinity. A Group III element nitride film having excellent luminous efficiency can be formed on this aluminum nitride film. The above laminated substrate is used in a base substrate for a Group III element nitride film, a light emitting device and a surface acoustic wave device.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: May 22, 2007
    Assignee: The Circle for the Promotion of Science and Engineering
    Inventors: Hiroyuki Fukuyama, Kazuhiro Nagata, Wataru Nakao
  • Patent number: 7211337
    Abstract: Provided are a compound semiconductor crystal substrate capable of reducing planar defects such as twins and anti-phase boundaries occurring in epitaxially grown crystals without additional steps beyond epitaxial growth, and a method of manufacturing the same. A compound single crystal substrate, the basal plane of which is a nonpolar face, with said basal plane having a partial surface having polarity (a partial polar surface). Said partial polar surface is a polar portion of higher surface energy than said basal plane.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: May 1, 2007
    Assignee: Hoya Corporation
    Inventors: Hiroyuki Nagasawa, Kuniaki Yagi, Takamitsu Kawahara
  • Patent number: 7198971
    Abstract: The present invention relates to a nitride semiconductor thin film having less defects and a method of growing the same. According to the present invention, the nitride semiconductor thin film with lower defect density can be manufactured by forming grooves on a substrate, sequentially forming a buffer layer and a first nitride semiconductor thin film on a whole surface of the substrate, etching higher defect density regions of the first nitride semiconductor thin film, and then laterally growing a second nitride semiconductor thin film. Thus, a highly crystalline nitride semiconductor thin film can be obtained. Therefore, there are advantages in that high-efficiency, high-power and high-reliability optical devices or electronic devices can be manufactured and high throughput can also be obtained by using the obtained nitride semiconductor thin film.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: April 3, 2007
    Assignee: LG Electronics Inc.
    Inventor: Johngeon Shin
  • Patent number: 7198671
    Abstract: A substrate comprising at least two layers which have different thermal expansion coefficients (TECs) is used for subsequent epitaxial growth of semiconductors. A typical example is an epitaxial growth of III-V Nitride (InGaAlBNAsP alloy semiconductor) on sapphire. Due to the thermal mismatch between III-V Nitrides and sapphire, epitaxially-processed wafers bow in a convex manner during cool down after the growth. A layered substrate compensates for the thermal mismatch between the epitaxial layered the top layer of the substrate, resulting in a flat wafer suitable for subsequent processing at high yields. The layered substrate is achieved by attaching to the back side of the substrate a material which has a lower TEC, for example silicon on the backside of the sapphire, to reduce or eliminate the bowing. Silicon is attached or grown on a sapphire wafer by such as wafer bonding or epitaxial growth.
    Type: Grant
    Filed: July 11, 2001
    Date of Patent: April 3, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tetsuzo Ueda
  • Patent number: 7160388
    Abstract: The present invention refers to an ammonobasic method for preparing a gallium-containing nitride crystal, in which gallium-containing feedstock is crystallized on at least one crystallization seed in the presence of an alkali metal-containing component in a supercritical nitrogen-containing solvent. The method can provide monocrystalline gallium-containing nitride crystals having a very high quality.
    Type: Grant
    Filed: May 17, 2002
    Date of Patent: January 9, 2007
    Assignees: Nichia Corporation, Ammono Sp. z o.o.
    Inventors: Robert Tomasz Dwiliński, Roman Marek Doradziński, Jerzy Garczyński, Leszek Piotr Sierzputowski, Yasuo Kanbara
  • Patent number: 7128786
    Abstract: This invention relates to a method for depositing III-V semiconductor layers on a non III-V substrate especially a sapphire, silicon or silicon oxide substrate, or another substrate containing silicon. According to said method, a III-V layer, especially a buffer layer, is deposited on the substrate or on a III-V germination layer, in a process chamber of a reactor containing gaseous starting materials. In order to reduce the defect density of the overgrowth, a masking layer consisting of essentially amorphous material is deposited directly on the III-V germination layer or directly on the substrate, said masking layer partially covering of approximately partially covering the germination layer. The masking layer can be a quasi-monolayer and can consist of various materials.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: October 31, 2006
    Assignee: Aixtron AG
    Inventors: Holger Jurgensen, Alois Krost, Armin Dadgar
  • Patent number: 7128846
    Abstract: A method including the steps of: modifying at least one part of a sapphire substrate by dry etching to thereby form any one of a dot shape, a stripe shape, a lattice shape, etc. as an island shape on the sapphire substrate; forming an AlN buffer layer on the sapphire substrate; and epitaxially growing a desired Group III nitride compound semiconductor vertically and laterally so that the AlN layer formed on a modified portion of the surface of the sapphire substrate is covered with the desirably Group III nitride compound semiconductor without any gap while the AlN layer formed on a non-modified portion of the surface of the sapphire substrate is used as a seed, wherein the AlN buffer layer is formed by means of reactive sputtering with Al as a target in an nitrogen atmosphere.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: October 31, 2006
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Kazuki Nishijima, Masanobu Senda, Toshiaki Chiyo, Jun Ito, Naoki Shibata, Toshimasa Hayashi
  • Patent number: 7118813
    Abstract: A III–V nitride, e.g., GaN, substrate including a (0001) surface offcut from the <0001> direction predominantly toward a direction selected from the group consisting of <10-10> and <11-20> directions, at an offcut angle in a range that is from about 0.2 to about 10 degrees, wherein the surface has a RMS roughness measured by 50×50 ?m2 AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm?2. The substrate may be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., of offcut sapphire. The substrate is usefully employed for homoepitaxial deposition in the fabrication of III–V nitride-based microelectronic and opto-electronic devices.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: October 10, 2006
    Assignee: Cree, Inc.
    Inventors: Xueping Xu, Robert P. Vaudo, Jeffrey S. Flynn, George R. Brandes
  • Patent number: 7115167
    Abstract: The invention provides a method of growing an (In, Ga)N multiplayer structure by molecular beam epitaxy. Each GaN or InGaN layer in the multilayer structure is grown at a substrate temperature of at least 650° C., and this provides improved material quality. Ammonia gas is used as the source of nitrogen for the growth process. Ammonia and gallium are supplied to the growth chamber at substantially constant rates, and the supply rate of indium to the growth chamber is varied to select the desired composition for the layer being grown. This allows the structure to be grown at a substantially constant growth rate. The substrate temperature is preferably kept constant during the growth process, to avoid the need to interrupt the growth process to vary the substrate temperature between the growth of one layer and the growth of another layer.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: October 3, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Stewart Edward Hooper, Jennifer Mary Barnes, Valerie Bousquet, Jonathan Heffernan
  • Patent number: 7115165
    Abstract: ?-ZrNCl polycrystalline powder prepared by chemical transport method and NH4Cl are mixed in a molar ratio of 1:2. The mixture is encapsulated in a Au capsule (6 mm in inner diameter and 6 mm in depth) of a reaction vessel 2, which is then enclosed in a highly heat-conductivitive sodium chloride block as an electrically insulating pressure medium 6. The mixture held in the sodium chloride block is placed in a carbon tube 8 for serving as a heater. In a cubic-pressing apparatus using a pyrophyllite 12 as a pressure-transmitting medium, the mixture is heated at 900° C. for 2 hours under an applied pressure of 3 GPa. After the mixture is allowed to stand until it is cooled down to room temperature, the Au capsule is taken out and light green ?-ZrNCl single crystals are obtained. A large single crystal among them had a hexagonal plate-like habit and is transparent with dimensions about 2 mm in diameter, and 0.3 mm in thickness.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: October 3, 2006
    Assignee: Japan Science and Technology Corporation
    Inventors: Shoji Yamanaka, Xuean Chen
  • Patent number: 7112243
    Abstract: The present invention provides a method for producing a Group III nitride compound semiconductor, which method permits only minimal reaction of the semiconductor with a hetero-substrate during epitaxial growth and induces no cracks in the Group III nitride compound semiconductor even when the semiconductor is cooled to room temperature. The method includes a buffer layer formation step for forming a gas-etchable buffer layer on the hetero-substrate, and a semiconductor formation step for epitaxially growing the Group III nitride compound semiconductor on the buffer layer through a vapor phase growth method, wherein at least a portion of the buffer layer is gas-etched during or after the semiconductor formation step.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: September 26, 2006
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masayoshi Koike, Shiro Yamazaki
  • Patent number: 7108745
    Abstract: After a Group III-V compound semiconductor layer, to which a p-type dopant has been introduced, has been formed over a substrate, the compound semiconductor layer is annealed. In the stage of heating the compound semiconductor layer, atoms, deactivating the p-type dopant, are eliminated from the compound semiconductor layer by creating a temperature gradient in the compound semiconductor layer.
    Type: Grant
    Filed: April 16, 2003
    Date of Patent: September 19, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshiaki Hasegawa, Ayumu Tsujimura, Isao Kidoguchi, Yuzaburo Ban
  • Patent number: 7097920
    Abstract: To provide a semiconductor substrate of a group III nitride with a little warp, this invention provides a process comprising such steps of: epitaxial-growing a GaN layer 33 with a GaN low temperature grown buffer layer 32 upon a sapphire substrate 31; removing the sapphire substrate 31, the GaN buffer layer 32 and a small portion of the GaN layer 33 from the substrate taken out of a growth reactor to obtain a self-supporting GaN substrate 35; and after that, heat-treating the GaN substrate 35 by putting it into an electric furnace under the NH3 atmosphere at 1200° C. for 24 hours; which leads to a marked reduction of the warp of the self-supporting GaN substrate 35 such that dislocation densities of its obverse and reverse surface are 4×107 cm?2 and 8×105 cm?2, and thereby such a low ratio of dislocation densities of 50 is well-controlled.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: August 29, 2006
    Assignees: NEC Corporation, Hitachi Cable, Ltd.
    Inventors: Akira Usui, Masatomo Shibata, Yuichi Oshima
  • Patent number: 7087112
    Abstract: An apparatus and method for fabricating a mount for an aluminum nitride (AlN) seed for single crystal aluminum nitride growth is provided. A holder having a proximal base and wall portions extending therefrom is fabricated from crystal growth crucible material, and defines an internal cavity. An AlN seed is placed within the holder, and placed within a nitrogen atmosphere at a temperature at or exceeding the melting point of a suitable material capable of forming a nitride ceramic by nitridation, such as aluminum. Pellets fabricated from this material are dropped into the holder and onto the seed, so that they melt and react with the nitrogen atmosphere to form a nitride ceramic. The seed is effectively molded in-situ with the ceramic, so that the ceramic and holder forms a closely conforming holder for the seed, suitable for single crystal AlN growth.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: August 8, 2006
    Assignee: Crystal IS, Inc.
    Inventors: Juan Carlos Rojo, Leo J. Schowalter, Kenneth Morgan, Jan Barani
  • Patent number: 7063741
    Abstract: A method of forming at least one single crystal of a Group III metal nitride. The method includes the steps of: providing a flux material and a source material comprising at least one Group III metal selected from the group consisting of aluminum, indium, and gallium, to a reaction vessel; sealing the reaction vessel; heating the reaction vessel to a predetermined temperature and applying a predetermined pressure to the vessel. The pressure is sufficient to suppress decomposition of the Group III metal nitride at the temperature. Group III metal nitrides, as well as electronic devices having a Group III metal nitride substrate formed by the method are also disclosed.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: June 20, 2006
    Assignee: General Electric Company
    Inventors: Mark Philip D'Evelyn, Steven William Webb, Suresh Shankarappa Vagarali, Yavuz Kadioglu, Dong-Sil Park, Zheng Chen
  • Patent number: 7056383
    Abstract: A crucible is provided that is thermally stable at high temperatures and is suitable for use in the growth of large, bulk AlN, AlxGa1-xN or other nitride single crystals. The crucible is comprised of specially treated tantalum. During the initial treatment, the walls of the crucible are carburized, thus achieving a crucible that can be subjected to high temperatures without deformation. Once the carburization of the tantalum is complete, the crucible undergoes further treatment to protect the surfaces that are expected to come into contact with nitride vapors during crystal growth with a layer of TaN. If the crucible is to be used with a graphite furnace, only the inner surfaces of the crucible are converted to TaN, thus keeping TaC surfaces adjacent to the graphite furnace elements. If the crucible is to be used with a non-graphite furnace, both the inner and outer surfaces of the crucible are converted to TaN.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: June 6, 2006
    Assignee: The Fox Group, Inc.
    Inventors: Heikki I. Helava, Mark G. Ramm
  • Patent number: 7045009
    Abstract: A method for manufacturing a single crystal includes the steps of: flowing a raw material gas toward a seed crystal in a reactive chamber so that the single crystal grows from the seed crystal; controlling the raw material gas by a gas flow control member having a cylindrical shape; passing the raw material gas through a clearance between the seed crystal and an inner wall of the gas flow control member; and flowing a part of the raw material gas to bypass the seed crystal. The method provides the single crystal having good quality.
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: May 16, 2006
    Assignees: Denso Corporation, National Institute of Advanced Industrial Science and Technology
    Inventors: Tomohisa Kato, Shinichi Nishizawa, Fusao Hirose
  • Patent number: RE40718
    Abstract: The inventive method exploits the fact that in solutions or melts which contain certain organic substances, small nitride crystallites consisting of GaN or AlN are formed by thermal reaction and decomposition. A vessel containing the melt is kept at a first temperature T1. In the vessel is a substrate nucleus of be nitride to be formed, which is heated to second temperature T2 through the input of energy, where T2>T1. Epitaxial growth from the melt then takes place on the surface of the substrate nucleus. The energy input can be carried out in different ways.
    Type: Grant
    Filed: February 1, 2000
    Date of Patent: June 9, 2009
    Assignee: Osram Opto Semiconductors GmbH
    Inventor: Volker Härle