Gallium Containing Patents (Class 136/262)
-
Patent number: 10896990Abstract: Device structures, apparatuses, and methods are disclosed for photovoltaic cells that may be a single-junction or multijunction solar cells, with at least a first layer comprising a group-IV semiconductor in which part of the cell comprises a second layer comprising a III-V semiconductor or group-IV semiconductor having a different composition than the group-IV semiconductor of the first layer, such that a heterostructure is formed between the first and second layers.Type: GrantFiled: April 25, 2018Date of Patent: January 19, 2021Assignee: THE BOEING COMPANYInventors: Richard R. King, Christopher M. Fetzer, Nasser H. Karam
-
Patent number: 10861991Abstract: A compound semiconductor solar cell and a method of manufacturing the same are disclosed. The compound semiconductor solar cell includes a compound semiconductor layer, a front electrode positioned on a front surface of the compound semiconductor layer, a back electrode positioned on a back surface of the compound semiconductor layer, a defect portion disposed within the compound semiconductor layer and physically and electrically connected to the back electrode, and an isolation portion surrounding the defect portion.Type: GrantFiled: February 23, 2018Date of Patent: December 8, 2020Assignee: LG ELECTRONICS INC.Inventors: Soohyun Kim, Gunho Kim, Hyun Lee, Wonseok Choi, Younho Heo
-
Patent number: 10749050Abstract: A method for forming a back contact on an absorber layer in a photovoltaic device includes forming a two dimensional material on a first substrate. An absorber layer including Cu—Zn—Sn—S(Se) (CZTSSe) is grown over the first substrate on the two dimensional material. A buffer layer is grown on the absorber layer on a side opposite the two dimensional material. The absorber layer is exfoliated from the two dimensional material to remove the first substrate from a backside of the absorber layer opposite the buffer layer. A back contact is deposited on the absorber layer.Type: GrantFiled: January 9, 2017Date of Patent: August 18, 2020Assignee: International Business Machines CorporationInventors: Richard A. Haight, James B. Hannon, Satoshi Oida
-
Patent number: 10749045Abstract: Peripheral side surface interconnects for interconnecting solar cells are disclosed. The peripheral side surface interconnects include a layer of an electrically conductive adhesive overlying an insulating layer overlying a peripheral side edge of a solar cell and electrically interconnected to a busbar. Photovoltaic modules include adjacent solar cells comprising peripheral side surface interconnects interconnected by the electrically conductive adhesive or by the electrically conductive adhesive and an interconnection element. An interconnection element can be a solder paste or a solder containing electrically conductive ribbon. Methods of forming solar cell peripheral side surface interconnects include applying an insulating layer to a side surface of a solar cell, depositing a busbar in proximity to the insulated side surface of the solar cell, depositing an electrically conductive adhesive over at least a portion of the busbar and over at least a portion of the insulating layer.Type: GrantFiled: April 13, 2020Date of Patent: August 18, 2020Assignee: ZHEJIANG KAIYING NEW MATERIALS CO., LTD.Inventors: Mohamed M. Hilali, Zhiyong Li
-
Patent number: 10749062Abstract: Tandem solar cells comprising two or more solar cells connected in a solar cell stack via pn diode tunnel junctions and methods for fabricating the tandem solar cells using epitaxial lift off and transfer printing are provided. The tandem solar cells have improved tunnel junction structures comprising a current tunneling layer integrated between the p and n layers of the pn diode tunnel junction that connects the solar cells.Type: GrantFiled: January 9, 2018Date of Patent: August 18, 2020Assignee: WISCONSIN ALUMNI RESEARCH FOUNDATIONInventors: Zhenqiang Ma, Kanglin Xiong, Hongyi Mi, Tzu-Hsuan Chang, Shaoqin Gong, Jung-Hun Seo
-
Patent number: 10580928Abstract: A method for thermal exfoliation includes providing a target layer on a substrate to form a structure. A stressor layer is deposited on the target layer. The structure is placed in a temperature controlled environment to induce differential thermal expansion between the target layer and the substrate. The target layer is exfoliated from the substrate when a critical temperature is achieved such that the target layer is separated from the substrate to produce a standalone, thin film device.Type: GrantFiled: August 8, 2017Date of Patent: March 3, 2020Assignees: International Business Machines Corporation, Solar Frontier K.K.Inventors: Oki Gunawan, Homare Hiroi, Jeehwan Kim, David B. Mitzi, Hiroki Sugimoto
-
Patent number: 10446703Abstract: Methods of manufacturing a CIGS thin film for a solar cell are provided. According to the method, a CIGS thin film having an ideal double band gap grade structure with a large particle size may be obtained by heat-treating a solution-treated CIG oxide thin film by a three-step chalcogenization process. Accordingly, performance of the solar cell may be improved.Type: GrantFiled: June 29, 2018Date of Patent: October 15, 2019Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Byoung Koun Min, Gi Soon Park, Hyung Suk Oh, Yun Jeong Hwang
-
Patent number: 10424608Abstract: Methods of fabrication and monolithic integration of a polycrystalline infrared detector structure deposit Group III-V compound semiconductor materials at a low deposition temperature within a range of about 300° C. to about 400° C. directly on an amorphous template. The methods provide wafer-level fabrication of polycrystalline infrared detectors and monolithic integration with a readout integrated circuit wafer for focal plane arrays.Type: GrantFiled: January 31, 2018Date of Patent: September 24, 2019Assignee: HRL Laboratories, LLCInventors: Terence J. DeLyon, Rajesh D. Rajavel, Sevag Terterian, Minh B. Nguyen, Hasan Sharifi
-
Patent number: 10283357Abstract: Chalcogenidometallates of group IIB, IV and V elements and, particularly, alkali metal-containing chalcogenidometallates of cadmium, lead and bismuth are provided. Also provided are methods of using the chalcogenidometallates as molecular solders to form metal chalcogenide structures, including thin films, molded objects and bonded surfaces composed of metal chalcogenides.Type: GrantFiled: December 1, 2015Date of Patent: May 7, 2019Assignee: The University of ChicagoInventors: Dmitriy S. Dolzhnikov, Hao Zhang, Jaeyoung Jang, Jae Sung Son, Matthew G. Panthani, Dmitri V. Talapin
-
Patent number: 10253415Abstract: A process of growth in the thickness of at least one facet of a colloidal inorganic sheet, by sheet is meant a structure having at least one dimension, the thickness, of nanometric size and lateral dimensions great compared to the thickness, typically more than 5 times the thickness. The process allows the deposition of at least one monolayer of atoms on at least one inorganic colloidal sheet, this monolayer being constituted of atoms of the type of those contained or not in the sheet. Homostructured and heterostructured materials resulting from such process as well as the applications of the materials are also described. By homostructured is meant a material of homogeneous composition in the thickness and by heterostructured is meant a material of heterogeneous composition in the thickness.Type: GrantFiled: October 19, 2012Date of Patent: April 9, 2019Assignee: NEXDOTInventor: Benoit Mahler
-
Patent number: 10249808Abstract: This disclosure provides systems, methods, and apparatus related to surface doping of nanostructures. In one aspect a plurality of nanostructures is fabricated with a solution-based process using a solvent. The plurality of nanostructures comprises a semiconductor. Each of the plurality of nanostructures has a surface with capping species attached to the surface. The plurality of nanostructures is mixed in the solvent with a dopant compound that includes doping species. During the mixing the capping species on the surfaces of the plurality of nanostructures are replaced by the doping species. Charge carriers are transferred between the doping species and the plurality of nanostructures.Type: GrantFiled: September 1, 2016Date of Patent: April 2, 2019Assignee: The Regents of the University of CaliforniaInventors: Ayaskanta Sahu, Boris Russ, Jeffrey J. Urban, Nelson E. Coates, Rachel A. Segalman, Jason D. Forster, Miao Liu, Fan Yang, Kristin A. Persson, Christopher Dames
-
Patent number: 10249776Abstract: Discussed is a method of manufacturing a heterojunction solar cell, including: forming a metal compound on a semiconductor substrate; forming a transparent conductive oxide on the metal compound; forming an electrode forming material on the transparent conductive oxide; and sintering the electrode forming material using light sintering to form an electrode part. The transparent conductive oxide may be sintered by light sintering to form a transparent conductive oxide layer formed of the transparent conductive oxide.Type: GrantFiled: December 28, 2017Date of Patent: April 2, 2019Assignee: LG ELECTRONICS INC.Inventors: Hwanyeon Kim, Jeongkyu Kim
-
Patent number: 10236461Abstract: An organic photoelectronic device may include a photoelectronic conversion layer between a first electrode and a second electrode and a buffer layer on the photoelectronic conversion layer. The photoelectronic conversion layer may be between a first electrode and a second electrode, and the buffer layer may be between the first electrode and the photoelectronic conversion layer. The photoelectronic conversion layer may include at least a first light absorbing material and a second light absorbing material configured to provide a p-n junction. The buffer layer may include the first light absorbing material and a non-absorbing material associated with a visible wavelength spectrum of light. The non-absorbing material may have a HOMO energy level of about 5.4 eV to about 5.8 eV. The non-absorbing material may have an energy bandgap of greater than or equal to about 2.8 eV.Type: GrantFiled: November 29, 2016Date of Patent: March 19, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Takkyun Ro, Kyung Bae Park, Ryuichi Satoh, Yong Wan Jin, Chul Joon Heo
-
Patent number: 10227261Abstract: A sintered compact essentially consisting of zinc (Zn), gallium (Ga), silicon (Si) and oxygen (O), wherein a Zn content expressed in terms of ZnO is 5 to 60 mol %, a Ga content expressed in terms of Ga2O3 is 8.5 to 90 mol %, and a Si content expressed in terms of SiO2 is 0 to 45 mol %, and the sintered compact satisfies a condition of A?(B+2C) when the Zn content expressed in terms of ZnO is A (mol %), the Ga content expressed in terms of Ga2O3 is B (mol %), and the Si content expressed in terms of SiO2 is C (mol %), and has a relative density of 90% or higher. An object of this invention is to efficiently obtain an amorphous film having high transmissivity and a low refractive index without having to introduce oxygen into the atmosphere during film deposition by DC sputtering.Type: GrantFiled: February 25, 2016Date of Patent: March 12, 2019Assignee: JX Nippon Mining & Metals CorporationInventors: Atsushi Nara, Hideto Seki
-
Patent number: 10199523Abstract: A surface region of a semiconductor material on a surface of a semiconductor device is doped during its manufacture, by coating the surface region of the semiconductor material with a dielectric material surface layer and locally heating the surface of the semiconductor material in an area to be doped to locally melt the semiconductor material with the melting being performed in the presence of a dopant source. The heating is performed in a controlled manner such that a region of the surface of the semiconductor material in the area to be doped is maintained in a molten state without refreezing for a period of time greater than one microsecond and the dopant from the dopant source is absorbed into the molten semiconductor. The semiconductor device includes a semiconductor material structure in which a junction is formed and may incorporate a multi-layer anti-reflection coating.Type: GrantFiled: June 25, 2015Date of Patent: February 5, 2019Assignees: NEWSOUTH INNOVATIONS PTY LIMITED, SUNTECH POWER INTERNATIONAL LTD.Inventors: Alison Maree Wenham, Ziv Hameiri, Jing Jia Ji, Ly Mai, Zhengrong Shi, Budi Tjahjono, Stuart Ross Wenham
-
Patent number: 10121924Abstract: The invention relates a thin-film solar cell. In the related art, a buffer layer, a transparent electrode, and a grid electrode are formed on a light absorption layer, but in the invention, the buffer layer and the transparent electrode are not formed on a light absorption layer, and the buffer layer, the transparent electrode, and the grid electrode are formed under a CIGS face such that solar light is directly input to the light absorption layer without obstacles, and the first electrode and the buffer layer are patterned in a saw-toothed structure to engage with each other to reduce a distance by which electrons or holes generated by absorbing light energy move to the electrode or the buffer layer.Type: GrantFiled: August 6, 2013Date of Patent: November 6, 2018Assignee: KOREA INSTITUTE OF ENERGY RESEARCHInventors: Young Joo Eo, Ara Cho, Jun Sik Cho, Joo Hyung Park, Kyung Hoon Yoon, Se Jin Ahn, Ji Hye Gwak, Jae Ho Yun, Kee Shik Shin, Seoung Kyu Ahn, Jin Su You, Sang Hyun Park
-
Patent number: 10109758Abstract: A Monolithic photovoltaic cell is proposed. Said cell comprises at least one junction. Each one of said at least one junction comprises a base formed by a doped semiconductor material of a first conductivity type and an emitter formed by a doped semiconductor material of a second conductivity type opposed to the first. Said emitter is stacked on the base according to a first direction. The semiconductor material of the base and/or of the emitter of at least one of said at least one junction is a semiconductor material formed by a compound of at least one first element and a second element. The band gap and the lattice constant of said semiconductor material of the base and/or of the emitter depend on the concentration of said first element in said compound with respect to said second element.Type: GrantFiled: July 28, 2014Date of Patent: October 23, 2018Assignee: CESI—Centro Elettrotecnico Sperimentale Italiano Giacinto Motta S.p.A.Inventors: Roberta Campesato, Gabriele Gori
-
Patent number: 10069021Abstract: In general, the present invention relates to electro-conductive pastes with salt additives with anions consisting of halogen and oxygen, and solar cells with high Ohmic sheet resistance, preferably photovoltaic solar cells. More specifically, the present invention relates to electro-conductive pastes, solar cell precursors, processes for preparation of solar cells, solar cells and solar modules. The present invention relates to an electro-conductive paste at least comprising as paste constituents: a) metallic particles; b) a glass frit; c) an organic vehicle; and d) a salt with an anion comprising an oxygen atom and a halogen atom.Type: GrantFiled: October 10, 2013Date of Patent: September 4, 2018Assignee: HERAEUS DEUTSCHLAND GMBH & CO. KGInventors: Gerd Schulz, Daniel Winfried Holzmann, Sebastian Unkelbach, Matthias Hörtheis
-
Patent number: 10067107Abstract: A metal oxide heterostructure includes mixing a first precursor and a second precursor to form a precursor aqueous mixture, adding at least one constituent to the precursor aqueous mixture to form a first solution, adding a nanostructuring reagent to the first solution to form a second solution, sonochemically treating the second solution to provide a metal oxide powder, filtering, washing, and drying the metal oxide powder to provide a metal oxide nanocomposite heterostructure for a sensing layer of a hydrogen sulfide sensor. A method for forming a hydrogen sulfide sensor includes the metal oxide heterostructure, forming a sensing material, contacting the sensing material with interdigitated electrodes to form a sensing layer, and thermally consolidating the sensing layer to form the hydrogen sulfide sensor.Type: GrantFiled: July 6, 2015Date of Patent: September 4, 2018Assignee: Honeywell Romania s.r.l.Inventors: Cornel P. Cobianu, Viorel Georgel Dumitru, Bogdan-Catalin Serban, Alisa Stratulat, Mihai Brezeanu, Octavian Buiu
-
Patent number: 10026856Abstract: Systems and methods for advanced ultra-high-performance InP solar cells are provided. In one embodiment, an InP photovoltaic device comprises: a p-n junction absorber layer comprising at least one InP layer; a front surface confinement layer; and a back surface confinement layer; wherein either the front surface confinement layer or the back surface confinement layer forms part of a High-Low (HL) doping architecture; and wherein either the front surface confinement layer or the back surface confinement layer forms part of a heterointerface system architecture.Type: GrantFiled: January 26, 2017Date of Patent: July 17, 2018Assignee: Alliance for Sustainable Energy, LLCInventor: Mark Wanlass
-
Patent number: 9997659Abstract: Device structures, apparatuses, and methods are disclosed for photovoltaic cells that may be a single junction or multijunction solar cells, with at least a first layer comprising a group-IV semiconductor in which part of the cell comprises a second layer comprising a III-V semiconductor or group-IV semiconductor having a different composition than the group-IV semiconductor of the first layer, such that a heterostructure is formed between the first and second layers.Type: GrantFiled: September 14, 2012Date of Patent: June 12, 2018Assignee: THE BOEING COMPANYInventors: Richard R. King, Christopher M. Fetzer, Nasser H. Karam
-
Patent number: 9985160Abstract: Device structures, apparatuses, and methods are disclosed for photovoltaic cells that may be a single junction or multijunction solar cells, with at least a first layer comprising a group-IV semiconductor in which part of the cell comprises a second layer comprising a III-V semiconductor or group-IV semiconductor having a different composition than the group-IV semiconductor of the first layer, such that a heterostructure is formed between the first and second layers.Type: GrantFiled: September 14, 2012Date of Patent: May 29, 2018Assignee: THE BOEING COMPANYInventors: Richard R. King, Christopher M. Fetzer, Nasser H. Karam
-
Patent number: 9985146Abstract: A photoelectric conversion device of an embodiment has a substrate, a bottom electrode on the substrate, a light absorbing layer on the bottom electrode, an n-type layer on the light absorbing layer, a transparent electrode on the n-type layer, and an oxide layer on the transparent electrode. nA and nB satisfy the relation 100/110?nB/nA?110/100. nA is the refractive index of the transparent electrode. nB is the refractive index of the oxide layer.Type: GrantFiled: September 17, 2015Date of Patent: May 29, 2018Assignee: Kabushiki Kaisha ToshibaInventors: Hiroki Hiraga, Soichiro Shibasaki, Naoyuki Nakagawa, Mutsuki Yamazaki, Kazushige Yamamoto, Shinya Sakurada, Michihiko Inaba
-
Patent number: 9985152Abstract: An alloy composition for a subcell of a solar cell is provided that has a bandgap of at least 0.9 eV, namely, Ga1-xInxNyAs1-y-zSbz with a low antimony (Sb) content and with enhanced indium (In) content and enhanced nitrogen (N) content, achieving substantial lattice matching to GaAs and Ge substrates and providing both high short circuit currents and high open circuit voltages in GaInNAsSb subcells for multijunction solar cells. The composition ranges for Ga1-xInxNyAs1-y-zSbz are 0.07?x?0.18, 0.025?y?0.04 and 0.001?z?0.03.Type: GrantFiled: December 27, 2016Date of Patent: May 29, 2018Assignee: SOLAR JUNCTION CORPORATIONInventors: Rebecca Elizabeth Jones-Albertus, Homan Bernard Yuen, Ting Liu, Pranob Misra
-
Patent number: 9818898Abstract: A method for producing an intermediate product for obtaining a photovoltaic module comprising a plurality of solar cells, said method comprising the following steps: (a) localized deposition on a substrate (4) of a layer of metal (8) so as to cover at least one portion (401) of the substrate, (b) deposition on this localized layer (8) of a layer (41) of conductive material, said layer coating the localized layer (8).Type: GrantFiled: March 28, 2013Date of Patent: November 14, 2017Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Nicolas Karst, Charles Roger
-
Patent number: 9803136Abstract: Photovoltaic cells incorporating the compounds A/M/X compounds as hole transport materials are provide. The A/M/X compounds comprise one or more A moieties, one or more M atoms and one or more X atoms. The A moieties are selected from organic cations and elements from Group 1 of the periodic table, the M atoms are selected from elements from at least one of Groups 3, 4, 5, 13, 14 or 15 of the periodic table, and the X atoms are selected from elements from Group 17 of the periodic table.Type: GrantFiled: February 21, 2013Date of Patent: October 31, 2017Assignee: Northwestern UniversityInventors: Mercouri G. Kanatzidis, In Chung, Byunghong Lee, Robert P. H. Chang
-
Patent number: 9799789Abstract: A monolithic multiple solar cell includes at least three partial cells, with a semiconductor mirror placed between two partial cells. The aim of the invention is to improve the radiation stability of said solar cell. For this purpose, the semiconductor mirror has a high degree of reflection in at least one part of a spectral absorption area of the partial cell which is arranged above the semiconductor mirror and a high degree of transmission within the spectral absorption range of the partial cell arranged below the semiconductor mirror.Type: GrantFiled: January 5, 2016Date of Patent: October 24, 2017Assignee: Azur Space Solar Power GmbHInventors: Matthias Meusel, Gerhard Strobl, Frank Dimroth, Andreas Bett
-
Patent number: 9741882Abstract: A tandem junction photovoltaic cell has a first p-n junction with a first energy band gap, and a second p-n junction with a second energy band gap less than the first energy band gap. The junctions are separated by a quantum tunneling junction. The first p-n junction captures higher energy photons and allows lower energy photons to pass through and be captured by the second p-n junction. Quantum dots positioned within the first p-n junction promote quantum tunneling of charge carriers to increase the current generated by the first p-n junction and match the current of the second p-n junction for greater efficiency.Type: GrantFiled: August 25, 2014Date of Patent: August 22, 2017Assignee: IntriEnergy Inc.Inventors: Franco Gaspari, Anatoli Chkrebtii
-
Patent number: 9726710Abstract: Methods and systems for prediction of fill factor in heterojunction solar cells through lifetime spectroscopy are provided. In accordance with some embodiments, methods for categorizing fill factor in a solar cell are provided, the methods comprising: determining lifetime values of the solar cell at different minority carrier concentrations; determining a lifetime curve shape for the solar cell based on the determined lifetime values; and categorizing the fill factor of the solar cell based on the determined lifetime curve shape using a hardware processor.Type: GrantFiled: November 21, 2013Date of Patent: August 8, 2017Assignee: Arizona Board of Regents, a body corporate of the State of Arizona, acting for and on behalf of Arizona State UniversityInventors: Kunal Ghosh, Stuart Bowden
-
Patent number: 9722131Abstract: A highly doped layer for interconnecting tunnel junctions in multijunction solar cells is presented. The highly doped layer is a delta doped layer in one or both layers of a tunnel diode junction used to connect two or more p-on-n or n-on-p solar cells in a multijunction solar cell. A delta doped layer is made by interrupting the epitaxial growth of one of the layers of the tunnel diode, depositing a delta dopant at a concentration substantially greater than the concentration used in growing the layer of the tunnel diode, and then continuing to epitaxially grow the remaining tunnel diode.Type: GrantFiled: March 16, 2009Date of Patent: August 1, 2017Assignee: THE BOEING COMPANYInventor: Christopher M. Fetzer
-
Patent number: 9698046Abstract: Embodiments of the present invention provide III-V-on-insulator (IIIVOI) platforms for semiconductor devices and methods for fabricating the same. According to one embodiment, compositionally-graded buffer layers of III-V alloy are grown on a silicon substrate, and a smart cut technique is used to cut and transfer one or more layers of III-V alloy to a silicon wafer having an insulator layer such as an oxide. One or more transferred layers of III-V alloy can be etched away to expose a desired transferred layer of III-V alloy, upon which a semi-insulating buffer layer and channel layer can be grown to yield IIIVOI platform on which semiconductor devices (e.g., planar and/or 3-dimensional FETs) can be fabricated.Type: GrantFiled: January 7, 2015Date of Patent: July 4, 2017Assignee: International Business Machines CorporationInventors: Anirban Basu, Bahman Hekmatshoartabari, Ali Khakifirooz, Davood Shahrjerdi
-
Patent number: 9666678Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.Type: GrantFiled: March 13, 2013Date of Patent: May 30, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake, Kei Takahashi, Kouhei Toyotaka, Masashi Tsubuku, Kosei Noda, Hideaki Kuwabara
-
Patent number: 9634162Abstract: A method of fabricating an Ag—(Cu—)In—Ga—Se (A(C)IGS) based thin film using Se—Ag2Se core-shell nanoparticles, an A(C)IGS based thin film fabricated by the method, and a tandem solar cell having the A(C)IGS thin film are disclosed. More particularly, a method of fabricating a densified Ag—(Cu—)In—Ga—Se (A(C)IGS) based thin film by non-vacuum coating a substrate with a slurry containing Se—Ag2Se core-shell nanoparticles, an A(C)IGS based thin film fabricated by the method, and a tandem solar cell including the A(C)IGS based thin film are disclosed. According to the present invention, an A(C)IGS based thin film including Ag is manufactured by applying Se—Ag2Se core-shell nanoparticles in a process of manufacturing a (C)IGS thin film, thereby providing an A(C)IGS based thin film having a wide band gap.Type: GrantFiled: September 3, 2013Date of Patent: April 25, 2017Assignee: Korea Institute of Energy ResearchInventors: Ara Cho, Kyung Hoon Yoon, SeJin Ahn, Jae Ho Yun, Young Joo Eo, Jihye Gwak, Kee Shik Shin, SeoungKyu Ahn, Jun Sik Cho, Jin-Su Yoo, Joo Hyung Park
-
Patent number: 9608146Abstract: A composition of matter and method of forming copper indium gallium sulfide (CIGS), copper indium gallium selenide (CIGSe), or copper indium gallium telluride thin film via conversion of layer-by-layer (LbL) assembled Cu—In—Ga oxide (CIGO) nanoparticles and polyelectrolytes. CIGO nanoparticles are created via a flame-spray pyrolysis method using metal nitrate precursors, subsequently coated with polyallylamine (PAH), and dispersed in aqueous solution. Multilayer films are assembled by alternately dipping a substrate into a solution of either polydopamine (PDA) or polystyrenesulfonate (PSS) and then in the CIGO-PAH dispersion to fabricate films as thick as 1-2 microns. After LbL deposition, films are oxidized to remove polymer and sulfurized, selenized, or tellurinized to convert CIGO to CIGS, CIGSe, or copper indium gallium telluride.Type: GrantFiled: April 9, 2015Date of Patent: March 28, 2017Assignee: The United States of America, as represented by the Secretary of the NavyInventors: Walter J. Dressick, Jasbinder S. Sanghera, Woohong Kim, Colin C. Baker, Jason D. Myers, Jesse A. Frantz
-
Patent number: 9590131Abstract: Systems and Methods for Advanced Ultra-High-Performance InP Solar Cells are provided. In one embodiment, an InP photovoltaic device comprises: a p-n junction absorber layer comprising at least one InP layer; a front surface confinement layer; and a back surface confinement layer; wherein either the front surface confinement layer or the back surface confinement layer forms part of a High-Low (HL) doping architecture; and wherein either the front surface confinement layer or the back surface confinement layer forms part of a heterointerface system architecture.Type: GrantFiled: March 26, 2014Date of Patent: March 7, 2017Assignee: Alliance for Sustainable Energy, LLCInventor: Mark Wanlass
-
Patent number: 9564548Abstract: The disclosure provides for a direct wafer bonding method including providing a bonding layer upon a first and second wafer, and directly bonding the first and second wafers together under heat and pressure. The method may be used for directly bonding an GaAs-based, InP-based, GaP-based, GaSb-based, or Ga(In)N-based device to a GaAs device by introducing a highly doped (Al)(Ga)InP(As)(Sb) layer between the devices. The bonding layer material forms a bond having high bond strength, low electrical resistance, and high optical transmittance.Type: GrantFiled: August 18, 2014Date of Patent: February 7, 2017Assignee: The Boeing CompanyInventors: Dhananjay M. Bhusari, Daniel C. Law
-
Patent number: 9559243Abstract: Disclosed are an ink composition for manufacturing a light absorption layer including metal nano particles and a method of manufacturing a thin film using the same, more particularly, an ink composition for manufacturing a light absorption layer including copper (Cu)-enriched Cu—In bimetallic metal nano particles and Group IIIA metal particles including S or Se dispersed in a solvent and a method of manufacturing a thin film using the same.Type: GrantFiled: January 6, 2015Date of Patent: January 31, 2017Assignee: LG CHEM, LTD.Inventors: Seokhee Yoon, Seokhyun Yoon, Taehun Yoon
-
Patent number: 9525034Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.Type: GrantFiled: March 13, 2013Date of Patent: December 20, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake, Kei Takahashi, Kouhei Toyotaka, Masashi Tsubuku, Kosei Noda, Hideaki Kuwabara
-
Patent number: 9520515Abstract: This invention aims to reduce and preferably to cancel the carrier collection limit effect in order to considerably increase the conversion efficiency. This improvement is achieved by a suitable modification of the amorphized layer thickness or even by discontinuities separating amorphizing beams or amorphized nanopellets.Type: GrantFiled: March 22, 2012Date of Patent: December 13, 2016Assignee: SEGTON ADT SASInventors: Zbigniew Kuznicki, Patrick Meyrueis
-
Patent number: 9508890Abstract: Structures including crystalline material disposed in openings defined in a non-crystalline mask layer disposed over a substrate. A photovoltaic cell may be disposed above the crystalline material.Type: GrantFiled: April 9, 2008Date of Patent: November 29, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jizhong Li, Anthony J. Lochtefeld, Calvin Sheen, Zhiyuan Cheng
-
Patent number: 9496140Abstract: A multi-junction photovoltaic device includes a silicon substrate and a dielectric layer formed on the silicon substrate. A germanium layer is formed on the dielectric layer. The germanium includes a crystalline structure that is substantially similar to the crystalline structure of the silicon substrate. A first photovoltaic sub-cell includes a first plurality of doped semiconductor layers formed on the germanium layer. At least a second photovoltaic sub-cell includes a second plurality of doped semiconductor layers formed on the first photovoltaic sub-cell that is on the germanium layer that is on the dielectric layer.Type: GrantFiled: February 14, 2012Date of Patent: November 15, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Supratik Guha, Harold J. Hovel
-
Patent number: 9496452Abstract: Methods and systems for repairing oxidation of CIGS surfaces during manufacture of a CIGS solar cell are generally disclosed. Oxidation of an absorber reduces the photoluminescence intensity of the CIGS surface. The absorber is immersed in a reduction tank having a reducing reagent therein. The reducing reagent reverses the oxidation of the CIGS absorber, increasing the interface quality and corresponding photoluminescence intensity. After reversing the oxidation, a buffer layer is deposited on the CIGS absorber to prevent further surface oxidation.Type: GrantFiled: October 20, 2014Date of Patent: November 15, 2016Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventor: Shih-Wei Chen
-
Patent number: 9455364Abstract: A photovoltaic cell comprises a first subcell formed of a Group IV semiconductor material, a second subcell formed of a Group II-VI semiconductor material, and a tunnel homojunction interposed between the first and second subcells. A first side of the tunnel homojunction is formed by a first layer that is adjacent to a top surface of the first subcell. The first layer is of a first conductivity type and is comprised of a highly doped Group IV semiconductor material. The other side of the tunnel homojunction is formed by a second layer that adjoins the lower surface of the second subcell. The second layer is of a second conductivity type opposite the first conductivity type and also is comprised of a highly doped Group IV semiconductor material. The tunnel homojunction permits photoelectric series current to flow through the subcells.Type: GrantFiled: January 6, 2010Date of Patent: September 27, 2016Assignee: EPIR Technologies, Inc.Inventors: Sivalingam Sivananthan, Michael Carmody, Robert W. Bower, Shubhrangshu Mallick, James Garland
-
Patent number: 9410259Abstract: An electroplating solution and method for producing an electroplating solution containing a gallium salt, an ionic compound and a solvent that results in a gallium thin film that can be deposited on a substrate.Type: GrantFiled: September 4, 2012Date of Patent: August 9, 2016Assignee: Alliance for Sustainable Energy, LLCInventor: Raghu N. Bhattacharya
-
Patent number: 9368666Abstract: Manufacture for an improved stacked-layered thin film solar cell. Solar cell has reduced absorber thickness and an improved back contact for Copper Indium Gallium Selenide solar cells. The back contact provides improved reflectance particularly for infrared wavelengths while still maintaining ohmic contact to the semiconductor absorber. This reflectance is achieved by producing a back contact having a highly reflecting metal separated from an absorbing layer with a dielectric layer.Type: GrantFiled: March 4, 2015Date of Patent: June 14, 2016Assignee: International Business Machines CorporationInventors: Hans-Juergen Eickelmann, Michael Haag, Ruediger Kellmann, Markus Schmidt, Johannes Windeln
-
Patent number: 9356177Abstract: The invention is a method of forming a cadmium sulfide based buffer on a copper chalcogenide based absorber in making a photovoltaic cell. The buffer is sputtered at relatively high pressures. The resulting cell has good efficiency and according to one embodiment is characterized by a narrow interface between the absorber and buffer layers. The buffer is further characterized according to a second embodiment by a relatively high oxygen content.Type: GrantFiled: April 28, 2011Date of Patent: May 31, 2016Assignee: Dow Global Technologies LLCInventors: Todd R. Bryden, Jeffrey L. Fenton, Jr., Gary E. Mitchell, Kirk R. Thompson, Michael E. Mills, David J. Parrillo
-
Patent number: 9324901Abstract: The present invention relates to a precursor solution for forming a semiconductor thin film on the basis of CIS, CIGS or CZTS by printing, comprising metal complexes of at least two different metal cations, wherein the first metal cation is a copper cation and the second is selected from the group consisting of (i) In, (ii) a combination of In and Ga, and (iii) a combination of Zn and Sn, wherein Cu and Sn, if Sn is present, is/are complexed by at least one sulfur or selenium containing anionic complex ligand or polyanion selected from the group consisting of trithiocarbonate, polysulfide or the selenium analogs thereof. If In, In with Ga, or Zn is present, their cations are complexed by an excess of trithiocarbonate and/or triselenocarbonate, and a solvent. A method for preparing such solutions and their use for manufacturing a solar cell or optoelectronic device is provided.Type: GrantFiled: April 22, 2013Date of Patent: April 26, 2016Assignee: SUNTRICITY CELLS CORPORATIONInventors: Sunniva Marita Förster, Manfred Georg Schweizer
-
Patent number: 9263612Abstract: This disclosure relates to structures for the conversion of light into energy. More specifically, the disclosure describes devices for conversion of light to electricity using ordered arrays of semiconductor wires coated in a wider band-gap material.Type: GrantFiled: March 23, 2011Date of Patent: February 16, 2016Assignee: California Institute of TechnologyInventors: Adele Tamboli, Daniel B. Turner-Evans, Manav Malhotra, Harry A. Atwater
-
Patent number: 9219179Abstract: A polymer substrate and back contact structure for a photovoltaic element, and a photovoltaic element include a CIGS photovoltaic structure, a polymer substrate having a device side at which the photovoltaic element can be located and a back side opposite the device side. A layer of dielectric is formed at the back side of the polymer substrate. A metal structure is formed at the device side of the polymer substrate.Type: GrantFiled: March 5, 2014Date of Patent: December 22, 2015Assignee: ASCENT SOLAR TECHNOLOGIES, INC.Inventors: Lawrence M. Woods, Hobart Stevens, Joseph H. Armstrong
-
Patent number: 9169549Abstract: The disclosure discloses a method for modifying the light absorption layer, including: (a) providing a substrate; (b) forming a light absorption layer on the substrate, wherein the light absorption layer includes a Group IB element, Group IIIA element and Group VIA element; (c) forming a slurry on the light absorption layer, wherein the slurry includes a Group VIA element; and (d) conducting a thermal process for the light absorption layer with the slurry.Type: GrantFiled: August 16, 2012Date of Patent: October 27, 2015Assignee: Industrial Technology Research InstituteInventors: Wei-Chien Chen, Lung-Teng Cheng, Ding-Wen Chiou, Tung-Po Hsieh