Abstract: A method for growing a single crystal III-V compound semiconductor layer, in which grown by vapor deposition on a first single crystal III-V compound semiconductor layer including at least Ga and N is a second single crystal III-V compound semiconductor layer different from the first layer and including at least Ga and N, comprises the steps of: growing a buffer layer other than single crystal and having substantially the same composition as that of the second layer by vapor deposition on the first layer; and growing the second layer on the buffer layer. A method for growing a single crystal AlGaN layer on a single crystal GaN layer by vapor deposition, comprises the steps of: growing a buffer layer of a III-V compound semiconductor including at least Ga and N on the single crystal GaN layer by vapor deposition; and growing the single crystal AlGaN layer on the buffer layer by vapor deposition.

Abstract: A semiconductor substrate 11 having concavities and convexities in the upper surface, and silica particles (granular insulators) 15 provided in the concavities to planarize the entire upper surface of the semiconductor substrate 11 are included. First, the silica particles 15 are laid over an upper surface of a semiconductor substrate 11 to provide the granular insulators 15 in cavities in the upper surface of the semiconductor substrate 11, and the silica particles 15 provided on convexities on the upper surface of the semiconductor substrate 11 are removed, whereby the concavities 11 are buried with the silica particles 15 so as to improve global planarizarion.

Abstract: A method of fabricating a semiconductor device includes the steps of forming a wiring layer on the surface of a semiconductor substrate, depositing a silicone film on the whole surface of the semiconductor substrate including the wiring layer by a CVD method and exposing the silicone film to oxidative plasma with enhanced frequencies including components of 1 MHz or less to change to a silicon oxide film, the depositing step and exposing step being alternately repeated in the same apparatus till the silicon oxide film having any desired thickness is obtained. The resulting silicon oxide film has the smooth surface and the high density.

Abstract: A process, compatible with bipolar and CMOS silicon device manufacturing for fabricating complementary buried doped regions in a silicon substrate. An N+ doped region (12) is formed in the silicon substrate by known methods of arsenic doping and drive in. This is followed by depositing a first thin epitaxial silicon cap layer (14), under conditions of minimum N+ autodoping. Part thickness of this first epilayer is converted to oxide (18), and the oxide is patterned to provide apertures in an area where it is desired to form a P+ region. A P source material (20) is deposited and a drive in anneal is used to dope the silicon with P in the areas of the oxide aperture opening. Subsequent to drive in, the dopant source layer and the oxide mask is removed by wet etching. An oxide is regrown on the surface, including the P+ region (22), and subsequently the oxide layer is stripped in dilute hydrofluoric acid.

Abstract: A method for providing an oxide film of a material on the surface of a substrate using a reactive deposition of the material onto the substrate surface in the presence of a solid or liquid layer of an oxidizing gas. The oxidizing gas is provided on the substrate surface in an amount sufficient to dissipate the latent heat of condensation occurring during deposition as well as creating a favorable oxidizing environment for the material.

Abstract: A process for forming a smooth conformal refractory metal film on an insulating layer having a via formed therein. This process provides extremely good planarity and step coverage when used to form contacts in semiconductor circuits and, in addition, offers improved wafer alignment capability as well as enhanced reliability which result from the smooth surface morphology. The process includes forming contact openings through an insulating layer to a semiconductor substrate; depositing a first blanket layer of titanium using deposition conditions that provide a conformal film that exhibits good step coverage at the contact opening; and forming a second blanket layer of titanium using deposition conditions that provide reduced surface asperity height. The process is ideally suited to forming an electrical interconnection system for semiconductor integrated circuit devices such as static or dynamic random access memories and is particularly useful in VLSI devices that incorporate multiple levels of interconnect.

Abstract: Defects in a thin dielectric layer of a semiconductor device are plugged by a discontinuous layer to maintain integrity of the dielectric without degrading the reliability of the device. In one form of the invention, a semiconductor device (10) includes an oxide layer (14) formed on a substrate material (12). Growth of a nitride layer (18), using CVD techniques, is initiated in any defects (16) in the oxide layer, but growth is terminated prior to entering a continuous growth stage. By plugging the defects with nitride without forming a continuous nitride layer, defect density in thin oxides is reduced without experiencing disadvantages associated with thick oxide-nitride stacks. The invention is also applicable to plugging defects in dielectric layers other than oxide. Furthermore, growth of a discontinuous layer may be achieved with a material other than a nitride using CVD techniques.

Abstract: Selective deposition of a refractory metal on a silicon substrate utilizing high temperatures and a silane reduction process in which the flow rate ratio of silane to refractory metal halide gas is less than one. In a second embodiment, an additional layer of the refractory metal is deposited utilizing a hydrogen reduction of the metal halide gas at very high temperatures. In both embodiments, a refractory metal barrier layer may be provided by forming a self-aligned refractory metal silicide layer. Alternatively, a two layer self-aligned barrier is formed of a refractory metal silicide lower layer and a refractory metal nitride upper layer and the refractory metal is selectively deposited on the metal nitride.

Abstract: A method of filling a recess so that it is flat with a material by a bias ECR-CVD process is capable of depositing the recess with the material without resulting in the increase in the aspect ratio of the recess with the progress of the deposition process and without forming any voids in the material filling up the recess. A method in accordance with the present invention is characterized in that the bias ECR-CVD process is controlled so as to meet a condition expressed by: R=2y/x, where R is the deposition rate ratio, namely, the ratio of a vertical deposition rate at which the material is deposited on the vertical side surface of the recess to a deposition rate at which the material deposited on the horizontal bottom surface of the recess, x is the width of the recess and y is the depth of the recess.

Abstract: A semiconductor growth process wherein a plurality of layers, each consisting of a different king of semiconductor material, are grown, includes the steps of: heating a substrate to a first growth starting temperature at which a growth of a first semiconductor layer can be started, supplying a first material gas to the surface of the substrate to cause a growth of the first semiconductor layer, lowering the temperature of the substrate to below first growth starting temperature, and at the same time, stopping the supply of the first material gas, to stop the growth of the first semiconductor layer, heating the substrate to a second growth starting temperature at which a growth of a second semiconductor layer can be started, and supplying a second material gas to the surface of the substrate to cause a growth of the semiconductor layer.

Abstract: A semiconductor device and processing technique is provided for monolithic integration of a single crystal compound element semiconductor on a ceramic substrate. A high resistivity semi-insulating buffer layer is epitaxially grown on the ceramic substrate and has an elastically transitional lattice constant matching at its lower surface the lattice constant of the ceramic substrate, and matching at its upper surface the lattice constant of the semiconductor layer.

Abstract: A reduced-temperature two-step silicon deposition performed at different silicon sources is used in forming a composite monosilicon/polysilicon layer (20/24/26) on a body that contains a monosilicon region (10) and an adjoining dielectric regin (12). The first step entails selectively depositing silicon, preferably using dichlorosilane as a CVD silicon source, to grow a first monosilicon layer (20) on exposed monosilicon at an average body temperature less than or equal to 950.degree. C. Substantially no silicon accumulates on exposed dielectric material during the first step. The second step entails non-selectively depositing silicon, preferably using silane as a CVD silicon source, at an average body temperature less than or equal to 950.degree. C. to grow a second monosilicon layer (24) on the first monosilicon layer and to simultaneously grow a polysilicon layer (26) on the exposed dielectric material.

Abstract: For the growth of strain-layer materials and high quality single and multiple quantum wells, the instantaneous control of growth front stoichiometry is critical. The process of the invention adjusts the offset or phase of MBE control shutters to program the instantaneous arrival or flux rate of In and As.sub.4 reactants to grow InAs. The interrupted growth of first In, then As.sub.4, is also a key feature.

Abstract: Dislocation densities are reduced in growing semiconductors from the vapor phase by employing a technique of interrupting growth, cooling the layer so far deposited, and then repeating the process until a high quality active top layer is achieved. The method of interrupted growth, coupled with thermal cycling, permits dislocations to be trapped in the initial stages of epitaxial growth.

Abstract: A method of forming oppositely doped semiconductor regions includes providing a first semiconductor layer of a first conductivity type and forming a second semiconductor layer of a second conductivity type on a portion of the first layer. A third semiconductor layer is formed on the second layer and the exposed portions of the first layer. The dopant concentration of the third layer is less than the dopant concentration of the second layer so that dopant of the second conductivity type diffuses from the second layer into the portion of the third layer disposed thereabove.

Abstract: A semiconductor laser particularly adapted for operation in the self-pulsation mode and method for production thereof. A central mesa is formed in the upper cladding layer and normally requires relatively thick sections at either side of the mesa in order to form a wageguide of sufficient thickness to cause self-pulsation operation. In order to control the thickness of the upper cladding layer bounding the mesa, the mesa is first formed by etching the regions bounding the mesa to relatively thin sections capable of ready gauging by optical interferometry. A composite upper clading layer is then formed by utilizing MOCVD crystal growth techniques to form a buffer layer on the upper cladding layer bounding the mesa, the buffer layer having an aluminum content about the same as the aluminum content of the AlGaAs upper cladding layer.

Abstract: Process for the production of semiconductor devices by using silicon-on-insulator (SOI) techniques. The Si layers of the SOI structure include an interfacial layer of Si and a buffer layer of Si formed thereon, whereby the formation of stacking faults in the Si layers can be effectively prevented. Pretreatment of the underlying insulating material with a molybdate solution and interposition of an additional layer of slowly grown single-crystalline Si between the buffer layer of Si and the overlying active Si layer are also effective to inhibit the stacking faults. Semiconductor devices with high quality can be produced with good yield.

Abstract: An improved process is disclosed for the deposition of a layer of tungsten on a semiconductor wafer in a vacuum chamber wherein the improvements comprise depositing tungsten on the semiconductor wafer in the presence of nitrogen gas to improve the reflectivity of the surface of the resulting layer of tungsten; maintaining the vacuum chamber at a pressure of from about 20 to 760 Torr to improve the deposition rate of the tungsten, as well as to improve the reflectivity of the tungsten surface; and, when needed, the additional step of forming a nucleation layer on the semiconductor layer prior to the step of depositing tungsten on the semiconductor wafer to improve the uniformity of the deposited tungsten layer.

Abstract: A polysilicon layer may need to have electrical characteristics which are relatively uniform from wafer to wafer. The use of polysilicon as a resistor is one such example. In order to obtain the requisite uniformity, the temperature of the wafers which are receiving the polysilicon must all be the same within a tight tolerance. The reaction takes place in a furnace which takes a long time to reach the requisite temperature tolerance. While the furnace is stabilizing the temperature, oxide, which is an insulator, is growing on the contact locations of the various substrates. To minimize the deleterious oxide formation, a thin layer of polysilicon is deposited at a time significantly prior to the time that the furnace stabilizes which ensures a good, low-resistance contact. The remainder of the polysilicon is then deposited on the thin layer of polysilicon after the temperature has stabilized to obtain the requisite wafer-to-wafer resistance uniformity.

Abstract: A heteroepitaxial growth method wherein a III-V group compound semiconductor is formed on a silicon substrate. A first amorphous III-V group compound semiconductor layer is formed on the silicon substrate before forming a III-V group compound semiconductor crystal layer on the amorphous III-V group compound semiconductor layer. A second amorphous III-V group semiconductor layer having a thickness greater than the crystal layer is formed on the III-V group compound semiconductor crystal layer and subjected to a solid phase epitaxial growth whereby the second amorphous III-V group compound semiconductor layer is made a single crystalline layer.

Abstract: A method for growing a superlattice structure on a substrate. First, a periodic array of monoatomic surface steps are created on the surface of the substrate at an area to have the superlattice structure grown thereon. There is apparatus for creating a beam of a material being input thereto and for selectively including or not including respective ones of a plurality of materials within the beam. The beam is directed at the steps of the substrate. Finally, logic causes control apparatus to include and not include respective ones of the materials within the beam in a pre-established pattern of time periods which will cause the materials to be deposited on the steps in a series of stacked monolayers. Tilted Superlattices (TSLs) and Coherent Tilted Superlattices (CTSLs) are created. The method can create pseudo ternary semiconductor alloys as part of a CTSL by employing at least two binary compound semiconductor alloys in the deposition process.

Abstract: An epitaxial silicon layer may be deposited on a monocrystalline silicon body by Chemical Vapor Deposition at reduced pressure and low deposition temperature by a method which includes cleaning the substrate within the CVD reactor. The cleaning within the reactor is achieved solely by applying a heat pulse by heating the substrate to a cleaning temperature above 1000 degrees Celsius for a time in the range of from 15 seconds to 90 seconds. In one example deposition of the layer is started by introducing silicon carrier gas not more than 15 seconds before the end of the heat pulse and at the end of the heat pulse the substrate temperature is allowed to fall to a desired deposition temperature between 650 degrees Celsius and 800 degrees Celsius for silane and 800 degrees Celsius and 875 degrees Celsius for trichlorsilane.

Abstract: An InGaAlP NAM structure laser is formed with a double-heterostructure section disposed on an n-type GaAs substrate. The double-heterostructure section includes a first cladding layer of n-type InGaAlP, a non-doped InGaP active layer, and a second cladding layer of p-type InGaAlP. An n-type GaAs current-blocking layer having a stripe opening and a p-type GaAs contact layer are sequentially formed on the second cladding layer by MOCVD crystal growth. A low-energy band gap region is defined in a central region of the active layer located immediately below the stripe opening. A high-energy band gap region is defined in a peripheral region of the active layer corresponding to a light output end portion of the laser and located immediately below the current-blocking layer. Therefore, self absorption of an oscillated laser beam at the output end portion can be reduced or prevented.

Abstract: Metal step coverage is improved by utilizing a multiple step metallization process. In the first step, a thick portion of a metal layer is deposited on a semiconductor wafer at a cold temperature. The remaining amount of metal is deposited in a second step as the temperature is ramped up to allow for reflow of the metal layer through grain growth, recrystallization and bulk diffusion. The thick portion of the metal layer deposited at the cold temperature is of adequate thickness so that it remains continuous at the higher temperature and enhances via filling.

Abstract: A semiconductor laser device includes a current blocking structure having a p-n-p-n structure, provided on a first conductivity type semiconductor substrate, an active region buried in a stripe shaped groove produced in the current blocking structure, a lower cladding layer grown by liquid phase epitaxy approximately filling the stripe groove, an active layer on the lower cladding layer in the stripe groove, a waveguide layer on the active layer completely filling the groove, and a diffraction grating on the waveguide layer.

Abstract: An InP semiconductor thin film is formed by a process in which an amorphous GaAs buffer layer having a good surface flatness, and then an amorphous InP buffer layer having a good surface flatness are formed on an Si substrate, and then an InP monocrystalline thin film is grown on the InP buffer layer. GaAS has a lattice constant intermediate between Si used as the substrate and InP, so the lattice mismatch is reduced.

Abstract: A method for selectively depositing amorphous or polycrystalline silicon wherein a wafer having exposed silicon regions thereon is placed into a CVD reactor and subjected to a silicon containing gas and a halogen containing gas, at least one of which flows into the reactor with a hydrogen carrier gas. Amorphous silicon may be selectively deposited in the range of approximately 200 to 550 degrees centigrade while polycrystalline silicon may be selectively deposited in the range of approximately 550 to 750 degrees centigrade. It is also possible to deposit polycrystalline silicon at temperatures in the range of approximately 750 to 1000 degrees centigrade by employing another embodiment of the present invention.

Abstract: In molecular beam epitaxial growth of GaAs substrate, a compound semiconductor thin film having Ga and As is grown by Ga beam and As beam in MBE chamber and then the substrate is transferred to an annealing chamber where the substrate is annealed under As vapor pressure. The above process is repeated to a predetermined layer level whereby it eliminates divergence from stoichiometric.

Abstract: A new III-IV buffer material is described which is produced by low temperature growth of III-V compounds by MBE that has unique and desirable properties, particularly for closely spaced, submicron gate length active III-V semiconductor devices, such as HEMT's, MESFET's and MISFET's. In the case of the III-V material, GaAs, the buffer is grown under arsenic stable growth conditions, at a growth rate of 1 micron/hour, and at a substrate temperature preferably in the range of 150 to about 300.degree. C. The new material is crystalline, highly resistive, optically inactive, and can be overgrown with high quality III-V active layers.

Abstract: Intermediate buffer films having a low plastic deformation threshold are provided for absorbing defects due to lattice mismatch and/or thermal coefficient of expansion mismatch between a substrate or layer support and an overlayer while concurrently providing a good template for subsequent crystalline growth at the overlayer. This is accomplished for diamond cubic structure substrates, such as Si or Ge or Si on sapphire or crystalline Si on glass, upon which are to be deposited lattice mismatch overlayers, such as, GaAs or ZnSe. Also, zinc blend type substrates, such as GaAs or InP may be employed with such intermediate buffer films. A characteristic of these intermediate buffer films is a substantially lower plastic deformation threshold compared to either the substrate support or the overlayer to be grown heteroepitaxially thereon.

Abstract: Disclosed is a process for the production of a semiconductor element by introducing a gas of an organic metal compound of an element of the group III and a gas containing an element of the group V into a reaction chamber in which a substrate of a single crystal of alumina is arranged and epitaxially growing a III.V compound semiconductor by the thermal decomposition vapor deposition of the compound of the elements of the groups III.V, said process comprises, in combination, the steps of (A) heating the substrate at a temperature of 400.degree. to 550.degree. C., introducing the gas of the organic metal compound of the element of the group III and the gas containing the element of the group V into the reaction chamber and forming a film of a compound of the elements of the groups III.V on the surface of the substrate by the vapor deposition, (B) heating the substrate obtained at the step (A) at a temperature higher than 550.degree. C. but lower than 750.degree. C.

Abstract: A method for producing wafers having deposited layers of III-V materials on Si or Ge/Si substrates is disclosed. The method involves the use of multiple in situ and ex situ annealing steps and the formation of a thermal strain layer to produce wafers having a decreased incidence of defects and a balanced thermal strain. The wafers produced thereby are also disclosed.

Abstract: A GaAs layer having a high crystallinity can be grown over an Si substrate without warping, by process for growing a GaAs layer on an Si substrate, said process comprising: forming a first GaAs layer in the amorphous state on the Si substrate at a first temperature, the first GaAs layer being formed with a thickness allowing formation of a single crystalline layer having a thickness of one to three monomolecular layers; heating the first GaAs layer to change the amorphous state of the first GaAs layer to a single crystalline state; forming an Si layer on the first GaAs layer at a second temperature higher than the first temperature, the Si layer being formed with a thickness having one to six monoatomic layers; forming a second GaAs layer in the amorphous state on the Si layer at the first temperature, the second GaAs layer being formed with a thickness substantially the same as the thickness of the first GaAs layer; heating the second GaAs layer the change the amorphous state of the second GaAs layer to a si

Abstract: Polycrystalline silicon is deposited in a film onto the surface of a substrate which has been carefully prepared to eliminate any defects or contaminants which could nucleate crystal growth on the substrate. The deposition is carried out by low pressure decomposition of silane at substantially 580.degree. C. to cause a film of fine grained crystals of polysilicon to be formed having grain sizes averaging less than about 300 Angstroms after annealing. Such a film is very uniform and smooth, having a surface roughness less than about 100 Angstroms RMS. Annealing of the film and substrate at a low temperature results in a compressive strain in the field that decreases over the annealing time, annealing at high temperatures (e.g., over 1050.degree. C.) yields substantially zero strain in the film, and annealing at intermediate temperatures (e.g., 650.degree. C. to 950.degree. C.) yields tensile strain at varying strain levels depending on the annealing temperature and time.

Abstract: A process for forming a vapor-phase epitaxial growth layer on a silicon wafer having a buried layer of a high As or B concentration. This vapor-phase epitaxial growth process is performed in two steps of (i) performing a vapor-phase epitaxial growth at a relatively low temperature by using a reaction gas containing at least one kind selected from a group consisting of SiH.sub.x F.sub.4-x (x=0 to 3) and Si.sub.2 H.sub.x F.sub.6-x (x=0-5) and at least one kind selected from a group consisting of SiH.sub.4 and Si.sub.2 H.sub.6, and (ii) performing a vapor-phase epitaxial growth under a condition which allows a higher growth rate that in the step (i) by using a reaction gas containing SiH.sub.4 or Si.sub.2 H.sub.6 which may or may not be accompanied with silane fluoride.

Abstract: The invention relates to a method of growing a GaAs film on the surface of a Si or GaAs substrate by exposing the growing surface of the substrate in a vacuum to at least one vapor beam containing the Ga elementary component of the GaAs compound, and to at least one vapor beam containing the As elementary component of the GaAs compound. The method is characterized by the steps of (A) growing a GaAs buffer layer by alternately applying the elements of the GaAs compound to the surface of a substrate heated to a first temperature one atom layer at a time, whereby in the formation of each atom layer the growing surface is exposed to a vapour beam containing one elementary component of the GaAs compound only; and (B) heating the substrate to a second temperature higher than the first temperature, and growing another GaAs layer on the buffer layer by applying both of the elementary components of the GaAs compound simultaneously.

Abstract: A method of forming a semiconductor thin layer on a silicon substrate comprising the steps of depositing a first amorphous layer of a compound semiconductor (e.g., GaAs) on the silicon substrate, and growing a first epitaxial layer of the compound semiconductor on the amorphous layer, characterized in that the method comprises the steps of: after the epitaxial growth step, depositing a second amorphous layer of the compound semiconductor on the first epitaxial layer, and growing a second epitaxial layer of the compound semiconductor on the second amorphous layer. The obtained GaAs/Si substrate has a reduced dislocation density.

Abstract: A method for forming a silicide bridge bewteen a diffusion region and an adjacent poly-filled trench separated by a thin dielectric. Silicon is selectively grown over exposed silicon regions under conditions that provide controlled lateral growth over the thin dielectric without also permitting lateral growth over other insulator regions. A refractory metal layer is then deposited and sintered under conditions that limit lateral silicide growth, forming the bridge. This process avoids the random fails produced by previous processes while enhancing the compatibility of bridge formation with shallow junctions, without introducing extra masking steps or other process complexities.

Abstract: A remote plasma enhanced CVD apparatus and method for growing semiconductor layers on a substrate, wherein an intermediate feed gas, which does not itself contain constituent elements to be deposited, is first activated in an activation region to produce plural reactive species of the feed gas. These reactive species are then spatially filtered to remove selected of the reactive species, leaving only other, typically metastable, species which are then mixed with a carrier gas including constituent elements to be deposited on the substrate. During this mixing, the selected spatially filtered reactive species of the feed gas chemically interacts, i.e., partially dissociates and activates, in the gas phase, the carrier gas, with the process variables being selected so that there is no back-diffusion of gases or reactive species into the feed gas activation region. The dissociated and activated carrier gas along with the surviving reactive species of the feed gas then flows to the substrate.

Abstract: A molecular beam epitaxy method of growing Ge.sub.x Si.sub.1-x films on silicon substrate is described. Semiconductor heterostructures using Ge.sub.x Si.sub.1-x layers grown on either Ge or Si substrates are described.

Abstract: A method for epitaxial growth of compound semiconductor containing three component elements, two component elements thereof being the same group elements, in which three kinds of compound gases each containing different one of the three component elements are cyclically introudced, under a predetermined pressure for a predetermined period respectively, onto a substrate enclosed in an evacuated crystal growth vessel so that a single crystal thin film of the compound semiconductor is formed on the substrate.

Abstract: A method of forming thin epitaxial layers by subjecting a substrate to a high temperature prebake followed by a medium temperature capping seal and a low temperature deposition is disclosed. In a preferred embodiment the epitaxial layer is formed by low pressure chemical vapor deposition of dichlorosilane. The method has been demonstrated to alleviate the increase in autodoping and epitaxial defects normally associated with lowering the deposition temperature.

Abstract: In organometallic vapor phase hetero-epitaxial processes for growing Al.sub.x Ga.sub.1-x N films on a sapphire substrate, the substrate is subjected to a preheat treatment of brief duration, such as less than 2 minutes, at relatively low temperatures in an atmosphere comprising Al-containing organometallic compound, NH.sub.3 and H.sub.2 gases, prior to the hetero epitaxial growth of Al.sub.x Ga.sub.1-x N films. Thus, single crystalline Al.sub.x Ga.sub.1-x N layers of high uniformity and high quality having smooth, flat surfaces are provided. Multi-layers grown according to the process of the invention are free from cracks and have preferable UV or blue light emission properties.

Abstract: A method for producing wafers having deposited layers of III-V materials on Si or Ge/Si substrates is disclosed. The method involves the use of multiple in situ and ex situ annealing steps and the formation of a thermal strain layer to produce wafers having a decreased incidence of defects and a balanced thermal strain. The wafers produced thereby are also disclosed.

Abstract: A semiconductor substrate includes: a first monocrystalline semiconductive layer formed on the surface of a crystalline silicon substrate with the intervension of a first insulation film; a second insulation film set to the upper surface of the first monocrystalline semiconductive layer and provided with a plurality of apertures each having a specific pattern; and a second monocrystalline semiconductive layer which is epitaxially grown by the seed crystallization process and provided with the same crystalline characteristics as that of the first monocrystalline semiconductive layer.Accordingly, the preferred embodiment of the present invention provides an extremely useful semiconductor substrate which easily isolates the elements of semiconductor devices between layers of insulating film described above.

Abstract: The present invention relates to a method for producing a semiconductor thin film, in which a single crystalline silicon film is grown on an insulative single crystalline substrate, such as a single crystalline sapphire substrate, by the molecular beam epitaxy method. Silicon molecular beams are irradiated onto the substrate under the conditions wherein a substrate temperature is kept at 700.degree. to 900.degree. C. and an intensity of the molecular beams is kept within a range from 1.times.10.sup.12 atoms/cm.sup.2 .multidot.sec to 1.times.10.sup.13 atoms/cm.sup.2 .multidot.sec to clean a surface of the substrate and then the intensity of the molecular beams is increased to form the single crystalline silicon film. Thus, the substrate can be cleaned without being defected.

Abstract: A method for the production of semiconductor devices comprising: subjecting a GaAs substrate with an oxidized film thereon to a degasification treatment, heating the substrate during a radiation treatment by a molecular beam within a pre-treatment chamber to remove the oxidized film from the substrate, and growing a phosphorous compound semiconductor layer on the substrate by molecular beam epitaxy within a growth chamber connected to the pre-treatment chamber.

Abstract: A method of producing an amorphous silicon semiconductor device makes use of a capacitance-coupled high-frequency glow-discharge semiconductor production apparatus which is equipped with a plurality of glow-discharge chambers each having a high-frequency electrode and a substrate holder opposing each other and means for supplying material gases to the glow-discharge chambers. A reaction of a material gas is effected in a first glow-discharge chamber, so as to form a semiconductor layer having a first conductivity type on a substrate introduced into the first glow-discharge chamber, and, after moving the substrate into a second glow-discharge chamber, a reaction of a material gas different from the material gas used in the first glow-discharge chamber is effected, thereby forming a semiconductor layer having a second conductivity type on the semiconductor layer of the first conductivity type.

Abstract: A method for growing selective epitaxial silicon by chemical vapor deposition resulting in a substantially planar surface by growing superimposed silicon layers at temperatures above and below a transition point.

Abstract: Described is a method for producing metal silicide/silicon heterostructures. The method comprises depositing a very thin Si "template" layer on a relatively cold (<200.degree. C.) silicide substrate, raising the substrate temperature into the approximate range 500.degree.-800.degree. C. and maintaining it there while depositing further Si onto the template. The resulting Si layer can be of high crystalline perfection. The silicide advantageously is CoSi.sub.2, Co.sub.x Ni.sub.1-x Si.sub.2, CoSi.sub.y Ge.sub.2-y, or NiSi.sub.2, with 0<x<1,1<y<2.