Electrical Product Patents (Class 205/78)
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Patent number: 8187445Abstract: Microwave source and polarizer which is formed of an electroformed monobloc comprising a thick plate or septum, greater than 1 mm in thickness. Frequencies of application include the 7.25 GHz and 8.4 GHz frequency bands.Type: GrantFiled: November 10, 2008Date of Patent: May 29, 2012Assignee: ThalesInventors: Pierre-Henri Boutigny, Pascal Boivin, Alain Lefevre
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Publication number: 20120097429Abstract: A package substrate includes: a dielectric layer having two opposite surfaces; a wiring layer embedded in the dielectric layer and exposed from the two opposite surfaces of the dielectric layer, wherein the wiring layer has solder pads, conductive pads and circuit wires electrically connecting the solder pads and the conductive pads; and a first insulating protection layer disposed on one of the two opposite surfaces of the dielectric layer to cover the dielectric layer and the wiring layer and having a plurality of openings for exposing the conductive pads, respectively. The package substrate, by directly using the dielectric layer as a base, provides a package substrate having reduced thickness and lower fabrication costs compared to the prior art.Type: ApplicationFiled: July 27, 2011Publication date: April 26, 2012Applicant: UNIMICRON TECHNOLOGY CORPORATIONInventors: Pao-Hung Chou, Hsien-Min Chang
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Publication number: 20120080137Abstract: A manufacturing method of a circuit board. First, an electrode mold having a conductive circuit pattern is made, and then a conductive circuit metal layer is formed by means of electroplating on the electrode mold. The conductive circuit metal layer is transferred and joined with the dielectric layer to constitute a basic circuit board. After the conductive circuit metal layer is transferred to the dielectric layer, the electrode mold can be reused for electroplating, so that the conductive circuit metal layer may be formed again for the next basic circuit board. The manufacturing method provided herein may significantly reduce the manufacturing time and raising the product yields of the circuit board, and has the advantages of lower cost and environmental friendly.Type: ApplicationFiled: November 15, 2010Publication date: April 5, 2012Inventor: HUNG-MING LIN
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Publication number: 20120077069Abstract: A composition for making a contact contains predetermined amounts of cobalt and sulfur and has a predetermined average particle size. The composition for making the contact includes a nickel-cobalt alloy containing 20% by weight to 55% by weight of cobalt, and 0.002 part by weight to 0.02 part by weight of sulfur with respect to 100 parts by weight of the nickel-cobalt alloy, the composition having an average particle size of 0.10 ?m to 0.35 ?m. The contact made with the composition may be included in a connector.Type: ApplicationFiled: March 4, 2011Publication date: March 29, 2012Applicant: OMRON CORPORATIONInventors: Kuniyoshi Maezawa, Yoko Ishikawa
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Publication number: 20120073973Abstract: An anisotropically conductive member includes an insulating base having through micropores and conductive paths formed by filling the through micropores with a conductive material, insulated from one another, and extending through the insulating base in its thickness direction, one end of each of the conductive paths exposed on one side of the insulating base, the other end of each of the conductive paths exposed on the other side thereof. The insulating base is an anodized film obtained from an aluminum substrate and the aluminum substrate contains intermetallic compounds with an average circle equivalent diameter of up to 2 ?m at a density of up to 100 pcs/mm2. The anisotropically conductive member dramatically increases the density of disposed conductive paths and suppresses the formation of regions having no conductive paths, and can be used as an electrically connecting member or inspection connector for electronic components.Type: ApplicationFiled: September 22, 2011Publication date: March 29, 2012Applicant: FUJIFILM CORPORATIONInventors: Kosuke YAMASHITA, Yoshinori HOTTA, Akio UESUGI
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Publication number: 20120074209Abstract: Electronic assemblies including coreless substrates and their manufacture using electrolytic plating, are described. One method includes providing a core comprising a metal, and forming a dielectric material on the core. The method also includes forming vias in the dielectric material, the vias positioned to expose metal regions. The method also performing an electrolytic plating of metal into the vias and on the metal regions, wherein the core is electrically coupled to a power supply during the electrolytic plating of metal into the vias and delivers current to the metal regions. The method also includes removing the metal core after the electrolytic plating of metal into the vias. Other embodiments are described and claimed.Type: ApplicationFiled: September 25, 2010Publication date: March 29, 2012Inventors: Tao WU, Nicolas R. Watts
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Publication number: 20120064227Abstract: Embodiments disclosed herein are directed to compliant probe structures for making temporary or permanent contact with electronic circuits and the like. In particular, embodiments are directed to various designs of cantilever-like probe structures. Some embodiments are directed to methods for fabricating such cantilever structures. In some embodiments, for example, cantilever probes have extended base structures, slide in mounting structures, multi-beam configurations, offset bonding locations to allow closer positioning of adjacent probes, compliant elements with tensional configurations, improved over travel, improved compliance, improved scrubbing capability, and/or the like.Type: ApplicationFiled: October 14, 2011Publication date: March 15, 2012Inventors: Richard T. Chen, Ezekiel J. J. Kruglick, Christopher A. Bang, Dennis R. Smalley, Pavel B. Lembrikov
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Publication number: 20120003543Abstract: A structure including a network of parallel, homogeneous pores extending through the structure, and an outer frame around the lateral faces of the structure. The structure and the frame are made of carbon. The electrode is covered by a layer based on lead. The pores are filled with an active material based on lead.Type: ApplicationFiled: March 23, 2010Publication date: January 5, 2012Applicant: Commissariat A L'Energie Atomique Et Aux Energies AlternativesInventors: Angel Zhivkov Kirchev, Nina Kircheva
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Publication number: 20110247859Abstract: The manufacture of a submillimetric grid includes the production of a mask having submillimetric openings, referred to as a network mask, on the main face, from a solution of colloidal nanoparticles with a given glass transition temperature Tg, the drying of the masking layer at a temperature below the Tg; the formation of the electroconductive grid from the network mask including in this order: deposition of at least one electroconductive material, referred to as grid material, having an electricity resistivity of less than 10?5 ohm.cm; removal of the masking layer, revealing the mother grid; optional deposition, by electrodeposition, of an electroconductive material, referred to as overgrid material, the surface subjacent to the mother grid then being dielectric; a detachment, of the mother grid or the overgrid, of a thickness of at least 500 nm. The invention also relates to the detached grid.Type: ApplicationFiled: September 25, 2009Publication date: October 13, 2011Inventors: Georges Zagdoun, Bernard Nghiem, Emmanuel Valentin, Eddy Royer
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Patent number: 7897303Abstract: A method of applying to a display substrate color elements and addressing busbars in a defined alignment relative to each other includes: forming said color elements and said busbars on a surface of a transfer carrier; 10 adhering said color elements and said busbars to said display substrate; and removing said transfer carrier.Type: GrantFiled: March 17, 2005Date of Patent: March 1, 2011Assignee: Hewlett-Packard Development Company, L.P.Inventors: John Christopher Rudin, Adrian Derek Geisow, Stephen Christopher Kitson
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Publication number: 20100314254Abstract: There is provided a method of manufacturing a wiring substrate. The method includes: (a) forming a first resist layer having first openings therein on a first surface of a support plate, forming first plated films in the first openings by an electrolytic plating method, and removing the first resist layer; (b) forming a second resist layer having second openings therein on the first surface of the support plate, forming second plated films in the second openings by an electrolytic plating method, and removing the second resist layer; (c) forming a wiring layer and an insulating layer such that the wiring layer is electrically connected to the first and second plated films; and (d) removing the support plate to expose the first and second plated films.Type: ApplicationFiled: June 10, 2010Publication date: December 16, 2010Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Kotaro Kodani
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Patent number: 7790269Abstract: To produce an ultra-thin copper foil with a carrier foil that microscopic crystal grains can be deposited without being affected by the surface roughness of a carrier foil, etching can be performed until an ultra-fine width such that line/space is 15 mum or less, and the microscopic line and a wiring board have large peel strength even after line of 15 mum is etched. An ultra-thin copper foil wherein a carrier foil, a peeling layer, an ultra-thin copper foil are laminated in this order, the ultra-thin copper foil (before roughening treatment is performed) is an electrolytic copper foil that surface roughness of 2.5 mum as ten point height of roughness profile, and the minimum distance between peaks of salients of a based material is 5 mum or more. Moreover, the surface of the ultra-thin copper foil is performed roughening treatment.Type: GrantFiled: September 5, 2008Date of Patent: September 7, 2010Assignee: The Furukawa Electric Co., Ltd.Inventors: Akitoshi Suzuki, Shin Fukuda
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Publication number: 20100051466Abstract: Electrochemical fabrication processes and apparatus for producing multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers including operations for providing coatings of dielectric material that isolate at least portions of a first conductive material from (1) other portions of the first conductive material, (2) a second conductive material, or (3) another dielectric material, and wherein the thickness of the dielectric coatings are thin compared to the thicknesses of the layers used in forming the structures. In some preferred embodiments, portions of each individual layer are encapsulated by dielectric material while in other embodiments only boundaries between distinct regions of materials are isolated from one another by dielectric barriers.Type: ApplicationFiled: July 21, 2009Publication date: March 4, 2010Applicant: Microfabrica Inc.Inventors: Dennis R. Smalley, Adam L. Cohen, Ananda H. Kumar, Michael S. Lockard
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Publication number: 20100028198Abstract: A method of electrowinning or electrorefining copper from a copper electrolyte solution which contains chloride ions, the method comprising the steps of: (a) forming a polyacrylamide solution by dissolving polyacrylamide, having a molecular weight range of 5,000 to 20,000,000 Daltons, in an acidic medium and under conditions to form a polyacrylamide block copolymer having blocks of carboxyl groups dispersed along the polymer backbone; (b) introducing the polyacrylamide solution into an electrolytic cell containing the copper electrolyte solution at a polyacrylamide concentration of 0.01-10 mg/L; and (c) electroplating copper from the copper electrolyte solution to form a copper cathode.Type: ApplicationFiled: August 23, 2005Publication date: February 4, 2010Inventors: Cesimiro Paulino Fabian, Thomas William Lancaster, Natalie Lancaster
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Patent number: 7648620Abstract: A method for manufacturing a master disk for magnetic transfer, comprising the steps of electroforming a master substrate of a metal disk with a surface on which an convexoconcave pattern corresponding to information to be transferred is transferred using a reverse die with a reversed convexoconcave pattern, and forming a magnetic layer on the convexoconcave pattern of the master substrate, the method comprising the steps of: a conductive layer forming step to form a conductive layer with a thickness t1 on a surface of the reverse die; an initial electroforming step to form a first plated layer with a thickness t2 equal to or more than the thickness t1 of the conductive layer by plating a surface of the conductive layer at a current density of 0.35 A/dm2 or less; and a main electroforming step to form a second plated layer by plating a surface of the first plated layer at a current density of 0.35 A/dm2 or more.Type: GrantFiled: March 29, 2006Date of Patent: January 19, 2010Assignee: FUJIFILM CorporationInventor: Yanlong Che
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Publication number: 20090250640Abstract: Microwave source and polarizer which is formed of an electroformed monobloc comprising a thick plate or septum, greater than 1 mm in thickness. Frequencies of application include the 7.25 GHz and 8.4 GHz frequency bands.Type: ApplicationFiled: November 10, 2008Publication date: October 8, 2009Applicant: ThalesInventors: Pierre-Henri Boutigny, Pascal Boivin, Alain Lefevre
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Publication number: 20090141382Abstract: A magnetic transfer master disk including a magnetic layer and exhibiting excellent shape stability of a protrusion/recess pattern is provided. An initial layer formed of a conductive film is formed on a surface of a master on which a pattern of minute protrusions/recesses is formed, and then a magnetic layer (principal layer) is formed on the initial layer, and then, a metal layer is formed by means of electroforming. A duplicate in which the initial layer, the magnetic layer and the metal layer have been integrated is peeled off from the master, thereby obtaining a magnetic transfer master disk, which is a duplicate in which the magnetic layer and the initial layer are deposited on the protruded/recessed surface of the metal layer.Type: ApplicationFiled: November 20, 2008Publication date: June 4, 2009Applicant: FUJIFILM CORPORATIONInventors: Takeo KIDO, Katsuhiro Nishimaki
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Publication number: 20090134033Abstract: The present invention provides a method for directed assembly of a conducting polymer. A method of the invention comprises providing a template such as an insulated template and electrophorectically assembling a conducting polymer thereon. Preferably, the template comprises a patterned electrode on which the conducting polymer is assembled. Moreover, the invention provides a method for transferring an assembled conducting polymer. For example, a method of the invention comprises providing a substrate such as a polymeric substrate and contacting a surface thereof with an assembled conducting polymer. The assembled conducting polymer can be disposed on a patterned electrode of a template, hi one embodiment, a method comprises removing the substrate. By removing the substrate, the assembled conducting polymer is transferred from the patterned electrode of the template to the substrate. The invention also provides a device with a template or substrate comprising an assembled conducting polymer.Type: ApplicationFiled: June 7, 2006Publication date: May 28, 2009Inventors: Joey L. Mead, Carol M.F. Barry, Ahmed Busnaina, Ming Wei, Zhenghong Tao
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Patent number: 7425286Abstract: An optical waveguide apparatus includes an optical waveguide, such as an optical sheet of a two-dimensional slab waveguide, and an appropriately-shaped plated structure provided in the optical waveguide. Typically, the plated structure is constructed so as to serve as an optical-path converting unit for optically coupling the optical waveguide and an optical device, which is to be provided on or in the vicinity of the optical waveguide, or as at least a part of a via penetrating the optical waveguide.Type: GrantFiled: October 11, 2005Date of Patent: September 16, 2008Assignee: Canon Kabushiki KaishaInventor: Toshihiko Ouchi
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Publication number: 20080187764Abstract: Disclosed herein is a nano- or micro-scale organic-inorganic composite device and a method for producing the same. The nano- or micro-scale organic-inorganic composite device includes a first electrode, a second electrode, and a photoactive layer formed of a fullerene-conducting polymer composite interposed between opposing surfaces of the first electrode and the second electrode, and a method of producing a nano- or micro-scale organic-inorganic composite device capable of mass production of the nano- or micro-scale organic-inorganic composite device, by producing an integrated structure of nano- or micro-scale organic-inorganic composite devices of a uniform size and quality using a porous template, where each device includes a first and second electrode, and a photoactive layer.Type: ApplicationFiled: September 21, 2007Publication date: August 7, 2008Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Won Cheol JUNG, Seok Gwang DOO, Sung Ho PARK, Sang Cheol PARK, Sang Hoon YOO, Sung Wan KIM
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Publication number: 20080180510Abstract: A print head includes a first electrode layer including a plurality of generator electrodes, a second electrode layer including a plurality of discharge electrodes, and an insulating layer disposed between the generator electrodes of the first electrode layer and the discharge electrodes of the second electrode layer. The discharge electrodes include at least one discharge aperture extending therethrough. Each discharge aperture has an undercut region defining a discharge surface spaced from and substantially parallel to an opposed surface of the insulating layer.Type: ApplicationFiled: January 29, 2007Publication date: July 31, 2008Inventors: Richard Fotland, Eric Hanson, Napoleon Leoni, Paul McClelland
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Patent number: 7351313Abstract: The object of the present invention is to provide a nano-scale molecular assembly such as a conductive nano-wire. Specifically, there is provided an electrolytic apparatus for forming a molecular assembly, including two electrodes and an electrolytic cell holding an electrolyte and the two electrodes, wherein the gap between the two electrodes is from 1 nm to 100 ?m, by allowing the electrolytic cell to hold an electrolyte containing molecules that is to constitute the molecular assembly, and applying a voltage across the two electrodes in the state wherein the electrolyte and the two electrodes are in contact.Type: GrantFiled: March 7, 2003Date of Patent: April 1, 2008Assignee: National Institute of Information and Communications Technology, Incorporated Administrative AgencyInventors: Hiroyuki Hasegawa, Tohru Kubota, Shinro Mashiko
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Patent number: 7267755Abstract: A method of making a microstructure includes the steps of providing a circuit board that includes a dielectric layer and a conductor layer formed on the dielectric layer, forming a metal structure on the circuit board such that the metal structure extends through the dielectric layer, and removing at least a portion of the dielectric layer adjacent to the conductor layer and the metal structure to result in the microstructure.Type: GrantFiled: September 26, 2003Date of Patent: September 11, 2007Assignee: Sentelic CorporationInventors: Jao-Ching Lin, Pei-Pei Ding
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Patent number: 7267756Abstract: The present invention provides a mold for fine electroforming M having a simple structure. In order to improve the productivity of a metal product, an electrode portion can be arranged with a much higher density, and a metal thin film formed on the electrode portion can easily be peeled off. The present invention provides a manufacturing method for manufacturing the mold M with a higher accuracy and by an easier way. The mold for fine electroforming M has a conductive substrate 1 to function as a cathode during electroforming and insulation layer 2 having an opening 21, which has a shape corresponding to a shape of a plane shape of the metal product P and is through to the conductive substrate 1, and composed of an inorganic insulation material having a thickness T2 of not less than 10 nm and less than one-half the thickness T1 of the metal product P. The surface of the conductive substrate 1 exposed at the opening 21 is adapted to serve as the electrode portion.Type: GrantFiled: February 18, 2003Date of Patent: September 11, 2007Assignee: Sumitomo Electric Industries, Ltd.Inventors: Koji Nitta, Shinji Inazawa, Akihisa Hosoe
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Patent number: 7223328Abstract: Provided is a gas molecule sensor, characterized in that the sensing element is a polycrystalline tin oxide film having a thickness less than 1 ?m. The sensing element is produced by electrolytic deposit of a tin film on an insulating support in an electromechanical cell, where the anode is comprised of tin and the cathode is a conductive film applied on the surface of the insulating support at one of its ends, the two electrodes being separated by an electrolyte comprised of a tin salt solution, and by passing a constant current through said cell. The deposit step is followed by an oxidizing step.Type: GrantFiled: July 18, 2001Date of Patent: May 29, 2007Assignee: Centre National de la Recherche ScientifiqueInventors: Vincent Fleury, Thierry Devers, Lévi Allam
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Patent number: 7060364Abstract: A film carrier tape for mounting electronic components or devices that excels in not only migration resistance but also adhesiveness of wiring to insulating film; and a process for producing the same. The film carrier tape for mounting electronic components or devices has seed layer comprising a zinc layer superimposed on a treated surface of insulating film and a nickel base metal layer superimposed on a surface of a zinc layer, or comprising a layer of alloy containing elemental nickel and elemental zinc in specified proportion, superimposed on a treated surface of insulating film). In the film carrier tape for mounting electronic components or devices, at least part of a region extending across a width of wiring from an edge side thereof to the treated surface of the insulating film may be continuously covered with a zinc coating layer comprising elemental zinc.Type: GrantFiled: December 23, 2003Date of Patent: June 13, 2006Assignee: Mitsui Mining & Smelting Co., Ltd.Inventors: Tatsuo Kataoka, Yoshikazu Akashi
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Patent number: 7025865Abstract: A method for manufacturing a metal mask that facilitates easy dimensional control in the manufacturing process and can manufacture multiple metal masks having high and consistent precision. A Cr film 2 having a mask pattern 2a is formed on the surface of a glass plate 1, a dry film 4 is formed on the Cr film 2, the dry film 4 is exposed from the glass plate 1 side with the Cr film 2 as a mask, a mask pattern 4a having the same shape as that of the mask pattern 2a is formed on the dry film 4, and a metal plating layer 6 is formed on the Cr film 2. The metal plating layer 6 is separated to form a metal mask 7.Type: GrantFiled: September 25, 2001Date of Patent: April 11, 2006Assignee: Eastman Kodak CompanyInventor: Kiyoshi Ogawa
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Patent number: 6902660Abstract: Disclosed is a fabrication method of a printed circuit board, consisting of plating a metal on a pattern-formed metallic substrate to form a conductive metal line; forming a polymer layer as a base substrate over the conductive metal line-formed metallic substrate and drying the formed polymer layer; forming a via hole in the polymer layer, followed by plugging the formed via hole by electroplating; and removing the metallic substrate. The method is advantageous in terms of maximum efficiency of use of the surface area of PCB, and fineness and high integration of circuits because of not requiring an additional etching process.Type: GrantFiled: August 30, 2002Date of Patent: June 7, 2005Assignee: Korea Advanced Institute of Science and TechnologyInventors: Hyuek Jae Lee, Jin Yu
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Patent number: 6849170Abstract: A process for making a microdevice that includes the steps of providing a base member and selectively electroforming a support member for supporting a microplatform with respect to the base member. The process also includes the steps of selectively electroforming the microplatform and forming a flexible hinge member for hingedly connecting the microplatform to the support member and allowing relative movement of the microplatform with respect to the support member. This microdevice, when compared to prior art devices, can have improved mechanical strength, rigidity, low deformation, and high planarity.Type: GrantFiled: January 27, 2003Date of Patent: February 1, 2005Assignee: Institut National D'OptiqueInventors: Hubert Jerominek, Patrice Topart
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Publication number: 20040253465Abstract: A corrosion prevention method includes coating a lamination of layered steel parts. The lamination is vacuum-impregnated with an acrylic resin having a high permeability. The acrylic resin fills the gaps between the steel layers of the lamination and is cured. Then, an insulation coating is applied using anion electrodeposition. The gaps and edges of the steel parts are protected by the highly corrosion-resistant resin. Consequently, the lamination is highly corrosion-resistant.Type: ApplicationFiled: January 29, 2004Publication date: December 16, 2004Inventors: Shinichi Namiki, Kazunori Sakamoto
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Publication number: 20040144653Abstract: A process for making a microdevice that includes the steps of providing a base member and selectively electroforming a support member for supporting a microplatform with respect to the base member. The process also includes the steps of selectively electroforming the microplatform and forming a flexible hinge member for hingedly connecting the microplatform to the support member and allowing relative movement of the microplatform with respect to the support member. This microdevice, when compared to prior art devices, can have improved mechanical strength, rigidity, low deformation, and high planarity.Type: ApplicationFiled: January 27, 2003Publication date: July 29, 2004Applicant: Institut National D'OptiqueInventors: Hubert Jerominek, Patrice Topart
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Publication number: 20040084810Abstract: A three-step method in which a printed circuit board (PCB) is laser drilled to form a via, and the internal walls of the via are plated with conductive material to connect conductive layers at the upper and lower ends of the via. In the first step a first laser removes a first portion of the board. In the second step a second laser removes a further portion of the board to form a via. In the third step a third laser ablates conductive material at the bottom of the via to plate the inner walls of the via.Type: ApplicationFiled: November 1, 2002Publication date: May 6, 2004Inventors: Winco Kam-Chuen Yung, Esther Sau-Wai Leung, Mark D. Owen
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Publication number: 20040078968Abstract: Method for producing a printed circuit board on a substrate comprising five steps: (a) printing a predeterrnmined circuit pattern onto the substrate using a conductive material, (b) applying additional connection traces onto the substrate, (c) depositing a metal onto the printed circuit pattern by electroplating or electroforming a metal onto the substrate, (d) applying an adhesion and insulation glue layer over portions of the metal that comprises the desired circuit pattern, and (e) removing any undesired connection traces from the substrate.Type: ApplicationFiled: October 22, 2002Publication date: April 29, 2004Inventor: Sul Kay Wong
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Patent number: 6680215Abstract: A method of preparing a conductive polymeric film, includes providing a liquid crystal phase comprising a plurality of hydrophobic cores, the phase on a substrate, introducing a hydrophobic component to the phase, the component a conductive polymer precursor, and applying an electric potential across the liquid crystal phase, the potential sufficient to polymerize the said precursor.Type: GrantFiled: October 17, 2002Date of Patent: January 20, 2004Assignee: Northwestern UniversityInventors: Samuel I. Stupp, James F. Hulvat
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Publication number: 20030201183Abstract: One or more fractal antennas are produced in an electroforming circuit. A stainless steel on glass mandrel is covered with a dielectric in an inverse image of a fractal antenna to be formed. The portion of the stainless steel uncovered by the dielectric is chemically washed so that a fractal antenna formed thereon can be more efficiently removed. The mandrel is made a cathode in an electroforming circuit, which results in a fractal antenna being formed on the mandrel. The fractal antenna is separated from the mandrel and mounted on a rigid or semi-rigid substrate.Type: ApplicationFiled: May 15, 2003Publication date: October 30, 2003Inventor: Jamie Moore
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Patent number: 6635158Abstract: In an array apparatus, each MEMS element, comprising an actuatable element and a supportive handle, is mounted over a plurality of electrodes wherein the air gap is controlled by the thickness of the electrodes and not primarily by the structure of the handle. The structure of electrostatic actuation electrodes in specific embodiments is disclosed. While the invention is primarily a technique for reducing the air gap without unduly limiting the thickness of the handle, the invention may also be used to establish an air gap greater than the thickness of the handle.Type: GrantFiled: July 30, 2001Date of Patent: October 21, 2003Assignee: Glimmerglass Networks, Inc.Inventors: Bryan P. Staker, Douglas L. Teeter, Jr., David T. Amm
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Patent number: 6585874Abstract: One or more fractal antennas are produced in an electroforming circuit. A stainless steel on glass mandrel is covered with a dielectric in an inverse image of a fractal antenna to be formed. The portion of the stainless steel uncovered by the dielectric is chemically washed so that a fractal antenna formed thereon can be more efficiently removed. The mandrel is made a cathode in an electroforming circuit, which results in a fractal antenna being formed on the mandrel. The fractal antenna is separated from the mandrel and mounted on a rigid or semi-rigid substrate.Type: GrantFiled: March 8, 2001Date of Patent: July 1, 2003Assignee: Hewlett-Packard Development Co. L.P.Inventor: Jamie Moore
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Patent number: 6527935Abstract: An apparatus and process for electroplating a pin grid array device having a plurality of pins, the pins having a side surface and an extremity. The apparatus comprises a contact plate defining a plane and having a plurality of electrically conductive flexible contact fingers extending from the contact plate away from the plane, the contact fingers adapted to flex when contacted by the pins. The process comprises contacting each of the plurality of pins with a flexible contact finger extending from a single electrically conductive plate, the conductive plate defining a plane, wherein the flexible contact fingers extend away from the plane.Type: GrantFiled: February 7, 2001Date of Patent: March 4, 2003Assignee: International Business Machines CorporationInventors: Emanuele F. Lopergolo, Mark A. Brandon, Arden S. Lake, Joseph M. Sullivan, Jr.
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Publication number: 20030002813Abstract: The present invention's device and method of manufacturing metal ferrules used as connector elements for optical fibers is characterized such that, by growth-guidance of an internal-diameter formation member whose external diameter is the same as the internal diameter of the metal ferrule to be manufactured, an electroformed layer having a cylindrical internal hole is grown on the cathode side of a electroforming cistern and said cylindrical electroformed layer is grown to a prescribed external diameter in the process of lifting such electroformed layer from the aforementioned electroforming cistern, and such that said cylindrical electroformed layer, when outside the aforementioned electroforming cistern, is cut to prescribed dimensions.Type: ApplicationFiled: July 2, 2001Publication date: January 2, 2003Inventor: Takahiko Mukouda
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Patent number: 6475321Abstract: An electrode substrate comprises a backing substrate carrying thereon a metal electrode layer and/or a recording layer, the layer or layers having a smooth surface area with a surface roughness of less than 1 nm by more than 1 &mgr;m2. The smooth surface of the metal electrode layer and/or the recording layer is formed by firstly forming the layer on another substrate having a corresponding smooth surface and then peeling the another substrate off the layer after the layer is bonded to the surface of the backing substrate, whereby the smooth surface profile of the another substrate is transferred to the surface of the layer formed on the backing substrate.Type: GrantFiled: July 25, 2000Date of Patent: November 5, 2002Assignee: Canon Kabushiki KaishaInventors: Tsutomu Ikeda, Takehiko Kawasaki
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Publication number: 20020127417Abstract: One or more fractal antennas are produced in an electroforming circuit. A stainless steel on glass mandrel is covered with a dielectric in an inverse image of a fractal antenna to be formed. The portion of the stainless steel uncovered by the dielectric is chemically washed so that a fractal antenna formed thereon can be more efficiently removed. The mandrel is made a cathode in an electroforming circuit, which results in a fractal antenna being formed on the mandrel. The fractal antenna is separated from the mandrel and mounted on a rigid or semi-rigid substrate.Type: ApplicationFiled: March 8, 2001Publication date: September 12, 2002Inventor: Jamie Moore
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Publication number: 20020122918Abstract: The invention relates to a multilayer microstructure and a method for preparing thereof. The method involves first applying a first photodefinable composition having a first exposure wavelength on a substrate to form a first polymeric layer. A portion of the first photodefinable composition is then exposed to electromagnetic radiation of the first exposure wavelength to form a first pattern in the first polymeric layer. After exposing the first polymeric layer, a second photodefinable composition having a second exposure wavelength is applied on the first polymeric layer to form a second polymeric layer. A portion of the second photodefinable composition is then exposed to electromagnetic radiation of the second exposure wavelength to form a second pattern in the second polymeric layer. In addition, a portion of each layer is removed according to the patterns to form a multilayer microstructure having a cavity having a shape that corresponds to the portions removed.Type: ApplicationFiled: March 5, 2001Publication date: September 5, 2002Inventors: Paul Michael Dentinger, Karen Lee Krafcik
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Publication number: 20020117400Abstract: After forming first catalyst cores on the surfaces of adhesive layers of an insulating substrate, a plating resist is patterned. The insulating substrate is treated with an aqueous solution containing an anionic surfactant. Then, the insulating substrate is soaked successively in a palladium—tin mixed colloid catalyst solution and an accelerator solution, whereby second catalyst cores are formed on the surface of the adhesive layer not covered with the plating resist. Thereafter, conductive circuits are formed by electroless copper plating. Due to the anionic surfactant, adsorption of the palladium—tin mixed colloid catalyst to the plating resist is suppressed, and the first catalyst cores promote the formation of second catalyst cores. By setting the concentration of the first catalyst cores to 4×10−8 atomic mol/cm2 or less, a fine conductive circuit with a line width/line space of 50 &mgr;m or less having a high electrical insulating property between circuit lines can be formed.Type: ApplicationFiled: February 20, 2002Publication date: August 29, 2002Applicant: NEC CORPORATIONInventor: Sinichi Hotta
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Patent number: 6419810Abstract: Electroforming is performed in an electroforming bath with a cathode of a metal wire member immersed in an electroforming solution to electrodeposit nickel around the aluminum alloy wire member. The aluminum alloy wire member is removed by dissolution with an alkaline solution from an obtained nickel electroformed product. Accordingly, a nickel cylinder is obtained, which has a through-hole formed corresponding to the wire member. The cylinder is cut into those having a predetermined length. The outer circumference is subjected to cutting based on the through-hole to obtain a ferrule. The inner diameter accuracy of the through-hole of the ferrule is determined by the outer diameter accuracy of the wire member.Type: GrantFiled: November 26, 1999Date of Patent: July 16, 2002Inventors: Tetsuo Tanaka, Shinichi Okamoto
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Patent number: 6308405Abstract: An electrode substrate and a recording medium having a smooth surface with surface unevenness of 1 nm or less and a size of 1 &mgr;m□ or more are disclosed. An electrode substrate and a recording medium having a concave-shaped groove for tracking on the surface, which groove has a depth which can detect of the tunnel current from the bottom thereof by a probe electrode for scanning the surface are also disclosed. Information processing devices equipped with the smooth recording medium, an electroconductive probe arranged approximate to the recording medium and a pulse voltage application circuit for recording are also disclosed.Type: GrantFiled: November 10, 1997Date of Patent: October 30, 2001Assignee: Canon Kabushiki KaishaInventors: Osamu Takamatsu, Katsunori Hatanaka, Kiyoshi Takimoto, Haruki Kawada, Ken Eguchi, Yuko Morikawa, Hiroshi Matsuda, Toshihiko Takeda, Yoshihiro Yanagisawa, Hisaaki Kawade, Hideyuki Kawagishi
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Patent number: 6294111Abstract: Apparatus and methods for manufacturing electrochromic cells. Layers of various inks are printed on substrates by high speed printing means. The electrochromic cells comprise layers of electrode, electrolyte, and counter electrode ink materials which are printed on at least one substrate. When an electrical voltage differential is introduced between the electrode and counter electrode layers, an electrochemical reaction occurs in the electrochemical cell.Type: GrantFiled: August 20, 1998Date of Patent: September 25, 2001Assignee: Steinbeis IBL GmbHInventors: James H. Shacklett, III, Philip M. Henry, Richard Snyder, Robert Anthony
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Patent number: 6284120Abstract: A method of electroplating using a photoresist layer on a conductive seed layer. The photoresist layer defines a column-shaped space. Ridges are formed on the wall surfaces of the photoresist layer surrounding the column-shaped space. The ridges extend from the conductive seed layer to the opening of the column-shaped space. The electrolytic solution drives bubbles out of the column-shaped space, so that the column-shaped space is filled with the electrolytic solution without any cavities. In addition, if hydrogen bubbles are generated in the column-shaped space, the electrolytic solution serves to drive the hydrogen bubbles out of the column-shaped space along the corners of the column-shaped space.Type: GrantFiled: July 9, 1999Date of Patent: September 4, 2001Assignee: Fujitsu LimitedInventors: Takahiro Imamura, Masaki Katayama
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Patent number: 6109369Abstract: A chip scale package includes a mandrel built flexible circuit having a circuit trace on a first surface and an aperture extending therethrough. The chip scale package includes a pad covering the aperture on the first surface of the flexible circuit and a raised interconnection member extending outwardly from the pad. The chip scale package also includes a chip secured to a second surface of the flexible circuit, such that the chip is electrically connected to the pad.Type: GrantFiled: January 29, 1999Date of Patent: August 29, 2000Assignee: Delphi Technologies, Inc.Inventors: William Robert Crumly, Pete Henry Hudson, Robert Joseph Cochrane, Haim Feigenbaum, Eric Dean Jensen
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Patent number: 6085414Abstract: A process using a shim stock or foil to make flexible circuits having raised pressure contact features protruding outwardly from two surfaces. A first set of raised electrical pressure contact features are made by placing a shim stock or foil of stainless-steel on a piece of soft metal or other suitable substrate and forcing a tool into the foil to form dimples in one face. Thereafter, the foil is turned over and the process repeated on the other face of the foil. The resultant foil includes a first face having a first dimple and a first bump extending outwardly from the first face. A flash coating is formed on the foil and electrical traces are deposited on the first face of the foil including into the first dimple and over the first bump. A dielectric substrate is selectively deposited over the electrical traces and the complete subassembly is removed from the foil. A flash coating is etched away and optionally a second dielectric substrate is selectively deposited over the electrical traces.Type: GrantFiled: July 30, 1998Date of Patent: July 11, 2000Assignee: Packard Hughes Interconnect CompanyInventors: David Bryan Swarbrick, Bao Le, Oswaldo Ernesto Caballero
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Patent number: 6074543Abstract: A method to produce a liquid ejecting head having an ejection outlet for ejecting a liquid, a heat generating element for applying thermal energy to the liquid, a liquid flow path comprised of a first path portion in fluid communication with the ejection outlet and a second path portion disposed below the first path portion and provided with the heat generating element in a bottom surface thereof, a partition wall for partitioning the liquid flow path into the first path portion and second path portion, and a movable member disposed above the heat generating element in the portion wall and arranged as displaceable to a side of the first path portion in accordance with a bubble generated in the liquid by the thermal energy in which upon generation of the bubble the first path portion and the second path portion are in fluid communication with each other and the pressure is directed toward said ejection outlet by the movable member displaced to eject the liquid droplet.Type: GrantFiled: April 15, 1996Date of Patent: June 13, 2000Assignee: Canon Kabushiki KaishaInventors: Aya Yoshihira, Hiroshi Sugitani, Tadayoshi Inamoto, Makiko Kimura, Toshio Kashino, Shuji Koyama, Takeshi Okazaki, Kiyomitsu Kudo, Yoshie Nakata, Toshihiro Mori