Repairing Circuit Patents (Class 216/21)
  • Patent number: 9804465
    Abstract: Disclosed is a method for detecting defects of a TFT array substrate. The method comprises steps of: positioning an abnormal area of the TFT array substrate; separating the abnormal area from other areas of the array substrate; and treating the abnormal area as such that multiple layers in the abnormal area can be revealed one by one, and detecting the revealed layers to determine a defective layer in the abnormal area.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: October 31, 2017
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Ri Hong, Kecheng Xie
  • Patent number: 9031684
    Abstract: A method and system for integrated circuit fabrication is disclosed. In an example, the method includes determining a first process parameter of a wafer and a second process parameter of the wafer, the first process parameter and the second process parameter corresponding to different wafer characteristics; determining a variation of a device parameter of the wafer based on the first process parameter and the second process parameter; constructing a model for the device parameter as a function of the first process parameter and the second process parameter based on the determined variation of the device parameter of the wafer; and performing a fabrication process based on the model.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: May 12, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Nai-Han Cheng, Chin-Hsiang Lin, Chi-Ming Yang, Chun-Lin Chang, Chih-Hong Hwang
  • Patent number: 8980676
    Abstract: A method of forming a window cap wafer (WCW) structure for semiconductor devices includes machining a plurality of cavities into a front side of a first substrate; bonding the first substrate to a second substrate, at the front side of the first substrate; removing a back side of the first substrate so as to expose the plurality of cavities, thereby defining the WCW structure comprising the second substrate and a plurality of vertical supports comprised of material of the first substrate.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: March 17, 2015
    Assignee: Raytheon Company
    Inventors: Buu Diep, Stephen H. Black
  • Patent number: 8657961
    Abstract: Embodiments of the invention generally provide methods for cleaning a UV processing chamber. In one embodiment, the method includes flowing an oxygen-containing gas through a plurality of passages formed in a UV transparent gas distribution showerhead and into a processing region located between the UV transparent gas distribution showerhead and a substrate support disposed within the thermal processing chamber, exposing the oxygen-containing gas to UV radiation under a pressure scheme comprising a low pressure stage and a high pressure stage to generate reactive oxygen radicals, and removing unwanted residues or deposition build-up from exposed surfaces of chamber components presented in the thermal processing chamber using the reactive oxygen radicals.
    Type: Grant
    Filed: April 4, 2013
    Date of Patent: February 25, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Bo Xie, Alexandros T. Demos, Scott A. Hendrickson, Sanjeev Baluja, Juan Carlos Rocha-Alvarez
  • Patent number: 8366952
    Abstract: A micro-fluid ejection device structure and method therefor having improved low energy design. The devices include a semiconductor substrate and an insulating layer deposited on the semiconductor substrate. A plurality of heater resistors are formed on the insulating layer from a resistive layer selected from the group consisting of TaAl, Ta2N, TaAl(O,N), TaAlSi, Ti(N,O), WSi(O,N), TaAlN, and TaAl/TaAlN. A sacrificial layer selected from an oxidizable metal and having a thickness ranging from about 500 to about 5000 Angstroms is deposited on the plurality of heater resistors. Electrodes are formed on the sacrificial layer from a first metal conductive layer to provide anode and cathode connections to the plurality of heater resistors. The sacrificial layer is oxidized in a plasma oxidation process to provide a fluid contact layer on the plurality of heater resistors.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: February 5, 2013
    Assignee: Lexmark International, Inc.
    Inventors: Frank E. Anderson, Byron V. Bell, Robert W. Cornell, Yimin Guan
  • Patent number: 8277672
    Abstract: Silicon, silicon dielectrics and low-k dielectrics are etched in a focused ion beam process using gaseous fluorinating etchants selected from the group of triethylamine trihydrofluoride (TEATHF) and xenon fluoride. Xenon fluoride is combined with a secondary protecting agent to avoid undesired corrosion of bare silicon. The protecting agent may be an oxidizing agent such as oxygen, perfluorotripentylamine (PFTPA), or a heavy completely fluorinated hydrocarbon.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: October 2, 2012
    Assignee: Tiza Lab, LLC
    Inventor: Vladimir V. Makarov
  • Patent number: 8222143
    Abstract: A reworking method for integrated circuit devices includes the following: providing a substrate having a first base layer and a first dielectric layer formed thereon, performing a first dry etching process to remove the first dielectric layer, performing a CMP process to remove the first base layer, and sequentially reforming a second base layer and a second dielectric layer on the substrate. When certain layers on the IC device have hailed an inspection or when quality defects are found, the defective layer is removed according to the provided reworking method.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: July 17, 2012
    Assignee: United Microelectronics Corp.
    Inventors: Yan-Home Liu, Yung-Chieh Kuo, Yi-Ham Tsou, Jeng-Ho Wang, Cheng-Wei Chen, Hsin-Yi Lu
  • Patent number: 7879730
    Abstract: Etch selectivity enhancement during electron beam activated chemical etch (EBACE) is disclosed. A target or portion thereof may be exposed to a gas composition of a type that etches the target when the gas composition and/or target are exposed to an electron beam. By directing an electron beam toward the target in the vicinity of the gas composition, an interaction between the electron beam and the gas composition etches a portion of the target exposed to both the gas composition and the electron beam. Selectivity of etching of the target due to interaction between the electron beam and gas composition may be enhanced in a number of ways.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: February 1, 2011
    Assignee: KLA-Tencor Technologies Corporation
    Inventors: Mehran Naser-Ghodsi, Garrett Pickard, Rudy F. Garcia, Tzu-Chin Chuang, Ming Lun Yu, Kenneth Krzeczowski, Matthew Lent, Sergey Lopatin, Chris Huang, Niles K. MacDonald
  • Patent number: 7867404
    Abstract: A method for removing an undesirable material from an electronic or electrical component and introducing a desirable material in place of the undesirable material. The method can include the replacement of a leaded material found on the component with a no-lead material to meet governmental directives including those of the European Union.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: January 11, 2011
    Inventor: Joel Allen Deutsch
  • Publication number: 20100320384
    Abstract: A method that may be applied to imaging and identifying defects and contamination on the surface of an integrated circuit is described. An energetic beam, such as an electron beam, may be directed at a selected IC location having a layer of a solid, fluid, or gaseous reactive material formed over the surface. The energetic beam disassociates the reactive material in the region into chemical radicals that either chemically etch the surface preferentially, or deposit a thin layer of a conductive material over the local area around the energetic beam. The surface may be examined as various layers are selectively etched to decorate defects and/or as various layers are locally deposited in the area around the energetic beam. SEM imaging and other analytic methods may be used to identify the problem more easily.
    Type: Application
    Filed: August 26, 2010
    Publication date: December 23, 2010
    Inventors: Mark J. Williamson, Paul M. Johnson, Shawn D. Lyonsmith, Gurtel S. Sandhu, Justin R. Arrington
  • Patent number: 7807062
    Abstract: A method of imaging and repairing defects on and below the surface of an integrated circuit (IC) is described. The method may be used in areas as small as one micron in diameter, and may remove the topmost material in the small spot, repeating with various layers, until a desired depth is obtained. An energetic beam, such as an electron beam, is directed at a selected surface location. The surface has an added layer of a solid, fluid or gaseous reactive material, such as a directed stream of a fluorocarbon, and the energetic beam disassociates the reactive material in the region of the beam into radicals that chemically attack the surface. After the defect location is exposed, the method uses the energetic beam to etch undesired materials, and deposit various appropriate materials to fill gaps, and restore the IC to an operational condition.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: October 5, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Mark J. Williamson, Gurtej S. Sandhu, Justin R. Arrington
  • Patent number: 7749397
    Abstract: A micro-fluid ejection device structure and method therefor having improved low energy design. The devices includes a semiconductor substrate and an insulating layer deposited on the semiconductor substrate. A plurality of heater resistors are formed on the insulating layer from a resistive layer selected from the group consisting of TaAl, Ta2N, TaAl(O,N), TaAlSi, Ti(N,O), WSi(O,N), TaAlN, and TaAl/TaAlN. A sacrificial layer selected from an oxidizable metal and having a thickness ranging from about 500 to about 5000 Angstroms is deposited on the plurality of heater resistors. Electrodes are formed on the sacrificial layer from a first metal conductive layer to provide anode and cathode connections to the plurality of heater resistors. The sacrificial layer is oxidized in a plasma oxidation process to provide a fluid contact layer on the plurality of heater resistors.
    Type: Grant
    Filed: February 12, 2007
    Date of Patent: July 6, 2010
    Assignee: Lexmark International, Inc.
    Inventors: Frank E. Anderson, Byron V. Bell, Robert W. Cornell, Yimin Guan
  • Patent number: 7666321
    Abstract: A method for decapsulating a package is provided. The method comprises steps of providing a package having a chip therein, wherein the chip has an active surface and a rear surface. Further, the package further comprises a heat sink, a plurality of solder bumps, a substrate, an underfill and a plurality of solder balls. The method further comprises removing the heat sink and removing the substrate together with the solder balls. A dry etching process is performed to remove a portion of the underfill. A wet etching process is performed to remove the rest portion of the underfill. A thermal process solder bump removal process is performed to melt the solder bumps and then a solder bump removal process is performed to remove the melted solder bumps from the active surface of the chip.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: February 23, 2010
    Assignee: United Microelectronics Corp.
    Inventor: Tung-Yi Shih
  • Patent number: 7591956
    Abstract: A method of stripping nickel from a printed wiring board comprises providing a printed wiring board with a nickel deposit on a surface and contacting the nickel deposit with phosphate ions and an oxidizer. An aqueous solution comprises ammonium ions, phosphate ions and an oxidizing agent present in amounts effective to strip nickel. An aqueous solution comprises about 1% to about 10% by weight hydrogen peroxide and about 5% to about 30% by weight of an ammonium phosphate. A method of pre-treating a copper substrate comprises providing a printed wiring board having a copper substrate and contacting the copper substrate with phosphate ions, and an oxidizer. A method of neutralizing permanganate on a printed wiring board comprises providing a printed wiring board with a permanganate residue on the printed wiring board and contacting the permanganate residue with phosphate ions, and an oxidizer.
    Type: Grant
    Filed: May 3, 2006
    Date of Patent: September 22, 2009
    Assignee: OMG Electronic Chemicals, Inc.
    Inventors: Roger F. Bernards, Joseph S. Bowers
  • Patent number: 7517808
    Abstract: A method for reworking semiconductor materials includes: (i) applying a silicone composition to a surface of a substrate to form a film, (ii) exposing a portion of the film to radiation to produce a partially exposed film having non-exposed regions covering a portion of the surface and exposed regions covering the remainder of the surface; (iii) heating the partially exposed film for an amount of time such that the exposed regions are substantially insoluble in a developing solvent and the non-exposed regions are soluble in the developing solvent; (iv) removing the non-exposed regions of the heated film with the developing solvent to form a patterned film; (v) heating the patterned film for an amount of time sufficient to form a cured silicone layer; and (vi) removing all or a portion of the cured silicone layer by exposure to an anhydrous etching solution including an organic solvent and abase.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: April 14, 2009
    Assignee: Dow Corning Corporation
    Inventors: Gregory Becker, Geoffrey Gardner, Brian Harkness
  • Publication number: 20080099429
    Abstract: Methods for repairing patterned structure of electronic devices. A first substrate with a patterned structure thereon is provided, wherein the patterned structure includes at least one defect. The defect corresponds to a defect region while the patterned structure corresponds to a main region. A first surface treatment is performed on the defect region such that the surface characteristics on the defect region are different from those on the main region. The defect region is repaired by inkjet printing. A second surface treatment is performed on the defect region such that the surface characteristics on the defect region are the same as those on the main region.
    Type: Application
    Filed: July 25, 2007
    Publication date: May 1, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chao-Kai Cheng, Chieh-Yi Huang, Wan-Wen Chiu, Chun-Hung Lin, Chia-Chang Chang
  • Patent number: 7361284
    Abstract: A method for wafer-level package. A cap wafer having cavities is bonded to a support wafer, and a portion of the cap wafer is etched through. The cap wafer is released from the support wafer, and bonded to a transparent wafer, and a portion of the cap wafer corresponding to the cavities is removed so that the remaining cap wafer forms a plurality of support blocks. A device wafer is provided, and the support blocks are bonded to the device wafer so that the support blocks and the transparent wafer hermitically seal the devices disposed in the device wafer.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: April 22, 2008
    Assignee: Touch Micro-System Technology Inc.
    Inventor: Chih-Hsien Chen
  • Patent number: 6857681
    Abstract: In a connecting structure of an air duct of a vehicular air conditioning unit, an end of the air duct is engaged with an air conditioning case when an instrument panel is mounted on a vehicle body with the air duct. Therefore, a sealing member such as packing is not required between the connecting portions of the end of the air duct and an air outlet port of the case.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: February 22, 2005
    Assignee: DENSO Corporation
    Inventor: Hiroshi Nakajima
  • Patent number: 6838009
    Abstract: A method and apparatus are provided for reworking of finishing metallurgy on pads of electronic components. The pads are copper or copper/nickel and have a layer of nickel thereon and an overlying layer of gold. The gold layer is removed first followed by the nickel layer and then the component is treated to remove etch and corrosion products. Media blasting is then used to restore the pads to their original condition as on prime parts. The pads are then replated using conventional nickel and gold plating solutions to form the reworked component.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: January 4, 2005
    Assignee: International Business Machines Corporation
    Inventors: Charles L. Arvin, Daniel G. Berger, Hsichang Liu, Krystyna W. Semkow
  • Publication number: 20040112857
    Abstract: A method and structure for an apparatus for removing metal from an integrated circuit structure is disclosed. A container holds an integrated circuit structure that has a metal portion. An electronic device connected to the container produces an electronic field proximate to a limited region of the metal portion. A first supply connected to the container supplies an oxidizing agent within the container. A solvent supply connected to the container supplies solvent to the limited region of the metal portion.
    Type: Application
    Filed: December 12, 2002
    Publication date: June 17, 2004
    Applicant: International Business Machines Corporation
    Inventors: Steven B. Herschbein, Herschel M. Marchman, Chad Rue, Michael R. Sievers
  • Publication number: 20040033425
    Abstract: The invention refers to a procedure for etching of materials at the surface by focussed electron beam induced chemical reactions at said surface. The invention is characterized in that in a vacuum atmosphere the material which is to be etched is irradiated with at least one beam of molecules, at least one beam of photons and at least one beam of electrons, whereby the irradiated material and the molecules of the beam of molecules are excited in a way that a chemical reaction predetermined by said material and said molecules composition takes place and forms a reaction product and said reaction product is removed from the material surface —irradiation and removal step.
    Type: Application
    Filed: May 2, 2003
    Publication date: February 19, 2004
    Inventors: Hans Wilfried Peter Koops, Klaus Edinger
  • Patent number: 6458709
    Abstract: A method for fabricating a repair fuse box of a semiconductor device is disclosed. An etching stop polysilicon layer formed at a belt shape in edge portions of a repair fuse box is broken during a repair etching process without substantial departure from prior art methods for fabricating a repair fuse box of a semiconductor device. Thus, it is possible to improve repair yield of the semiconductor device.
    Type: Grant
    Filed: January 2, 2001
    Date of Patent: October 1, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Eul Rak Kim, Joong Shik Shin
  • Patent number: 6248001
    Abstract: A method and apparatus for removing layers from a circuit side of a semiconductor die includes the use of a holder, for example a semiconductor wafer having an opening therein for receiving the semiconductor die. Additionally the holder can include one or more layers thereover which are removed at a similar rate as those layers which comprise the semiconductor die. A die is placed into the opening and a circuit side of the die is aligned with a front side of the holder, for example using a generally planar surface, and is secured to the holder with an adhesive material. Using a holder reduces uneven layer removal which is known to occur in conventional processing, for example excessive removal at the edges of the die. A potting jig which aids in aligning and securing the die to the holder is also described.
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: June 19, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Bryan C. Carson, Scott E. Moore
  • Patent number: 6245586
    Abstract: A system and method for preparing semiconductor samples for analytical techniques such as backside emission microscopy. Samples may be prepared from a wafer or packaged die. In package form, the package is affixed to a polishing jig such that the backside of the die is oriented to face a polishing wheel. The package material is removed until die attach paddle and the backside of the die are exposed. The material is further removed until a selected thinness of the die is obtained. If the package's leadframe or a portion thereof remains after the removal of package material, a suitable testing fixture is attached thereto. If the leadframe is sacrificed, wire spots on the polished side of the semiconductor die are wire-to-wire bonded to a second leadframe's conductive fingers. In wafer form, the die is separated and encapsulated with a suitable substantially rigid material to form a substantially rigid body that is affixed to the polishing jig.
    Type: Grant
    Filed: October 7, 1999
    Date of Patent: June 12, 2001
    Inventor: James Barry Colvin
  • Patent number: 5976978
    Abstract: A method of repairing severed or damaged data transmission lines of an imager provides a shunt path around the electrical defect in the data transmission line by means of a diode common transmission line. The repair shunt includes a first scan line segment, a common electrode segment, and a second scan line segment, which segments are fused together and to the data line having the electrical defect to bypass the electrical defect. The respective conductive lines are fused together with spot welds formed with the application of a laser. A repaired imager has a data line having an open circuit defect, with respective first and second portions of said data line being coupled to a repair shunt comprising an associated pixel scan line segment and a common electrode segment. In one embodiment of the present invention, a plurality of spot welds are provided in the imager array, each in its unwelded state but capable of being welded by the application of heat.
    Type: Grant
    Filed: December 22, 1997
    Date of Patent: November 2, 1999
    Assignee: General Electric Company
    Inventor: Roger Stephen Salisbury
  • Patent number: 5733468
    Abstract: A pattern plating method for fabricating printed circuit boards begins by bonding a thin layer of copper (e.g., copper foil) to the surface of the board. A photoresist layer is laminated over the copper layer, and then selectively exposed and developed to define a desired pattern of traces. A thick, second layer of copper is deposited on the traces by electrolytic deposition, and the photoresist is then removed. The board is etched with a solution containing cupric chloride (or an ammoniacal etchant) to remove those portions of the first copper layer that are not covered by the second copper layer. The present invention also allows through-holes to be drilled at selected locations after the first layer of copper foil has been bonded to the board. A thin layer of copper is then deposited by electroless deposition to create a conductive surface in the through-holes necessary for the subsequent step of electrolytic deposition in the process above.
    Type: Grant
    Filed: August 27, 1996
    Date of Patent: March 31, 1998
    Inventor: John W. Conway, Jr.
  • Patent number: 5469981
    Abstract: An electrically blowable fuse structure usable with organic insulators in microelectronic parts is provided. The fuse structure is made of a first heat resistant member, a fusing element and a second heat resistant member. The heat resistant members are in substantial contact with the fuse and thermally insulate the fuse from the organic insulator. The ends of each fuse are electrically connected to a pair conductors.A process for fabricating an electrically blowable fuse structure usable with an organic insulator is provided. A substrate with an organic insulator coating and containing electrically conductive features with exposed contacts is provided. A heat shield layer and a fuse layer are deposited sequentially and patterned by subtractive etching. Plurality of conductors are formed over so as to electrically connect each fuse element to a pair of conductors. A second heat resistant member is formed over the fuse area and the substrate is subsequently quoted with an organic insulator.
    Type: Grant
    Filed: October 14, 1994
    Date of Patent: November 28, 1995
    Assignee: International Business Machines Corporation
    Inventors: Kris V. Srikrishnan, James F. White, Jer-Ming Yang