Forming Or Treating Electrical Conductor Article (e.g., Circuit, Etc.) Patents (Class 216/13)
  • Patent number: 11422305
    Abstract: Structures for polarization filtering and methods of forming a structure for polarization filtering. A waveguiding structure has a first waveguide core region including a first plurality of bends, a second waveguide core region including a second plurality of bends laterally spaced from the first plurality of bends by a gap, and a third waveguide core region including a third plurality of bends positioned beneath the gap. The first waveguide core region and the second waveguide core region contain a first material. The third waveguide core region contains a second material that differs in composition from the first material.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: August 23, 2022
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Yangyang Liu, Tymon Barwicz
  • Patent number: 11424227
    Abstract: The present invention provides a display panel, a display module, and a display device. The display panel includes a substrate and micro-LEDs. The display module achieves an extremely-narrow-bezel design by attaching a support plate to one side of a flexible drive circuit board of the display panel, bending a bending region, and attaching a bonding region to another side of the support plate. Multiple display modules are arranged in a accommodating chamber defined by a back plate of the display device and are fixed and joined to each other. Accordingly, a narrow-gap joining technology for micro-LED is realized, thus solving a problem that the micro-LED is too small in size, and realizing large-sized micro-LED displays.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: August 23, 2022
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Minggang Liu, Yong Fan
  • Patent number: 11411215
    Abstract: Herein are described materials for a lithium ion anode, processes of manufacturing the lithium ion anode, and batteries that include the lithium ion anode. The materials can include a metal or metal alloy nanoparticulate carrying a solid electrolyte interface. The process can include admixing a lithium accepting material that is a metal or metal alloy nanoparticulate carrying a solid electrolyte interface with a conductive carbon; and then preparing a film of the admixture on an electrical substrate. The battery is assembled from the as manufactured lithium ion anode.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: August 9, 2022
    Assignee: Advano, Inc.
    Inventors: Alexander L. Girau, Shiva Adireddy
  • Patent number: 11390805
    Abstract: An etching composition and a method of manufacturing a semiconductor device, the composition including 5 wt % to 30 wt % of an oxidizing agent, based on a total weight of the etching composition; a salt including an anion including a carboxylate moiety having 1 to 5 carbon atoms, and an ammonium cation; and a chelating agent including a phosphonic acid having 1 to 8 carbon atoms.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: July 19, 2022
    Assignees: SAMSUNG ELECTRONICS CO., LTD., Soulbrain Co., Ltd.
    Inventors: Jae Sung Lee, Jung Hun Lim, Mihyun Park, Changsu Jeon, Jung-Min Oh, Subin Oh, Hyosan Lee
  • Patent number: 11370968
    Abstract: The disclosure is related to a composition for etching, a method for manufacturing the composition, and a method for fabricating a semiconductor using the same. The composition may include a first inorganic acid, at least one of silane inorganic acid salts produced by reaction between a second inorganic acid and a silane compound, and a solvent. The second inorganic acid may be at least one selected from the group consisting of a sulfuric acid, a fuming sulfuric acid, a nitric acid, a phosphoric acid, and a combination thereof.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: June 28, 2022
    Inventors: Jin Uk Lee, Jae Wan Park, Jung Hun Lim
  • Patent number: 11366541
    Abstract: A display device and an electric apparatus are provided in the present disclosure. A touch unit of the display device includes a touch layer and an optical compensation layer arranged oppositely, the touch layer includes multiple first electrode groups and multiple second electrode groups, multiple second touch electrodes in the second electrode group are connected to each other through the optical compensation layer, and an orthographic projection of the optical compensation layer on a surface of the touch layer covers the touch layer, so that each position of the touch unit is a double-layer structure formed by the touch layer and the optical compensation layer, which avoids the problem that an electrode bridge in the display device may be visible in some cases caused by different light absorption levels in certain areas of the touch unit due to the different number of film layers.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: June 21, 2022
    Assignees: Wuhan Tianma Micro-Electronics Co., Ltd., Wuhan Tianma Microelectronics Co., Ltd. Shanghai Branch
    Inventors: Min Chen, Xinzhao Liu, Qingxia Wang
  • Patent number: 11335573
    Abstract: Disclosed is a dry etching method for etching a metal film on a substrate with an etching gas containing a ?-diketone and an additive gas, wherein the metal film contains a metal element capable of forming a complex with the ?-diketone; and wherein the amount of water contained in the etching gas is 30 mass ppm or less relative to the amount of the ?-diketone. It is preferable that the ?-diketone used for the dry etching method is supplied from a ?-diketone filled container, wherein the ?-diketone filled container has a sealed container body filled with a ?-diketone whose water content is 15 mass ppm or less relative to the ?-diketone. This etching method enables etching of the metal film while suppressing etching rate variations from the initial stage to the later stage of use of the filled container.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: May 17, 2022
    Assignee: Cental Glass Company, Limited
    Inventors: Kunihiro Yamauchi, Takashi Masuda, Akifumi Yao
  • Patent number: 11337314
    Abstract: A surface treated copper foil 1 includes a copper foil 2, and a first surface treatment layer 3 formed on one surface of the copper foil 2. The first surface treatment layer 3 of the surface treated copper foil 1 has a root mean square gradient of roughness curve elements R?q according to JIS B0601:2013 of 5 to 28°. A copper clad laminate 10 includes the surface treated copper foil 1 and an insulating substrate 11 adhered to the first surface treatment layer 3 of the surface treated copper foil 1.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: May 17, 2022
    Assignee: JX Nippon Mining & Metals Corporation
    Inventors: Nobuaki Miyamoto, Atsushi Miki
  • Patent number: 11281098
    Abstract: The present discloses is related to a method for manufacturing a touch substrate. The method of manufacturing the touch substrate may include depositing a first conductive film on a base substrate; performing a first joint exposure process based on a first negative photoresist on the base substrate on which the first conductive film was deposited to form a first electrode layer; forming an insulating layer on the base substrate on which the first electrode layer was formed; depositing a second conductive film on the base substrate on which the insulating layer was formed; and performing a second joint exposure process based on a second negative photoresist on the base substrate on which the second conductive film was deposited to form a second electrode layer.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: March 22, 2022
    Assignees: HEFEI XINSHENG PHOTOELECTRIC TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhi Du, Qicheng Chen, Ming Zhang, Haifeng Hu, Liuyue Yin
  • Patent number: 11270845
    Abstract: A multilayer ceramic capacitor includes a laminate including dielectric layers and internal electrode layers laminated together in a lamination direction, and a pair of external electrodes on both end surfaces of the laminate, the external electrodes being connected to the internal electrode layers, wherein a barrier is provided on a widthwise end of at least one internal electrode layer, the barrier having a thickness that decreases from the widthwise end of the internal electrode layer toward a side margin in a width direction, a void is defined by the widthwise end of the internal electrode layer, the barrier, and the side margin, and the barrier contains Ni and Sn.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: March 8, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuta Saito, Akito Mori, Takefumi Takahashi, Masahiro Wakashima
  • Patent number: 11264321
    Abstract: A semiconductor device includes providing a workpiece including an insulating material layer disposed thereon. The insulating material layer includes a trench formed therein. A barrier layer on the sidewalls of the trench is formed using a surface modification process and a surface treatment process.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: March 1, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ying-Hsueh Chang Chien, Yu-Ming Lee, Man-Kit Leung, Chi-Ming Yang
  • Patent number: 11257680
    Abstract: Methods for processing a workpiece with fluorine radicals are provided. In one example implementation, the method includes a workpiece having at least one silicon layer and at least one silicon germanium layer. The method can include placing the workpiece on a workpiece support in a processing chamber. The method can include generating one or more species from a process gas in a plasma chamber. The method can include filtering the one or more species to create a filtered mixture. The method can include exposing the workpiece to the filtered mixture to remove at least a portion of the at least one silicon layer.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: February 22, 2022
    Assignees: Mattson Technology, Inc., Beijing E-Town Semiconductor Technology Co., Ltd.
    Inventors: Qi Zhang, Xinliang Lu
  • Patent number: 11258183
    Abstract: The present invention is a unique process of manufacturing rigid members with precise “shape keeping” properties and with reflective properties pertaining to radio frequency energy, so that air, land, sea and space devices or vehicles may be constructed including parabolic reflectors formed without discrete permanent layering. Rather, such parabolic reflectors or similarly, vehicles, may be formed by homogeneous construction where discrete layering is absent, and where energy reflectivity or scattering characteristics are embedded within the homogeneous mixture of carbon nanotubes and associated graphite powders and epoxy, resins and hardeners. The mixture of carbon graphite nanofiber and carbon nanotubes generates higher electrode conductivity and magnetized attraction through molecular polarization. In effect, the rigid members may be tuned based on the application.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: February 22, 2022
    Inventor: Alexander Socransky
  • Patent number: 11232948
    Abstract: The present disclosure provides systems and methods for a layered substrate. A layered substrate may include a core comprising graphite. The layered substrate may also include a coating layer comprising a coating material that surrounds the core, wherein the coating material has a melting point that is greater than a melting point of silicon.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: January 25, 2022
    Assignee: Intel Corporation
    Inventors: Glenn A. Glass, Anand S. Murthy
  • Patent number: 11222857
    Abstract: In some embodiments, the present disclosure relates to a method including forming an interconnect structure over a substrate. A bond pad may be coupled to the interconnect structure, and a polymeric material may be deposited over the bond pad. In some embodiments, the method further includes performing a patterning process to remove a portion of the polymeric material to form an opening in the polymeric material. The opening directly overlies and exposes the bond pad. Further, the method includes a first cleaning process. The polymeric material is cured to form a polymeric protection layer, and a second cleaning process is performed.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: January 11, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Fan Huang, Dian-Hau Chen, Mao-Nan Wang, Tzu-Li Lee, Yen-Ming Chen, Tzung-Luen Li
  • Patent number: 11209709
    Abstract: A display substrate and a method thereof, a display panel and a display device are provided. The display substrate includes: a base substrate; and at least one first signal line and a first insulating layer which are disposed on the base substrate; a surface of the first insulating layer away from the base substrate and a surface of the at least one first signal line away from the base substrate are parallel with the base substrate and are substantially located in a continuous flat plane. The first insulating layer which is disposed side by side with the first signal line can improve the surface flatness level of the display substrate and prevent the subsequently formed structures on the display substrate suffering from display defectives due to a too large step.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: December 28, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Xiaochen Cui, Peng Li, Jungho Park, Jaikwang Kim, Zhe Li, Xiaoji Li, Dongxing Zhao
  • Patent number: 11174159
    Abstract: A micro-electromechanical device and method of manufacture are disclosed. A sacrificial layer is formed on a silicon substrate. A metal layer is formed on a top surface of the sacrificial layer. Soft magnetic material is electrolessly deposited on the metal layer to manufacture the micro-electromechanical device. The sacrificial layer is removed to produce a metal beam separated from the silicon substrate by a space.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: November 16, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William J. Gallagher, Eugene J. O'Sullivan, Naigang Wang
  • Patent number: 11164752
    Abstract: A method is provided for etching a dielectric layer disposed on at least one layer based on gallium nitride (GaN), the dielectric layer being formed by a material based on one from SixNy and SixOy, the method including: first etching of the dielectric layer on only part of a thickness to define therein a partial opening and a residual portion situated in line with the opening and having another thickness; implanting ions in line with the opening over a thickness greater than the another thickness to modify a material of the dielectric layer over an entire thickness of the residual portion, and modify a material of the base layer of GaN; removing the residual portion by a second etching, selective of the modified dielectric layer with respect to the nonmodified material and with respect to the modified layer based on GaN; and annealing of the layer based on GaN.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: November 2, 2021
    Assignee: Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Nicolas Posseme, Frederic Le Roux
  • Patent number: 11134598
    Abstract: Methods and systems for low-force, low-temperature thermocompression bonding. The present application teaches new methods and structures for three-dimensional integrated circuits, in which cold thermocompression bonding is used to provide reliable bonding. To achieve this, reduction and passivation steps are preferably both used to reduce native oxide on the contact metals and to prevent reformation of native oxide, preferably using atmospheric plasma treatments. Preferably the physical compression height of the elements is set to be only enough to reliably achieve at least some compression of each bonding element pair, compensating for any lack of flatness. Preferably the thermocompression bonding is performed well below the melting point. This not only avoids the deformation of lower levels which is induced by reflow techniques, but also provides a steep relation of force versus z-axis travel, so that a drastically-increasing resistance to compression helps to regulate the degree of thermocompression.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: September 28, 2021
    Assignee: SET North America, LLC
    Inventor: Eric Frank Schulte
  • Patent number: 11099671
    Abstract: A touch display assembly and a method for manufacturing the same are provided. The touch display assembly includes a display device, a first organic insulating layer, a second organic insulating layer, a first touch sensing electrode, a second touch sensing electrode, and a protective layer. The first touch sensing electrode and the second touch sensing electrode are both disposed on the second organic insulating layer. A bridge portion of the first touch sensing electrode passes through the second organic insulating layer and is overlapped by the second touch sensing electrode. In the touch display assembly, film layers are prevented from separating from each other after being bent multiple times.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: August 24, 2021
    Inventors: Caiqin Chen, Dan Liu
  • Patent number: 11073434
    Abstract: Provided are a method of manufacturing a shear and normal force sensor including fabricating raised and sunken polymers having a plurality of bent parts of bent shapes, forming an electrode pattern on one surface of a piezoelectric element, and embedding the piezoelectric element between the raised and sunken polymers, and a shear and normal force sensor including raised and sunken polymers having a plurality of bent parts of bent shapes, a piezoelectric element embedded between the raised and sunken polymers and having an electrode pattern on one surface, and a flexible printed circuit board (FPCB) embedded between the sunken polymer and the piezoelectric element and electrically connected to the electrode pattern.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: July 27, 2021
    Assignee: Korea Institute of Science and Technology
    Inventors: Youngsu Cha, Ye Rim Lee
  • Patent number: 11064611
    Abstract: A method for fabricating a printed circuit, comprising: darkening a surface location of a conductive material with one or more ultrafast pulses of laser radiation and ablating the conductive material at the surface location with one or more longer duration pulses of laser radiation to produce traces or micro via patterns on the surface of a PCB. A hole for a blind micro via is produced by ablating the conductive material at the darkened surface location with one or more longer duration pulses of laser radiation and cleaning a second conductive material under the substrate with one or more further longer duration pulses of laser radiation.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: July 13, 2021
    Assignee: IPG PHOTONICS CORPORATION
    Inventor: David C. Clark
  • Patent number: 11049889
    Abstract: This disclosure provides an array substrate, a method for fabricating the same, a display panel, and a display device, where a first photo-resist layer is stripped in a changed order in that the first photo-resist layer on a source-drain is stripped through wet etching before a ohm contact layer film and an active layer film are etched in an electrically-conductive channel area (i.e., an electrically-conductive channel of a TFT is etched) to form an ohm contact layer and an active layer.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: June 29, 2021
    Assignees: Beijing BOE Display Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xiao Han, Jinchao Bai, Xiangqian Ding, Huibin Guo
  • Patent number: 11042086
    Abstract: An embodiment of this disclosure provides a nano-imprinting method, including: applying an imprinting adhesive on a to-be-processed layer of a substrate located in an imprinting chamber; charging the imprinting chamber with a preset gas at a temperature higher than a boiling point of the preset gas, and pressing a nano-imprinting template on the imprinting adhesive; reducing an ambient temperature of the imprinting chamber to a temperature lower than the boiling point of the preset gas and maintaining the temperature for a preset time, such that the preset gas becomes a liquid; irradiating ultraviolet light from a side of the nano-imprinting template away from the imprinting adhesive to cure the imprinting adhesive; raising the ambient temperature of the imprinting chamber to be higher than the boiling point of the preset gas, such that the liquefied preset gas turns back into a gas; and demolding the nano-imprinting template from the imprinting adhesive.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: June 22, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yanhui Lu, Xin Gu, Kang Guo, Zhen Liu, Xiao Zhang, Wei Tan
  • Patent number: 11039539
    Abstract: A manufacturing method for flexible printed circuit board is provided, in which a flexible insulating material and a metal material are liquefied and the liquefied materials are coated and solidified to form a flexible insulating layer and an anti-EMI layer of an anti-EMI structure, respectively. As such, an adhesive layer can be eliminated and the thickness of the flexible insulating layer and the anti-EMI layer can be reduced and an amount of materials consumed is also reduced, resulting in reduction of production cost, reduction of thickness of the flexible printed circuit board with anti-EMI structure, and improved quality.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: June 15, 2021
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Juan Chen
  • Patent number: 11008644
    Abstract: A method of non-ablatively laser patterning a multi-layer structure, the multi-layer structure including a substrate, a first layer disposed on the substrate, a second layer disposed on the first layer, and a third layer disposed on the second layer, the method including generating at least one laser pulse having laser parameters selected for non-ablatively changing the conductivity a selected portion of the third layer such that the selected portion becomes non-conductive, and directing the pulse to the multi-layer structure, wherein the conductivity of the first layer is not substantially changed by the pulse.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: May 18, 2021
    Assignee: nLIGHT, Inc.
    Inventors: Adam Dittli, Robert J. Martinsen
  • Patent number: 10981355
    Abstract: Bulk materials having a kinetically limited nano-scale diffusion bond is provided. The bulk materials having a kinetically limited nano-scale diffusion bond includes transparent material, absorbent opaque material and a diffusion bond. The transparent material has properties that allow an electromagnetic beam of a select wavelength to pass there through without more than minimal energy absorption. The absorbent opaque material has properties that significantly absorb energy from the electromagnetic beam. The diffusion bond is formed by the electromagnetic beam bonding the transparent material to the absorbent opaque material. Moreover, the diffusion bond has a thickness that is less than 1000 nm.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: April 20, 2021
    Assignees: Medtronic, Inc, Corning Incorporated
    Inventors: Michael S. Sandlin, David A. Ruben, Raymond M. Karam, Georges Roussos, Thomas M. Wynne
  • Patent number: 10962882
    Abstract: A circuit pattern is quickly created or changed by exposing the circuit pattern on a board without using a photo mask on which the circuit pattern is formed. There is provided a circuit pattern manufacturing apparatus including a forming unit that forms a circuit pattern by irradiating, with a light beam, a circuit pattern forming sheet including an insulating sheet base material layer and a mixture layer made of a mixture containing a conductive material and a photo-curing resin. The forming unit includes, as an optical engine, a housing, a laser diode, a prism mirror, an inclined mirror, a bottom mirror, and a driving mirror.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: March 30, 2021
    Assignee: KANTATSU CO., LTD.
    Inventors: Eiji Oshima, Tomio Kusakabe
  • Patent number: 10957615
    Abstract: A workpiece (100) having substrate, such as a glass substrate, can be etched by a laser or by other means to create recessed features (200, 202). A laser-induced forward transfer (LIFT) process or metal oxide printing process can be employed to impart a seed material (402), such as a metal, onto the glass substrate, especially into the recessed features (200, 202). The seeded recessed features can be plated, if desired, by conventional techniques, such as electroless plating, to provide conductive features (500) with predictable and better electrical properties. The workpieces (100) can be connected in a stacked such that subsequently stacked workpieces (100) can be modified in place.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: March 23, 2021
    Assignee: ELECTRO SCIENTIFIC INDUSTRIES, INC
    Inventors: Joel Schrauben, Jan Kleinert
  • Patent number: 10947413
    Abstract: A process for chemical mechanical polishing cobalt to planarize the surface and remove at least some of the cobalt from a substrate. The process includes providing a polishing composition, containing, as initial components: water; an oxidizing agent; colloidal silica abrasive particles; aspartic acid or salts thereof; a phosphonic acid having an alkyl group of greater than ten carbon atoms, wherein the phosphonic acid having the alky group of greater than ten carbon atoms is included in amounts sufficient to enable high cobalt removal rates of ?2000 ?/min and substantial cobalt corrosion inhibition; and providing a chemical mechanical polishing pad, having a polishing surface; creating dynamic contact at an interface between the polishing pad and the substrate; and dispensing the polishing composition onto the polishing surface at or near the interface between the polishing pad and the substrate; wherein some of the cobalt is polished away and cobalt corrosion is substantially inhibited.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: March 16, 2021
    Assignee: Rohm and Haas Electronic Materials CMP Holdings
    Inventor: Murali Ganth Theivanayagam
  • Patent number: 10888003
    Abstract: There is provided a copper foil provided with a carrier exhibiting a high peeling resistance against the developer in the photoresist developing process and achieving high stability of mechanical peel strength of the carrier. The copper foil provided with a carrier comprises a carrier; an interlayer disposed on the carrier, the interlayer having a first surface adjacent to the carrier and containing 1.0 atom % or more of at least one metal selected from the group consisting of Ti, Cr, Mo, Mn, W and Ni and a second surface remote from the carrier and containing 30 atom % or more of Cu; a release layer disposed on the interlayer; and an extremely-thin copper layer disposed on the release layer.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: January 5, 2021
    Assignee: MITSUI MINING & SMELTING CO., LTD.
    Inventor: Yoshinori Matsuura
  • Patent number: 10865484
    Abstract: The invention relates to a solution for etching titanium based materials, comprising from about 27 w % to about 39 w % hydrogen peroxide, from about 0.2 w % to about 0.5 w % potassium hydroxide, and at about 0.002 w % to about 0.02 w % 1,2-Diaminocyclohexane-N,N,N,N Tetra acetic Acid (CDTA), the rest being water, said solution comprising no corrosion inhibitor, and said solution having a pH comprised between about 7 and about 8. The invention further relates to a chemical composition for preparing such a solution by mixing said composition with concentrated hydrogen peroxide, said chemical composition comprising potassium hydroxide from about 5 w % to about 30 w %, C.D.T.A. at a concentration ranging from about 1% to about 5% of the potassium hydroxide concentration, the rest being water.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: December 15, 2020
    Assignee: TECHNIC FRANCE
    Inventors: Christian Pizzetti, Marine Cazes, Jérôme Daviot, Philippe Vernin
  • Patent number: 10844175
    Abstract: A polyamide acid which contains at least one diamine compound selected from among diamine compounds represented by general formula (8) within the range of 3-60 parts by mole in total per 100 parts by mole of all diamine components, while containing a biphenyl tetracarboxylic acid dianhydride within the range of 40-100 parts by mole and a pyromellitic acid dianhydride within the range of 0-60 parts by mole per 100 parts by mole of all acid anhydride components; and a thermoplastic polyimide which is obtained curing this polyamide acid. (In formula (8), linking group X represents a single bond or a divalent group selected from among —CONH—; each Y independently represents a hydrogen atom, a monovalent hydrocarbon group having 1-3 carbon atoms or an alkoxy group; n represents an integer of 0-2; and each of p and q independently represents an integer of 0-4.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: November 24, 2020
    Assignee: NIPPON STEEL Chemical & Material Co., Ltd.
    Inventors: Yoshiki Suto, Teppei Nishiyama
  • Patent number: 10800972
    Abstract: An etching composition selectively removes a titanium nitride film from a stacked conductive film structure including a titanium nitride (TiN) film and a tantalum nitride (TaN) film. The etching composition configured to etch titanium nitride (TiN) includes 5 wt % to 30 wt % of hydrogen peroxide, 15 wt % to 50 wt % of acid compound, and 0.001 wt % to 5 wt % of corrosion inhibitor, with respect to a total weight of the etching composition, wherein the acid compound includes at least one of phosphoric acid (H3PO4), nitric acid (HNO3), hydrochloric acid (HCl), hydroiodic acid (HI), hydrobromic acid (HBr), perchloric acid (HClO4), silicic acid (H2SiO3), boric acid (H3BO3), acetic acid (CH3COOH), propionic acid (C2H5COOH), lactic acid (CH3CH(OH)COOH), and glycolic acid (HOCH2COOH).
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: October 13, 2020
    Assignees: Samsung Electronics Co., Ltd., Soulbrain Co., Ltd.
    Inventors: Hyo Sun Lee, Ho Young Kim, Sang Won Bae, Min Goo Kim, Jung Hun Lim, Yong Jae Choi
  • Patent number: 10784454
    Abstract: A method for making a polymer solar cell includes the following steps: placing a portion of a carbon nanotube layer into a polymer solution, wherein the carbon nanotube layer includes a plurality of carbon nanotubes; curing the polymer solution to form a polymer layer including a first polymer surface and a second polymer surface opposite to the first polymer surface, wherein the portion of the carbon nanotube layer is embedded in the polymer layer, and another portion of the carbon nanotube layer is exposed from the polymer layer; and forming a cathode electrode on a surface of the carbon nanotube layer away from the polymer layer, and forming an anode electrode on the first polymer surface, wherein the anode electrode is spaced apart from the carbon nanotube layer.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: September 22, 2020
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Wen Ning, Peng Liu, Kai-Li Jiang, Shou-Shan Fan
  • Patent number: 10757819
    Abstract: A core or sub-composite structure is provided including a dielectric layer between a first conductive film and a second conductive film. The first conductive film may include a first peelable/removable cover layer formed on or coupled to a first conductive layer. The second conductive film may include a second peelable/removable cover layer formed on or coupled to a second conductive layer.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: August 25, 2020
    Assignee: SANMINA CORPORATION
    Inventors: Shinichi Iketani, Dale Kersten
  • Patent number: 10748858
    Abstract: High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: August 18, 2020
    Assignee: Invensas Corporation
    Inventors: Liang Wang, Ilyas Mohammed, Masud Beroz
  • Patent number: 10741725
    Abstract: To provide a transparent substrate with excellent appearance and with high visibility when observed from a predetermined direction, and a process for producing it. A transparent substrate comprising a substrate having a curved surface on at least a part of its front surface, and an antiglare layer formed on the center region and the edge region of the curved surface, wherein the absolute value of the difference between the 60° specular glossiness at the center region and the 60° specular glossiness at the edge region is higher than 20%.
    Type: Grant
    Filed: January 2, 2019
    Date of Patent: August 11, 2020
    Assignee: AGC Inc.
    Inventors: Azusa Takai, Satoshi Mototani
  • Patent number: 10714545
    Abstract: A method for manufacturing a touch control display screen is provided. The method includes sequentially forming a thin film transistor layer, an OLED display layer, and a thin film encapsulation layer on a substrate; sequentially forming a first insulation layer, a bridge layer, a second insulation layer, a touch control electrode layer, and a protection layer on the thin film encapsulation layer; and using a multi-transmittance mask plate to perform a mask process for the first insulation layer and the second insulation layer, so as to pattern the first insulation layer and the second insulation layer.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: July 14, 2020
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Xiaoliang Feng
  • Patent number: 10714355
    Abstract: A shape of a hole can be improved. The plasma etching method includes a recess forming of forming a recess having a depth smaller than a thickness of a silicon oxide film by etching the silicon oxide film by plasma; a removing process of removing a reaction product adhering to the recess by plasma generated from a fluorocarbon gas; and a penetrating process of forming a hole penetrating the silicon oxide film by etching the recess, from which the reaction product is removed, by plasma.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: July 14, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hiroki Sato, Hisashi Hirose
  • Patent number: 10707221
    Abstract: Embodiments of an etching method for a material layer of a NAND memory device are disclosed. An example method of chemically etching a material layer on one or more substrates includes mixing an etchant solution within a bath and allowing the etchant solution to reach a quiescent state. After the etchant solution has reached the quiescent state, the method includes loading the one or more substrates into the bath. The one or more substrates includes a plurality of openings having the material layer disposed on an inside surface of the plurality of openings. The method also includes allowing the one or more substrates to remain in the bath for a predetermined time period, such that a thickness of the material layer is reduced by the etchant solution.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: July 7, 2020
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Er Wei Wang, Yonggang Yang
  • Patent number: 10699952
    Abstract: Methods comprising depositing a film material to form an initial film in a trench in a substrate surface are described. The film is treated to expand the film to grow beyond the substrate surface.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: June 30, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Atashi Basu, Abhijit Basu Mallick, Ziqing Duan, Srinivas Gandikota
  • Patent number: 10667406
    Abstract: A circuit board element includes a glass substrate, a first dielectric layer, and a first patterned metal layer. The glass substrate has an edge. The first dielectric layer is disposed on the glass substrate and has a central region and an edge region. The edge region is in contact with the edge of the glass substrate, and the thickness of the central region is greater than the thickness of the edge region. The first patterned metal layer is disposed on the glass substrate and in the central region of the first dielectric layer.
    Type: Grant
    Filed: September 16, 2018
    Date of Patent: May 26, 2020
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Cheng-Chieh Chiu, Chia-Chan Chang, Chun-Yi Kuo, Yu-Cheng Lin
  • Patent number: 10643780
    Abstract: Techniques and mechanisms for providing a flexible inductor. In an embodiment, the flexible inductor comprises a metal foil or other planar conductor, and inductive bodies disposed on opposite respective sides of the planar conductor. The inductive bodies each comprise a respective flexible suspension media and ferromagnetic particles disposed therein. A thickness of the planar conductor is in a range of 0.1 millimeters (mm) to 0.3 mm. In another embodiment, different layers of one inductive body vary from one another with respect to a thickness, a ferromagnetic material, a suspension media, an average size of ferromagnetic particles or a volume fraction of ferromagnetic particles.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: May 5, 2020
    Assignee: Intel Corporation
    Inventor: Arvind Sundaram
  • Patent number: 10643810
    Abstract: A zero-power plasmonic microelectromechanical system (MEMS) device is capable of specifically sensing electromagnetic radiation and performing signal processing operations. Such devices are highly sensitive relays that consume no more than 10 nW of power, utilizing the energy in detected electromagnetic radiation to detect and discriminate a target without the need of any additional power source. The devices can continuously monitor an environment and wake up an electronic circuit upon detection of a specific trigger signature of electromagnetic radiation, such as vehicular exhaust, gunfire, an explosion, a fire, a human or animal, and a variety of sources of radiation from the ultraviolet to visible light, to infrared, to terahertz radiation.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: May 5, 2020
    Assignee: Northeastern University
    Inventors: Matteo Rinaldi, Zhenyun Qian, Sungho Kang, Vageeswar Rajaram
  • Patent number: 10633743
    Abstract: A system and method for removing metal from a substrate in a controlled manner is disclosed. The system includes a chamber, with one or more gas inlets to allow the flow of gasses into the chamber, at least one exhaust pump, to exhaust gasses from the chamber, and a heater, capable of modifying the temperature of the chamber. In some embodiments, one or more gasses are introduced into the chamber at a first temperature. The atoms in these gasses chemically react with the metal on the surface of the substrate to form a removable compound. The gasses are then exhausted from the chamber, leaving the removable compound on the surface of the substrate. The temperature of the chamber is then elevated to a second temperature, greater than the sublimation temperature of the removable compound. This increased temperature allows the removable compound to become gaseous and be exhausted from the chamber.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: April 28, 2020
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Tsung-Liang Chen, Benjamin Schmiege, Jeffrey W. Anthis, Glen Gilchrist
  • Patent number: 10610971
    Abstract: A method for producing a recess or through-opening in a substrate includes applying pulsed laser radiation to the substrate. The laser radiation is focused using an optical system at an original focal depth and, by non-linear self-focusing within the pulse duration of an individual pulse, is also focused by the optical system at a focal depth different from the original focal depth. A difference between the focal depths corresponds to or is greater than the longitudinal extent of the recess or though-opening to be produced. The laser radiation modifies the substrate along a beam axis of the laser radiation in the region of the recess or through-opening, but does not result in removal of the substrate material necessary to form the recess or the through-opening. The substrate material in the modified region is anisotropically removed to produce the recess or through-opening in the substrate.
    Type: Grant
    Filed: April 3, 2014
    Date of Patent: April 7, 2020
    Assignee: LPKF LASER & ELECTRONICS AG
    Inventors: Robin Alexander Krueger, Norbert Ambrosius, Roman Ostholt
  • Patent number: 10615210
    Abstract: The present disclosure relates to a semiconductor device, a manufacturing method, a solid state image sensor, and electronic equipment that can achieve further improvement in reliability. Connection pads are formed in interlayer films provided respectively in interconnection layers of a sensor substrate on which a sensor surface having pixels is formed and a signal processing substrate configured to perform signal processing on the sensor substrate to make an electrical connection between the sensor substrate and the signal processing substrate. Then, a metal oxide film is formed between the interlayer films of the sensor substrate and the signal processing substrate, between the connection pad formed on a side toward the sensor substrate and the interlayer film on a side toward the signal processing substrate, and between the connection pad formed on the side toward the signal processing substrate and the interlayer film on the side toward the sensor substrate.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: April 7, 2020
    Assignee: SONY CORPORATION
    Inventor: Masaki Haneda
  • Patent number: 10578505
    Abstract: A process for manufacturing a MEMS pressure sensor having a micromechanical structure envisages: providing a wafer having a substrate of semiconductor material and a top surface; forming a buried cavity entirely contained within the substrate and separated from the top surface by a membrane suspended above the buried cavity; forming a fluidic-communication access for fluidic communication of the membrane with an external environment, set at a pressure the value of which has to be determined; forming, suspended above the membrane, a plate made of polysilicon, separated from the membrane by an empty space; and forming electrical-contact elements for electrical connection of the membrane and of the plate, which are designed to form the plates of a sensing capacitor, the value of capacitance of which is indicative of the value of pressure to be detected. A corresponding MEMS pressure sensor having the micromechanical structure is moreover described.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: March 3, 2020
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Lorenzo Baldo, Sarah Zerbini, Enri Duqi
  • Patent number: 10580819
    Abstract: The present disclosure relates to a solid-state imaging device, a method for manufacturing the same, and an electronic device capable of increasing utilization efficiency of a substrate. The solid-state imaging device includes a first semiconductor substrate provided with a sensor circuit having a photoelectric conversion part, and a second semiconductor substrate and a third semiconductor substrate provided with respective circuits different from the sensor circuit. The first semiconductor substrate, the second semiconductor substrate, and the third semiconductor substrate are stacked on each other in three layers, and a metal element for an electrode constituting an electrode for external connection is disposed in the first semiconductor substrate. An electrode for a measuring terminal is disposed within the second semiconductor substrate or the third semiconductor substrate, and the first semiconductor substrate is stacked after performing a predetermined measurement.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: March 3, 2020
    Assignee: Sony Corporation
    Inventor: Hiroshi Takahashi