Forming Or Treating Electrical Conductor Article (e.g., Circuit, Etc.) Patents (Class 216/13)
  • Patent number: 11952260
    Abstract: An apparatus is provided that is in communication with an age verification system and an accessory. The apparatus may include at least one interface element configured to receive information indicative of an age or identity of a user, a first communication interface configured to connect with the age verification system, a second communication interface configured to connect with the accessory, and circuitry. The circuitry may be configured to activate the accessory through the second communication interface to provide access to an age restricted product in response to receiving an age verification from the age verification system through the first communication interface.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: April 9, 2024
    Assignee: SPOT YOU MORE, INC.
    Inventors: Joel R. Setchell, Daniel S. Michels
  • Patent number: 11916010
    Abstract: Disclosed herein are methods for manufacturing an integrated circuit (IC) structure, e.g., for manufacturing a metallization stack portion of an IC structure, with one or more self-aligned vias integrated in the back end of line (BEOL), and related semiconductor devices. The methods may employ direct metal etch for scaling the BEOL pitches of the metallization layers. In one aspect, an example method results in fabrication of a via that is self-aligned to both a metal line above it and a metal line below it. Methods described herein may provide improvements in terms of one or more of reducing the misalignment between vias and electrically conductive structures connected thereto, reducing the RC delays, and increasing reliability if the final IC structures.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: February 27, 2024
    Assignee: Intel Corporation
    Inventors: Guillaume Bouche, Andy Chih-Hung Wei
  • Patent number: 11901314
    Abstract: An electronic device includes a display module including a display panel including a first area in which a pixel is disposed, a second area adjacent to the first area and bent with respect to an imaginary axis, a data line connected to the pixel, and a first line insulated from the pixel, an optical film, and a bending cover layer and a window module including a glass substrate and a window protective layer including a cover portion disposed on the glass substrate and a protrusion portion protruding from the cover portion. An end of the optical film and an end of the bending cover layer, which faces the end of the optical film, defines a separation area, the data line and the first line overlap the separation area when viewed in a plane, and the protrusion portion overlaps the first line in the separation area when viewed in a plane.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: February 13, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Hun-Tae Kim
  • Patent number: 11886673
    Abstract: Aspects of the present disclosure involve a system and a method for performing operations comprising: detecting physical touch of a touch-sensitive component on a back portion of a client device, the client device displaying a graphical user interface on a touch-sensitive display screen of a front portion of the client device; in response to detecting the physical touch, transmitting an electrical signal representing the physical touch of the touch-sensitive component on the back portion of the client device to the touch-sensitive display screen of the front portion of the client device; and causing an operation associated with the graphical user interface to be executed in response to the touch-sensitive display screen receiving the electrical signal representing the physical touch of the touch-sensitive component on the back portion of the client device.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: January 30, 2024
    Assignee: Snap Inc.
    Inventors: Shree K. Nayar, Chang Xiao, Changxi Zheng
  • Patent number: 11883233
    Abstract: An intraluminal ultrasound imaging device includes a flexible elongate member configured to be positioned within a body lumen of a patient. The flexible elongate member includes a proximal portion and a distal portion. The device also includes an ultrasound imaging assembly disposed at the distal portion of the flexible elongate member. The ultrasound imaging assembly is configured to obtain imaging data of the body lumen. The ultrasound imaging assembly includes a transducer array including a substrate, a silicon oxide layer disposed over the substrate, and a plurality of rows of micromachined ultrasound transducer elements disposed on the silicon oxide layer. Two of the plurality of rows of micromachined ultrasound transducer elements are spaced apart by a trench formed by etching through a screen formed in the silicon oxide layer. Associated devices, systems, and methods are also provided.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: January 30, 2024
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Ronald Dekker, Vincent Adrianus Henneken, Marcus Cornelis Louwerse, Aslihan Arslan Carisey
  • Patent number: 11881374
    Abstract: Disclosed among other aspects is a charged particle inspection system including an absorbing component and a programmable charged-particle mirror plate arranged to modify the energy distribution of electrons in a beam and shape the beam to reduce the energy spread of the electrons and aberrations of the beam, with the absorbing component including a set of absorbing structures configured as absorbing structures provided on a transparent conductive layer and a method using such an absorbing component and with the programmable charged-particle mirror plate including a set of pixels configured to generate a customized electric field to shape the beam and using such a programmable charged-particle mirror plate.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: January 23, 2024
    Assignee: ASML Netherlands B.V.
    Inventors: Shakeeb Bin Hasan, Yan Ren, Maikel Robert Goosen, Albertus Victor Gerardus Mangnus, Erwin Paul Smakman
  • Patent number: 11854830
    Abstract: A method of manufacturing a circuit board includes preparing a substrate having electrical conductivity, removing a portion of a first surface of the substrate to form a plurality of pillars on the first surface of the substrate, locating an insulating material on the first surface of the substrate to cover a space between the plurality of pillars of the substrate, forming a pattern on a second surface, which is opposite to the first surface of the substrate, by removing a portion of the second surface of the substrate, forming a first metal layer on the first surface of the substrate, and forming a second metal layer on the second surface of the substrate.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: December 26, 2023
    Assignee: HAESUNG DS CO., LTD.
    Inventors: Dong Jin Yoon, Sung Il Kang, In Seob Bae
  • Patent number: 11824019
    Abstract: A chip package includes a chip configured to generate and/or receive a signal; a laminate substrate including a substrate integrated waveguide (SIW) for carrying the signal, the substrate integrated waveguide including a chip-to-SIW transition structure configured to couple the signal between the SIW and the chip and a SIW-to-waveguide transition structure configured to couple the signal out of the SIW or into the SIW, wherein the SIW-to-waveguide transition structure includes a waveguide aperture; and a plurality of electrical interfaces arranged about a periphery of the waveguide aperture, the plurality of electrical interfaces configured to receive the signal from the SIW-to-waveguide transition structure and output the signal from the chip package or to couple the signal to the SIW-to-waveguide transition structure and into the chip package.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: November 21, 2023
    Assignee: Infineon Technologies AG
    Inventors: Tuncay Erdoel, Walter Hartner, Ulrich Moeller, Bernhard Rieder, Ernst Seler, Maciej Wojnowski
  • Patent number: 11815668
    Abstract: A method of fabricating a visible spectrum optical component includes: providing a substrate; forming a resist layer over a surface of the substrate; patterning the resist layer to form a patterned resist layer defining openings exposing portions of the surface of the substrate; performing deposition to form a dielectric film over the patterned resist layer and over the exposed portions of the surface of the substrate, wherein a top surface of the dielectric film is above a top surface of the patterned resist layer; removing a top portion of the dielectric film to expose the top surface of the patterned resist layer and top surfaces of dielectric units within the openings of the patterned resist layer; and removing the patterned resist layer to retain the dielectric units over the substrate.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: November 14, 2023
    Assignees: PRESIDENT AND FELLOWS OF HARVARD COLLEGE, THE CHARLES STARK DRAPER LABORATORY, INC.
    Inventors: Robert C. Devlin, Mohammadreza Khorasaninejad, Federico Capasso, Hongkun Park, Alexander Arthur High
  • Patent number: 11817261
    Abstract: An ink includes a boron-doped nanodiamond having a specific surface area of 110 m2/g or greater, and electrical conductivity at 20° C. of 5.0×10?3 S/cm or greater.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: November 14, 2023
    Assignees: DAICEL CORPORATION, TOKYO UNIVERSITY OF SCIENCE FOUNDATION
    Inventors: Takeshi Kondo, Tatsuo Aikawa, Makoto Yuasa, Kenjo Miyashita, Masahiro Nishikawa, Takahiro Tei
  • Patent number: 11810790
    Abstract: A method for forming a semiconductor structure is provided. In one form, a method includes: providing a base, where the base includes first regions and a second region located between the first regions; forming a pattern definition layer on the base; forming discrete mask layers on the pattern definition layer, the mask layers and the base defining openings, where openings of the first regions serve as first openings, and an opening of the second region serves as a second opening; forming a filling layer in the second opening; and etching, using the mask layers and the filling layer as masks, the pattern definition layer exposed from the first openings, to form target patterns.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: November 7, 2023
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventor: Shu Chen
  • Patent number: 11802078
    Abstract: A method of manufacturing a glass includes forming a first etch protection layer on a first surface of a glass substrate, and forming a second etch protection layer on a second surface of the glass substrate; removing a part of the first protection layer and a part of the second protection layer by applying a laser pulse penetrating the glass substrate from above the first surface of the glass substrate; forming a cut part in the glass substrate by etching the glass substrate using an etching solution; and removing the first etch protection layer and the second etch protection layer. The second surface is opposite to the first surface.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: October 31, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Alexander Voronov, Hyungsik Kim, Sunggyu Park, Junghwa You, Joongsung Lee, Woohyun Jung, Gyoowan Han
  • Patent number: 11767448
    Abstract: A polishing liquid containing: abrasive grains; a hydroxy acid; a polymer compound having at least one selected from the group consisting of a hydroxyl group and an amide group; and a liquid medium, in which a zeta potential of the abrasive grains is positive, and a weight average molecular weight of the polymer compound is 3000 or more.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: September 26, 2023
    Assignee: RESONAC CORPORATION
    Inventors: Takaaki Matsumoto, Tomohiro Iwano, Tomoyasu Hasegawa, Tomomi Kukita
  • Patent number: 11769864
    Abstract: A substrate for mounting a light-emitting element according to the present disclosure contains a crystal particle of aluminum oxide and is composed of an alumina-based ceramic that contains 97% by mass or more of Al as a value of an Al2O3 equivalent among 100% by mass of all components thereof. An average value of an equivalent circle diameter of the crystal particle is 1.1 ?m or greater and 1.8 ?m or less and a standard deviation of an equivalent circle diameter thereof is 0.6 ?m or greater and 1.4 ?m or less.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: September 26, 2023
    Assignee: KYOCERA Corporation
    Inventor: Kouji Matsushita
  • Patent number: 11758868
    Abstract: A soybean cultivar designated 03130400 is disclosed. The invention relates to the seeds of soybean cultivar 03130400, to the plants of soybean cultivar 03130400, to the plant parts of soybean cultivar 03130400, and to methods for producing progeny of soybean cultivar 03130400. The invention also relates to methods for producing a soybean plant containing in its genetic material one or more transgenes and to the transgenic soybean plants and plant parts produced by those methods. The invention also relates to soybean cultivars or breeding cultivars, and plant parts derived from soybean cultivar 03130400. The invention also relates to methods for producing other soybean cultivars, lines, or plant parts derived from soybean cultivar 03130400, and to the soybean plants, varieties, and their parts derived from use of those methods. The invention further relates to hybrid soybean seeds, plants, and plant parts produced by crossing cultivar 03130400 with another soybean cultivar.
    Type: Grant
    Filed: September 15, 2021
    Date of Patent: September 19, 2023
    Assignee: M.S. TECHNOLOGIES, L.L.C.
    Inventor: Justin T. Mason
  • Patent number: 11735420
    Abstract: Methods of depositing a film selectively onto a first material relative to a second material are described. The substrate is pre-cleaned by heating the substrate to a first temperature, cleaning contaminants from the substrate and activating the first surface to promote formation of a self-assembled monolayer (SAM) on the first material. A SAM is formed on the first material by repeated cycles of SAM molecule exposure, heating and reactivation of the first material. A final exposure to the SAM molecules is performed prior to selectively depositing a film on the second material. Apparatus to perform the selective deposition are also described.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: August 22, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Chang Ke, Lei Zhou, Biao Liu, Cheng Pan, Yuanhong Guo, Liqi Wu, Michael S. Jackson, Ludovic Godet, Tobin Kaufman-Osborn, Erica Chen, Paul F. Ma
  • Patent number: 11716818
    Abstract: A method of manufacturing a transparent electrode substrate according to an exemplary embodiment of the present application comprises: forming a structure comprising a transparent base, a bonding layer provided on the transparent base, and a metal foil provided on the bonding layer; forming a metal foil pattern by patterning the metal foil; heat-treating the structure comprising the metal foil pattern at a temperature of 70° C. to 100° C.; and completely curing the bonding layer.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: August 1, 2023
    Assignee: LG CHEM, LTD.
    Inventors: Yong Goo Son, Kun Seok Lee, Jung Ok Moon, Kiseok Lee, Seung Heon Lee
  • Patent number: 11690275
    Abstract: Disclosed is a method of fabricating a display device. The method comprises forming a dielectric layer on an encapsulation layer including a first encapsulation region and a second encapsulation region adjacent to the first encapsulation region, forming a conductive layer on the dielectric layer, forming a first photoresist layer on the conductive layer that overlaps each of the first and second encapsulation regions, forming a second photoresist layer on the first photoresist layer that overlaps the second encapsulation region, and etching the conductive layer based on the first and second photoresist layers. When viewed in a thickness direction of a display panel including the encapsulation layer, at least a portion of the encapsulation layer overlapping the second encapsulation region has a thickness greater than that of the encapsulation layer overlapping the first encapsulation region.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: June 27, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sungkyun Park, Jung-Moo Hong, Doyeon Kim, Sanghyun Jun, Yejoo Jun
  • Patent number: 11687117
    Abstract: A semiconductor apparatus include a first electrode, an insulating layer covering an end of the first electrode, a functional layer arranged on the first electrode and the insulating layer, and a second electrode arranged above the functional layer, wherein, in a cross-section passing through the insulating layer, and the first electrode, the insulating layer includes a first portion having a side surface inclining at an angle of 45° or more and 90° or less, a second portion having a side surface inclining at an angle smaller than 45°, and a third portion below the first portion, and having a side surface inclining at an angle smaller than 45°, and wherein a length of the second portion in a direction vertical to the first electrode is larger than that of the third portion.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: June 27, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Daisuke Okabayashi, Tetsuo Takahashi, Takashi Usui
  • Patent number: 11677379
    Abstract: A moveable micromachined member of a microelectromechanical system (MEMS) device includes an insulating layer disposed between first and second electrically conductive layers. First and second mechanical structures secure the moveable micromachined member to a substrate of the MEMS device and include respective first and second electrical interconnect layers coupled in series, with the first electrically conductive layer of the moveable micromachined member and each other, between first and second electrical terminals to enable conduction of a first joule-heating current from the first electrical terminal to the second electrical terminal through the first electrically conductive layer of the moveable micromachined member.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: June 13, 2023
    Assignee: SiTime Corporation
    Inventors: Joseph C. Doll, Nicholas Miller, Charles I. Grosjean, Paul M. Hagelin, Ginel C. Hill
  • Patent number: 11674859
    Abstract: A mechanical link for microelectromechanical and/or nanoelectromechanical structure, includes a mobile component, a fixed component extending on a plane, and apparatus for detecting displacement of the mobile component relative to the fixed component. The mechanical link includes: a first link to the fixed component and mobile component, allowing rotation of the mobile component relative to the fixed component about an axis of rotation; a second link connecting the mobile component to the detection apparatus at a distance and perpendicular to the axis of rotation; a third link to the fixed component and detection apparatus, guiding the detection apparatus in a direction of translation in the plane; wherein the combination of the second link and third link can transform rotational movement of the mobile component into translational movement of the detection apparatus in the direction of translation.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: June 13, 2023
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Loïc Joet, Patrice Rey, Thierry Verdot
  • Patent number: 11670476
    Abstract: An x-ray anode for an x-ray emitter has a structured surface provided for impingement with electrons. According to an embodiment of the invention, the structured surface has a surface structure which alternates periodically at least in sections and which varies in the micrometer range with respect to its depth extension and periodicity.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: June 6, 2023
    Assignee: SIEMENS HEALTHCARE GMBH
    Inventors: Anja Fritzler, Peter Geithner, Petra Maurer, Thomas Weber, Brigitte Streller
  • Patent number: 11658037
    Abstract: In one exemplary embodiment, described herein is an ALE process for etching an oxide. In one embodiment, the oxide is silicon oxide. The ALE modification step includes the use of a carbon tetrafluoride (CF4) based plasma. This modification step preferentially removes oxygen from the surface of the silicon oxide, providing a silicon rich surface. The ALE removal step includes the use of a hydrogen (H2) based plasma. This removal step removes the silicon enriched monolayer formed in the modification step. The silicon oxide etch ALE process utilizing CF4 and H2 steps may be utilized in a wide range of substrate process steps. For example, the ALE process may be utilized for, but is not limited to, self-aligned contact etch steps, silicon fin reveal steps, oxide mandrel pull steps, oxide spacer trim, and oxide liner etch.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: May 23, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Sonam D. Sherpa, Alok Ranjan
  • Patent number: 11653542
    Abstract: A display apparatus includes a substrate; a plurality of display units on the substrate, each including a thin film transistor including at least one inorganic layer, a passivation layer on the thin film transistor, and a display device electrically connected to the thin film transistor; and a plurality of encapsulation layers respectively encapsulating the plurality of display units. The substrate includes a plurality of islands spaced apart, a plurality of connection units connecting the plurality of islands, and a plurality of through holes penetrating through the substrate between the plurality of connection units. The plurality of display units are on the plurality of islands, respectively. The at least one inorganic layer and the passivation layer extend on the plurality of connection units. The passivation layer includes a trench exposing the at least one inorganic layer. The encapsulation layer contacts the at least one inorganic layer exposed via the trench.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: May 16, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Gyungsoon Park, Ilgon Kim, Minjae Jeong
  • Patent number: 11647955
    Abstract: A mounting element (8) for releasably receiving a sensor (18) for transferring and/or receiving electrical currents and/or signals relating to a body of an organism, comprising a mounting element base (9) having a receiving space (17) for receiving the sensor (18), the receiving space (17) comprising a floor (19), a wall (16) disposed on the floor (19) and disposed on at least three sides, an opening (20) formed by at least one tab (21, 22), at least one clip closure (23, 24), and further comprising a cover (10) for the mounting element base (9), an at least three-sided wall being disposed on the inner side (11) thereof, the end face (30) thereof being implemented for contacting the end face (41) of the wall (16), wherein at least one counterpart (28, 29) to the at least one clip closure (23, 24) is disposed on the wall (27), and the mounting element base (9) and the cover (10) are connected to each other by a connecting element (13) such that the cover (10) is displaceable relative to the mounting element ba
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: May 16, 2023
    Assignee: Vanguard AG
    Inventors: Alexander Pacholik, Thomas Gutzmer, Martin Bilz, Hagen Thielecke, Ralf Kühner
  • Patent number: 11647590
    Abstract: A method of fabricating a multilayer superconducting printed circuit board comprises first, forming a bimetal foil to overlie a substrate, the bimetal foil comprising a first layer of a first metal, a layer of a second metal, and a second layer of the first metal, and then etching the second layer of the first metal. Forming a bimetal foil to overlie a substrate may include forming a bimetal foil comprising a first layer of a normal metal, a layer of a superconducting metal, and a second layer of the normal metal. Etching the second layer of the first metal may include preparing a patterned image in the second layer of the first metal for etching, processing the patterned image through a cleaner, rinsing the patterned image, and then, immersing the patterned image in a microetch.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: May 9, 2023
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Jeffrey P. Burress, Richard D. Neufeld, Surjit Singh Dhesi
  • Patent number: 11630541
    Abstract: A touch panel has a substrate having a display region and a peripheral region, a touch sensing electrode disposed in the display region of the substrate, and a peripheral circuit disposed in the peripheral region of the substrate. The touch sensing electrode is electrically connected to the peripheral circuit, and the touch sensing electrode layer includes a first portion of a patterned metal nanowire layer. The peripheral circuit includes a patterned conductive layer and a second portion of the metal nanowire layer. At least a non-conductive material of the conductive layer is between the peripheral circuit and a second peripheral circuit.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: April 18, 2023
    Assignee: TPK Advanced Solutions Inc.
    Inventors: Shan-Yu Wu, Chih-Min Chen
  • Patent number: 11621166
    Abstract: A semiconductor device and a method for forming the semiconductor device are provided. The method includes providing a substrate, and forming a first core layer on the substrate. The substrate includes a pull-up transistor region. The method also includes forming separately arranged second core layers on the first core layer, and forming a first sacrificial sidewall spacer on a sidewall of a second core layer. A gap is formed between adjacent first sacrificial sidewall spacers over the pull-up transistor region. In addition, the method includes removing the second core layers, and then etching the first core layer using the first sacrificial sidewall spacers as a mask until the substrate is exposed. The gap is transferred to a region between adjacent etched first core layers over the pull-up transistor region. Further, after etching the first core layer, the method includes forming a dielectric layer to fully fill the gap.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: April 4, 2023
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventor: Nan Wang
  • Patent number: 11621410
    Abstract: The invention relates to a method for manufacturing an electrode, preferably an implantable electrode array comprising the following steps: Applying (101) a layer of electrically conducting material (4) above a substrate material (1) for forming the electrically conductive traces; applying (102) a layer of insulating material (6) directly on top of the layer of electrically conducting material (4) for covering the electrically conductive traces; patterning (103) the layer of insulating material (4) by partly exposing the layer of electrically conducting material (4) to form at least one contact area (8) on the layer of the electrically conducting material (4), wherein a mask for patterning the layer of insulating material (6) defines a region (9) in the at least one contact area (8) at which the insulating material (6) in the at least one contact area (8) remains; and partly applying (104) a top layer (13) of electrically conducting material (4) at the contact area (8) on top of the layer of insulating materi
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: April 4, 2023
    Assignee: École Polytechnique Fédérale de Lausanne
    Inventors: Diego Ghezzi, Marta Airaghi Leccardi
  • Patent number: 11621490
    Abstract: The present invention provides an antenna structure for metal environment. The antenna structure comprises a radiating conductor, a first ground conductor, and a second ground conductor. The radiating conductor comprises a first opening circuit, and a second opening circuit, in which the first opening circuit is opened at a first side of the radiating conductor, and the second opening circuit is opened at a second side of the radiating conductor. The first ground conductor is electrically coupled to a third side of the radiating conductor while the second ground conductor is electrically coupled to a fourth side of the radiating conductor. Alternatively, the present invention further provides an antenna device by folding the antenna structure having RFID chip electrically attached thereon to cover a substrate, whereby the antenna device could be accessed in a metal environment.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: April 4, 2023
    Assignee: Securitag Assembly Group Co., Ltd.
    Inventor: Kai-Jun Liang
  • Patent number: 11608471
    Abstract: An etching composition for silicon nitride comprising: a phosphoric acid compound; water; and at least one of a silane compound represented by Formula 1, below, and a reaction product thereof, and an etching method using the same are disclosed,
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: March 21, 2023
    Assignee: SAMSUNG SDI CO., LTD.
    Inventors: Ki Wook Hwang, Sang Ran Koh, Youn Jin Cho, Jung Min Choi, Kwen Woo Han, Jun Young Jang, Yong Woon Yoon
  • Patent number: 11594670
    Abstract: An MEMS device includes: a first member; a second member forming a sealed space with the first member therebetween; and a third member disposed between the first member and the second member and joined to the first member and the second member, in which the third member has lower rigidity than rigidity of the first member and the second member, and the third member is provided with a communication portion that establishes communication between the sealed space and an external space.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: February 28, 2023
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Chikara Kojima, Eiji Osawa, Koji Ohashi, Kanechika Kiyose, Tomohiro Sayama, Hironori Suzuki, Katsuhiro Imai, Yasuyuki Matsumoto, Takahiro Kamijo
  • Patent number: 11589164
    Abstract: This disclosure provides systems, methods, and apparatus related to acoustic transducers.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: February 21, 2023
    Assignee: The Regents of the University of California
    Inventors: Alexander K. Zettl, Stephen M. Gilbert, Donez J. Horton-Bailey, Hu Long
  • Patent number: 11581139
    Abstract: An integrated energy storage component that includes a substrate supporting a contoured layer having a region with a contoured surface such as elongated pores. A stack structure is provided conformally over the contoured surface of this region. The stack is a single or repeated instance of MOIM layers, or MIOM layers, the M layers being metal layers, or a quasi-metal such as TiN, the O layers being oxide layers containing ions, and the I layer being an ionic dielectric. The regions having a contoured surface may be formed of porous anodized alumina.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: February 14, 2023
    Assignees: MURATA MANUFACTURING CO., LTD., COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Sami Oukassi, Raphaël Salot, Frédéric Voiron, Valentin Sallaz
  • Patent number: 11579166
    Abstract: In certain embodiments, an accelerometer is a microelectromechanical systems (MEMS) device including a proof mass, an anchor located in an opening defined by a body of the proof mass, a spring, a drive electrode, and a sense beam. The spring and the proof mass form a spring system suspended from the anchor. The sense beam oscillates at a particular resonance frequency based on application of a signal to the drive electrode. The MEMS device further includes a support structure coupled to the anchor. The support structure operates as a stress decoupling area and includes a support beam, with the spring corresponding to an end of the support beam that has a reduced thickness. The sense beam has a first end attached to the proof mass and a second end attached to the support beam such that the sense beam is orthogonal to the support beam.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: February 14, 2023
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Doruk Senkal, Yuri Toride
  • Patent number: 11570935
    Abstract: The present application pertains to testing methods and apparatus useful in single phase or two-phase liquid immersion cooling systems. Single phase systems use a fluid similar to mineral oil in which to immerse the servers. As the fluid is heated by the operating servers the fluid is circulated to one or more heat exchangers for cooling so the fluid never boils. In contrast, two-phase systems cool heat generating computer components which cause a dielectric fluid in its liquid phase to vaporize. The dielectric vapor is then condensed back into a liquid phase and used to cool the computer components. Using the testing methods and apparatuses herein one may design and test more efficient components and systems. More specifically, the one or more heating elements are both passive and intelligent. They may be used to mimic the power load of a server which is used in the load testing of immersion cooling so actual servers are not required to test various aspects of the liquid immersion cooling units.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: January 31, 2023
    Assignee: TMGCore, INC.
    Inventors: John David Enright, Jacob Mertel, Taylor Monnig, William Hadala
  • Patent number: 11550435
    Abstract: Aspects of the present disclosure involve a system and a method for performing operations comprising: detecting physical touch of a touch-sensitive component on a back portion of a client device, the client device displaying a graphical user interface on a touch-sensitive display screen of a front portion of the client device; in response to detecting the physical touch, transmitting an electrical signal representing the physical touch of the touch-sensitive component on the back portion of the client device to the touch-sensitive display screen of the front portion of the client device; and causing an operation associated with the graphical user interface to be executed in response to the touch-sensitive display screen receiving the electrical signal representing the physical touch of the touch-sensitive component on the back portion of the client device.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: January 10, 2023
    Assignee: Snap Inc.
    Inventors: Shree K. Nayar, Chang Xiao, Changxi Zheng
  • Patent number: 11543702
    Abstract: This polarizer is a polarizer having a wire grid structure that includes a transparent substrate, a dielectric film which extends across one surface of the transparent substrate and has a lower refractive index than the transparent substrate, and a plurality of projections which extend in a first direction on top of the dielectric film and are arrayed periodically at a pitch that is shorter than the wavelength of the light in the used light region, wherein the transparent substrate has a thermal conductivity of at least 10 W/m·K but not more than 40 W/m·K, the plurality of projections each have, in order from the side closer to the dielectric film, a first dielectric layer, a reflective layer and a functional layer, the reflective layer contains a metal or a metal compound, and the functional layer is formed from a material different from the reflective layer.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: January 3, 2023
    Assignee: DEXERIALS CORPORATION
    Inventors: Kazuyuki Shibuya, Shigeshi Sakakibara, Toshiaki Sugawara, Yusuke Matsuno, Akio Takada
  • Patent number: 11512215
    Abstract: Fusing nanowire inks are described that can also comprise a hydrophilic polymer binder, such as a cellulose based binder. The fusing nanowire inks can be deposited onto a substrate surface and dried to drive the fusing process. Transparent conductive films can be formed with desirable properties.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: November 29, 2022
    Assignee: C3 Nano, Inc.
    Inventors: Ying-Syi Li, Xiqiang Yang, Yu Kambe, Xiaofeng Chen, Hua Gu, Steven Michael Lam, Melanie Maniko Inouye, Arthur Yung-Chi Cheng, Alex Da Zhang Tan, Christopher Steven Scully, Ajay Virkar
  • Patent number: 11515471
    Abstract: A method for fabricating semiconductor device includes the steps of forming an inter-metal dielectric (IMD) layer on a substrate, forming a trench in the IMD layer, forming a synthetic antiferromagnetic (SAF) layer in the trench, forming a metal layer on the SAF layer, planarizing the metal layer and the SAF layer to form a metal interconnection, and forming a magnetic tunneling junction (MTJ) on the metal interconnection.
    Type: Grant
    Filed: August 9, 2020
    Date of Patent: November 29, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chiu-Jung Chiu, Ya-Sheng Feng, I-Ming Tseng, Yi-An Shih, Yu-Chun Chen, Yi-Hui Lee, Chung-Liang Chu, Hsiu-Hao Hu
  • Patent number: 11509288
    Abstract: A vibrator device includes a vibration element including a vibration portion and a fixed portion, a supporting member to which the fixed portion is attached to support the vibration element, and a first substrate to which the supporting member is attached, the supporting member includes a attaching portion attached to the first substrate, and A1?A2 is satisfied in a case where an area of a rectangular region including the fixed portion is A1 and an area of a rectangular region including the attaching portion is A2 in a plan view seen from a thickness direction of the vibration element.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: November 22, 2022
    Inventors: Tetsuya Otsuki, Tsugio Ide
  • Patent number: 11508676
    Abstract: Density-graded adhesion layers on conductive structures within a microelectronic package substrate are described. An example is a density-graded adhesion layer that includes a dense region proximate to a conductive structure that is surrounded by a less dense (or porous) region adjacent to an overlying dielectric layer. Providing such a graded adhesion layer can have a number of benefits, which can include providing both mechanical connections for improved adhesion with a surrounding dielectric layer and provide hermetic protection for the underlying conductive structure from corrosive species. The adhesion layer enables the conductive structure to maintain its as-formed smooth surface which in turn reduces insertion loss of signals transmitted through the conductive structure.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: November 22, 2022
    Assignee: Intel Corporation
    Inventors: Rahul N. Manepalli, Kemal Aygun, Srinivas V. Pietambaram, Cemil S. Geyik
  • Patent number: 11495561
    Abstract: An electrical conductor structure comprises a substrate and an electrical conductor disposed on or in the substrate. The electrical conductor comprises a first layer and a second layer disposed on a side of the first layer opposite the substrate. The first layer comprises a first electrical conductor that forms a non-conductive layer on a surface of the first electrical conductor when exposed to air and the second layer comprising a second electrical conductor that does not form a non-conductive layer on a surface of the second electrical conductor when exposed to air. A component comprises a connection post that is electrically connected to the second layer and the electrical conductor. The first and second layers can be inorganic. The first layer can comprise a metal such as aluminum and the second layer can comprise an electrically conductive metal oxide such as indium tin oxide.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: November 8, 2022
    Assignee: X Display Company Technology Limited
    Inventors: Christopher Andrew Bower, Matthew Alexander Meitl
  • Patent number: 11479027
    Abstract: A photosensitive electrically conductive structure includes: a substrate; a releasing photosensitizing resin layer disposed on the substrate; a nano silver layer disposed on the releasing photosensitizing resin layer; and a photosensitive electrically conductive layer disposed on an edge of the nano silver layer. A visible region is defined in the photosensitive electrically conductive structure where the nano silver layer is not covered by the photosensitive electrically conductive layer and a peripheral wiring region is defined in the photosensitive electrically conductive structure where the nano silver layer is covered by the photosensitive electrically conductive layer. The releasing photosensitizing resin layer has an average molecular weight (Mn) greater than 3,000 but less than 100,000, and the releasing photosensitizing resin layer, the nano silver layer, and the photosensitive electrically conductive layer are patterned.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: October 25, 2022
    Assignee: Cambrios Film Solutions Corporation
    Inventors: Chung-Chin Hsiao, Siou-Cheng Lien, Chia-Yang Tsai, Shu-Ping Hsu
  • Patent number: 11473188
    Abstract: A sputtering apparatus of the present invention is an apparatus performing deposition on a substrate to be processed using a sputtering method and includes a vacuum chamber, a target provided on a surface of a cathode provided in the vacuum chamber, a substrate holder provided in the vacuum chamber to face the target, and a swing unit that causes the substrate holder to be swingable with respect to the target. A swing region of the substrate to be processed in the substrate holder is set to be smaller than an erosion region of the target.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: October 18, 2022
    Assignee: ULVAC, INC.
    Inventors: Toshinori Kaneko, Tetsuhiro Ohno
  • Patent number: 11476212
    Abstract: Semiconductor apparatus and method for manufacturing semiconductor apparatus are provided. Semiconductor apparatus includes a semiconductor substrate having metal pads, a first passivation layer, a second passivation layer, an under bump metal layer, a stress buffer layer, a copper pillar and a solder structure. First passivation layer is formed on the semiconductor substrate and covers a portion of each metal pad, the first passivation layer has first passivation layer openings to expose a first portion of each metal pad. Second passivation layer is formed on the first passivation layer, the second passivation layer has second passivation layer openings to expose a second portion of each metal pad. Under bump metal layer is formed on the second portion of each metal pad exposed by the second passivation layer opening. Stress buffer layer is formed on the under bump metal layer, and the copper pillar is disposed on the stress buffer layer.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: October 18, 2022
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventor: Yu-Jie Lin
  • Patent number: 11469519
    Abstract: Antenna arrays with three-dimensional (3D) radiating elements are provided, as well as methods of manufacturing and methods of using the same. An array can include a ground plane and a plurality of radiating elements disposed thereon, and at least a portion of the radiating elements of the plurality of radiating elements can be 3D radiating elements. The array can optionally include a substrate disposed on the ground plane and having holes for the radiating elements. The 3D radiating elements can include, for example, conical elements such as a hollow conical element, a full conical element, a hollow and discretized conical element, or a combination thereof.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: October 11, 2022
    Assignee: THE FLORIDA INTERNATIONAL UNIVERSITY BOARD OF TRUSTEES
    Inventors: Stavros Georgakopoulos, Abdul-Sattar Kaddour
  • Patent number: 11467701
    Abstract: A touch sensor for a display device includes: a base layer; a first conductive layer disposed in a sensing region on the base layer; an insulating layer disposed on the first conductive layer; a second conductive layer disposed on the insulating layer in the sensing region; a first insulating pattern disposed on the second conductive layer; a plurality of signal lines provided in a non-sensing region, the plurality of signal lines being electrically connected to the first and second conductive layers; and a second insulating pattern disposed on the plurality of signal lines. The first insulating pattern and the second insulating pattern include the same material and are provided in the same layer.
    Type: Grant
    Filed: July 19, 2020
    Date of Patent: October 11, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chun Gi You, Ma Eum Cho, Hyun Sik Park
  • Patent number: 11424227
    Abstract: The present invention provides a display panel, a display module, and a display device. The display panel includes a substrate and micro-LEDs. The display module achieves an extremely-narrow-bezel design by attaching a support plate to one side of a flexible drive circuit board of the display panel, bending a bending region, and attaching a bonding region to another side of the support plate. Multiple display modules are arranged in a accommodating chamber defined by a back plate of the display device and are fixed and joined to each other. Accordingly, a narrow-gap joining technology for micro-LED is realized, thus solving a problem that the micro-LED is too small in size, and realizing large-sized micro-LED displays.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: August 23, 2022
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Minggang Liu, Yong Fan
  • Patent number: 11422305
    Abstract: Structures for polarization filtering and methods of forming a structure for polarization filtering. A waveguiding structure has a first waveguide core region including a first plurality of bends, a second waveguide core region including a second plurality of bends laterally spaced from the first plurality of bends by a gap, and a third waveguide core region including a third plurality of bends positioned beneath the gap. The first waveguide core region and the second waveguide core region contain a first material. The third waveguide core region contains a second material that differs in composition from the first material.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: August 23, 2022
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Yangyang Liu, Tymon Barwicz