Phosphor Screen Patents (Class 216/25)
  • Patent number: 10416381
    Abstract: A facet optical coupler, and techniques for forming a facet optical coupler, that includes a waveguide disposed in a trench of a substrate are described. The substrate may be a silicon substrate in some embodiments. A cladding material is first disposed in the trench, and the waveguide is disposed on the cladding material in the trench.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: September 17, 2019
    Assignee: Acacia Communications, Inc.
    Inventors: Long Chen, Christopher Doerr
  • Patent number: 10320147
    Abstract: A wavelength conversion member that includes a single crystal phosphor and has a high yield rate is provided. A light emitting unit (1) is a wavelength conversion member that converts a wavelength of a laser light output from a laser light source and includes a phosphor layer (1a) formed of a single crystal phosphor. A plane orientation of a principal plane (1b), which has an area larger than those of divided planes, of the phosphor layer is {111}, and a plane orientation of some divided planes out of the plurality of divided planes is {1-10}.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: June 11, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yoshiyuki Takahira, Koji Takahashi, Yoshinobu Kawaguchi, Kazunori Annen, Yosuke Maemura, Tomohiro Sakaue, Takatoshi Morita
  • Publication number: 20150131029
    Abstract: A color conversion substrate that can improve light use efficiency is provided. A color conversion substrate includes a transparent substrate having a main surface, a plurality of phosphor patterns arranged on the main surface and each of the phosphor patterns having side faces, and a reflective film that reflects light and is formed on at least the side faces of the phosphor patterns. An air layer is defined between the main surface and the phosphor patterns.
    Type: Application
    Filed: May 15, 2013
    Publication date: May 14, 2015
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Kazuya Kaida, Shinya Kadowaki
  • Patent number: 9031684
    Abstract: A method and system for integrated circuit fabrication is disclosed. In an example, the method includes determining a first process parameter of a wafer and a second process parameter of the wafer, the first process parameter and the second process parameter corresponding to different wafer characteristics; determining a variation of a device parameter of the wafer based on the first process parameter and the second process parameter; constructing a model for the device parameter as a function of the first process parameter and the second process parameter based on the determined variation of the device parameter of the wafer; and performing a fabrication process based on the model.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: May 12, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Nai-Han Cheng, Chin-Hsiang Lin, Chi-Ming Yang, Chun-Lin Chang, Chih-Hong Hwang
  • Publication number: 20140138348
    Abstract: A method for producing a ceramic composite for light conversion including first step of forming the step level difference such that an oxide crystal phase other than Al2O3 phase of a surface of a solidified body is in a convex shape relative to an Al2O3 phase by subjecting the surface of the solidified body having a structure in which the Al2O3 phase and the oxide crystal phase other than Al2O3 phase are continuously and three-dimensionally entangled with each other to dry etching, and a second step of reducing the step level difference by subjecting the solidified body subjected to the dry etching to CMP or MP.
    Type: Application
    Filed: July 6, 2012
    Publication date: May 22, 2014
    Applicant: UBE INDUSTRIES, LTD.
    Inventors: Dai Inamori, Takafumi Kawano
  • Patent number: 8404136
    Abstract: There is provided a method for manufacturing a diffractive optical element that can suppress the generation of heat from the inside of an insulative substrate and stabilize an etching rate. A method for manufacturing a diffractive optical element composed of an insulative substrate whose surface has a bumpy structure includes a selecting step of selecting an insulative substrate having an electrical resistivity equal to or higher than a certain value by measuring electrical resistivity of insulative substrates; and an etching step of forming a bumpy structure by dry etching in a surface of the insulative substrate selected in the selecting step.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: March 26, 2013
    Assignees: Sumitomo Electric Industries, Ltd., Sumitomo Electric Hardmetal Corp.
    Inventors: Kenichi Kurisu, Hideaki Imamura
  • Patent number: 8226837
    Abstract: A process for producing through simple operations a molding die for optical device having an antireflective structure of nano-order microscopic uneven plane on a substratum surface. The molding die for optical device having microscopic uneven plane (antireflective structure die plane) on a surface of substratum is produced by a process comprising forming one or more etching transfer layers on substratum; forming thin film for formation of semispherical microparticles on the etching transfer layers; causing the thin film to undergo aggregation, or decomposition, or nucleation of the material by the use of any of thermal reaction, photoreaction and gas reaction or a combination of these reactions so as to form multiple semispherical islandlike microparticles; and using the multiple islandlike microparticles as a protective mask, carrying out sequential etching of the etching transfer layers and substratum by reactive gas to thereby form a conical pattern on the microscopic surface of the substratum.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: July 24, 2012
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Kazuma Kurihara, Takayuki Shima, Junji Tominaga
  • Publication number: 20120183124
    Abstract: Periodic electrodes in a pattern of many lines are formed on a first surface of a nonlinear single crystal substrate. The nonlinear single crystal substrate is put in a vacuum chamber, and heated with a heater. Then, high voltage is applied to the nonlinear single crystal substrate. Thus, the direction of spontaneous polarization of the nonlinear single crystal substrate is reversed in portions facing to the periodic electrodes, which are referred to as reversed portions. After the nonlinear single crystal substrate is bonded to a support substrate, only non-reversed portions of the nonlinear single crystal substrate are removed by wet etching, and grooves with a high aspect ratio are left between the remaining reversed portions. The grooves are filled with an X-ray absorbing material such as gold. The grooves filled with the gold compose X-ray absorbing portions of a grid, while the reversed portions compose X-ray transparent portions.
    Type: Application
    Filed: December 30, 2011
    Publication date: July 19, 2012
    Applicant: FUJIFILM CORPORATION
    Inventor: Yasuhisa KANEKO
  • Patent number: 8158012
    Abstract: A film forming apparatus is provided with a processing chamber having a substrate holding table for holding a substrate to be processed inside the container; a gas material generation unit arranged outside the processing chamber, for generating a gas material by evaporating or sublimating a film forming source material including a metal; a gas material supply unit for supplying the processing chamber with the gas material; and a transport path for transporting the gas material to the gas material supply unit from the gas material generation unit. The film forming apparatus is characterized in that a metal-containing layer is formed on an organic layer including a light emitting layer on the target substrate.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: April 17, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Toshihisa Nozawa, Shingo Watanabe
  • Patent number: 8052884
    Abstract: A method of fabricating a microchannel plate includes defining a plurality of pores extending from a top surface of a substrate to a bottom surface of the substrate where the plurality of pores has a resistive material on an outer surface that forms a first emissive layer. A second emissive layer is formed over the first emissive layer. The second emissive layer is chosen to achieve at least one of an increase in secondary electron emission efficiency and a decrease in gain degradation as a function of time. A top electrode is formed on the top surface of the substrate and a bottom electrode is formed on the bottom surface of the substrate.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: November 8, 2011
    Assignee: Arradiance, Inc.
    Inventors: Neal T. Sullivan, David Beaulieu, Anton Tremsin, Philippe De Rouffignac, Michael D. Potter
  • Publication number: 20110221331
    Abstract: An active matrix organic electroluminescent device includes a thin-film transistor, an organic electroluminescent device, and a spacer layer deposited between the thin-film transistor and the organic electroluminescent device, wherein the spacer layer is made of adhesive for a dual curing system selected from the group consisting of ultraviolet curing-thermal curing, ultraviolet curing-microwave curing, ultraviolet curing-anaerobic curing, and ultraviolet curing-electron beam curing system. The present invention solves the poor adhesiveness between the thin-film transistor and the organic electroluminescent device, and improves the moisture and oxygen proof ability. The preparation method is simple, effective, and able to lower the cost and difficulty, and greatly improve the yield rate of the device.
    Type: Application
    Filed: April 30, 2010
    Publication date: September 15, 2011
    Inventors: Junsheng Yu, Yadong Jiang, Jian Zhong, Hui Lin
  • Publication number: 20100078640
    Abstract: A fabrication process for a device such as a backplane for a flat panel display includes depositing thin film layers on a substrate, forming a 3D template overlying the thin film layers, and etching the 3D template and the thin film layers to form gate lines and transistors from the thin film layers. An insulating or passivation layer can then be deposited on the gate lines and the transistors, so that column or data lines can be formed on the insulating layer.
    Type: Application
    Filed: October 1, 2008
    Publication date: April 1, 2010
    Inventors: Ping Mei, Hao Luo, Albert Hua Jeans, Angeles Marcia Almanza-Workman, Robert A. Garcia, Warren Jackson, Carl P. Taussig, Craig M. Perlov
  • Publication number: 20090243475
    Abstract: One embodiment of the present invention is an organic electroluminescent element including a substrate, a first electrode arranged on said substrate, a luminescent medium layer including at least an organic luminescent layer and a molybdenum oxide layer arranged on the first electrode, a second electrode facing the first electrode, the luminescent medium layer sandwiched between the electrodes and the molybdenum oxide layer including at least molybdic anhydride and one or more other inorganic compounds.
    Type: Application
    Filed: March 18, 2009
    Publication date: October 1, 2009
    Applicant: Toppan Printing Co., Ltd.
    Inventors: Ryo Shoda, Yuko Abe, Eiichi Kitazume
  • Publication number: 20090236962
    Abstract: The Present invention provides an organic EL display and a lighting device having high efficiency. The organic EL display comprises a substrate, a pixel-driving circuit unit, and pixels arranged in the form of a matrix on the substrate. The pixel comprises a light-emitting part, and the light-emitting part is composed of a first electrode placed near to the substrate, a second electrode placed far from the substrate, and at least one organic layer placed between the first and second electrodes. The second electrode has a metal electrode layer having a thickness of 10 nm to 200 nm, and the metal electrode layer comprises a metal part and plural openings penetrating through the layer. The metal part is seamless and formed of metal continuously connected without breaks between any points therein.
    Type: Application
    Filed: February 25, 2009
    Publication date: September 24, 2009
    Inventors: Akira FUJIMOTO, Koji Asakawa, Tsutomu Nakanishi, Eishi Tsutsumi, Ryota Kitagawa
  • Publication number: 20090014412
    Abstract: A film forming apparatus is provided with a processing chamber having a substrate holding table for holding a substrate to be processed inside the container; a gas material generation unit arranged outside the processing chamber, for generating a gas material by evaporating or sublimating a film forming source material including a metal; a gas material supply unit for supplying the processing chamber with the gas material; and a transport path for transporting the gas material to the gas material supply unit from the gas material generation unit. The film forming apparatus is characterized in that a metal-containing layer is formed on an organic layer including a light emitting layer on the target substrate.
    Type: Application
    Filed: February 20, 2007
    Publication date: January 15, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Toshihisa Nozawa, Shingo Watanabe
  • Publication number: 20080309223
    Abstract: A sintered article is fabricated which contains one or more of indium oxide, zinc oxide, and tin oxide as a component thereof and contains any one or more types of metal out of hafnium oxide, tantalum oxide, lanthanide oxide, and bismuth oxide. A backing plate is attached to this sintered article to constitute a sputtering target. This sputtering target is used to fabricate a conductive film on a predetermined substrate by sputtering. This conductive film achieves a large work function while maintaining as much transparency as heretofore. This conductive film can be used to achieve an EL device or the like of improved hole injection efficiency.
    Type: Application
    Filed: March 25, 2008
    Publication date: December 18, 2008
    Applicant: Idemitsu Kosan Co., Ltd.
    Inventors: Kazuyoshi Inoue, Hisayuki Kawamura
  • Publication number: 20080210660
    Abstract: The present invention relates to a novel dispensable medium for etching doped tin oxide layers having non-Newtonian flow behaviour for etching surfaces in the production of displays and/or solar cells and to the use thereof. In particular, it relates to corresponding particle-free compositions by means of which fine structures can be etched selectively without damaging or attacking adjacent areas.
    Type: Application
    Filed: June 8, 2006
    Publication date: September 4, 2008
    Applicant: MERCK PATENT GESELLSCHAFT
    Inventors: Werner Stockum, Armin Kuebelbeck
  • Patent number: 7391029
    Abstract: A radiation detection apparatus including a sensor panel, having a photoreceiving unit constituted of plural photoelectric converting elements two-dimensionally arranged on a substrate and electrical connecting portions provided in an external portion of the photoreceiving unit and electrically connected to the photoelectric converting elements of respective rows or columns of the photoreceiving unit, a phosphor layer provided at least on the photoreceiving unit for converting a radiation into a light detectable by the photoelectric converting element, and a phosphor protective member covering the phosphor layer and in contact with the sensor panel, characterized in that the phosphor protective member includes a frame member provided between the phosphor layer and the electric connecting portion on the sensor panel, and a phosphor protective layer covering an upper surface of the phosphor layer and provided in close contact with an upper surface of the frame member.
    Type: Grant
    Filed: August 8, 2005
    Date of Patent: June 24, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shinichi Takeda, Yoshihiro Ogawa, Masato Inoue, Satoshi Okada, Tomoyuki Tamura, Kazumi Nagano
  • Publication number: 20080047930
    Abstract: The invention provides a method to form a pattern of a functional material on a substrate for use in electronic devices and components. The method uses a stamp having a relief structure to transfer a mask material to a substrate and form a pattern of open area on the substrate. The functional material is applied to the substrate in at least the open area. The mask material is removed from the substrate, forming the pattern of functional material on the substrate. The method is suitable for the fabrication of microcircuitry for electronic devices and components.
    Type: Application
    Filed: August 23, 2006
    Publication date: February 28, 2008
    Inventors: Graciela Beatriz Blanchet, Hee Hyun Lee
  • Patent number: 7182877
    Abstract: A method is provided for manufacturing an electro-optical device, in which fine scratches or cracks can be removed by etching without damaging wiring, an electro-optical device, and an electronic apparatus. According to the method, a liquid crystal panel used in an electro-optical device is cut as a single product. Then, before an IC mounting step, in a state of the single product liquid crystal panel, a wet etching is performed on the cut faces and edges of the first and second substrates to remove fine scratches or cracks from the cut faces and edges of the substrates. At this time, wiring portions, IC mounting terminals, substrate mounting terminals, and alignment marks, which are formed on the protruding region, are covered with a protection layer.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: February 27, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Hidetoshi Murai, Manabu Hanakawa
  • Patent number: 7087179
    Abstract: In one aspect, the invention provides methods and apparatus for forming optical devices on large area substrates. The large area substrates are preferably made of quartz, silica or fused silica. The large area substrates enable larger optical devices to be formed on a single die. In another aspect, the invention provides methods and apparatus for forming integrated optical devices on large area substrates, such as quartz, silica or fused silica substrates. In another aspect, the invention provides methods and apparatus for forming optical devices using damascene techniques on large area substrates or silicon substrates. In another aspect, methods for forming optical devices by bonding an upper cladding layer on a lower cladding and a core is provided.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: August 8, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Cecilia Y. Mak, John M. White, Kam S. Law, Dan Maydan
  • Patent number: 6922010
    Abstract: The present invention provides a shadow mask having an improved resistance to an impact such as vibration or dropping so as to keep a constant quality of a color cathode-ray tube.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: July 26, 2005
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Takayasu Komatsu, Hirofumi Hideshima, Akira Makita, Yutaka Matsumoto, Takuya Ogio
  • Patent number: 6756185
    Abstract: The same mask pattern is used as an etching mask in defining the horizontal location of micro-machined (etched) features at the substrate surface of an optical device relative to the waveguide cores also at the substrate surface of the optical device. Exemplary micro-machined features include grooves, recesses and inclined surfaces formed in the substrate surface for any of a variety of purposes. The accurate horizontal positioning of these features relative to the integrated waveguide cores fosters accurate optical coupling between the integrated waveguide cores and external and/or internal components.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: June 29, 2004
    Assignee: Shipley Company, L.L.C.
    Inventor: Dan A. Steinberg
  • Publication number: 20040004057
    Abstract: A process for producing multiple undercut profiles in a single material. A resist pattern is applied over a work piece and a wet etch is performed to produce an undercut in the material. This first wet etch is followed by a polymerizing dry etch which produces a polymer film in the undercut created by the first wet etch. The polymer film prevents further etching of the undercut portion during a second wet etch. Thus, an undercut profile can be obtained having a larger undercut in an underlying portion of the work piece, utilizing only a single resist application step. The work piece may be a multi-layer work piece having different layers formed of the same material, or it may be a single layer of material.
    Type: Application
    Filed: December 13, 2002
    Publication date: January 8, 2004
    Applicant: Micron Technology, Inc.
    Inventors: Karen Huang, Christophe Pierrat
  • Patent number: 6669856
    Abstract: An organic electroluminescent display apparatus and method for manufacturing same is disclosed; the method prevents the anode and the cathode from defects and short circuit, and with the suitable geometry of the electrical insulation ramparts, the mechanical properties of the cathode insulating ramparts are increased such that the adhesion between the cathode insulating ramparts and the substrate is enhanced.
    Type: Grant
    Filed: December 5, 2000
    Date of Patent: December 30, 2003
    Assignee: Chi Mei Optoelectronics Corporation
    Inventors: Chia-Tin Chung, Su-Jen Chang, Andrea Hwang, Chen-Ze Hu
  • Patent number: 6656373
    Abstract: An optical element which controls both the phase and irradiance distribution, thereby completely specifying the E-field, of light, allowing completely arbitrary control of the light at any plane. Such an optical element includes a portion that controls the phase and a portion that controls the irradiance. The portion that controls the irradiance is an apodized irradiance mask having its transmission varying with position in a controlled fashion. This apodized irradiance mask is preferably a pattern of metal. In order to insure a smoothly varying pattern of metal with minimized diffraction effects, a very thin mask spaced from a substrate is used to provide the metal on the substrate. The apodized irradiance mask may be placed directly on the phase control portion, or may be on an opposite side of a substrate of the phase controlled portion.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: December 2, 2003
    Assignee: Wavefront Sciences, Inc.
    Inventors: Daniel R. Neal, Justin D. Mansell
  • Publication number: 20030201244
    Abstract: A method of generating ejection pattern data for a plurality of nozzles for use in selectively ejecting functional liquid droplets from the nozzles is to draw on ore more one chip-forming area on a workpiece. The method includes a pixel-setting step of setting pixel information concerning an array of pixels in the chip-forming areas, a chip-setting step of setting chip information concerning an array of the chip-forming areas on the workpiece, a nozzle-setting step of setting nozzle information concerning an array of the nozzles, and a data-generating step of generating the ejection pattern data for the nozzles from the pixel information, the chip information, and the nozzle information, based on a positional relationship between the workpiece and the functional liquid droplet ejection head. The ejection pattern data are easily and quickly generated for the nozzles arranged in an array in the plurality of functional liquid droplet ejection heads.
    Type: Application
    Filed: February 19, 2003
    Publication date: October 30, 2003
    Applicant: Seiko Epson Corporation
    Inventors: Masahiko Ogawa, Tsuyoshi Kato
  • Patent number: 6624087
    Abstract: An etchant for patterning indium tin oxide, wherein the etchant is a mixed solution of HCl, CH3COOH, and water, and a method of fabricating a liquid crystal display device are disclosed in the present invention. The method includes forming a gate electrode on a substrate, forming a gate insulating layer and an amorphous silicon layer on the gate electrode including the substrate, forming an active area by patterning the amorphous silicon layer, forming a source electrode and a drain electrode on the active area, forming a passivation layer on the source electrode and the drain electrode and the gate insulating layer, forming a contact hole exposing a part of the drain electrode, forming an indium tin oxide layer on the passivation layer, and forming an indium tin oxide electrode by selectively etching the indium tin oxide layer using a mixed solution of HCl, CH3COOH, and water as an etchant.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: September 23, 2003
    Assignee: LG. Philips Co., Ltd.
    Inventors: Byung Tae Roh, You Shin Ahn
  • Patent number: 6562551
    Abstract: A multi-level matrix structure for retaining a support structure within a flat panel display device. In one embodiment, the multi-level matrix structure is comprised of a first parallel ridges. The multi-level matrix structure further includes a second parallel ridges. The second parallel ridges are oriented substantially orthogonally with respect to the first parallel ridges. In this embodiment, the second parallel ridges have a height which is greater than the height of the first parallel ridges. Furthermore, in this embodiment, the second plurality of parallel spaced apart ridges include contact portions for retaining a support structure at a desired location within a flat panel display device. Hence, when a support structure is inserted between at least two of the contact portions of the multi-level support structure, the support structure is retained in place, at a desired location within the flat panel display device, by the contact portions.
    Type: Grant
    Filed: May 31, 2000
    Date of Patent: May 13, 2003
    Assignee: Candescent Technologies Corporation
    Inventors: John D. Porter, Bob L. Mackey, Robert G. Neimeyer, Christopher J. Spindt, David C. Chang, Kris E. Sahlstrom
  • Patent number: 6139760
    Abstract: Provided with a method of fabricating a 200-250 nm short-wavelength optoelectronic device, which has a combination of an optical device with a plurality of acceleration electrodes and a field emission device with a plurality of acceleration electrodes, from a semiconductor having a 5-6 eV energe band gap, based on a principle that an electron-hole pair is produced using a highly energetic electron which is injected from a field emission device, and short-wavelength photons are emitted when the electron recombines with the hole and confined in a quantum well to emit a light corresponding to the energy level of the quantum well, thereby eliminating the need of using dopants for forming n-p junctions in the semiconductor and achieving high efficiency in terms of energy because highly energetic electrons result in one or more electron-hole pairs.
    Type: Grant
    Filed: August 6, 1998
    Date of Patent: October 31, 2000
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kyu Hwan Shim, Sung Woo Choi, Mun Cheol Baek, Kyoung Ik Cho, Hae Gwon Lee
  • Patent number: 6099746
    Abstract: An organic electroluminescent device and a method for fabricating the same are disclosed, the method including the steps of (1) forming a plurality of first electrode stripes on a transparent substrate at fixed intervals, (2) forming an array of partition walls made of an electrically insulating material on the first electrode elements; having a trapezoidal structure with the lower side wider than the upper side, (3) forming an organic eletroluminescent multilayer, the second electrode, and the first protection layer in succession on the entire surface including on top of the partition walls, (4) removing upper portions of films, unequivocally including the second electrode layer on top of the partition walls, whereby electrically isolating any two adjacent pixels, and (5) forming the second protection layer on top of the etched-out surface, whereby simplifying fabrication processes, improving product yield and reducing product cost.
    Type: Grant
    Filed: April 10, 1998
    Date of Patent: August 8, 2000
    Assignee: LG Electronics Inc.
    Inventor: Sung Tae Kim
  • Patent number: 5897790
    Abstract: A withdrawn electrode is formed on a silicon substrate with intervention of upper and lower silicon oxide films each having circular openings corresponding to regions in which cathodes are to be formed. Tower-shaped cathodes are formed in the respective openings of the upper and lower silicon oxide films and of the withdrawn electrode. Each of the cathodes has a sharply tapered tip portion having a radius of 2 nm or less, which has been formed by crystal anisotropic etching and thermal oxidation process for silicon. The region of the silicon substrate exposed in the openings of the upper and lower silicon oxide films and the cathode have their surfaces coated with a thin surface coating film made of a material having a low work function.
    Type: Grant
    Filed: December 22, 1997
    Date of Patent: April 27, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Keisuke Koga, Yoshikazu Hori, Takehito Yoshida, Yuka Yamada
  • Patent number: 5818153
    Abstract: A field emitter and its fabrication method is described in which a gate electrode is formed around and substantially encloses the emitter. The emitter is formed on a silicon substrate and is in the form of a pyramid structure. The surface of the pyramid includes an oxide layer on it. The whole device is baked until the photoresist is drawn, by surface tension, towards the base of the pyramid to expose the metal layer. Etching of the metal layer and the oxide layer produces the finished device which may suitably be employed as a switch in an electronic circuit.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: October 6, 1998
    Assignee: Central Research Laboratories Limited
    Inventor: Philip Charles Allen
  • Patent number: 5785873
    Abstract: A photoprinter is described, including a print head comprising three parallel substrates, with the space between them being permanently evacuated. The middle substrate is divided into left and right parts with a space left between them. Suitable gettering means is located inside said space. The right side of the middle substrate supports a unilinear or trilinear array (for monochrome and color respectively) of microtips that rest on cathode columns. Gate lines, orthogonally disposed relative to the cathode columns are located at the top level of the microtips and have openings through which the microtips can emit electrons, due to field emission, which bombard nearby conductive phosphor layers, thereby emitting light. Microtips and phosphor layers are placed close together so that proximity focusing of the electrons is adequate. This allows the print head to be placed close to the surface of a rotatable photosensitive drum. A method for manufacturing the print head is described.
    Type: Grant
    Filed: June 24, 1996
    Date of Patent: July 28, 1998
    Assignee: Industrial Technology Research Institute
    Inventor: Jammy Chin-Ming Huang
  • Patent number: 5779920
    Abstract: The present invention provides luminescent screens with a mask layer, methods of manufacturing the screens, and display devices incorporating the screens. The mask layer is attached to a matrix defining the pixels in the screen and preferably includes voids formed therethrough corresponding to each pixel. The voids in the mask layer preferably have a size generally corresponding to that of the pixels near the phosphor material and narrow in the direction of the electron source.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: July 14, 1998
    Assignee: Micron Technology, Inc.
    Inventors: Surjit S. Chadha, Dean A. Wilkinson
  • Patent number: 5772904
    Abstract: A field emission display having a diamond thin film having a low work function due to its affinity for electrons used for forming a micro-tip. Electron emitting micro-tips are manufactured using diamond or diamond-like carbon which have a low work function due to their affinity for electrons, and thereby facilitate electron emission at a very low gate voltage. Manufacturing a flat micro-tip allows uniform tips to be formed so that a large device can be easily fabricated.
    Type: Grant
    Filed: July 25, 1996
    Date of Patent: June 30, 1998
    Assignee: Samsung Display Devices Co., Ltd.
    Inventor: Jong-min Kim
  • Patent number: 5725787
    Abstract: A light-emitting structure (306) contains a main section (302), a pattern of ridges (314) situated along the main section, and a plurality of light-emissive regions (313) situated in spaces between the ridges. The light-emissive regions produce light of various colors upon being hit by electrons. The ridges, which extend further away from the main section than the light-emissive regions, are substantially non-emissive of light when hit by electrons. Each ridge includes a dark region. The ridges thereby form a raised black matrix that improves contrast and color purity. When the light-emitting structure is used in an optical display, the raised black matrix contacts internal supports (308) and, in so doing, protects the light-emissive regions from being damaged. The light-emitting structure can be formed according to various techniques of the invention.
    Type: Grant
    Filed: May 25, 1995
    Date of Patent: March 10, 1998
    Assignee: Candescent Technologies Corporation
    Inventors: Christopher J. Curtin, Ronald S. Nowicki, Theodore S. Fahlen, Robert M. Duboc, Jr., Paul A. Lovoi
  • Patent number: 5723052
    Abstract: Described are methods for making, and resultant structures of, a field emission display with soft luminescence and a comfortable image for a viewer of the display. The field emission display is formed with a baseplate and an opposing face plate. Field emission microtips are formed in openings in a conductive and insulating layer on the baseplate. An anode is formed on either the faceplate, or on the conductive layer surrounding each opening. Phosphorescent material is formed over the anode. A blocking layer is formed between the phosphor and the faceplate, such that during operation of the display direct light emission from the phosphor is blocked, resulting in indirect phosphorescence and a more comfortable display image. An optional reflective layer may be added over the conductive layer to increase phosphorescence.
    Type: Grant
    Filed: February 26, 1996
    Date of Patent: March 3, 1998
    Assignee: Industrial Technology Research Institute
    Inventor: David Nan-Chou Liu
  • Patent number: 5711889
    Abstract: A dichroic filter array is mounted on a wafer by combining microelectronic and microlithography techniques. A release layer of copper is evaporated onto a wafer, and the release layer is coated with a photoresist. The assembly is masked, and the unmasked photoresist, after exposure to ultraviolet light, is developed to expose a predetermined section of the release layer. That section of release layer is then overetched to create an undercut in its walls and to expose the underlying wafer. Dichroic filter material is then deposited onto the wafer by a cold process, and the release layer is then removed, leaving only the dichroic filter material on the wafer. The process is repeated to create an array.
    Type: Grant
    Filed: September 15, 1995
    Date of Patent: January 27, 1998
    Inventor: Philip E. Buchsbaum
  • Patent number: 5698397
    Abstract: The invention provides methods, compositions, and apparatus for performing sensitive detection of analytes, such as biological macromolecules and other analytes, by labeling a probe molecule with an up-converting label. The up-converting label absorbs radiation from an illumination source and emits radiation at one or more higher frequencies, providing enhanced signal-to-noise ratio and the essential elimination of background sample autofluorescence. The methods, compositions, and apparatus are suitable for the sensitive detection of multiple analytes and for various clinical and environmental sampling techniques.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: December 16, 1997
    Assignee: SRI International
    Inventors: David A. Zarling, Michel J. Rossi, Norman A. Peppers, James Kane, Gregory W. Faris, Mark J. Dyer, Steve Y. Ng, Luke V. Schneider
  • Patent number: 5674407
    Abstract: A method of fabricating an anode plate 80 for use in a field emission device comprising the steps of providing a substantially transparent substrate 70, depositing a layer of a transparent, electrically conductive material 90 on a surface of the substrate, and then removing portions of said layer of conductive material to leave stripes of said conductive material 90.sub.R, 90.sub.G, 90.sub.B. The stripes of conductive material have a first and second corner 84, 88 distal from the substrate 70. The first and second corners 84, 88 of the stripes of conductive material are rounded and luminescent material 74 is applied on the conductive stripes 90. The first and second corners 84, 88 are rounded by applying voltage to the stripes 90 and then etching the stripes to form the rounded corners 84, 88.
    Type: Grant
    Filed: July 3, 1995
    Date of Patent: October 7, 1997
    Assignee: Texas Instruments Incorporated
    Inventor: Kenneth G. Vickers
  • Patent number: 5647998
    Abstract: A process produces laminar composite lateral-emitter microelectronic devices especially useful in high-resolution field-emission display arrays. The devices incorporate a thin film laminar composite emitter structure including two or more films composed of materials having different etch rates. The laminar composite emitter consists of two or more ultra-thin layers, etched differentially so that a salient remaining portion of the most etch-resistant layer protrudes beyond the less etch-resistant layers to form a small-radius tip. The most etch-resistant layer is preferably diamond doped with one or more N-type dopants. An emitting edge of the laminar composite emitter is first formed by a directional trench etch. During or after fabrication of a trench portion of the structure, a small amount of supporting upper and/or lower layers is removed by a differential etch, such as a plasma etch. This leaves an ultra thin emitter edge or tip.
    Type: Grant
    Filed: June 13, 1995
    Date of Patent: July 15, 1997
    Assignee: Advanced Vision Technologies, Inc.
    Inventor: Michael D. Potter
  • Patent number: 5633120
    Abstract: A method of fabricating a double level metal (DLM) anode plate for use in a field emission device comprises the steps of providing a transparent substrate 82 having an active region 58 and a bus region 62. Then providing electrically conductive regions 50 on the surface. The conductive regions 50 span the active region 58 and the bus region 62. Next, the surface is coated with an electrically insulating material 94 and then the electrically insulating material 94 is removed from selected portions of the bus region 62, the active region 58, and upper portions of the transparent substrate 82. A first bus 52 is provided for electrically connecting a first series of the conductive regions, a second bus 54 is provided for electrically connecting a second series of the conductive regions, and a third bus 56 is provided for electrically connecting a third series of the conductive regions. Luminescent material of a first color 88.sub.R is applied to the first series of conductive regions 50.sub.
    Type: Grant
    Filed: May 22, 1995
    Date of Patent: May 27, 1997
    Assignee: Texas Instruments Inc.
    Inventor: Kenneth G. Vickers
  • Patent number: 5591352
    Abstract: The object of the present invention is to provide a cold cathode field emission display whose resolution is not limited by the provision of individual ballast resistors for each pixel or by the wiring system used to deliver voltage to the cold cathodes. This has been achieved by providing additional layers beneath the cold cathodes arrays so that said resistors and voltage delivery systems are located directly below the cold cathode arrays instead of alongside of them. Six different embodiments of the invention are described.
    Type: Grant
    Filed: April 27, 1995
    Date of Patent: January 7, 1997
    Assignee: Industrial Technology Research Institute
    Inventor: Chao-Chi Peng
  • Patent number: 5578225
    Abstract: A field emission display that may be viewed through the back plate, thus providing increased luminous efficiency, and methods for making such a display, are described. A glass substrate is provided as a base for the display faceplate. There is a reflective, conductive layer over the glass substrate. A phosphor layer is formed over the reflective, conductive layer. A second glass substrate acts as a transparent base for the display baseplate, which is mounted opposite and parallel to the faceplate. A first transparent insulating layer is formed over the second glass substrate. There are parallel, transparent cathode electrodes with auxiliary metal electrodes, over the first insulating layer. Parallel, transparent gate electrodes are formed over, separate from, and orthogonally to the parallel, transparent cathode electrodes, and also have auxiliary metal electrodes. A second transparent insulating layer is between the gate electrodes and the cathode electrodes.
    Type: Grant
    Filed: January 19, 1995
    Date of Patent: November 26, 1996
    Assignee: Industrial Technology Research Institute
    Inventor: Ho-Ching Chien
  • Patent number: 5492234
    Abstract: A method is provided for forming inter-electrode spacers useful in flat panel display devices which comprises placing a mold on a first electrode plate. The mold has openings with corresponding diameters. The mold is coated with a conformal film which lines the openings, thereby decreasing the diameters of the openings. The openings are filled with a glass material. The conformal film is selectively removed, and the mold is separated from the electrode.
    Type: Grant
    Filed: October 13, 1994
    Date of Patent: February 20, 1996
    Assignee: Micron Technology, Inc.
    Inventor: Angus C. Fox, III
  • Patent number: 5485935
    Abstract: A method and apparatus are disclosed for capturing coating debris during laser ablation of a photoreceptor comprising: (a) enclosing a predetermined length of a coated substrate in a housing to result in an enclosed coated substrate portion, wherein there exists a gap between the enclosed substrate portion and the housing in communication with air outside the housing; (b) directing high energy radiation at the coating of the enclosed substrate portion; (c) directing a first fluid stream against the coating of the enclosed substrate portion to remove at least part of the coating in the form of coating debris during or subsequent to (b), whereby the first fluid stream may move a portion of the coating debris outside the housing in the absence of (d); (d) directing a second fluid stream against the first fluid stream in a direction effective for keeping the coating debris inside the housing, thereby minimizing movement of the coating debris into the air outside the housing; and (e) exhausting the coating debris.
    Type: Grant
    Filed: April 1, 1994
    Date of Patent: January 23, 1996
    Assignee: Xerox Corporation
    Inventors: Robert S. Foltz, Ronald A. Gaither
  • Patent number: 5460284
    Abstract: A method and apparatus are disclosed for capturing coating debris during laser ablation of a photoreceptor comprising: (a) enclosing a predetermined length of a coated substrate in a housing to result in an enclosed coated substrate portion, wherein there exists a gap between the enclosed substrate portion and the housing in communication with air outside the housing; (b) directing high energy radiation at the coating of the enclosed substrate portion; (c) directing a first fluid stream against the coating of the enclosed substrate portion to remove at least part of the coating in the form of coating debris during or subsequent to (b), whereby the first fluid stream may move a portion of the coating debris outside the housing in the absence of (d); (d) directing an annularly-shaped second fluid stream against the first fluid stream in a direction effective for keeping the coating debris inside the housing, thereby minimizing movement of the coating debris into the air outside the housing; and (e) exhausting t
    Type: Grant
    Filed: April 1, 1994
    Date of Patent: October 24, 1995
    Assignee: Xerox Corporation
    Inventors: Robert S. Foltz, Ronald A. Gaither, Richard C. Petralia