Etching And Coating Occur In The Same Processing Chamber Patents (Class 216/37)
  • Patent number: 6291357
    Abstract: A substrate 20 is placed in a process zone 115 of a process chamber 110, process gas is introduced into the process zone 115, and an energized gas is formed in the process zone 115. First process conditions are set to form etch-passivating deposits onto a surface 22 of the substrate 20. Second process conditions are set to etch the surface 22 of the substrate 20. The etch-passivating deposits formed before the etching process improve etching uniformity and reduce etch-rate microloading.
    Type: Grant
    Filed: October 6, 1999
    Date of Patent: September 18, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Luke Zhang, Ruiping Wang, Ida Ariani Adisaputro, Kwang-Soo Kim
  • Patent number: 6284148
    Abstract: A method is proposed for anisotropic etching of micro- and nanofeatures in silicon substrates using independently controlled etching steps and polymer deposition steps which succeed one another alternatingly, the quantity of polymer deposited decreasing in the course of the polymer deposition steps, thus preventing any underetching of the micro- and nanofeatures.
    Type: Grant
    Filed: July 16, 1999
    Date of Patent: September 4, 2001
    Assignee: Robert Bosch GmbH
    Inventors: Franz Laermer, Andrea Schilp
  • Patent number: 6277194
    Abstract: A method of removing contaminants from a surface in a silicon substrate processing chamber. The method includes coating the surface which has been exposed to contaminants including metal particles with a material preferably including silicon. During coating, contaminants are collected by the material being applied. The method further includes removing the material and any contaminants that have been collected by the material during coating. The method can be performed after the surface has been exposed to contaminants from ambient air or moisture during cleaning or preventive maintenance procedures, for example. Also, the method is preferably performed before any baking procedures or before the chamber is heated to drive out any moisture that has been introduced to the chamber.
    Type: Grant
    Filed: October 21, 1999
    Date of Patent: August 21, 2001
    Assignee: Applied Materials, Inc.
    Inventors: AnnaLena Thilderkvist, Paul B. Comita, Ann P. Waldhauer
  • Patent number: 6267867
    Abstract: A process for coating a tungsten carbide base material substrate with CVD diamond film includes carburization and gas-assisted vaporization of cobalt from the surface with simultaneous recrystallization of surface grains of tungsten carbide to change their stoichiometry for improved adherence. Also disclosed is a WC—Co cutting tool having a relatively fine WC grain size and being coated with adherent CVD diamond.
    Type: Grant
    Filed: April 27, 1999
    Date of Patent: July 31, 2001
    Assignee: Saint-Gobain Industrial Ceramics, Inc.
    Inventor: James M. Olson
  • Publication number: 20010009246
    Abstract: A method of removing a ceramic coating (18), and particularly zirconia-containing thermal barrier coating (TBC) materials such as yttria-stabilized zirconia (YSZ), that has been either intentionally or unintentionally deposited on the surface of a component (10). The method entails subjecting the ceramic coating (18) to an aqueous solution containing an acid fluoride salt, such as ammonium bifluoride (NH4HF2) or sodium bifluoride (NaHF2), and a corrosion inhibitor. The method is capable of completely removing the ceramic coating (18) without removing or damaging the underlying substrate material, which may include a metallic bond coat (16).
    Type: Application
    Filed: December 5, 2000
    Publication date: July 26, 2001
    Inventors: Robert George Zimmerman, William Clarke Brooks, Roger Dale Wustman, John Douglas Evans
  • Publication number: 20010009247
    Abstract: A method of removing a ceramic coating, such as a thermal barrier coating (TBC) of yttria-stabilized zirconia (YSZ), from the surface of a component, such as a gas turbine engine component. The method generally entails subjecting the ceramic coating to an aqueous solution of ammonium bifluoride, optionally containing a wetting agent, such as by immersing the component in the solution while maintained at an elevated temperature. Using the method of the invention, a ceramic coating can be completely removed from the component and any cooling holes, with essentially no degradation of the bond coat.
    Type: Application
    Filed: February 23, 2001
    Publication date: July 26, 2001
    Inventor: William C. Brooks
  • Patent number: 6254739
    Abstract: A method for treating a silicon substrate is described. The silicon substrate is placed into a sputtering equipment. A sputtering step is performed to simultaneously dry clean and amorphize the silicon substrate surface by using the sputtering equipment. A titanium film is deposited on the silicon substrate by the sputtering equipment.
    Type: Grant
    Filed: October 13, 1999
    Date of Patent: July 3, 2001
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Su-Chen Fan
  • Patent number: 6251232
    Abstract: A substrate holder 90 where a thin film has accumulated on the surface of the holding claws 91 is transferred in a state where no substrate 9 is being held into a film removal chamber 70 which is established branching off in such a way that the vacuum is connected from the square transfer path 80 along which a plurality of vacuum chambers including the film deposition chambers 51, 52, 53, 54 and 50 is established. A high frequency power supply 73 is connected via the movable electrode 74 to the holder body 92 and a high frequency electric field is established within the film removal chamber 70. A plasma is formed by generating a high frequency discharge in the gas which is being delivered by means of the gas delivery system 72 and the accumulated film on the surface of the holding claws 91 is removed in a vacuum by sputter etching due to ion impacts.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: June 26, 2001
    Assignee: Anelva Corporation
    Inventors: Yoshiki Aruga, Koji Maeda
  • Patent number: 6245213
    Abstract: In a method for anisotropic etching of a structure in an electrically conductive substance to be etched, use is made of an etchant which in concentrated solution is usable for isotopic etching of structures in the substance to be etched. The substance to be etched is contacted with the etchant in a solution which is so diluted that the etchant is unusable for isotropic etching. The etchant is subjected, adjacent to the substance to be etched, to an electric field of such a strength that anisotropic etching of the substance to be etched is accomplished. Moreover, an etching fluid is described, comprising an etchant in dilute solution, in which the etchant is present in a concentration of 200 mM at most, and use of such an etching fluid for making structures which are 50 &mgr;m or less is also described.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: June 12, 2001
    Assignee: Obducat AB
    Inventors: Lennart Olsson, Babak Heidari
  • Publication number: 20010001460
    Abstract: An electrospray device, a liquid chromatography device and an electrosprayliquid chromatography system are disclosed. The electrospray device comprises a substrate defining a channel between an entrance orifice on an injection surface and an exit orifice on an ejection surface, a nozzle defined by a portion recessed from the ejection surface surrounding the exit orifice, and an electrode for application of an electric potential to the substrate to optimize and generate an electrospray; and, optionally, additional electrode(s) to further modify the electrospray.
    Type: Application
    Filed: December 21, 2000
    Publication date: May 24, 2001
    Inventors: James E. Moon, Timothy J. Davis, Gregory J. Galvin
  • Patent number: 6221565
    Abstract: The present invention relates generally to electro-optically active waveguide segments, and more particularly to the use of a selective voltage input to control the phase, frequency and/or amplitude of a propagating wave in the waveguide. Particular device structures and methods of manufacturing are described herein.
    Type: Grant
    Filed: February 8, 1999
    Date of Patent: April 24, 2001
    Assignee: University of New Mexico
    Inventors: Ravinder Jain, Balaji Srinivasan
  • Patent number: 6214425
    Abstract: The invention relates to a storage box for an object that is to be protected from physicochemical contamination. The storage box is intended to have low weight, good mechanical strength, a good electrical condition, with a low degassing rate in time with prevention of diffusion of gasses from the external atmosphere into the interior of the box. The inner and/or outer surface of the box's walls are coated with at least one protective layer. The box may be used to store silicon wafers.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: April 10, 2001
    Assignees: Commissariat a l'Energie Atomique, L'Air Liquide
    Inventors: Philippe Spinelli, Claude Doche, Jean-Christophe Rostaing, François Coeuret, Sylvain Scotto D'Apolinia
  • Patent number: 6187685
    Abstract: There is disclosed a method and apparatus for etching a substrate. The method comprises the steps of etching a substrate or alternately etching and depositing a passivation layer. A bias frequency, which may be pulsed, may be applied to the substrate and may be at or below the ion plasma frequency.
    Type: Grant
    Filed: February 8, 1999
    Date of Patent: February 13, 2001
    Assignee: Surface Technology Systems Limited
    Inventors: Janet Hopkins, Ian Ronald Johnston, Jyoti Kiron Bhardwaj, Huma Ashraf, Alan Michael Hynes, Leslie Michael Lea
  • Patent number: 6186153
    Abstract: Providing a dry cleaning method capable of removing deposition films which adhere to the inner walls of a semiconductor manufacturing apparatus-that is, removing dust production sources therefrom. To this end, the dry cleaning process is supplemented by a step of removing either ion sputtered matter or products of the internal member materials of the apparatus or chemical compounds of such apparatus internal member materials and of an etching gas, in addition to a step of removing etching reaction products. It thus becomes possible to eliminate dust generation due to pealing off of deposition films with an increase in the number of wafers being processed, which in turn increases the manufacturing yield and working efficiency of the manufacturing apparatus.
    Type: Grant
    Filed: March 18, 1998
    Date of Patent: February 13, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Kitsunai, Nobuo Tsumaki, Shigeru Kakuta, Kazuo Nojiri, Kazue Takahashi
  • Patent number: 6176936
    Abstract: A chamber cleaning method of a CVD apparatus is provided, which decreases the cleaning time and increases the throughput of a CVD process. A desired film of a metal or metal compound has been formed on a semiconductor substrate placed in a reaction chamber of the CVD apparatus through a reducing decomposition reaction of a source gas. The source gas is a metal halide gas containing a metal element of the desired film. An undesired film of a same metal or metal compound as the desired film has been formed on an inner exposed surface of the chamber in addition to the desired film formed on the substrate. First, (a) the semiconductor substrate on which the desired film has been formed is taken out of the reaction chamber of the CVD apparatus.
    Type: Grant
    Filed: July 22, 1998
    Date of Patent: January 23, 2001
    Assignee: NEC Corporation
    Inventor: Tetsuya Taguwa
  • Patent number: 6156629
    Abstract: A method of etching polysilicon using an oxide hard mask using a three step etch process. Steps one and two are performed insitu in a high density plasma (e.g., TCP--transformer coupled plasma) oxide etcher. Step 3, the polysilicon etch is performed in a different etcher (e.g., poly RIE etcher). A multi-layered semiconductor structure 35 (FIG. 1) is formed comprising: a substrate 10, a gate oxide layer 14, a polysilicon layer 18, a hard mask layer 22, and a bottom anti-reflective coating (BARC) layer 26 and a resist layer 30.
    Type: Grant
    Filed: October 1, 1998
    Date of Patent: December 5, 2000
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Hun-Jan Tao, Yuan-Chang Huang
  • Patent number: 6136211
    Abstract: A process for etching a substrate 25 in an etching chamber 30, and simultaneously cleaning a thin, non-homogeneous, etch residue deposited on the surfaces of the walls 45 and components of the etching chamber 30. In the etching step, process gas comprising etchant gas is used to etch a substrate 25 in the etching chamber 30 thereby depositing etch residue inside the chamber 30. Cleaning gas is added to the process gas for a sufficient time and in a volumetric flow ratio that is sufficiently high, to react with and remove substantially all the etch residue deposited by the process gas. The present method advantageously cleans the etch residue in the chamber 30, during the etching process, and without use of separate cleaning, conditioning, and seasoning process steps.
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: October 24, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Xue-Yu Qian, Zhi-Wen Sun, Weinan Jiang, Arthur Y. Chen, Gerald Zheyao Yin, Ming-Hsun Yang, Ming-Hsun Kuo, David S. L. Mui, Jeffrey Chinn, Shaoher X. Pan, Xikun Wang
  • Patent number: 6132564
    Abstract: A method is provided of cleaning device surfaces for the metallization thereof by treating the surfaces in a chamber equipped for ionized physical vapor deposition or other plasma-based metal deposition process. The surfaces are plasma etched, preferably in a chamber in which the next metal layer is to be deposited onto the surfaces. Also or in the alternative, the surfaces are plasma etched with a plasma containing ions of the metal to be deposited. Preferably also, the etching process is followed by depositing a film of the metal, preferably by ionized physical vapor deposition, in the chamber. The metal may, for example, be titanium that is sputtered from a target within the chamber. The process of depositing the metal, where the metal is titanium, may, for example, be followed by the deposition of a titanium nitride layer.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: October 17, 2000
    Assignee: Tokyo Electron Limited
    Inventor: Thomas J. Licata
  • Patent number: 6127271
    Abstract: A process for dry etching a surface within a vacuum treatment reactor includes evacuating the reactor, generating a glow discharge within said reactor, feeding a reactive etching gas into said reactor and reacting said etching gas within said reactor, removing gas with reaction products of said reacting from said reactor and installing an initial flow of said etching gas into said reactor and reducing said flow after a predetermined time span and during said reacting. The vacuum treatment reactor has a reactor with a pumping arrangement for evacuating the reactor. A glow discharge generating arrangement is connected to an electric power supply. A gas tank arrangement is connected to the reactor and has a reactive etching gas such as SF.sub.4.
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: October 3, 2000
    Assignee: Balzers Hochvakuum AG
    Inventors: Emmanuel Turlot, Jacques Schmitt, Philippe Grousset
  • Patent number: 6099747
    Abstract: A plasma processing apparatus and method in which a counter electrode is connected to a high frequency power source to generate a plasma and the substrate electrode is grounded and in which the substrate electrode is connected to a high frequency power source and the counter electrode is grounded to perform chamber etching.
    Type: Grant
    Filed: October 5, 1998
    Date of Patent: August 8, 2000
    Assignee: NEC Corporation
    Inventor: Tatsuya Usami
  • Patent number: 6099698
    Abstract: It is an object of the present invention to provide a method of making a magnetic disk having a uniform textured structure with micro-waviness of fabrication depth of less than 20 nm, preferably less than 10 nm, and a local depth deviation of less than 5%, in which texture patterns are characterized by the fact that lateral surfaces of the structure are sloped or curved. The object has been achieved in a method for making a magnetic disk having micro-waviness on a fabrication surface of a substrate for reducing dynamic friction and controlling head float, by rotating and irradiating the fabrication surface with a high energy beam from a beam source at an inclined angle to the substrate surface, through a shielding mask having a specific pattern, so as to process a transcription pattern on the substrate surface to produce a textured structure with micro-waviness having sloped or curved side surfaces.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: August 8, 2000
    Assignee: Ebara Corporation
    Inventors: Masahiro Hatakeyama, Katsunori Ichiki, Kenji Watanabe, Kazuo Yamauchi, Shinta Kunitomo, Tohru Satake, Yasushi Tohma, Juichi Ishiguro
  • Patent number: 6096175
    Abstract: A method for fabricating a stent or other medical device by creating a free standing thin film of metal.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: August 1, 2000
    Assignee: Micro Therapeutics, Inc.
    Inventor: Noah M. Roth
  • Patent number: 6096652
    Abstract: A method of CMP of the semiconductor device where the method comprises the sequential steps of providing a semiconductor device, forming a copper layer on the semiconductor device and planarizing the copper layer with a medium. The medium comprises an abrasive component and a chemical solution. The chemical solution comprises water, an oxidizing agent, a first coordinating ligand adapted to form a complex with Cu(I) and a second coordinating ligand adapted to form a complex with Cu(II).
    Type: Grant
    Filed: November 3, 1997
    Date of Patent: August 1, 2000
    Assignee: Motorola, Inc.
    Inventors: David K. Watts, Janos Farkas, Jason Gomez, Chelsea Dang
  • Patent number: 6082375
    Abstract: The invention encompasses methods of processing internal surfaces of a chemical vapor deposition reactor. In one implementation, material is deposited over internal surfaces of a chemical vapor deposition reactor while processing semiconductor substrates therein. The deposited material is treated with atomic oxygen. After the treating, at least some of the deposited material is etched from the reactor internal surfaces. In one embodiment, first etching is conducted of some of the deposited material from the reactor internal surfaces. After the first etching, remaining deposited material is treated with atomic oxygen. After the treating, second etching is conducted of at least some of the remaining deposited material from the reactor internal surfaces. In one embodiment, the deposited material is first treated with atomic oxygen. After the first treating, first etching is conducted of some of the deposited material from the reactor internal surfaces.
    Type: Grant
    Filed: May 21, 1998
    Date of Patent: July 4, 2000
    Assignee: Micron Technology, Inc.
    Inventors: F. Daniel Gealy, Husam N. Al-Shareef, Scott Jeffrey DeBoer
  • Patent number: 6077786
    Abstract: Filling of narrow and/or high aspect ratio gaps and trenches with silicate glass is accomplished at reduced temperatures and without reflow by etching the glass concurrently with thermal chemical vapor deposition of the glass such that the deposition rate will exceed the etching rate by a relatively small net deposition rate near the surface with the excess deposition rate increasing over the depth of the trench or gap. The as-deposited glass film is made dense and stable by carrying out the concurrent etch and deposition process at an elevated temperature but which is within the maximum temperature and heat budget which can be tolerated by structures formed by previously performed processes. Fluorine can be incorporated in the silicate glass film as a dopant in sufficient concentration to reduce dielectric constant of the film. Phosphorus and/or boron can be incorporated into the film, as well, and may enhance void-free filling of trenches and gaps.
    Type: Grant
    Filed: May 8, 1997
    Date of Patent: June 20, 2000
    Assignee: International Business Machines Corporation
    Inventors: Ashima B. Chakravarti, Richard A. Conti, Donna R. Cote, Frank V. Liucci, Son V. Nguyen
  • Patent number: 6070599
    Abstract: An apparatus and process for limiting residue remaining after the etching of metal in a semiconductor manufacturing process, such as etching back a tungsten layer to form tungsten plugs, by passivating the surface of a wafer with a halogen-containing gas are disclosed. The wafer is exposed to the halogen-containing gas in a chamber before a metal layer is deposited on the wafer. The exposure can occur in the same chamber as the metal deposition, or a different chamber. The wafer can remain in the chamber or be moved to another chamber for etching after exposure and deposition.
    Type: Grant
    Filed: October 2, 1997
    Date of Patent: June 6, 2000
    Assignee: Applied Materials, Inc
    Inventors: Steve Ghanayem, Moris Kori, Maitreyee Mahajani, Ravi Rajagopalan
  • Patent number: 6071353
    Abstract: The present invention is a method for cleaning a process chamber without damaging the process kit by coating the process kit with another consumable material that protects the process kit during the etch that removes buildup from the processing chamber. First, a polysilicon layer is deposited on at least one inner surface of the processing chamber. Next, a silicon nitride layer deposition is performed on at least one semiconductor substrate in the processing chamber. The semiconductor substrate having said nitride layer thereon is then removed from the processing chamber. An etch is then performed to remove the nitride layer buildup from the inner surface of the processing chamber that has the polysilicon layer thereon.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: June 6, 2000
    Assignee: Applied Materials, Inc.
    Inventor: Peter Gallagher
  • Patent number: 6060397
    Abstract: A method (100) of cleaning residues from a chemical vapor deposition apparatus (10) is provided. The present method (100) includes introducing into a chamber (12) cleaning gases such as N.sub.2, C.sub.2 F.sub.6, and O.sub.2, and forming a plasma from the cleaning gases. The present method also includes removing residues from interior surfaces of the chamber 12 by forming a volatile product from the residues and at least one of the cleaning gases.
    Type: Grant
    Filed: July 14, 1995
    Date of Patent: May 9, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Martin Seamons, Cary Ching, Kou Imaoka, Tatsuya Sato, Tirunelveli S. Ravi, Michael C. Triplett
  • Patent number: 6059985
    Abstract: A method of processing a substrate has the following processes. After depositing a thin film onto a substrate by a CVD method, the front surface of the substrate is brought close to a gas supply surface of a gas supply mechanism to have a desired interval without making contact between the front surface and the gas supply surface. Afterwards, an etching gas is supplied into a back space of the substrate to generate plasma there, and further a purge gas is also supplied into a space between the gas supply surface and the substrate so that the purge gas flows into the back space through a peripheral-edge region of the substrate. This purge gas prevents radicals included in the plasma from diffusing into the space between the gas supply surface and the substrate.
    Type: Grant
    Filed: April 4, 1997
    Date of Patent: May 9, 2000
    Assignee: Anelva Corporation
    Inventors: Takanori Yoshimura, Shigeru Mizuno, Shinya Hasegawa, Yoichiro Numasawa, Nobuyuki Takahashi
  • Patent number: 6051503
    Abstract: This invention relates to methods for treatment of semiconductor substrates and in particular a method of etching a trench in a semiconductor substrate in a reactor chamber using alternatively reactive ion etching and depositing a passivation layer by chemical vapour deposition, wherein one or more of the following parameters: gas flow rates, chamber pressure, plasma power, substrate bias, etch rate, deposition rate, cycle time and etching/deposition ratio vary with time.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: April 18, 2000
    Assignee: Surface Technology Systems Limited
    Inventors: Jyoti Kiron Bhardwaj, Huma Ashraf, Babak Khamsehpour, Janet Hopkins, Alan Michael Hynes, Martin Edward Ryan, David Mark Haynes
  • Patent number: 6051148
    Abstract: A photoreceptor fabrication method involving a photoreceptor substrate having a metal surface, comprising etching the metal surface of the photoreceptor substrate with an etching solution and forming a metal oxide layer on the metal surface with the etching solution, wherein the etching of the metal surface and the forming of the metal oxide layer are conducted in the absence of an electric current.
    Type: Grant
    Filed: March 5, 1998
    Date of Patent: April 18, 2000
    Assignee: Xerox Corporation
    Inventors: Philip G. Perry, William G. Herbert, Alexandra I. Vidal, Gene W. O'Dell, Cornelius Boerman, James E. McNamara
  • Patent number: 6042737
    Abstract: Describes a process for improving the adhesion of polymeric coatings to organic polymeric substrates and photochromic polymeric substrates. The process comprises irradiating the surface of a polymeric substrate prepared from or coated with a monomer composition having acrylic functionality in an oxygen containing environment with ultraviolet light; etching the treated surface; and applying to the etched surface a polymer-forming coating composition. Further described are articles and photochromic articles comprising in combination a polymeric substrate having on at least one surface thereof an adherent coating or photochromic coating prepared by the aforedescribed process.
    Type: Grant
    Filed: April 24, 1998
    Date of Patent: March 28, 2000
    Assignee: PPG Industries Ohio, Inc.
    Inventors: John D. Basil, Robert M. Hunia, Robin Hunt
  • Patent number: 6033582
    Abstract: An irregularly etched medical implant device is provided having random non-uniform relief patterns on the surface ranging from about 0.3 .mu.m to less than about 20 .mu.m in depth. The random, irregular surface as defined by the etch micromorphology and respective dimensional properties are obtained by exposing a surface to a reactive plasma in a chamber wherein said reactive plasma produces a reaction product with the surface to thereby etch the surface, said reaction product or a complex thereof having a vapor pressure lower than a pressure in the chamber; providing a dynamic masking agent during the etching process; and removing the reaction products.
    Type: Grant
    Filed: January 16, 1998
    Date of Patent: March 7, 2000
    Assignee: Etex Corporation
    Inventors: Dosuk D. Lee, Atul Nagras, Pramod Chakravarthy, Anthony M. Majahad
  • Patent number: 6024885
    Abstract: A process of patterning magnetic multilayer films including the steps of successively depositing a plurality of magnetic multilayer films on a supporting substrate, selectively removing portions of the plurality of magnetic multilayer films using a reactive plasma etch including chlorine gas, and passivating in situ, or an adjacent evacuated chamber, remaining portions of the plurality of magnetic multilayer films, i.e. the memory elements, in a post-etch fluorinated plasma.
    Type: Grant
    Filed: December 8, 1997
    Date of Patent: February 15, 2000
    Assignee: Motorola, Inc.
    Inventors: Sandeep Pendharkar, Douglas J. Resnick
  • Patent number: 6015758
    Abstract: A method for stripping a film from a wafer substrate includes the steps of inserting a boat holding the wafer into a processing chamber of a CVD apparatus, and injecting gas into the chamber, to thereby strip the wafer of its film. A typical film requiring stripping is a polysilicon film grown on an underlying oxide layer of the substrate. In this case, CIF.sub.3 is used to strip the polysilicon film without damaging the oxide layer. Accordingly, this method is applicable to the quality testing of semiconductor wafer films using a test wafer. In such quality testing a film is formed on a test wafer substrate at the same time the semiconductor wafer film is formed. The film of the test wafer is tested to evaluate the quality of the formation of the semiconductor wafer film. The test wafer can then be stripped within the chemical vapor deposition apparatus and thus can be reused soon thereafter.
    Type: Grant
    Filed: August 26, 1998
    Date of Patent: January 18, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joong-il An, Kyung-su Kim, Jung-su Lim, Jung-ki Kim
  • Patent number: 6013582
    Abstract: The present disclosure pertains to a method for plasma etching a semiconductor patterning stack. The patterning stack includes at least one layer comprising either a dielectric-comprising antireflective material or an oxygen-comprising material. In many instances the dielectric-comprising antireflective material will be an oxygen-comprising material, but it need not be limited to such materials. In one preferred embodiment of the method, the chemistry enables the plasma etching of both a layer of the dielectric-comprising antireflective material or oxygen-comprising material and an adjacent or underlying layer of material. In another preferred embodiment of the method, the layer of dielectric-comprising antireflective material or oxygen-comprising material is etched using one chemistry, while the adjacent or underlying layer is etched using another chemistry, but in the same process chamber.
    Type: Grant
    Filed: December 8, 1997
    Date of Patent: January 11, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Pavel Ionov, Sung Ho Kim, Dean Li
  • Patent number: 6013580
    Abstract: A preprocessing method of a metal film formation process before formation of a BLM film on a resist film of a substrate to be processed, wherein the resist film of substrate to be processed is irradiated with plasma, utilizing a plasma processing apparatus providing independent plasma generating power source and substrate bias power source to form an overhand area at the end face of a connecting hole and change the property of the surface area. The plasma generating power and substrate bias voltage can be set adequately. Thereby irradiation of plasma can be performed easily, change of property at the surface of resist film can be done quickly and shape control of the end face of the connecting hole can also be executed very easily.
    Type: Grant
    Filed: November 13, 1997
    Date of Patent: January 11, 2000
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida
  • Patent number: 6009830
    Abstract: A plasma etch reactor having independent gas feeds above the wafer and either at the sides or below the wafer. Preferably, a carrier gas such as argon is supplied from a showerhead electrode above the wafer while an etching gas is supplied from below. In the case of selectively etching an oxide over a non-oxide layer, the etchant gas should include one or more fluorocarbons.
    Type: Grant
    Filed: November 21, 1997
    Date of Patent: January 4, 2000
    Assignee: Applied Materials Inc.
    Inventors: Haojiang Li, Robert W. Wu
  • Patent number: 5928965
    Abstract: A method for dry-etching a silicon substrate by the use of a mask selectively formed on the silicon substrate, in which method a reaction product of dry etching is deposited, during dry etching, in a uniform thickness on the side wall of each groove formed in the silicon substrate by dry etching. In the inventive method, etching is conducted by using, as an etching gas, a mixed gas containing Cl.sub.2, HBr, O.sub.2 and He or a mixed gas contained Cl.sub.2, HBr and CO, under the conditions of an etching pressure of 0.02-0.05 Torr, a RF power density of 1.01-1.64 W/cm.sup.2 and a substrate temperature of 40-50.degree. C. With this method, the tapered sectional shape of each groove formed in the silicon substrate can be controlled easily and etching can be conducted at high reproducibility.
    Type: Grant
    Filed: August 11, 1997
    Date of Patent: July 27, 1999
    Assignee: NEC Corporation
    Inventors: Hideyuki Shoji, Takakazu Kusuki
  • Patent number: 5916820
    Abstract: A thin film forming method for forming a thin film on a surface of a substrate having a stepped portion due to a difference in level, includes steps of performing first thin film deposition with plasma generated in a processing chamber by applying high-frequency voltages to electrodes, performing thin film shaping with plasma generated in the processing chamber by applying a high-frequency voltage to a coil, and performing second thin film deposition with plasma generated in the processing chamber by applying high-frequency voltages to the electrodes.
    Type: Grant
    Filed: August 23, 1995
    Date of Patent: June 29, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tomohiro Okumura, Ichiro Nakayama, Yuichiro Yamada, Naoki Suzuki
  • Patent number: 5849206
    Abstract: A method of producing a biocompatible prosthesis based on a substrate made essentially of metal or ceramic. The substrate is placed into a reactor chamber of a cathodic vapor deposition arrangement and the chamber is evacuated to a predetermined pressure. A predetermined, negative bias voltage is then applied to the substrate and the substrate is surface treated by adding an etching gas to the reactor chamber, at a predetermined, first flow rate and coupling in a high frequency power with a first, predetermined power density for ionic etching for a first, predetermined period of time. The surface treated substrate is separated from the negative bias voltage and a semiconductor cover layer is chemical vapor-phase deposited on the substrate by adding to the reactor chamber a multi-component mixture of process gases containing a semiconductor element in bound form at a second, predetermined flow rate and coupling-in of HF power with a predetermined, second power density, for a second, predetermined time period.
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: December 15, 1998
    Assignee: Biotronik Mess- und Therapiegerate GmbH & Co. Ingenieurburo Berlin
    Inventors: Michael Amon, Armin Bolz
  • Patent number: 5814239
    Abstract: A gas-phase etchant is provided. The gas-phase etchant includes at least one halogen in gaseous form and/or at least one halogen halide in gaseous form. A Group III-nitride crystal is heated to a temperature in the range of 500.degree.-900.degree. C. and is etched in a flow of the gas-phase etchant. The gas-phase etchant may additionally include hydrogen. The gas-phase etchant may alternatively be diluted with inert gas, and the Group III-nitride crystal may be etched in a flow of the gas-phase etchant diluted with the inert gas.
    Type: Grant
    Filed: July 19, 1996
    Date of Patent: September 29, 1998
    Assignee: Hewlett-Packard Company
    Inventors: Yawara Kaneko, Norihide Yamada
  • Patent number: 5798137
    Abstract: Silicon beads are produced by chemical vapor deposition (CVD) on seed particles generated internal to a CVD reactor. The reactor has multiple zones, including an inlet zone where beads are maintained in a submerged spouted bed and an upper zone where beads are maintained in a bubbling fluidized bed. A tapered portion of the upper zone segregates beads by size. Systems for inspecting, sorting and transporting product beads are also disclosed.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 25, 1998
    Assignee: Advanced Silicon Materials, Inc.
    Inventors: Stephen M. Lord, Robert J. Milligan
  • Patent number: 5770000
    Abstract: An improved cleaning system is provided for removing impurities from a material to be cleaned. The system includes two electrodes, a positive electrode ("anode") on one side, near to or in contact with the material to be cleaned, and a negative collector electrode ("cathode") located at a distance from the second side of the material. The material and the two electrodes are placed into a chamber. The system also includes a medium of conductivity which, when under voltage between anode and cathode, produces the flow of negative charge either as electrons or as negative ions. The chamber may be a vacuum chamber or a chamber filled with an inert gas or other electro-negative gases. The flow of negative charges provides layer of negative charge near the second surface of the material so as to induce the positive impurity ions to move towards the surface. Since a grid electrode is absent, the impure ions are removed unhindered from the material to be cleaned.
    Type: Grant
    Filed: May 28, 1996
    Date of Patent: June 23, 1998
    Assignee: Sizary Materials Purification Ltd.
    Inventors: Iosef Zinman, Alex Sergienko
  • Patent number: 5746928
    Abstract: A method of cleaning an electrostatic chuck of a plasma etching apparatus wherein a dummy wafer is placed on the chuck, the chamber evacuated, and an RF voltage applied that is greater than the normal RF voltage used to etch.
    Type: Grant
    Filed: June 3, 1996
    Date of Patent: May 5, 1998
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd
    Inventors: Shih Kuei Yen, Po-Tao Chu, Kuang-Hui Chang
  • Patent number: 5709772
    Abstract: An apparatus and process for limiting residue remaining after the etching of metal in a semiconductor manufacturing process by injecting a halogen-containing gas without a plasma into a processing chamber. The wafer is then exposed to the remnants of the halogen-containing gas in the chamber before the metal is deposited on the wafer. The exposure can occur in the same chamber as the metal deposition, or a different chamber. The wafer can remain in the chamber or be moved to another chamber for etching after exposure and deposition.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: January 20, 1998
    Assignee: Applied Materials, Inc.
    Inventors: Steve Ghanayem, Moris Kori, Maitreyee Mahajani, Ravi Rajagopalan
  • Patent number: 5683547
    Abstract: A processing method and apparatus using a focused energy beam for conducting local energy beam processing in a focused energy beam irradiating area by irradiating a sample with a focused energy beam such as an ion beam or an electron beam in an etching gas atmosphere. As the etching gas, a mixed gas different in composition from any conventional one is employed and the gas is uniformly supplied to an etching area and at least one of the components of such a mixed gas is a spontaneous reactive gas for use in etching the sample spontaneously and isotropically. With this arrangement, it is possible to subject to local etching a material for which the local etching has been impossible to provide since a single etching gas causes a reaction too fierce or causes almost nearly no reaction.
    Type: Grant
    Filed: July 12, 1994
    Date of Patent: November 4, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Junzou Azuma, Fumikazu Itoh, Satoshi Haraichi, Akira Shimase, Junichi Mori, Takahiko Takahashi, Emiko Uda
  • Patent number: 5672210
    Abstract: The method for manufacturing superconducting elements according to the present invention include the following steps of: (a) placing a substrate near a target in a chamber so that the substrate is positioned to face a surface of the target, wherein the target comprises a target material of a complex oxide superconducting compounds; (b) irradiating a laser beam to the surface of the target to vaporize or sublime the target material so that the target material is deposited onto a surface of the substrate, wherein the surface of the substrate maintains the position facing the surface of the target; and (c) fabricating the surface of the target material layer on the substrate to form a superconducting element by irradiating a laser beam to the surface of the substrate, without removing the substrate from the chamber.
    Type: Grant
    Filed: August 22, 1995
    Date of Patent: September 30, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Akihiro Moto, Tatsuoki Nagaishi, Hideo Itozaki
  • Patent number: 5618379
    Abstract: Disclosed is a process for depositing a conformal polymer coating on selected areas of a silicon substrate. The substrate is first exposed through a mask to a gaseous plasma so as to form a film of desired pattern, the plasma comprising a compound having strong electron donating characteristics. Then, the patterned film and the remaining substrate not covered by the film are exposed to the vapor of a monomer, which condenses and polymerizes on the exposed substrate surfaces, but not on the film. The film serves to inhibit substantial deposition of the coating, so as to provide a selective deposition, where the coating is formed only on those areas of the substrate where desired.
    Type: Grant
    Filed: April 1, 1991
    Date of Patent: April 8, 1997
    Assignee: International Business Machines Corporation
    Inventors: Michael D. Armacost, Steven A. Grundon, David L. Harmon, Son V. Nguyen, John F. Rembetski
  • Patent number: 5605600
    Abstract: In a method of etch profile shaping through wafer temperature control during an etch process wherein deposition of a passivation film is temperature dependent, a gap between a semiconductor wafer to be etched and a cathode is pressurized at a first pressure, and the pressure in the gap is changed to a second pressure at a predetermined time during the etch process, thereby altering heat transfer from the semiconductor wafer to the cathode. The temperature of the wafer is adjusted one or more times during an etching process to control profile shaping of deep trenches, contact holes and shapes for mask opening shaping during the etch process.
    Type: Grant
    Filed: March 13, 1995
    Date of Patent: February 25, 1997
    Assignees: International Business Machines Corporation, Siemens Aktiengesellshaft, Kabushiki Kaisha Toshiba
    Inventors: Karl P. Muller, Klaus B. Roithner, Bernhard Poschenrieder, Toru Watanabe