Etching And Coating Occur In The Same Processing Chamber Patents (Class 216/37)
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Patent number: 7732345Abstract: The present invention provides a method for manufacturing an integrated circuit. In one embodiment, the method includes etching one or more openings within a substrate using an etch tool, and subjecting the one or more openings to a post-etch clean, wherein a delay time exists between removing the substrate from the etch tool and the subjecting the one or more opening to the post-etch clean. This method may further include exposing the substrate having been subjected to the post-etch clean to a rinsing agent, wherein a resistivity of the rinsing agent is selected based upon the delay time.Type: GrantFiled: August 31, 2006Date of Patent: June 8, 2010Assignee: Texas Instruments IncorporatedInventors: Phillip Daniel Matz, Trace Hurd
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Publication number: 20100126960Abstract: A cooling microcircuit for use in a turbine engine component is provided. The cooling microcircuit has at least one leg through which a cooling fluid flows. A plurality of cast vortex generators are positioned within the at least one leg to improve the cooling effectiveness of the cooling microcircuit.Type: ApplicationFiled: January 28, 2010Publication date: May 27, 2010Applicant: UNITED TECHNOLOGIES CORPORATIONInventor: Francisco J. Cunha
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Publication number: 20100129610Abstract: Silicon in prismatic shape is produced by using a silicon wafer with (110) surface and sequentially carrying out an alignment configuration forming step for forming alignment configurations having surfaces that are along two (111) surfaces perpendicular to a substrate surface inside the silicon wafer, a primary anisotropic etching step for forming perpendicular walls having wall surfaces aligned to one of these (111) surfaces, and a secondary anisotropic etching step for forming silicon in the prismatic shape having wall surfaces aligned to the other of these (111) surfaces with respect to the perpendicular walls.Type: ApplicationFiled: May 14, 2007Publication date: May 27, 2010Applicant: NATIONAL UNIVERSITY CORPORATION KAGAWA UNIVERSITYInventors: Fumikazu Oohira, Gen Hashiguchi, Shinya Nagao
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Publication number: 20100129623Abstract: Briefly, the present invention comprises a method of manufacturing a sensor surface structure suitable for but not limited to surface enhanced Raman spectroscopy. The method comprises providing (S1) a nano-structured array template, depositing (S2) a metal oxide on the template, preferably using atomic layer deposition (ALD), depositing (S4) metal nanoparticles on the metal oxide layer, either by electroless deposition or by ALD.Type: ApplicationFiled: October 3, 2007Publication date: May 27, 2010Inventors: Anders Johansson, Mårten Rooth, Mats Boman, Anders Hårsta, Jan-Otto Carlsson
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Publication number: 20100125329Abstract: An implantable medical device, such as a stent, having linear pseudoelastic behavior and a polymeric drug coating is disclosed. A method of producing an implantable medical device having linear pseudoelastic behavior and a polymeric drug coating is also disclosed.Type: ApplicationFiled: December 19, 2002Publication date: May 20, 2010Inventors: Zhi Cheng Lin, Winnette McIntosh
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Patent number: 7718080Abstract: Methods and devices for selective etching in a semiconductor process are shown. Chemical species generated in a reaction chamber provide both a selective etching function and concurrently form a protective coating on other regions. An electron beam provides activation to selective chemical species. In one example, reactive species are generated from a plasma source to provide an increased reactive species density. Addition of other gasses to the system can provide functions such as controlling a chemistry in a protective layer during a processing operation. In one example an electron beam array such as a carbon nanotube array is used to selectively expose a surface during a processing operation.Type: GrantFiled: August 14, 2006Date of Patent: May 18, 2010Assignee: Micron Technology, Inc.Inventors: Neal R. Rueger, Mark J. Williamson, Gurtej S. Sandhu
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Publication number: 20100112293Abstract: A device housing and a method of fabricating the device housing are provided. The device housing includes a base housing, a bottom coating, a vacuum evaporation coating, an intermediate coating, a fill coating and a top coating. The base housing is recessed to define a plurality of textured portions. The bottom coating is formed on the base housing and covers the textured portions. The vacuum evaporation coating is formed on the bottom coating. The intermediate coating is formed on the vacuum evaporation coating and has recessed sections corresponding to the textured portions. The fill coating is formed on the intermediate coating and fills the recessed sections. The top coating covers the intermediate coating and the fill coating.Type: ApplicationFiled: October 23, 2009Publication date: May 6, 2010Applicants: SHENZHEN FUTAIHONG PRECISION INDUSTRY CO., LTD., FIH (HONG KONG) LIMITEDInventors: HONG-BO LI, GANG HUANG
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Publication number: 20100086801Abstract: Nanopatterned surfaces are prepared by a method that includes forming a block copolymer film on a substrate, annealing and surface reconstructing the block copolymer film to create an array of cylindrical voids, depositing a metal on the surface-reconstructed block copolymer film, and heating the metal-coated block copolymer film to redistribute at least some of the metal into the cylindrical voids. When very thin metal layers and low heating temperatures are used, metal nanodots can be formed. When thicker metal layers and higher heating temperatures are used, the resulting metal structure includes nanoring-shaped voids. The nanopatterned surfaces can be transferred to the underlying substrates via etching, or used to prepare nanodot- or nanoring-decorated substrate surfaces.Type: ApplicationFiled: September 25, 2009Publication date: April 8, 2010Inventors: Thomas P. Russell, Soojin Park, Jia-Yu Wang, Bokyung Kim
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Publication number: 20100068617Abstract: A lithium microbattery formed by a stack of thin layers on a substrate which comprises two current collectors, a positive electrode, a solid electrolyte layer, a negative electrode and an encapsulating layer. The encapsulating layer is formed by a protective layer made from polymer material on which a barrier layer is arranged. The protective layer comprises a copolymer formed from a homogeneous mixture of at least two photopolymerizable precursor materials, respectively acrylate-based and epoxide-based.Type: ApplicationFiled: July 24, 2009Publication date: March 18, 2010Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUEInventors: Messaoud Bedjaoui, Steve Martin
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Patent number: 7674391Abstract: It is an objective to control the occurrence of the disorder of a far-field pattern and of an optical axial shift. A manufacturing method of a semiconductor laser device has the step for preparing a semiconductor substrate which has growth of a multi-layer including an active layer, the step for forming a mask over the growth of a multi-layer, and a step for forming a stripe-shaped ridge by dry etching and wet etching. A structure stacking a p-type AlGaInP layer, an etch-stop layer, a p-type Alx=0.7GaInP layer, a p-type Alx=0.6GaInP layer, a p-type GaAs layer, in order, over the active layer is taken in order to make the tailing part created in the dry etching process smaller by wet etching. The tailing part is composed of a p-type Alx=0.7GaInP layer including a high mixed crystal ratio of aluminum. Therefore, the p-type Alx=0.7GaInP layer is etched faster than the p-type Alx=0.Type: GrantFiled: January 31, 2007Date of Patent: March 9, 2010Assignee: Opnext Japan, Inc.Inventors: Hiroshi Hamada, Kazunori Saitoh
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Patent number: 7674392Abstract: The present invention provides a method of fabricating a hinge. First, a wafer is provided, and a hinge region and at least two through regions are defined on the wafer. The wafer in the hinge region is partially removed from a bottom surface of the wafer. Subsequently, the wafer in the through regions is completely removed from a top surface of the wafer, and the hinge is formed. Thereafter, a wafer level test is performed on the hinge of the wafer. Next, an etching process is performed to adjust the shape of the hinge. According to the method of the present invention, the thickness of the hinge is no longer limited by the thickness of the wafer, and the hinge can accept the wafer level test.Type: GrantFiled: November 7, 2006Date of Patent: March 9, 2010Assignee: Touch Micro-System Technology Inc.Inventor: Hsien-Lung Ho
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Patent number: 7674395Abstract: The invention provides a laser etching method for optical ablation working by irradiating a work article formed of an inorganic material with a laser light from a laser oscillator capable of emitting in succession light pulses of a large energy density in space and time with a pulse radiation time not exceeding 1 picosecond, wherein, in laser etching of the work article formed of the inorganic material by irradiation thereof with the laser light from the laser oscillator with a predetermined pattern and with a predetermined energy density, there is utilized means for preventing deposition of a work by-product around the etching position.Type: GrantFiled: January 3, 2007Date of Patent: March 9, 2010Assignee: Canon Kabushiki KaishaInventor: Jun Koide
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Publication number: 20100051581Abstract: A method for cleaning and refurbishing a chamber component includes placing a chamber component having process deposits on an exterior surface in a plasma vapor deposition chamber. The chamber component is bombarded with a plasma comprising Argon for a period of time sufficient to remove the process deposits from the exterior surface of the chamber component.Type: ApplicationFiled: August 26, 2008Publication date: March 4, 2010Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Jian-Bin CHIOU, Wen-Cheng Cheng, Wen-Sheng Wu
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Publication number: 20100055913Abstract: A method of forming a photoresist-comprising pattern on a substrate includes forming a patterned first photoresist having spaced first masking shields in at least one cross section over a substrate. The first masking shields are exposed to a fluorine-containing plasma effective to form a hydrogen and fluorine-containing organic polymer coating about outermost surfaces of the first masking shields. A second photoresist is deposited over and in direct physical touching contact with the hydrogen and fluorine-containing organic polymer coating. The second photoresist which is in direct physical touching contact with the hydrogen and fluorine-containing organic polymer coating is exposed to a pattern of actinic energy and thereafter spaced second masking shields are formed in the one cross section which comprise the second photoresist and correspond to the actinic energy pattern. The first and second masking shields together form at least a part of a photoresist-comprising pattern on the substrate.Type: ApplicationFiled: August 29, 2008Publication date: March 4, 2010Inventors: Zishu Zhang, Hongbin Zhu, Anton deVilliers, Alex Schrinsky
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Publication number: 20100044342Abstract: There is provided a method for continual preparation of granular polycrystalline silicon using a fluidized bed reactor, enabling a stable, long-term operation of the reactor by effective removal of silicon deposit accumulated on the inner wall of the reactor tube. The method comprises (i) a silicon particle preparation step, wherein silicon deposition occurs on the surface of the silicon particles, while silicon deposit is accumulated on the inner wall of the reactor tube encompassing the reaction zone; (ii) a silicon particle partial discharging step, wherein a part of the silicon particles remaining inside the reactor tube is discharged out of the fluidized bed reactor so that the height of the bed of the silicon particles does not exceed the height of the reaction gas outlet; and (iii) a silicon deposit removal step, wherein the silicon deposit is removed by supplying an etching gas into the reaction zone.Type: ApplicationFiled: October 30, 2009Publication date: February 25, 2010Inventors: Hee Young KIM, Kyung Koo Yoon, Yong Ki Park, Won Choon Choi
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Publication number: 20100047567Abstract: The invention relates to an electronic device, having a front face 8 and a rear face 8?, fitted with at least one discrete integrated component, comprising: a) the active face 10 of the component appearing to the side of the front face 8; b) coating material 3, present at least laterally relative to the component, ensuring the so-called component is held in the device; and c) an insulating buffer layer 6, absent from the active face 10 of the component, separating the coating material 3 from this component 4.Type: ApplicationFiled: July 17, 2009Publication date: February 25, 2010Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUEInventor: Jean-Charles SOURIAU
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Publication number: 20100044341Abstract: A workpiece to be treated including aluminum or an aluminum alloy on at least a surface thereof is subjected to surface treatment by a method including the steps of immersing in an acidic or alkaline aluminum oxide film-removing solution containing a salt or oxide of a metal capable of substitution with aluminum and forming a substituted metal layer of the metal which is capable of substitution with aluminum and is contained in the removing solution on a surface of the aluminum or aluminum alloy while removing an aluminum oxide film on said aluminum or aluminum alloy surface, forming a substituted zinc film by zinc substitution treatment without removal of the substituted metal layer, removing the substituted metal layer along with the substituted zinc film by means of a liquid having an oxidizing behavior, and subjecting again to zinc substitution treatment to form a substituted zinc film.Type: ApplicationFiled: August 20, 2009Publication date: February 25, 2010Applicant: C. Uyemura & Co., Ltd.Inventors: Hiroki UCHIDA, Kazuki YOSHIKAWA, Toshiaki SHIBATA
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Publication number: 20100038649Abstract: The present invention relates to a mold, a manufacturing method of the mold, and a method of forming patterns using the mold. The mold may include a main body having a convex portion and a recess portion, and a polymer layer formed over the main body by processing a surface of the main body with a high molecular weight material through a surface treatment.Type: ApplicationFiled: June 2, 2009Publication date: February 18, 2010Applicant: Samsung Electronics Co., Ltd.Inventor: Seung-Jun Lee
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Publication number: 20100032581Abstract: A method is described for producing a micro-gripper, which comprises a base body and a gripping body connected integrally to the base body, which projects beyond the base body and provides a receptacle slot on a free end area in such a way that a micrometer-scale or sub-micrometer-scale object may be clamped in the receptacle slot for gripping and holding, as well as a micro-gripper according to the species.Type: ApplicationFiled: March 9, 2007Publication date: February 11, 2010Inventors: Christian Grosse, Frank Altmann, Michél Simon, Hilmar Hoffmeister, Detlef Riemer
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Publication number: 20100028618Abstract: A micromechanical device having a substrate wafer has at least one first cavity and one second cavity, the cavities being hermetically separated from each other, the first cavity having a different internal atmospheric pressure than the second cavity. The cavities are capped by a thin film cap. A method is for manufacturing a micromechanical device which has a thin film cap having cavities of different internal atmospheric pressures.Type: ApplicationFiled: August 4, 2009Publication date: February 4, 2010Inventors: Julian Gonska, Ralf Hausner
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Publication number: 20100024468Abstract: The present disclosure provides a refrigeration unit that can be used in a transport cooling application. The unit comprises a micro-channel heat exchanger (MCHX), a compressor, an evaporator, and a thermostatic expansion valve. The MCHX is coated with an acrylic composition.Type: ApplicationFiled: October 13, 2006Publication date: February 4, 2010Applicant: CARRIER CORPORATIONInventors: Jason Scarcella, Thomas A. Anderson
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Publication number: 20100025365Abstract: A method for selectively etching areas of a substrate is described. The method includes providing in a process chamber a substrate containing a first material having a film deposition surface and a second material having an etch surface. The method further includes forming a gas cluster ion beam (GCIB) from a pressurized gas containing a deposition-etch gas, and exposing the substrate to the GCIB to remove at least a portion of the second material from the etch surface and deposit a thin film on the film deposition surface of the first material. According to some embodiments, the deposition-etch gas may contain silicon (Si) and carbon (C), and it may possess a Si—C bond.Type: ApplicationFiled: August 1, 2008Publication date: February 4, 2010Applicant: TEL EPION INC.Inventor: Martin D. Tabat
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Publication number: 20100015457Abstract: A water-based coating composition that is particularly suited as a floor coating. The composition is an aqueous two-part or two-component polyurethane system, having a water-dispersible polyisocyanate component and a hard cyclic diol component. The composition may be applied over a primer coating. The composition can be applied as a fairly thin coating, e.g., less than 127 micrometers (5 mils) thick, and provides a suitable coating with one coat. The composition, when coated onto a surface such as a floor, can be cured under ambient conditions. The resulting coating provides a durable coating with high gloss.Type: ApplicationFiled: June 6, 2007Publication date: January 21, 2010Inventors: Mitchell T. Johnson, Khiza L. Mazwi
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Publication number: 20100006539Abstract: A semiconductor device manufacturing apparatus includes a chamber including a reaction space, a substrate disposing unit configured to dispose a substrate within the chamber, a first heating unit configured to optically heat the reaction space and disposed under the chamber, a second heating unit configured to heat the reaction space through resistive heating and disposed over the chamber, and a plasma generating unit configured to generate plasma in the reaction space. Since the apparatus generates the plasma using the plasma generating unit disposed over the chamber, the deposition process based on heating and the etch process based on the plasma can be simultaneously performed in one single chamber.Type: ApplicationFiled: October 27, 2008Publication date: January 14, 2010Applicant: JUSUNG ENGINEERING CO., LTDInventors: Cheol Hoon YANG, Kyu Jin CHOI, Yong Han JEON, Euy Kyu LEE, Tae Wan LEE
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Publication number: 20100004635Abstract: An implantable glaucoma drainage device (GDD) system is disclosed. The GDD system comprises a microflow control system for controlling intraocular pressure, a protective capillary carrier tube housing the microflow control system, and anchoring arms holding the implanted device in place. The overall GDD size can be in a needle-implantable form factor for minimally invasive implantation. The GDD may be implanted via subconjunctival needle implantation to mimic the normal aqueous humor drainage pathway.Type: ApplicationFiled: July 1, 2009Publication date: January 7, 2010Inventors: Jeffrey Chun-Hui Lin, Po-Jui Chen, Yu-Chong Tai
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Publication number: 20090325336Abstract: A method of printing an ink on a wafer surface configured with a set of non-rounded peaks and a set of non-rounded valleys is disclosed. The method includes exposing the wafer including at least some non-rounded peaks and at least some of the non-rounded valleys in a region to an etchant. The method further includes depositing the ink on the region, wherein a set of rounded peaks and a set of rounded valleys are formed.Type: ApplicationFiled: April 24, 2008Publication date: December 31, 2009Inventors: Malcolm Abbott, Maxim Kelman, Karel Vanheusden
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Publication number: 20090317233Abstract: In one embodiment, a rotary device includes a multiwall nanotube that extends substantially perpendicularly from a substrate. A rotor may be coupled to an outer wall of the multiwall nanotube, be spaced apart from the substrate, and be free to rotate around an elongate axis of the multiwall nanotube.Type: ApplicationFiled: February 12, 2009Publication date: December 24, 2009Applicants: The Charles Stark Draper Laboratory, Inc., Massachusetts Institute of TechnologyInventors: David J. Carter, Marc S. Weinberg, Eugene Cook, Peter Miraglia, Zoltan S. Spakovszky
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Publication number: 20090308840Abstract: A plasma cleaning method is performed in a plasma CVD apparatus for depositing a silicon nitride film on a surface of a target substrate, and includes a stage (S1) of supplying a cleaning gas containing NF3 gas into a process container, thereby removing extraneous deposits formed on portions inside the process container; a stage (S2) of supplying a gas containing hydrogen gas into the process container and generating plasma thereof, thereby removing residual fluorine inside the process container; and a stage (S3) of supplying a gas containing a rare gas into the process container and generating plasma thereof, thereby removing residual hydrogen inside the process container.Type: ApplicationFiled: September 18, 2007Publication date: December 17, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Masayuki Kohno, Tatsuo Nishita, Toshio Nakanishi
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Publication number: 20090308841Abstract: To provide a pattern forming method including: providing an active species supply source to at least one of a mold structure having a plurality of concave portions in its surface, and an object to be patterned; pressing the side of the mold structure, where the concave portions are provided, against the object so as to encapsulate the active species supply source in the concave portions; and oxidatively decomposing parts of the object which are in positions corresponding to the concave portions, by irradiating the active species supply source with excitation light through one of the mold structure and the object.Type: ApplicationFiled: June 16, 2009Publication date: December 17, 2009Applicant: FUJIFILM CorporationInventor: Satoshi WAKAMATSU
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Patent number: 7632420Abstract: A method for treating a substrate having a layer or coating of material thereon (such as for example a metal conductor coated with an insulating ‘enamel’) comprises the steps of directing a pulsed beam of laser radiation at the substrate to cause an interaction or adjacent the interface between the layer or coating and the substrate, leading to local separation of the layer or coating. The removal is effected by creating an interaction effect at the interface between the substrate and the layer or coating to create an effect similar to a shockwave which causes local separation of the layer or coating at the interface.Type: GrantFiled: July 8, 2004Date of Patent: December 15, 2009Assignee: Spectrum Technologies PLCInventors: Adrian Thomas, Jonathan Davies, Peter Hugh Dickinson
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Publication number: 20090302000Abstract: A pattern forming method according to an embodiment of the present invention includes forming, on a substrate, a base pattern having a space part, adjusting a width of the space part to make a bottom width of the space part closer to an upper width of the space part, and forming a modified base pattern having a space part whose bottom width is smaller than the bottom width of the space part of the base pattern, by a process of forming a deposition film on the substrate and the base pattern, and a process of removing the deposition film from a bottom of the space part of the base pattern.Type: ApplicationFiled: June 4, 2009Publication date: December 10, 2009Inventor: Shinichi ITO
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Publication number: 20090291313Abstract: Fabricating a microelectronics grade metal substrate comprises forming the metal substrate on a sacrificial substrate. An adhesion layer can be deposited on or over the surface of the sacrificial substrate. A seed layer of the metal can be deposited on or over the adhesion layer. The metal material can be deposited on the seed layer by electroplating or other low-temperature, low-stress process to form a microelectronics-grade metal substrate. Thin film sensors and/or other microelectronic devices, followed by appropriate insulating layer(s), may be fabricated on or over the sacrificial substrate before forming the metal substrate. The sacrificial silicon substrate can then be etched away, leaving the microelectronics-grade metal substrate, and possibly the microelectronics device.Type: ApplicationFiled: July 21, 2009Publication date: November 26, 2009Applicant: Wisconsin Alummi Research FoundationInventors: Arindom Datta, Xiaochun Li, Hongseok Choi
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Publication number: 20090277871Abstract: Processes for stripping high dose ion implanted photoresist while minimizing substrate loss. The processes generally include passivation of the substrate surface before and/or during a plasma mediated stripping process. By passivating the substrate surface before and/or during the plasma mediated stripping process, oxidation is substantially reduced during plasma stripping thereby leading to reduced substrate loss.Type: ApplicationFiled: March 5, 2009Publication date: November 12, 2009Applicant: AXCELIS TECHNOLOGIES, INC.Inventors: Ivan Berry, Orlando Escorcia, Keping Han, Jianan Hou, Shijian Luo, Carlo Waldfried
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Publication number: 20090272717Abstract: Embodiments of the invention relate to a substrate etching system and process. In one embodiment, a method may include depositing material on the substrate during a deposition process, etching a first layer of the substrate during a first etch process, and etching a second layer of the substrate during a second etch process, wherein a first bias power is applied to the substrate during the first process, and wherein a second bias power is applied to the substrate during the second etch process. In another embodiment, a system may include a gas delivery system containing a first gas panel for supplying a first gas to a chamber, a second gas panel for supplying a second gas to the chamber, and a plurality of flow controllers for directing the gases to the chamber to facilitate rapid gas transitioning between the gases to and from the chamber and the panels.Type: ApplicationFiled: March 19, 2009Publication date: November 5, 2009Applicant: APPLIED MATERIALS, INC.Inventors: Sharma V. Pamarthy, Jon C. Farr, Khalid Sirajuddin, Ezra Robert Gold, James P. Cruse, Scott Olszewski, Roy C. Nangoy, Saravjeet Singh, Douglas A. Buchberger, JR., Jared Ahmad Lee, Chunlei Zhang
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Publication number: 20090272718Abstract: A method for processing a substrate in a plasma processing system is provided. The method includes disposing a first confinement ring set in a first position. The method also includes depositing a first coating on a first portion of the plasma processing system using a first plasma in a first area defined by the first confinement ring set in the first position. The method further includes depositing a second coating on a second portion of the plasma processing system using a second plasma in a second area between the first confinement ring set in the first position and a second confinement ring set. The method yet also includes processing the substrate using a third plasma with the first confinement ring set disposed in a second position.Type: ApplicationFiled: July 17, 2009Publication date: November 5, 2009Inventor: Andreas Fischer
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Publication number: 20090272318Abstract: The invention to a device (10) for supporting a substrate during the manufacture of semiconductor components, comprising a substantially flat plate with an upper surface (11) on which the substrate can be positioned. The invention also relates to a method for manufacturing such a device (10). The object of the invention is to provide a device (10) according to the preamble, which is of inexpensive and simple construction but which also allows the passage of a process gas in the direction of the substrate under certain manufacturing conditions, for example for supplying a protective gas to the substrate or having the substrate rest on an air cushion. According to the invention, the upper surface (11) of the plate is at least partially porous (14). Thus, costly and extremely precise machining of the device (10), as usually required in the current state of the art, is unnecessary, thereby making it possible to manufacture the device (10) at much lower cost.Type: ApplicationFiled: April 26, 2006Publication date: November 5, 2009Applicant: XYCARB CERAMICS B.V.Inventors: Willem Pieter Van Duijn, Carolus Wilhelmus Pas
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Patent number: 7608544Abstract: An etching method which makes it possible to obtain a desired etching shape with ease, and a computer-readable storage medium storing a program for implementing the method. The etching method is executed by a substrate processing apparatus that performs plasma processing on a semiconductor wafer by plasma. The apparatus comprises a substrate accommodating chamber for accommodating the semiconductor wafer which has an oxide film and a resist film formed on the oxide film, and an upper electrode plate disposed in the substrate accommodating chamber and exposed in a processing space in the substrate accommodating chamber. At least part of the upper electrode plate is formed of a silicon-containing material. The upper electrode plate is sputtered by plasma, and the oxide film is etched by plasma.Type: GrantFiled: May 24, 2007Date of Patent: October 27, 2009Assignee: Tokyo Electron LimitedInventor: Akitoshi Harada
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Patent number: 7601643Abstract: An arrangement and method for fabricating a semiconductor wafer which utilizes a nonaqueous solvent rinse is disclosed.Type: GrantFiled: August 30, 2001Date of Patent: October 13, 2009Assignee: LSI Logic CorporationInventor: Charles E. May
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Publication number: 20090242511Abstract: A seasoning method for a film-forming apparatus configured to form a silicon nitride film on a substrate placed in a process chamber. The method is conducted for reducing particles in the apparatus. The method comprises executing the plasma cleaning of the process chamber to remove a film deposited on the inner wall thereof (step S1), subsequently depositing an amorphous silicon film (step S2), depositing thereon a silicon nitride film in which the nitrogen content gradually increases in the thickness direction (step S3), and keeping the inside of the process chamber being filled with a rare-gas plasma until film formation on the substrate is initiated (step S4).Type: ApplicationFiled: February 19, 2007Publication date: October 1, 2009Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Tadashi Shimazu, Yuichi Kawano
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Patent number: 7595005Abstract: A method and apparatus for removing residue, such as etch reside, from a substrate with substantially reduced damage to the substrate in a plasma processing system is described. A plasma ashing process comprising carbon dioxide (CO2) and optionally a passivation gas, such as a hydrocarbon gas, i.e., CxHy, wherein x, y represent integers greater than or equal to unity, is used to remove residue while reducing damage to underlying dielectric layers. Additionally, the process chemistry can further comprise the addition of an inert gas, such as a Noble gas (i.e., He, Ne, Ar, Kr, Xe, Rn).Type: GrantFiled: December 11, 2006Date of Patent: September 29, 2009Assignee: Tokyo Electron LimitedInventor: Vaidyanathan Balasubramaniam
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Patent number: 7579284Abstract: Example embodiments of the present invention relate to an etching solution, a method of forming a pattern using the same, a method of manufacturing a multiple gate oxide layer using the same and a method of manufacturing a flash memory device using the same. Other example embodiments of the present invention relate to an etching solution having an etching selectivity between a polysilicon layer and an oxide layer, a method of forming a pattern using an etching solution using the same, a method of manufacturing a multiple gate oxide layer using the same, and a method of manufacturing a flash memory device using the same. An etching solution including hydrogen peroxide (H2O2) and ammonium hydroxide (NH4OH) by a volume ratio of about 1:2 to about 1:10 mixed in water. In a method of forming a pattern and methods of manufacturing a multiple gate oxide layer and a flash memory device, a polysilicon layer may be formed on a substrate.Type: GrantFiled: July 10, 2006Date of Patent: August 25, 2009Assignee: Samsung Electronics Co., LtdInventors: Byoung-Moon Yoon, Ji-Hong Kim, Yong-Sun Ko, Kyung-Hyun Kim
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Patent number: 7560038Abstract: A thin-film forming method, which includes the steps of: (1) holding at least one object in a chamber; (2) depositing a film-forming material on the object; (3) etching the forming material while depositing is conducted. In the present invention, the depositing and etching are controlled to simultaneously conduct. The invention also disclose a system for performing the method.Type: GrantFiled: September 22, 2004Date of Patent: July 14, 2009Assignee: SAE Magnetics (H.K.) Ltd.Inventors: Hongxin Fang, Hongtao Ma, Baiqing Zhang, Baohua Chen, Somen Choudhury
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Patent number: 7541292Abstract: A plasma etch process for etching high aspect ratio openings in a dielectric film on a workpiece is carried out in a reactor having a ceiling electrode overlying the workpiece and an electrostatic chuck supporting the workpiece. The process includes injecting a first polymerizing etch process gas through a radially inward one of plural concentric gas injection zones in the ceiling electrode and injecting a second polymerizing etch process gas through a radially outward one of the plural concentric gas injection zones in the ceiling electrode, the compositions of the first and second process gases having first and second carbon-to-fluorine ratios that differ from one another.Type: GrantFiled: April 28, 2006Date of Patent: June 2, 2009Assignee: Applied Materials, Inc.Inventors: Kallol Bera, Xiaoye Zhao, Kenny L. Doan, Ezra Robert Gold, Paul Lukas Brillhart, Bruno Geoffrion, Bryan Pu, Daniel J. Hoffman
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Patent number: 7540970Abstract: Methods of fabricating a semiconductor device are provided. Methods of forming a finer pattern of a semiconductor device using a buffer layer for retarding, or preventing, bridge formation between patterns in the formation of a finer pattern below resolution limits of a photolithography process by double patterning are also provided. A first hard mask layer and/or a second hard mask layer may be formed on a layer of a substrate to be etched. A first etch mask pattern of a first pitch may be formed on the second hard mask layer. After a buffer layer is formed on the overall surface of the substrate, a second etch mask pattern of a second pitch may be formed thereon in a region between the first etch mask pattern. The buffer layer may be anisotropically etched using the second etch mask pattern as an etch mask, forming a buffer layer pattern.Type: GrantFiled: May 8, 2006Date of Patent: June 2, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Cha-Won Koh, Sang-Gyun Woo, Jeong-Lim Nam, Kyeong-Koo Chi, Seok-Hwan Oh, Gi-Sung Yeo, Seung-Pil Chung, Heung-Sik Park
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Publication number: 20090136723Abstract: A coated plastic sheet comprises a transparent plastic sheet having a top and bottom surface, and a first film on the top surface and covering less than all of the top surface, thereby creating at least one uncovered area. At least a portion of the first film has a first metallic luster on its exposed surface. The coated plastic sheet also comprises a second film on the bottom surface. At least a portion of the second film is visible through the uncovered area of the sheet, wherein the second film presents a second metallic luster through the uncovered area.Type: ApplicationFiled: October 24, 2008Publication date: May 28, 2009Inventors: Lihong Zhao, Wenhai Luo, Xijing Liu
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Simultaneous selective polymer deposition and etch pitch doubling for sub 50nm line/space patterning
Patent number: 7531102Abstract: First radicals and second radicals are simultaneous deposited into a space defined by two adjacent lines of photoresists and an underlying layer. A portion of the first radicals and the second radicals combine to form a polymer layer on the layer in the center of the space, and substantially simultaneously, another portion of thee first radicals remove the underlying layer near the base of the photoresists. The first radicals may be fluorine-rich and the second radicals may be carbon-rich.Type: GrantFiled: March 31, 2006Date of Patent: May 12, 2009Assignee: Intel CorporationInventors: Qiquan Geng, Jeff J Xu, Everett B Lee, Michael T Ru, Hsu-en Yang, Chung Hui -
Patent number: 7527741Abstract: Means for enabling plating on sites of complex configuration, etching for fine complex pattern, etc. through reduction of the viscosity resistance brought about by walls of fine liquid channel of microreactor. In particular, a microreactor comprising a liquid inlet, a fine liquid channel and a liquid discharge zone characterized in that the liquid channel is formed of a magnetic barrier of band ferromagnet so that a magnetic liquid introduced through the inlet undergoes at least one operation of chemical reaction, mixing, extraction and absorption in the liquid channel. Further, there is provided means for plating or etching performed by causing a plating solution or an etching solution to flow through the liquid channel.Type: GrantFiled: November 4, 2003Date of Patent: May 5, 2009Inventors: Ryoichi Aogaki, Eiko Ito, Mikio Ogata
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Publication number: 20090095710Abstract: There is provided a method for continual preparation of granular polycrystalline silicon using a fluidized bed reactor, enabling a stable, long-term operation of the reactor by effective removal of silicon deposit accumulated on the inner wall of the reactor tube. The method comprises (i) a silicon particle preparation step, wherein silicon deposition occurs on the surface of the silicon particles, while silicon deposit is accumulated on the inner wall of the reactor tube encompassing the reaction zone; (ii) a silicon particle partial discharging step, wherein a part of the silicon particles remaining inside the reactor tube is discharged out of the fluidized bed reactor so that the height of the bed of the silicon particles does not exceed the height of the reaction gas outlet; and (iii) a silicon deposit removal step, wherein the silicon deposit is removed by supplying an etching gas into the reaction zone.Type: ApplicationFiled: June 14, 2007Publication date: April 16, 2009Inventors: Hee Young KIM, Kyung Koo Yoon, Yong Ki Park, Won Choon Choi
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Patent number: 7514013Abstract: The present invention relates to methods for forming thermoelectric and thermodiodic devices including a monolayer of multiple conductive material units with a first surface including a composite of multiple conductive units in electrical contact with a conductive substrate; a second surface with a composite of multiple conductive units; an ioni conductor; and a second surface. A resulting device can include a semiconductor device.Type: GrantFiled: September 11, 2006Date of Patent: April 7, 2009Inventors: Mark Logan, Frederick A. Flitsch, Lloyd Wright, Lloyd Young
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Patent number: RE41204Abstract: The present invention relates generally to electro-optically active waveguide segments, and more particularly to the use of a selective voltage input to control the phase, frequency and/or amplitude of a propagating wave in the waveguide. Particular device structures and methods of manufacturing are described herein.Type: GrantFiled: May 24, 2006Date of Patent: April 6, 2010Inventors: Ravinder Jain, Balaji Srinivasan