Heating Or Baking Of Substrate Prior To Etching To Change The Chemical Properties Of Substrate Toward The Etchant Patents (Class 216/55)
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Publication number: 20010050267Abstract: A method of processing a metal layer on a substrate. The method comprises disposing the substrate in a chamber having a dielectric member and processing gas. An interior surface of the dielectric member is heated to a temperature above about 150° C. and the metal layer is processed when processing power is passed through the heated dielectric member. Heating of the interior surface of the dielectric member essentially prevents deposits from forming on the interior surface and allows a stable power transmission through the dielectric member.Type: ApplicationFiled: June 29, 2001Publication date: December 13, 2001Inventors: Jeng H. Hwang, Steve S.Y. Mak, Kang-Lie Chiang
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Publication number: 20010047979Abstract: A method is disclosed for speeding workpiece thoughput in low pressure, high temperature semiconductor processing reactor. The method includes loading a workpiece into a chamber at atmospheric pressure, bringing the chamber down to an intermediate pressure, and heating the wafer while under the intermediate pressure. The chamber is then pumped down to the operating pressure. The preferred embodiments involve single wafer plasma ashers, where a wafer is loaded onto lift pins at a position above a wafer chuck, the pressure is rapidly pumped down to about 40 Torr by rapidly opening and closing an isolation valve, and the wafer is simultaneously lowered to the heated chuck. Alternatively, the wafer can be pre-processed to remove an implanted photoresist crust at a first temperature and the chamber then backfilled to about 40 Torr for further heating to close to the chuck temperature. At 40 Torr, the heat transfer from the chuck to the wafer is relatively fast, but still slow enough to avoid thermal shock.Type: ApplicationFiled: December 27, 2000Publication date: December 6, 2001Inventors: Albert Wang, Scott Baron, Prasad Padmanabhan
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Publication number: 20010040145Abstract: A method of forming a relief image in a structure comprising a substrate and a transfer layer formed thereon comprises covering the transfer layer with a polymerizable fluid composition, and then contacting the polymerizable fluid composition with a mold having a relief structure formed therein such that the polymerizable fluid composition fills the relief structure in the mold. The polymerizable fluid composition is subjected to conditions to polymerize polymerizable fluid composition and form a solidified polymeric material therefrom on the transfer layer. The mold is then separated from the solid polymeric material such that a replica of the relief structure in the mold is formed in the solidified polymeric material; and the transfer layer and the solidified polymeric material are subjected to an environment to selectively etch the transfer layer relative to the solidified polymeric material such that a relief image is formed in the transfer layer.Type: ApplicationFiled: July 19, 2001Publication date: November 15, 2001Inventors: Carlton Grant Willson, Matthew Earl Colburn
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Publication number: 20010038988Abstract: In a heat processing apparatus structured to heat a wafer on a hot plate, a black plate at least the rear face of which practically has a color with a JIS lightness of 0V to 4V is positioned above the hot plate. Moreover, cooling air is blown out from nozzles onto the rear face of the hot plate. Thus, the temperature of the hot plate can be cooled rapidly.Type: ApplicationFiled: April 12, 2001Publication date: November 8, 2001Applicant: Tokyo Electron LimitedInventors: Tetsuya Oda, Mitsuhiro Tanoue, Toshichika Takei, Eiichi Shirakawa
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Publication number: 20010035393Abstract: A method of the invention for forming a pixel-defining layer on an OLED panel is disclosed.Type: ApplicationFiled: February 26, 2001Publication date: November 1, 2001Inventors: Tien-Rong Lu, Yih Chang
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Publication number: 20010025826Abstract: A semiconductor dry etching process that provides deep, smooth, and vertical etching of InP-based materials using a chlorinated plasma with the addition of nitrogen (N2) gas. Etching of InP-based semiconductors using an appropriate Cl2/N2 mixture without any additional gases provides improved surface morphology, anisotropy and etch rates.Type: ApplicationFiled: February 28, 2001Publication date: October 4, 2001Inventors: Thomas E. Pierson, Christopher T. Youtsey, Seng-Tiong Ho, Seoijin Park
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Publication number: 20010010229Abstract: In one embodiment, the present invention relates to a method of processing a semiconductor structure, involving the steps of providing the semiconductor structure having a patterned resist thereon; stripping the patterned resist from the semiconductor structure, wherein an amount of carbon containing resist debris remain on the semiconductor structure; and contacting the semiconductor structure with ozone thereby reducing the amount of carbon containing resist debris thereon.Type: ApplicationFiled: January 31, 2000Publication date: August 2, 2001Applicant: R. SubramanianInventors: Ramkumar Subramanian, Khoi A. Phan, Bharath Rangarajan, Bhanwar Singh, Sanjay K. Yedur, Bryan K. Choo
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Patent number: 6254739Abstract: A method for treating a silicon substrate is described. The silicon substrate is placed into a sputtering equipment. A sputtering step is performed to simultaneously dry clean and amorphize the silicon substrate surface by using the sputtering equipment. A titanium film is deposited on the silicon substrate by the sputtering equipment.Type: GrantFiled: October 13, 1999Date of Patent: July 3, 2001Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventor: Su-Chen Fan
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Patent number: 6171511Abstract: The invention relates to a process for thermal etching under oxidizing conditions of a ceramic, more particularly with the aim of revealing its grain boundaries and for the study of its granular microstructure. The invention applies to technical and nuclear ceramics and in particular UO2 and to (U, Pu) O2 mixtures. The thermal etching is performed in a furnace or kiln under a controlled atmosphere constituted by an oxidizing gas supplying a chemical oxygen potential of −75 to −125 kJ/mole and comprises the following successive stages: rapid rise in the temperature of the furnace to a rate of 900 to 1500° C./h from the initial temperature to a temperature plateau, maintaining the temperature at said plateau at a value of 1250 to 1450° C. for between 30 and 15 minutes, lowering the temperature to the final temperature.Type: GrantFiled: October 21, 1998Date of Patent: January 9, 2001Assignees: Commissariat a l'Energie Atomique, Compagnie Generale des Matieres NucleairesInventors: François Charollais, Mireille Bauer, Michel Coster, Pascal Piluso, Claude Fort
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Patent number: 6146541Abstract: A semiconductor wafer (11) having a dielectric layer (12) is used as a calibration standard (10) to calibrate thickness measuring equipment in a wafer processing or manufacturing area. The thickness of the dielectric layer (12) is maintained to a desired thickness by heating the calibration standard (10) to remove contaminants from the dielectric layer (12).Type: GrantFiled: May 2, 1997Date of Patent: November 14, 2000Assignee: Motorola, Inc.Inventors: Laurie A. Goldstein, Timothy J. Warfield, Jane K. Gates, Elizabeth Apen
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Patent number: 6087267Abstract: A process for selectively plasma etching polycrystalline silicon or polysilicon in preference to silicon dioxide which minimizes the detrimental effect of carbon. It has been discovered that carbon from the plasma etch chemicals or from photoresist present interferes disadvantageously with the selective plasma etch of polysilicon as opposed to silicon dioxide. By heat treating and deep ultraviolet light treating the photoresist prior to the plasma etch step and by using non-carbon etch chemicals, this detrimental carbon effect can be reduced.Type: GrantFiled: March 4, 1986Date of Patent: July 11, 2000Assignee: Motorola, Inc.Inventors: Jasper W. Dockrey, Patrick K. Thomas, Dennis C. Hartman
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Patent number: 6024887Abstract: A method for stripping an ion implanted photoresist layer from a substrate. There is first provided a substrate. There is then formed over the substrate an ion implanted photoresist layer. There is then treated the ion implated photoresist layer with a first plasma employing a first etchant gas composition comprising a fluorine containing species to form a fluorine plasma treated ion implanted photoresist layer. Finally, there is then stripped from the substrate the fluorine plasma treated ion implanted photoresist layer with a second plasma employing a second etchant gas composition comprising an oxygen containing species without the fluorine containing species. The ion implanted photoresist layer is stripped from the substrate without plasma induced damage to the substrate.Type: GrantFiled: June 3, 1997Date of Patent: February 15, 2000Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: So-Wen Kuo, Chin-Shan Hou, Yung Jung Chang
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Patent number: 5972235Abstract: Provided is a method of etching an etch layer using a polycarbonate layer as a mask. The method includes placing an etch structure in a reaction chamber, the etch structure including an etch layer underlying a polycarbonate layer, the polycarbonate layer having apertures. The etch layer is then etched using a low pressure-high density plasma generate at a pressure in the range of approximately 1 to 30 millitorr where the ionized particle concentration is at least 10.sup.11 ions/cm.sup.3 and where the ionized particle concentration is substantially equal throughout the volume of the reaction chamber. To increase the etch rate, the etch structure can be heated or biased. To decrease the etch rate, an inert gas can be added to the process gas mixture used to form the plasma.Type: GrantFiled: February 28, 1997Date of Patent: October 26, 1999Assignee: Candescent Technologies CorporationInventors: Kristin Brigham, Chungdee Pong
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Patent number: 5893982Abstract: A method of preventing edge stain in silicon wafers from the edge polishing step with an alkaline slurry, the method consisting of formation of an oxide layer by an annealing step in the presence of oxygen prior to edge polishing.Type: GrantFiled: January 8, 1997Date of Patent: April 13, 1999Assignee: Seh America, Inc.Inventors: Masami Nakano, Jim Woodling
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Patent number: 5840201Abstract: Photoetchable glass is used to form spacer elements for large area field emission displays. Frit dots are placed onto a substrate. A sheet of photo etchable glass is exposed to UV light using a mask such that the UV light exposes the etchable areas and does not expose the areas which will form the spacers. The etchable glass is then heat treated to crystallize the UV exposed areas and to tailor the coefficient of thermal expansion. Next the glass is adhered to the frit coated substrate and the UV exposed areas etched away leaving spacers adhered to frit dots.Type: GrantFiled: April 25, 1997Date of Patent: November 24, 1998Assignee: Micron Display Technology, Inc.Inventor: Jason B. Elledge
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Patent number: 5770721Abstract: This method for preparing micromatrices consists in applying a specially-patterned intermediate layer of laser-absorbing substance on a solid support. The configuration of the sublayer fully corresponds to the topology of the manufactured matrix. The intermediate layer is further covered by a continuous layer of gel , the gel and the material of the support being transparent towards laser radiation. The gel layer is irradiated by a laser beam for a time needed to evaporate simultaneously the gel in the places immediately above the laser-absorbing sublayer and the sublayer itself. Oligonucleotides from a chosen set are then attached to the formed gel `cells`, one oligonucleotide to each cell.This method is intended for use in biotechnology, specifically for deciphering the nucleotide sequence of DNA.Type: GrantFiled: May 19, 1995Date of Patent: June 23, 1998Assignee: University of ChicagoInventors: Gennady Moiseevich Ershov, Andrei Darievich Mirzabekov
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Patent number: 5662818Abstract: A pyroelectric infrared radiation detector for detecting the intensity of infrared radiation with a pyroelectric element is provided. The pyroelectric infrared radiation detector comprises a substrate made of a single crystal material such as (100) magnesium oxide and an infrared radiation detecting structure which comprises a first electrode disposed on the substrate, a pyroelectric thin film disposed on the first electrode, and a second electrode disposed on the pyroelectric thin film for absorption of infrared radiation. The substrate has a recess provided in the upper surface thereof where the infrared radiation detecting structure is seated.Type: GrantFiled: July 31, 1995Date of Patent: September 2, 1997Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Koji Nomura, Tutomu Nakanishi, Tokumi Kotani, Keizaburo Kuramasu
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Patent number: 5443690Abstract: A pattern formation material capable of keeping dimensional accuracy of a pattern at a desired level even after a polymer is left standing for a long time after exposure and before baking, and a method of forming such a pattern formation material, which comprises a copolymer containing units containing a polycyclic aromatic ring, a condensed ring having at least one aromatic ring, or an aromatic ring having, as a substitution group, an alicyclic group, a branched alkyl or a halogen, and units from a monomer containing a photosensitive group, and a compound generating an acid by irradiation to ultraviolet rays.Type: GrantFiled: March 7, 1994Date of Patent: August 22, 1995Assignee: Fujitsu LimitedInventors: Satoshi Takechi, Makoto Takahashi, Yuko Kaimoto