Abstract: A method of assembling a rotating rectifier having multiple radially spaced bus bars with a corresponding fastener to an electrical machine having at least one machine with a stator and a rotor mounted on a rotating shaft, the method includes inserting the rotating rectifier into a hollow portion of the rotating shaft, axially aligning the fasteners with a corresponding radial opening in the rotating shaft, inhibiting an inward radial movement of the fasteners by inserting an inhibiting tool into an interior defined by the multiple radially spaced bus bars, and at least partially securing the fasteners to a corresponding fastener on at least one of the rotor and rotating shaft while the inhibiting tool resides in the interior.

Abstract: A system of computing assets arranges a plurality of backplanes to form a perimeter of a central region of a backplane structure. A plurality of computing assets are coupled to the backplanes and extend away from the central region of the backplane structure. A plurality of air intake openings are located along the perimeter of the backplane structure. An exhaust duct is coupled to an exhaust opening of the backplane structure and configured to direct air away from the backplane structure and is coupled to an air moving device. When the air moving device is operational, air flows across the computing assets through the air intake openings towards the central region of the backplane structure and into the exhaust duct, which directs the air away from the backplane structure.

Abstract: Embodiments of the present invention provide an array substrate, a manufacturing method thereof and a display device. The manufacturing method of an array substrate, comprising: forming a gate electrode on a base substrate by a first patterning process, and then depositing a gate insulating layer on the base substrate on which the gate electrode is formed; forming source and drain electrodes on the base substrate obtained after the above step, by a second patterning process; forming an active layer formed of a graphene layer, and a protective layer disposed on the active layer, on the base substrate obtained after the above steps, by a third patterning process; and forming a planarizing layer on the base substrate, obtained after the above steps, by a fourth patterning process, in which the planarizing layer is provided with a through hole through which the source or drain electrode is exposed.

Abstract: A bridge rectifier including a common P-type diode, a common N-type diode, two first metal layers, two pairs of second metal layers, two AC inputs and two DC outputs. The P-type diode includes a common P-type doping region, a pair of first N-type substrate regions and a pair of P-type doping regions. The N-type diode includes a common N-type doping region, a pair of second N-type substrate regions and a pair of N-type doping regions. The first metal layers connect to the common N-type doping region and the common P-type doping region. The second metal layers connect to the P-type doping region and the N-type doping region. Two AC inputs connect to one of the second metal layers of the P-type diode and one of the second metal layers of the N-type diode respectively. Two DC inputs connect to the first metal layers respectively.

Abstract: Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.

Abstract: A bridge rectifier including a common P-type diode, a common N-type diode, two first metal layers, two pairs of second metal layers, two AC inputs and two DC outputs. The P-type diode includes a common P-type doping region, a pair of first N-type substrate regions and a pair of P-type doping regions. The N-type diode includes a common N-type doping region, a pair of second N-type substrate regions and a pair of N-type doping regions. The first metal layers connect to the common N-type doping region and the common P-type doping region. The second metal layers connect to the P-type doping region and the N-type doping region. Two AC inputs connect to one of the second metal layers of the P-type diode and one of the second metal layers of the N-type diode respectively. Two DC inputs connect to the first metal layers respectively.

Abstract: Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.

Abstract: The present invention provides a rectifier element that has a titanium oxide layer interposed between first and second electrodes containing a transition metal with an electronegativity larger than that of Ti, wherein, in the titanium oxide layer, only the interface on the side facing any one of the electrodes has a stoichiometric composition, and wherein the average composition of the whole layer is represented by the formula TiOx (wherein x satisfies the relationship 1.6?x<2), and wherein the rectifying characteristics can be reversed by applying a reverse electrical signal that exceeds the critical reverse electric power between the first and second electrodes in an opposite direction. The present invention also provides a process for producing a rectifier element, which includes the steps of depositing a first electrode that contains a transition metal with an electronegativity larger than that of Ti on a substrate; depositing a layer of titanium oxide (TiOx, wherein x satisfies the relationship 1.

Abstract: Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.

Abstract: A semiconductor device includes a plurality of wiring patterns arranged in a first wiring layer of the semiconductor device and extending in a first direction, and a plurality of dummy patterns arranged in the first wiring layer and extending in a second direction different from the first direction, wherein each of the plurality of dummy patterns is arranged spaced apart from each of the plurality of wiring patterns and includes one or more dummy lands formed by separating a part of the dummy pattern opposed to the wiring pattern, from the rest part of the dummy pattern.

Abstract: A main semiconductor region grown on a substrate has formed on its surface a pair of main electrodes spaced from each other, a gate electrode between the main electrodes, and a pair of diode-forming electrodes spaced farther away from the gate electrode than are the main electrodes. Making ohmic contact with the main semiconductor region, the pair of main electrodes serve both as drain or source of a HEMT switch and as cathodes of a pair of Schottky diodes integrated with the HEMT switch. Both gate electrode and diode-forming electrodes are in Schottky contact with the main semiconductor region.

Abstract: A semiconductor package 100 is constructed of a semiconductor chip 110, a sealing resin 106 for sealing this semiconductor chip 110, and wiring 105 formed inside the sealing resin 106. And, the wiring 105 is constructed of pattern wiring 105b connected to the semiconductor chip 110 and also formed so as to be exposed to a lower surface 106b of the sealing resin 106, and a post part 105a formed so as to extend in a thickness direction of the sealing resin 106, the post part in which one end is connected to the pattern wiring 105b and also the other end is formed so as to be exposed to an upper surface 106a of the sealing resin 106.

Abstract: Method of fabricating thin-film transistors in which contact with connecting electrodes becomes reliable. When contact holes are formed, the bottom insulating layer is subjected to a wet etching process, thus producing undercuttings inside the contact holes. In order to remove the undercuttings, a light etching process is carried out to widen the contact holes. Thus, tapering section are obtained, and the covering of connection wiring is improved.

Abstract: A semiconductor apparatus having improved thermal fatigue life is provided by lowering maximum temperature on jointing members and reducing temperature change. A jointing member is placed between a semiconductor chip and a lead electrode, and a thermal stress relaxation body is arranged between the chip and a support electrode. Jointing members are placed between the thermal stress relaxation body and the chip and between the thermal stress relaxation body and the support electrode. A second thermal stress relaxation body made from a material having a thermal expansion coefficient between the coefficients of the chip and the lead electrode is located between the chip and the lead electrode. The first thermal stress relaxation body is made from a material which has a thermal expansion coefficient in between the coefficients of the chip and the support electrode, and has a thermal conductivity of 50 to 300 W/(m·° C.).

Abstract: A semiconductor device includes a plurality of source regions and drain regions disposed on a semiconductor substrate. The semiconductor device also includes a plurality of word lines disposed on the semiconductor substrate between the source regions and the drain regions. The semiconductor device also includes a conductive line disposed on the semiconductor substrate parallel to the word lines. The semiconductor device also includes a plurality of bit lines connected to the drain regions and crossing over the word lines. The semiconductor device also includes a plurality of source strapping lines crossing over the plurality of word lines, the plurality of source strapping lines being connected to at least one of the plurality of source regions and the conductive line. The semiconductor device also includes a ground line connected to the conductive line.

Abstract: A semiconductor die substrate panel is disclosed including a minimum kerf width between adjoining semiconductor package outlines on the panel, while ensuring electrical isolation of plated electrical terminals. By reducing the width of a boundary between adjoining package outlines, additional space is gained on a substrate panel for semiconductor packages.

Abstract: Monolithic semiconductor structures having at least two pairs of two lateral semiconductor devices combined on a first surface of a single semiconductor substrate. Embodiments include connected source terminals defining common source terminals.

Abstract: In a semiconductor-device fabrication method, a plurality of recessed portions are first formed in the principal surface of a substrate. Then, a through hole, passing through the substrate in the front-to-back direction of the substrate, is formed under a portion of the bottom of each recessed portion in the substrate. Subsequently, a plurality of semiconductor elements in the form of chips are spread in a liquid, and the semiconductor-element-spread liquid is poured over the principal surface of the substrate, while passing the liquid through the through holes, so that the semiconductor elements fit into the recessed portions in a self-aligned manner. In this way, the semiconductor elements are disposed into the recessed portions in the substrate in a self-aligned manner.

Abstract: A vertical conduction power electronic device package and corresponding assembly method comprising at least a metal frame suitable to house at least a plate or first semiconductor die having at least a first and a second conduction terminal on respective opposed sides of the first die. The first conduction terminal being in contact with said metal frame and comprising at least an intermediate frame arranged in contact with said second conduction terminal.

Abstract: A chip-type solid electrolytic capacitor comprises capacitor elements. A cathode terminal comprising a plate-like conductor is interposed between cathode layers of the capacitor elements. The capacitor elements are bonded to each other by a bonding agent such as a solder or a conductive adhesive. The cathode terminal is provided with a through hole formed at a portion to be brought into contact with each of the capacitor elements. Bonding surfaces of the capacitor elements are directly connected at the through hole.

Abstract: A semiconductor device comprises a semi-conductor chip bonded on a top surface inside a case electrode by a bonding material and a lead electrode bonded on a top surface of the semiconductor chip by a bonding material with a space of the case electrode filled with an insulating material for sealing the bonded sections, wherein a groove is provided on a top surface of the case electrode from an edge of the semiconductor chip, to thereby reduce heat distortion which is generated on a large scale at an end of the bonding material on account of a difference in coefficients of linear thermal expansion between the semiconductor chip and the case electrode and improve the thermal fatigue life.

Abstract: Disclosed is a rectifier diode device. The rectifier diode device includes a conductive base, a semiconductor chip, a conductive lead and insulation resin. A trench and a post are formed in the conductive base in order to increase a bonding surface between the conductive base and the insulating resin and to lengthen a humidity transfer path for the semiconductor chip. Due to the trench and the post, the bonding surface between the conductive base and the insulating resin increases and the humidity transfer path for the semiconductor chip lengthens, thereby improving heat emission performance of the rectifier diode device. A plurality of prismatic protrusions is formed at an outer peripheral wall of the conductive wire so that coupling force between the conductive wire and an external device is improved. A protrusion ring is provided at a lower surface of the conductive wire so that stress applied to the semiconductor chip is minimized when the rectifier diode device is press-fitted into the external device.

Abstract: The present invention provides a bump forming apparatus which can prevent charge appearance semiconductor substrates from pyroelectric breakdown and physical failures, a method carried out by the bump forming apparatus for removing charge of charge appearance semiconductor substrates, a charge removing unit for charge appearance semiconductor substrates, and a charge appearance semiconductor substrate. At least when the wafer is cooled after the bump bonding is connected on the wafer, electric charge accumulated on the wafer because of the cooling is removed through direct contact with a post-forming bumps heating device, or the charge is removed by a decrease in temperature control so that charge can be removed in a noncontact state. Therefore, an amount of charge of the wafer can be reduced in comparison with the conventional art, so that the wafer is prevented from pyroelectric breakdown and damage such as a break or the like to the wafer itself.

Abstract: A thermal interposer is provided for attachment to the back surface of a semiconductor device so as to give a very low thermal resistance. In one preferred embodiment, the thermal interposer has two plates containing wick structures such as grooves. The thermal interposer is integrated with a semiconductor device so as to form a vapor chamber. In particular, the back surface of the semiconductor chip is in direct contact with the interior sealed volume of the vapor chamber, so as to greatly reduce the thermal resistance from the combination of the chip and the vapor chamber. Further, the upper plate is thermally coupled to a heat-sinking fixture such as a heat sink or a cold plate.

Abstract: In a NPN transistor electrostatic discharge (ESD) protection structure, certain parameters, including maximum lattice temperature, are improved by introducing certain process changes to provide for SCR-like characteristics during ESD events. A p+region is formed adjacent the collector to define a SCR-like emitter and with a common contact with the collector of the BJT. The p+ region is spaced from the n-emitter of the transistor by a n-epitaxial region, and the collector is preferably spaced further from the n-emitter than is the case in a regular BJT.

Abstract: A rectifier device, based on a novel operation principle completely different from that of conventional molecular electronic devices, is made by coupling two or more molecules or molecule arrays (11) at certain joints. By making use of the phenomenon that transfer of an excited state or exciton from one molecule or molecule array to another molecule or molecule array coupled thereto progresses asymmetrically due to spatial asymmetry at the joint, a rectifying function related to the transfer of the excited state of exciton is obtained. Additionally, by controlling the rectification property in addition to the rectification function, an ion sensor device or a switching device is made. A resistor device may be inserted in the rectifier device.

Abstract: A chip-type solid electrolytic capacitor comprises capacitor elements. A cathode terminal comprising a plate-like conductor is interposed between cathode layers of the capacitor elements. The capacitor elements are bonded to each other by a bonding agent such as a solder or a conductive adhesive. The cathode terminal is provided with a through hole formed at a portion to be brought into contact with each of the capacitor elements. Bonding surfaces of the capacitor elements are directly connected at the through hole.

Abstract: A reliable new IC package structure comprises an IC package having a plurality fo grounding conductor plates provided around its surrounding, a first conductor plate for covering over the IC package has downwardly flexed edges at its both sides to form two lugs, and each grounding plate is upwardly camberred to wrap corresponding first conductor plates. A second conductor plate with similar shape to the first one for covering the former closely coupled first and grounding conductor plates, the both sides of the second conductor is also downwardly flexed to form two lugs. A press block having an inner cavity to shade the IC package, first and second conductor plates. Several elastic press bars are installed in said inner cavity and above grounding conductors.

Abstract: The invention provides a semiconductor device having a pn diode that includes a p-type SiGe layer and a n-type Si layer junctioned to the p-type SiGe layer. A built-in potential of the pn diode can be reduced, and thus obtaining a diode characteristics with lower impedance compared to the conventional scheme. Further, by forming a bridge-rectifier circuit with the pn diode or the like, alternating-current voltages can efficiently be converted into direct-current voltages. Accordingly, the invention provides a semiconductor device and method of manufacturing the same that can flow a larger electrical current in the forward direction of a diode by improving the voltage-current characteristics of the diode.

Abstract: A diode for use in an under-the-hood automotive application has a TO 220 outline and consists of a diode die on a two piece lead frame which has a thick section to which the bottom of the die is soldered, and a thinner section which extends through a plastic housing as a connection tab and which has a forked end for easy connection to a node of a three phase bridge. The bottom of the thickened section is exposed through the insulation housing for easy connection to a d-c heat sink rail. The diode is particularly useful in applications greater than 2 KW.

Abstract: A diode for use in an under-the-hood automotive application has a TO 220 outline and consists of a diode die on a two piece lead frame which has a thick section to which the bottom of the die is soldered, and a thinner section which extends through a plastic housing as a connection tab and which has a forked end for easy connection to a node of a three phase bridge. The bottom of the thickened section is exposed through the insulation housing for easy connection to a d-c heat sink rail. The diode is particularly useful in applications greater than 2 KW.

Abstract: It is intended to provide a semiconductor device in which a fuse required conventionally is omitted and an initial resistance value can be maintained even under stress imposed due to packaging or the like, a high-accuracy bleeder resistance circuit that can maintain an accurate voltage division ratio, and a high-accuracy semiconductor device with such a bleeder resistance circuit, for example, a voltage detector or a voltage regulator. In a semiconductor device with a resistor, the resistor includes a P-type resistor made of a P-type semiconductor and an N-type resistor made of an N-type semiconductor which are combined to form one body, and the P-type resistor and the N-type resistor are placed on low and high potential sides, respectively. The P-N junction is irradiated with a laser beam or the like, whereby rectification is damaged to allow conduction.

Abstract: A semiconductor device includes a lead electrode connected to a lead, a case electrode having a projection part around its periphery, and a semiconductor chip having a rectification function and connected electrically between the lead electrode and the case electrode through connection members, wherein an electrically conductive plate is provided between the semiconductor chip and the lead electrode. Thereby, any of cracks is prevented from being generated in the semiconductor chip due to the mutual thermal deformation difference between the electrically conductive plate and the semiconductor chip which are electrically joined to each other through a joining member.

Abstract: A push-in type semiconductor chip has a semiconductor device, a support electrode body bonded to one of the end portions of the semiconductor chip and supported by, and fixed to, a heat spreader at a support fixing portion thereof, a lead electrode body bonded to the other end portion of the semiconductor chip and an insulating/sealing member disposed at the bond portion between the semiconductor chip and the support electrode body and at the bond portion between the semiconductor chip and the lead electrode body. The support electrode body includes a first portion having an outer diameter different from that of the support fixing portion at which the support electrode body is supported and fixed by the heat spreader. By setting a predetermined relationship between the outer diameters of the first portion and the support fixing portion, deformation and breakage of the semiconductor chip during assembly can be prevented.

Abstract: A high power rectifier device has an − drift layer on an N+ layer. A number of trench structures are recessed into the drift layer opposite the N+ layer; respective mesa regions separate each pair of trenches. Each trench structure includes oxide side-walls and an oxide bottom, and is filled with a conductive material. A metal layer contacts the trench structures and mesa regions, forming Schottky contacts at the metal-mesa interface. Shallow P regions extend from the bottom of each trench into the drift layer. Forward conduction occurs when the Schottky contact's barrier height is overcome. When reversed-biased, depletion regions form around the shallow P regions and the oxide side-walls which provide potential barriers across the mesa regions that shield the Schottky contacts from high electric fields, providing a high reverse blocking voltage and reducing reverse leakage current.

Abstract: A sealed rectifier used in a vehicle alternator is composed of a semiconductor diode chip, a base electrode having a disk plate which has a central mount for supporting the chip and an annular wall extending higher than the central mount, a pole electrode having a flange connected to the other side of the chip and an insulating member covering the chip, base electrode and pole electrode. The thickness of the annular wall is smaller than the thickness of the central mount, the outer periphery of the disk plate has a serrated surface for mechanical connection with an cooling fin of the alternator, and the insulating member is composed of resinous material and inorganic filler material to provide residual internal pressure higher than the atmospheric pressure.

Abstract: A semiconductor component includes an insulating housing. A plurality of sheet-metal mounting plates are disposed in one and the same plane and are electrically separated from one another in the housing. Semiconductor switches of a rectifier bridge are electrically conductively secured to the mounting plates. Sheet-metal connection leads are electrically connected to the semiconductor switches. At least one sheet-metal connection lead is electrically connected to the mounting plates.

Abstract: The present invention discloses the use of a dielectric substrate panel suitable for supporting a plurality of independently packaged ICs. The substrate panel has a plurality of conductive landings arranged on its top surface, a plurality of conductive contacts arranged on its bottom surface and a multiplicity of electrically conductive vias. The vias pass through the substrate panel and are arranged to interconnect selected landings with their associated conductive contacts. The top surface of the substrate panel also includes a number of die attach areas. During packaging, dies are secured to their associated die attach areas on the substrate panel and electrically coupled to appropriate conductive landings. An encapsulant is then formed over each of the dies for protection.

Abstract: The subassembly of the present invention includes three pairs of aligned steering diodes and a single thyristor situated between spaced apart conductive heat sink plates. The subassembly is configured to fit into a standard 3-lead transistor outline package by arrangement of the semiconductors and shaping of the conductive plates. In one embodiment, the plates are square, and the components are arranged such that the diode pairs and thyristor are proximate the corners of the plates. In another embodiment, a "T" arrangement is utilized for the components which are situated between "H" shaped plates.