Abstract: A driving apparatus for a display device includes a gray voltage generator that generates a plurality of gray voltage sets, each including a plurality of gray voltages having different levels, and a signal converter that includes a first selector for selecting one gray voltage set among the plurality of gray voltage sets on the basis of a first portion of an image signal and a second selector for selecting one or more gray voltages among the plurality of gray voltages belonging to the selected gray voltage set on the basis of a second portion of the image signal to output and select gray voltages with a smaller size digital-analog converter.

Abstract: A method for operating a magnetic logic device (10) is described wherein at least one output variable O=F (IA, IB) is formed from input variables (IA, IB) by at least one logic operation with an operator function F of the magnetic logic device (10), whereby the logic device (10) is set at a starting state for executing the operator function F with a certain operator control signal (SET) before the operation, whereby the operator control signal is selected from a group of control signals with which various non-volatile starting states can be set in a controlled manner, each state being characteristic of a different logic function. Furthermore, a magnetic logic device (10) equipped for implementation of this method is also described.

Abstract: An apparatus having n-number of working cross-connects for cross-connecting an n-bit input signals arriving from a plurality of input paths on a per-bit basis; n-number of first logic circuits for calculating the exclusive-ORs of each said n-bit and applying outputs to a standby cross-connect for providing outputs; n-number of second logic circuits for calculating the exclusive-ORs of said output signals from each of said working cross-connects and from the single standby cross-connect; and third logic circuits for selecting output signals of said working cross-connects and outputs of the second logic circuits. The apparatus detects the occurrence of an abnormality in working cross-connects by monitoring the outputs of the second logic circuits, identifies the faulty cross-connect by successively turning off one of the n-inputs to the first and second logic circuits, and select outputs from the second logic circuits instead of from the faulty cross-connect by using the third logic circuits.

Abstract: A pulse generator circuit is disclosed including a delay element coupled to a logic circuit. The delay element receives a clock signal CLK and a signal X and produces a signal XN dependent upon the clock signal CLK and the signal X. The logic circuit receives the clock signal CLK and the signal XN and produces a signal ACLK such that ACLK=CLK·XN?. The signal ACLK may include a series of positive pulses. The delay element may be, for example, one of multiple delay elements coupled in series, and signal X may be an output of a preceding one of the delay elements. A semiconductor device is described including the above pulse generator circuit and a self-resetting logic circuit. The self-resetting logic circuit receives the signal ACLK and one or more input signals and performs a logic operation using the one or more input signals during the positive pulses.

Abstract: A data entry keyboard apparatus includes a key switch array (18) in a keyboard unit (12) connected via a cable (14) to a tamper-resistant module (28) which contains control circuitry (16). The control circuitry (16) includes a random pattern generator (30) which generates successive random patterns, causing the selection of a single column and a random pattern of rows, thereby effecting the simulation of key actuations. An EXCLUSIVE-OR gating network (56a-56d) is effective to distinguish a genuine key actuation from simulated key actuations. The invention prevents the ascertainment of actuated keys by unauthorized tapping connections applied to the keyboard unit (12) or the cable (14).

Abstract: Dynamic logic units utilize magnetic cores of rectangular hysteresis loop material wound with an input winding, a pair of output windings connected to a CMOS flip-flop, and a d-c control winding. With a d-c current on the control winding, the core experiences flux reversals in response to a square wave on the input winding to generate output pulses which alternately switch the flip-flop to produce a square wave output which matches the input. In a first embodiment, the output windings are in the form of a center-tapped winding with the center tap grounded to provide a low impedance discharge path for the capacitors in grounded R-C filters on the inputs to the flip-flop which suppress voltage spikes. In a second embodiment, output windings on separate magnetic cores which share an input windings but only one of which has a control winding, are connected in opposition to eliminate the switching spikes in the signal applied to the flip-flop.

Abstract: A fail-safe electronic coincidence detecting circuit including a multiple winding saturable core reactor having a first and a second input winding and an output winding. An NPN transistor amplifier supplying a first pulse train to the first input winding and a PNP transistor amplifier supplying a second pulse train to the second input winding. The output winding producing signal pulses only when the first and second pulse trains are in synchronism.

Abstract: An AND function gating circuit for A.C. signals comprising several magnetic circuits around a common limb, each circuit having a separate input winding and a single output winding on the common limb. The magnetic flux level in the common limb is greatly increased when all input windings are simultaneously energized by A.C. signals of the same frequency and in phase relative to the output achieved under other input signal conditions.