Abstract: The present disclosure relates to latch structures and, more particularly, to high performance multiplexed latches and methods of use. The multiplexed latch includes: a first latch structured to receive a data signal D0 and comprising a plurality of inverters which receive a respective input clock signal; and a second latch signal structured to receive a data signal D1 and comprising a plurality of inverters which receive a respective input clock signal.

Abstract: The present invention discloses an apparatus for controlling and observing test data stored in scannable-D-flip-flops independent of a system clock, thereby making the scannable-D-flip-flops well suited for partial scanning Design-For-Test (DFT) techniques. Under the present invention, the scannable-D-flip-flop is comprised of two master latches and one slave latch such that the scannable-D-flip-flops may operate in a normal mode of operation or a scan/test mode of operation. During normal mode of operation, the first master latch operates together with the slave latch in response to the system clock. During the scan/test mode of operation, the second master latch operates together with the slave latch in response to a scan clock. Since the scanning of external test data is controlled by the scan clock, the conventional non-scannable D-flip-flops in the design, which are controlled by the system clock, maintain their previous states during a scanning operation.

Abstract: Direct current can be measured by passing a conductor carrying the current through the core of a toroidal transformer having a bias winding and a sensing winding. A pulse generator send pulses of magnetization current through the sensing winding so that the magnetization current produces a magnetic flux in the core which opposes a magnetic flux produced by the direct current carried by the conductor. A sensing circuit, connected to the sensing winding, detects the level of current through that winding to produce a measurement of the direct current carried by the conductor. A constant direct current is applied through the bias winding to increase the magnetic flux produced by the direct current carried by the conductor. Biasing the magnetic flux enables even small currents flowing through the conductor to be measured. Another version of the current sensor uses two transformers to measure direct current flowing in either direction in the conductor and provides an indication of that current's polarity.

Abstract: A processor specially adapted for use as a coprocessor. The processor is implemented as a microprocessor. The adaptations include the following: The microprocessor has a master-slave pin which receives an input which determines whether the microprocessor operates as a bus master or a bus slave. Certain output pins have three-state bus drivers which employ feedback to ensure that a signal on a line being driven by the driver has gone inactive before the driver is turned off. Instructions executed by the microprocessor permit specification of portions of the internal registers as sources and destinations and specification of the size of an ALU operation, permitting easy operation on data ranging from bytes through 24-bit pointers. Instructions are executed in an instruction pipeline and a separate I/O instruction pipeline.

Abstract: An IF amplifier/log detector with a modular architecture includes a plurality of voltage amplifiers, a plurality of rectifiers, a plurality of voltage-to-current converters and a current summing circuit. Each amplifier has a first differential transistor pair driven by a first current proportional to the temperature to fix the gain. Each converter includes a second differential transistor pair driven by a current proportional to the temperature and inversely proportional to a process parameter, and a third differential transistor pair driven by a third current inversely proportional to the process parameter. In this manner a circuit having improved performance with variations in temperature and process parameters is obtained.

Abstract: First and second lines respectively receive first and second complementary input signals representing a binary bit. Each of the input signals has first and second logic levels respectively corresponding to a binary "1" and a binary "0". The input signals produce a current through a load in accordance with the relative logic levels of the first and second input signals. The difference between the logic levels of the input signals is amplified and introduced as a negative feedback to a particular one of the first and second lines in accordance with the relative logic levels of the signals on the lines. The feedback causes a current to be produced in the load with a polarity opposite to the polarity of the current produced in the load by the input signals and with a magnitude less than the magnitude of the current produced in the load by the input signals.

Abstract: A single-ended switching circuit is constituted by a primary winding of a transformer, a switching circuit connected between the primary winding and a DC power supply and on-off operated with a predetermined cycle and also with a predetermined "on" period and a resonance capacitor connected in parallel with the primary winding. A magnetic amplifier, a rectifying element and a choke coil are connected in series between a secondary side circuit of the transformer and the load. The magnetic amplifier includes a saturable reactor which is held saturated during a half cycle of the voltage induced in a secondary winding of the transformer and remains unsaturated during the other half cycle of the voltage.

Abstract: In an apparatus having a saturable magnetic core, a control winding wound on the magnetic core and supplied with a D.C. voltage in accordance with a desired phase angle, and an output winding wound on the magnetic core and supplied with an A.C. voltage through a load resistor, whereby the firing phase of a thyristor is controlled by a voltage across the load resistor, an additional winding is wound on the saturable magnetic core to detect the saturation of the saturable magnetic core by a rapid drop of a voltage across the additional winding. When the saturation is detected, the magnitude of the A.C. voltage applied to the output winding is increased. The phase angle characteristic of the magnetic phase shifter is determined under a low voltage condition prior to the saturation of the magnetic core, and after the saturation a high voltage is applied to the load resistor.