Plural Control Currents And/or Potentials Patents (Class 315/350)
  • Patent number: 8624518
    Abstract: A power management circuit comprising a power-on signal input, an output terminal a control unit, a switching unit, and a discharge unit. The control unit configured to selectively turn on the switching unit to output a power-on signal to a display module and selectively turn off the switching unit to cut off an electrical connection between the power-on signal input and the output terminal. The discharge unit configured to discharge residual electrical charges in the display module when the switching unit is turned off.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: January 7, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd, Hon Hai Precision Industry Co., Ltd.
    Inventors: Lu-Qing Meng, Hai-Long Cheng, Kuo-Pin Lin, Chun-Lung Hung
  • Patent number: 8175209
    Abstract: Respective pulsed power supplies for plasma opening switches each produce a first current and a second current during a power pulse and a difference between the first current and the second current during a terminal portion of the power pulse. The pulsed power supplies are initiated or adjusted in response to measured opening times of the plasma opening switches in order to minimize or eliminate a need for command triggered opening of the plasma opening switches. Command triggered opening may occur in real time for a shot as needed in response to asymmetry of opening times of the plasma opening switches in the array during the shot.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: May 8, 2012
    Inventor: Richard Carl Auchterlonie
  • Patent number: 7078864
    Abstract: A power supply device for displaying includes a set register for setting an amplitude and voltage level of a driving voltage for a common electrode and an amplitude and voltage level of a non-selecting period voltage for a scan line, an amplitude reference generating circuit for generating an amplitude reference voltage for the driving voltage of the common electrode and for the non-selecting period voltage of the scan line according to a set value, a VcomH reference generating circuit and a VcomL generating circuit for A.C. driving the common electrode with an amplitude and voltage level determined by the amplitude reference voltage and set value, a VgoffH generating circuit and a VgoffL reference generating circuit for generating the non-selecting period voltage of the scan line with an amplitude and voltage level determined by the amplitude reference voltage and set value.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: July 18, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Yasuyuki Kudo, Akihito Akai, Kazuo Ookado, Kazunari Kurokawa, Atsuhiro Higa
  • Patent number: 6492777
    Abstract: This invention is a space-efficient pixel control circuit for a field emission flat panel matrix-addressable array display. The invention reduces by one the number of transistors required at the intersection of each row line and column line within the array. In addition, only two lines need be routed through the array (i.e., row and column). The array space saved by increased layout efficiency may be used to increase pixel density within the array. The new space-efficient pixel control circuit has a single transistor in a base electrode grounding path that is directly controlled by is a row line. A current-limiting resistor is interposed between the single grounding transistor and a column line to which an inverse video signal is applied. The magnitude of the current through the current-limiting resistor is inversely proportional to the inverse column signal voltage. Thus, pixel brightness is directly proportional to the voltage drop across the current-limiting resistor.
    Type: Grant
    Filed: July 6, 1999
    Date of Patent: December 10, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Glen E. Hush
  • Patent number: 6107757
    Abstract: A fluorescent lamp operating apparatus is used for operating a fluorescent lamp, which includes a glass tube coated with a phosphor and has at least mercury sealed therein, by generating an electric field in a direction from an inner surface of the glass tube toward a center of the glass tube. The operating apparatus, for example, includes: a ballast circuit connected to the fluorescent lamp for starting the fluorescent lamp; a potential application member disposed so as to at least partially surround discharge plasma generated in the fluorescent lamp; and a potential application circuit for applying a potential to the potential application member. In such a case, the potential application circuit applies a potential to the potential application member which is higher than the potential of the discharge plasma.
    Type: Grant
    Filed: October 1, 1998
    Date of Patent: August 22, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoshi Kominami, Kouji Miyazaki, Shigeru Horii, Mamoru Takeda
  • Patent number: 5754009
    Abstract: An interfacing system adapted for use with integrated circuits and accompanying devices. The inventive system includes an array of field emissive devices (36) which emit an electrons in response to input signals from multiple first circuits (14) on a first substrate (16). The field emissive devices (36) are located on the first substrate (16). An array of detectors (38) on a second substrate (20) receive the electrons across a (gap (42) between the first substrate (16) and the second substrate (20). A potential difference in response to a source of potential (22) between the first substrate (16) and the second substrate (20) accelerates the electrons across the vacuum gap (42). The interfacing system (10) may be constructed with a diameter of less than ten micrometers. Hence, two substrates with multiple circuits may be interfaced with many thousands of parallel connections per square centimeter without the need for multiplexing.
    Type: Grant
    Filed: September 19, 1995
    Date of Patent: May 19, 1998
    Assignee: Hughes Electronics
    Inventor: Robert Stephen Hayes
  • Patent number: 5642017
    Abstract: This invention is a space-efficient pixel control circuit for a field emission flat panel matrix-addressable array display. The invention reduces by one the number of transistors required at the intersection of each row line and column line within the array. In addition, only two lines need be routed through the array (i.e., row and column). The array space saved by increased layout efficiency may be used to increase pixel density within the array. The new space-efficient pixel control circuit has a single transistor in a base electrode grounding path that is directly controlled by a row line. A current-limiting resistor is interposed between the single grounding transistor and a column line to which an inverse video signal is applied. The magnitude of the current through the current-limiting resistor is inversely proportional to the inverse column signal voltage. Thus, pixel brightness is directly proportional to the voltage drop across the current-limiting resistor.
    Type: Grant
    Filed: August 2, 1994
    Date of Patent: June 24, 1997
    Assignee: Micron Display Technology, Inc.
    Inventor: Glen E. Hush
  • Patent number: 5589738
    Abstract: A field emission type display device capable of providing display with gradation and permitting the whole display device to be integrated with a display drive circuit section. Memory sections are arranged in correspondence to image cell sections, resulting in static display being accomplished. Also, Light emission of an anode is carried out depending on data held in the memory section, so that a luminous period is increased and adequate luminance is provided at a drive voltage substantially lower than that required for dynamic display. An FEC element is incorporated in each of the memory sections in correspondence to incorporation of an FEC element in each of the image cell sections, so that the image cell sections and memory sections may be concurrently manufactured during manufacturing of the FEC elements, to thereby significantly simplify manufacturing of display device.
    Type: Grant
    Filed: December 22, 1994
    Date of Patent: December 31, 1996
    Assignee: Futaba Denshi Kogyo Kabushiki Kaisha
    Inventors: Koji Onodaka, Katsuya Hiraga, Yoichi Kobori, Hiroshi Sakurada, Teruo Watanabe, Shigeo Itoh
  • Patent number: 5561353
    Abstract: Beam control pulse modulation in an RF transmitter tube is provided by a solid state switch connected between the cathode power supply and the cathode of the transmitter tube. The beam controlling element is returned to the normal cathode power source such that closing the switch between the cathode and the cathode power source brings the beam controlling element voltage to cathode potential causing beam current to flow, while opening the switch provides a very high equivalent cathode resistance, which self-biases the tube in the cutoff region, eliminating the need for a separate "off" voltage power supply. Off-edge performance may be further improved by providing an off switch connected between the cathode and a collector tap on the cathode power supply, and closing the switch when the on switch is opened to accelerate return of the cathode potential to the cutoff voltage.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: October 1, 1996
    Assignee: Northrop Grumman Corporation
    Inventors: Donald A. Brichta, Robert M. Zawislak, Neils A. Kruse
  • Patent number: 5300862
    Abstract: A display addressing method applied in conjunction with an array of cold cathode field emission micro-emitters employs a row-by-row addressing technique in concert with controlled constant current sources connected simultaneously to each column of the array of emitters to provide a novel addressing scheme which yields an improvement in cathodoluminescent display brightness on the order of a full order of magnitude over that of the prior art.
    Type: Grant
    Filed: June 11, 1992
    Date of Patent: April 5, 1994
    Assignee: Motorola, Inc.
    Inventors: Norman W. Parker, James E. Jaskie, Robert C. Kane
  • Patent number: 5150019
    Abstract: An integrated circuit electronic grid device includes first and second metal layers wherein a layer of a dielectric medium is disposed between the metal layers. A third metal layer is disposed above the second metal layer and insulated from the second metal layer by another layer of a dielectric medium. The first and second metal layers are biased with respect to each other to cause a flow electrons from the first metal layer toward the second metal layer. The second metal layer is provided with a large plurality of holes adapted for permitting the flow of electrons to substantially pass therethrough and to travel toward the third metal layer. A fourth metal layer is disposed above the third metal layer to collect the electrons wherein the third metal layer is also provided with a large plurality of holes to permit the electrons to flow therethrough and continue toward the fourth metal layer.
    Type: Grant
    Filed: October 1, 1990
    Date of Patent: September 22, 1992
    Assignee: National Semiconductor Corp.
    Inventors: Michael E. Thomas, Kranti V. Anand, deceased
  • Patent number: 5030895
    Abstract: A field emitter array comparator is provided wherein voltage or current it signals supplied to at least two deflectors control the selective deflection of a beam of electrons to one collector of a collector array of at least two collectors. The beam of electrons is generated by a source of electrons, such as a field emitter array, in an evacuated chamber, and the at least two deflectors are disposed in preselected positions relative to the electron source. The input signals to the at least two deflectors cause deflection of the beam of electrons in the direction of the deflector to which the most positive signal is applied, thus causing the electron beam to strike a collector positioned in the path of the deflected beam. This results in a reduction in voltage associated with that collector. In general, the voltages on the collectors are used to determine whether the signal inputs are equal or, if unequal, which input has the greastest magnitude.
    Type: Grant
    Filed: August 30, 1990
    Date of Patent: July 9, 1991
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Henry F. Gray
  • Patent number: 4988918
    Abstract: Arc discharged by a short arc discharge lamp can be made so small in diameter as to appear like a spot. Therefore, the illuminance efficiency of the short arc discharge lamp can be made high and its brightness can also be enhanced.
    Type: Grant
    Filed: June 21, 1989
    Date of Patent: January 29, 1991
    Assignee: Toshiba Lighting and Technology Corporation
    Inventors: Yasuki Mori, Yasuhiro Iwafuji, Yoichiro Mitsuyuki, Tadatoshi Higashi
  • Patent number: 4884043
    Abstract: A high-frequency generator 1 includes a multigrid electron tube (2). A current source circuit (10) is connected to the control grid (3) or the screen grid (4) of the electron tube (2) and is arranged as an optionally adjustable current source which is also coupled to the main current path of the electron tube. This circuit defines the grid dissipation and also extends the useful life of the electron tube. If the current source circuit (10) is connected to the screen grid (4), the electron tube is further safeguarded in a simple manner against an inadmissibly high screen grid current accompanying an occasional anode voltage drop.
    Type: Grant
    Filed: July 12, 1988
    Date of Patent: November 28, 1989
    Assignee: U.S. Philips Corporation
    Inventors: Christian S. A. E. Patron, Eugene J. Sowinski, Aart P. Huben
  • Patent number: 4529914
    Abstract: A high intensity discharge (HID) lamp has an arc tube including a pair of main electrodes and at least one auxiliary electrode or probe, wherein a high frequency (HF) high voltage is applied to the probe for forming a high frequency (HF) ignition discharge for establishing a low frequency (LF) arc discharge between the main electrodes. In this ignition system, the electrodes of the arc tube are arranged so that an LF discharge path and an HF discharge path are positioned in an X- or a Y-configuration in the arc tube for causing easy lamp ignition. Also, to simplify the outer leads, it is desirable to mount the probe on one of the main electrodes by a dielectric member opposite another main electrode thereby to form a shorter gap between the probe and the other main electrodes than that between the main electrodes. The starting device of HID lamps has a high frequency-high voltage (HF-HV) generator, the output of which is applied, directly or indirectly, to the probe.
    Type: Grant
    Filed: September 12, 1983
    Date of Patent: July 16, 1985
    Assignee: NEC Home Electronics, Ltd.
    Inventor: Isao Kaneda
  • Patent number: 4498181
    Abstract: The invention provides a laser arrangement including in its discharge circuit a switching thyratron which is capable of conduction normally in one direction and protectively in the reverse direction. The thyratron has an anode formed as a hollow body which is adapted to retain plasma generated during a pulse of forward conduction so that the anode is provided to act as a cathode permitting protective reversal of the thyratron when this is subject to reversal of voltage.
    Type: Grant
    Filed: September 23, 1983
    Date of Patent: February 5, 1985
    Assignee: English Electric Valve Company Limited
    Inventors: Hugh Menown, Barry P. Newton, Christopher V. Neale
  • Patent number: 4454453
    Abstract: The invention provides a power source device for an ion source, including first to third power source units coupled to the anode, the cathode and the beam extraction electrode of the ion source. The second power source unit applies an alternating voltage across the cathode. An alternating heating current then flows through the cathode. Each cycle of the alternating voltage from the second power source unit has positive and negative components with preset levels which are generated with a predetermined time interval between them. The power source device further includes a control circuit for interrupting the operation of the first and third power source units during the predetermined time interval.
    Type: Grant
    Filed: June 9, 1982
    Date of Patent: June 12, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Toru Sugawara
  • Patent number: 4293800
    Abstract: A double-ended thyratron is provided which has, at each end, three grids between a cathode and adjacent voltage withstanding gap, the final grid being connected to its associated cathode. In a circuit arrangement including the thyratron, the first grid adjacent a cathode at each end is connected to a source of current bias and the intermediate grids at each end are connected to mutually isolated trigger signal sources.
    Type: Grant
    Filed: June 8, 1979
    Date of Patent: October 6, 1981
    Assignee: English Electric Valve Company
    Inventor: Hugh Menown
  • Patent number: 4081719
    Abstract: The invention provides a double ended thyratron arrangement in which at each end of the thyratron there is a cathode, at least one intermediate grid and a final grid which borders a high voltage withstanding gap. At each end of the thyratron the final grid which borders a high voltage gap is connected to act as a screen electrode, usually by connecting this grid directly to the cathode. At the same time, at one or both ends of the thyratron means are provided for applying triggering input pulses to one of the intermediate grids between the respective cathode and final grid. The thyratron may be of the pentode type, in which case, at each end the final grid is connected to act as a screen, the intermediate grid adjacent the cathode is subject to bias and the triggering signals are applied to the intermediate grid adjacent the final grid.
    Type: Grant
    Filed: February 2, 1977
    Date of Patent: March 28, 1978
    Assignee: English Electric Valve Company Limited
    Inventor: Robert Bewes Molyneux-Berry