Linearly Acting Patents (Class 323/226)
  • Patent number: 11507119
    Abstract: In some aspects, the disclosure is directed to methods and systems for providing voltage regulation and transient suppression from a battery to an integrated circuit. A resistor between a source power supply and the integrated circuit may dissipate power and reduce the voltage at the integrated circuit's input, with current through the resistor under control of an internal regulator of the integrated circuit.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: November 22, 2022
    Assignee: Avago Technologies International Sales PTE. Limited
    Inventors: Kambiz Vakilian, Jan Westra, Dmitrii Loukianov, Vikrant Dhamdhere, Jingguang Wang
  • Patent number: 10809752
    Abstract: A technique for improving the stability of a voltage reference is provided. The implementation of technique is simple and elegant and does not involve a noise penalty. A compensation resistor is provided on one end of a string of resistors used to set a ?VBE in a PTAT cell and to set a gain applied to the PTAT cell voltage.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: October 20, 2020
    Assignee: Analog Devices International Unlimited Company
    Inventors: Jonathan Ephraim David Hurwitz, Gergely Toldi
  • Patent number: 10712210
    Abstract: A sensor may include: a first plurality of resistors; a first BJT having: a first base terminal, a collector terminal, and an emitter terminal, where the collector terminal is coupled to the first plurality of resistors; and a first amplifier having a first non-inverting input coupled to the collector terminal and an output terminal coupled to the base terminal. The sensor may include: a second plurality of resistors; a second BJT having: a base terminal, a collector terminal, and an emitter terminal, where the base terminal is coupled to the base terminal of the first BJT, where the collector terminal is coupled to the second plurality of resistors; and a second amplifier having an inverting input coupled to the collector terminal and an output terminal coupled to the emitter terminal, wherein the inverting input terminal of the first amplifier is coupled to a non-inverting input terminal of the second amplifier.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: July 14, 2020
    Assignee: NXP USA, Inc.
    Inventors: Ricardo Pureza Coimbra, Edevaldo Pereira da Silva, Jr.
  • Patent number: 10712761
    Abstract: This invention provides a multi-bit digitally controlled accurate current source circuit including a reference current detection unit, a voltage buffer unit, a digital logic control unit, a switch array unit, and a current source array unit. The reference current detection unit generates a first bias voltage according to a reference current; the voltage buffer unit receives the first bias voltage, and generate a buffer voltage accordingly; the digital logic control unit receives the buffer voltage, and generate a digital control signal accordingly; the switch array unit receives the digital control signal, and generate on-off signals accordingly; and the current source array unit receives and responds to the on-off signals so as to control turn-on and turn-off of the current sources in the current source array unit. In this invention, by adding only one voltage buffer, a cascode current source if formed, and an area saving accurate current source is realized.
    Type: Grant
    Filed: January 14, 2019
    Date of Patent: July 14, 2020
    Assignee: AMPLIPHY TECHNOLOGIES LIMITED
    Inventors: Tianlin Cao, Yichao He, Jie Lou, Qingping Li, Zhuoyuan Li
  • Patent number: 10696706
    Abstract: Methods of preparing steviol glycosides, including Rebaudioside D, Rebaudioside E, Rebaudioside M, Rebaudioside N and Rebaudioside O are provided herein. Sweetener and sweetened consumables containing Rebaudioside D, Rebaudioside E, Rebaudioside M, Rebaudioside N and Rebaudioside O are also provided herein.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: June 30, 2020
    Assignee: PureCircle USA Inc.
    Inventors: Avetik Markosyan, Siew Yin Chow, Khairul Nizam Bin Nawi
  • Patent number: 10503185
    Abstract: A circuit comprising a NMOS having a gate coupled to a first node and a source terminal coupled to a second node, a second NMOS having a gate coupled to the second node and a source terminal coupled to an output node, a PMOS having a gate coupled to a third node, a drain terminal coupled to a fourth node, and a source terminal coupled to a fifth node, and a second PMOS having a gate coupled to the fourth node, a drain terminal coupled to the output node, and a source terminal coupled to the fifth node. The circuit also includes a voltage protection sub-circuit coupled to the first node, a fast turn-off sub-circuit coupled to the output node, a fast turn-on sub-circuit coupled to the third and fourth nodes, and a node initialization sub-circuit coupled to the first, second, and fourth nodes and the fast turn-on sub-circuit.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: December 10, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: Jayateerth Pandurang Mathad, Rajat Chauhan
  • Patent number: 10326416
    Abstract: An amplifier that amplifies a differential signal includes first and second input terminals for receiving two input signals; first and second diodes each including an anode and a cathode, the anodes being electrically connected to the first and second input terminals; first and second bias current sources being respectively electrically connected to the cathodes of the first and second diodes; an operational amplifier connected to the cathode of the first diode and the cathode of the second diode and configured to amplify a differential signal between signals generated at the cathodes of the first and second diodes; a capacitive element being electrically connected between an input and an output of the operational amplifier; and a differential amplifier provided between the operational amplifier and the first and second input terminals and configured to amplify the two input signals. The first and second bias current sources include a current mirror circuit.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: June 18, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Yoshiyuki Sugimoto
  • Patent number: 10288494
    Abstract: A thermometer circuit configured to estimate a monitored temperature is disclosed. The circuit includes an adjustable resistor presenting a first resistance value that is temperature-independent and a second resistance value that is temperature-dependent, wherein a first current signal is conducted across the resistor when it presents the first resistance value and a second current signal is conducted across the resistor when it presents the second resistance value; a plurality of gated conductors coupled to the resistor; and a control circuit, coupled to the resistor and the plurality of gated conductors, and configured to selectively deactivate at least one of the plurality of gated conductors to compare the first and second current signals to estimate the monitored temperature.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: May 14, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Lien Linus Lu, Chia-Fu Lee, Yi-Chun Shih, Chung-Cheng Chou, Yu-Der Chih
  • Patent number: 10082818
    Abstract: An electronic circuit includes a first consumption part, at least one second consumption part, and a current mirror circuit. The first consumption part passes a current to consume electricity when a voltage exceeding a first voltage is applied. At least one second consumption part is disposed in parallel with the first consumption part and passes a current to consume electricity. The current mirror circuit passes, to the second consumption part, a current corresponding to a current that flows through the first consumption part.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: September 25, 2018
    Assignee: Ricoh Company, LTD.
    Inventors: Masashi Kasamai, Kohhei Yamaguchi, Yoshihiro Takahashi
  • Patent number: 9970826
    Abstract: Temperature sensors using bipolar junction transistors are provided. Examples of the disclosed sensors minimize effects of IR drop and have improved accuracy. An example temperature sensor includes a first branch coupled between a power supply and ground. The first branch includes a first transistor series-coupled with a second transistor via a first node and has a first temperature sensor output via the first node. The temperature sensor also includes a second branch coupled between the power supply and ground. The second branch includes a third transistor series-coupled with a fourth transistor via a second node and has a second temperature sensor output via the second node. The first through fourth transistors are diode-connected and can have an n-well structure or a deep n-well structure. The temperature sensor also includes a voltage sensor having an input coupled to the first temperature sensor output and the second temperature sensor output.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: May 15, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: William Xia, Kendrick Hoy Leong Yuen
  • Patent number: 9927238
    Abstract: Dynamic range of a second amplifier which is provided in a subsequent stage of a synchronous detection circuit is set greater than dynamic range of a first amplifier which is provided in a preceding stage of the synchronous detection circuit, and thus, an output is prevented from being saturated.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: March 27, 2018
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Yutaka Takada, Kenji Sato
  • Patent number: 9899906
    Abstract: A surge current compensating circuit has a compensating current generation unit, a bias unit, and a switch unit, for compensating a surge current drawn from a supply power after an output signal of a specific circuit transits. The compensating current generation unit is electrically coupled to the output stage of the specific circuit. The bias unit is electrically coupled to the compensating current generation unit through the switch unit. Before the output signal transits, the switch unit is disabled and the compensating current generation unit is enabled, so as to draw the compensating current from the supply power. After the output signal transits, the switch unit is enabled and the compensating current generation unit is disabled, such that the compensating current is not drawn from the supply power.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: February 20, 2018
    Assignee: PIXART IMAGING INC.
    Inventors: Chao-Chi Lee, Han-Chi Liu
  • Patent number: 9793882
    Abstract: One example includes a voltage clamp circuit. The voltage clamp circuit includes a comparator loop circuit. The comparator loop circuit includes a comparator configured to compare an input voltage provided at an input node with a clamping voltage. The comparator loop circuit also includes a transistor network interconnecting a voltage rail and the input node. The comparator can be configured to activate the transistor network to set the input voltage to be approximately equal to the clamping voltage in response to the input voltage exceeding the corresponding clamping voltage.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: October 17, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Tien-Ling Hsieh
  • Patent number: 9772647
    Abstract: A circuit includes a current source series-connected with a load between first and second terminals and an element coupled in parallel with the load between the first and second terminals. A value of a current in the current source is controlled based on a current flowing in the element between the first and second terminals. The value of the current in the current source is controlled proportional to power consumption in the load based on the current flowing in the element between the first and second terminals. The element is used to limit a voltage across the load while the value of the current is being controlled.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: September 26, 2017
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Philippe Bienvenu
  • Patent number: 9760105
    Abstract: A regulator includes a driving circuit, an amplifying circuit and an overvoltage protection circuit. The driving circuit is configured to receive an input voltage and provide an output voltage through an output terminal. The amplifying circuit is configured to control the driving circuit according to the output voltage. The overvoltage protection circuit is configured to conduct a first current from the output terminal of the overprotection circuit to a ground terminal. When the overvoltage protection circuit detects that a voltage level of a node coupled to the driving circuit is increased, the overvoltage protection circuit conducts a second current from the output terminal of the overprotection circuit to the ground terminal to lower the output voltage, in which the second current is larger than the first current.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: September 12, 2017
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Shih-Wei Wang, Cheng-Cheng Yen, Chih-Chien Chang
  • Patent number: 9696737
    Abstract: A surge current compensating circuit has a compensating current generation unit and a bias unit, for compensating a surge current drawn from a supply power after an output signal of a specific circuit transits. The compensating current generation unit electrically coupled to the output stage of the specific circuit draws a compensating current form the supply power according to the output signal. The compensating current substantially equals to the surge current, and a summation of a current flowing through the output stage of the specific circuit and the compensating current is substantially unchanged regardless whether the output signal transits or not. The bias unit electrically coupled to the compensating current generation unit provides a bias to the compensating current generation unit to receive the compensating current passed through the compensating current generation unit or output the compensating current to the compensating current generation unit.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: July 4, 2017
    Assignee: PIXART IMAGING INC.
    Inventor: Han-Chi Liu
  • Patent number: 9692300
    Abstract: A regulated voltage system with digital control to maintain a regulated voltage supply and protection against overcurrents is disclosed. A regulated supply voltage circuit including a voltage output and a charging capacitor is coupled to a direct current power source. The regulated supply voltage output supplies power to an electrical load. A shunt transistor is coupled between the direct current power source and the regulated supply voltage circuit and ground. A shunt control circuit operates the shunt transistor between an open and closed state. The shunt control circuit includes a cross-coupled bias circuit coupled to a controller. The controller operates the shunt transistor according to a state machine having a first state to close the shunt transistor when the regulated supply voltage exceeds a maximum hysteresis voltage and a second state to open the shunt transistor when the regulated supply voltage is less than a minimum hysteresis voltage.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: June 27, 2017
    Assignee: SCHNEIDER ELECTRIC USA, INC.
    Inventor: Kevin M. Jefferies
  • Patent number: 9671802
    Abstract: Provided is a voltage regulator capable of applying an optimal overshoot suppression unit depending on states. The voltage regulator includes: an amplifier for controlling an output transistor based on a voltage obtained by amplifying a difference between a divided voltage and a reference voltage; a first overshoot suppression unit for controlling a gate voltage of the output transistor, to thereby suppress overshoot of the output voltage; a second overshoot suppression unit for controlling an operating current of the amplifier, to thereby suppress the overshoot of the output voltage; and a control circuit. The control circuit is configured to turn on the first overshoot suppression unit immediately after the voltage regulator is powered on, and turn off the first overshoot suppression unit under a state in which the output voltage is stable.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: June 6, 2017
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventors: Masakazu Sugiura, Tsutomu Tomioka
  • Patent number: 9513646
    Abstract: A low dropout regulator and system for supplying power to a card are provided. A low dropout regulator includes a reference voltage supply circuit configured to output a reference voltage based on an input supply voltage. An error amplifier has a first input, a second input, and a single-ended output. The first input is coupled to the reference voltage, and the second input is coupled to an output node of the low dropout regulator via a first feedback resistor. A pass transistor includes a control electrode connected to the single-ended output of the error amplifier, a first electrode connected to a ground node, and a second electrode connected to the output node of the low dropout regulator. A first power supply terminal of the error amplifier is connected to the output node, and the output node provides an output voltage of the low dropout regulator that powers the error amplifier.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: December 6, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventor: Po-Hsiang Lan
  • Patent number: 9459641
    Abstract: Provided is a variable output voltage regulator capable of reducing heat generation during an overcurrent protection operation even when a setting value of an output voltage is high. The variable output voltage regulator can change an output voltage by trimming a resistor of a voltage dividing circuit in response to a trimming signal output from a trimming signal generation circuit. The trimming signal is used to change a limiting voltage of a fold-back type overcurrent protection circuit.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: October 4, 2016
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventors: Kaoru Sakaguchi, Teruo Suzuki
  • Patent number: 9435672
    Abstract: A measurement transducer for process instrumentation includes a sensor for detecting a physical or chemical quantity, where a supply voltage to the sensor is regulated by a cross regulator to a constant value, and the current intensity of the current adjusted by the cross regulator and flowing parallel to the sensor is determined and monitored to maintain a specified criterion in order to detect a sensor error such that error conditions of the sensor can be determined in a particularly simple and effective way.
    Type: Grant
    Filed: January 20, 2014
    Date of Patent: September 6, 2016
    Assignee: Siemens Aktiengesellschaft
    Inventors: Eric Chemisky, Slava Friesen
  • Patent number: 9395729
    Abstract: A low dropout regulator includes a pre-regulation circuit, a sustaining circuit coupled to the pre-regulation circuit, and a pass element coupled to the sustaining circuit. The pre-regulation circuit is configured to generate a bias voltage. The sustaining circuit is configured to receive the bias voltage and an enable signal, and generate a control signal. The sustaining circuit is turned on or off by the enable signal. The pass element is configured to receive the control signal. When the enable signal turns on the sustaining circuit, the sustaining circuit generates the control signal according to the bias voltage so that a voltage value of the control signal is higher than a voltage threshold of the pass element. When the enable signal turns off the sustaining circuit, the sustaining circuit maintains the voltage value of the control signal above the voltage threshold of the pass element.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: July 19, 2016
    Assignee: Macronix International Co., Ltd.
    Inventors: Shang-Chi Yang, Yi-Huang Liu
  • Patent number: 9252652
    Abstract: A wide input voltage power supply circuit for a load includes a first stage and a second stage. The first stage includes a linear regulator circuit configured to maintain an output voltage at a predetermined output voltage level. The linear regulator includes an input for shutting the linear regulator off when an input voltage exceeds a predetermined shut off threshold. The second stage includes a high voltage detection circuit coupled to the input of the linear regulator. The high voltage detection circuit is configured to detect the level of the input voltage and to shut the linear regulator off when the input voltage exceeds the predetermined shut off threshold. An under voltage lockout circuit may be included, the under voltage lockout circuit configured to set a minimum turn-on voltage for the load.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: February 2, 2016
    Assignee: Rockwell Automation Technologies, Inc.
    Inventor: Michael Gasperi
  • Patent number: 9236765
    Abstract: This invention pertains to a controlling device for operating various appliances. It includes a personal computer, which is programmed to provide for regulation of the sequence of operations of various electrical devices, such as a controller, the controller functions to initiate or turn OFF a relay or switching electronics device, which can provide for the operations of an appliance, whether it be an industrial or household appliance, or appliances that are used specifically in the entertainment field, such as a scent emitting device, a dimmer, a misting mechanism, and a vibratory motor. These are examples.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: January 12, 2016
    Assignees: Live-FX, LLC, SE Associates, LLC
    Inventors: Kyle James Gonyer, Neal F. Harris
  • Patent number: 9148009
    Abstract: A charger with over-voltage and over-current protection and a method for using the same are provided. The charger comprises a first interface, a second interface, a voltage stabilizing unit, a control unit, an input voltage sampling unit, a switch unit, and a current sampling unit. The voltage stabilizing unit receives an input voltage of an external power supply and provides a constant working voltage to the control unit. The input voltage sampling unit detects the input voltage real-timely. The current sampling unit detects charging current of the battery rod real-timely. The control unit determines whether the input voltage detected by the input voltage sampling unit generates over-voltage or not, or determines whether the charging current detected by the current sampling unit generates over-current or not, and controls the switch unit to turn on or turn off according to the determination results.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: September 29, 2015
    Assignee: HUIZHOU KIMREE TECHNOLOGY CO., LTD. SHENZHEN BRANCH
    Inventor: Zhiyong Xiang
  • Patent number: 8995154
    Abstract: A power supply circuit system includes a ring oscillator provided with a variable resistance circuit, a charge pump circuit outputting a boosted voltage in response to an oscillation output signal from the ring oscillator, a voltage regulator circuit adjusting the boosted voltage from the charge pump circuit, a first current comparator circuit comparing a first current flowing through the voltage regulator circuit with a first reference current, a second current comparator circuit comparing the first current with a second reference current, and a control circuit outputting control signals to control a resistance value of the variable resistance circuit in accordance with a first comparison signal from the first current comparator circuit and a second comparison signal from the second current comparator circuit.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: March 31, 2015
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Yoshinobu Kaneda
  • Patent number: 8963517
    Abstract: A transistor includes a gate, a source, and a drain, the gate is electrically connected to the source or the drain, a first signal is input to one of the source and the drain, and an oxide semiconductor layer whose carrier concentration is 5×1014/cm3 or less is used for a channel formation layer. A capacitor includes a first electrode and a second electrode, the first electrode is electrically connected to the other of the source and the drain of the transistor, and a second signal which is a clock signal is input to the second electrode. A voltage of the first signal is stepped up or down to obtain a third signal which is output as an output signal through the other of the source and the drain of the transistor.
    Type: Grant
    Filed: October 21, 2010
    Date of Patent: February 24, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroyuki Miyake, Masashi Tsubuku, Kosei Noda
  • Patent number: 8901898
    Abstract: A power supply system includes a first connector, a second connector, a first circuit for detecting a magnitude of a current drawn from an energy source by the power supply system and providing a related output related, and a second circuit for adjusting an output voltage supplied to the second connector based on output of the first circuit. The output voltage supplied to the second connector is at a first value when the output of the first circuit is below a first threshold. Further, the output voltage supplied to the second connector is at a second value, greater than said first value, when the output of the first circuit is above a second threshold. The output voltage supplied to the second connector is at a third value, between said first and second values, when the output of the first circuit is between the first and second thresholds.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: December 2, 2014
    Assignee: Dell Products L.P.
    Inventors: So-Yu Weng, Wen-Hung Huang, Yung Fa Chueh
  • Patent number: 8890504
    Abstract: A power adapter includes a processing circuit converting mains power to another alternating current (AC) power or a direct current (DC) power, a first output outputting the converted AC or DC power, a sense resistor connected between the processing circuit and the first output for sampling current flowing through the first output and converting the sampled current to a sampled voltage, an amplifying circuit connected to the sense resistor for amplifying the sampled voltage, and a metallic oxide semiconductor field effect transistor (MOSFET). A gate of the MOSFET is connected to the amplifying circuit. A drain of the MOSFET is connected to the first output through a first resistor and grounded through a second resistor. A source of the MOSFET is grounded. A node between the first and second resistors is connected to the processing circuit. The amplifying circuit makes the MOSFET work in a variable resistance region.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: November 18, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Ying-Bin Fu, Yuan-Xi Chen, Ya-Jun Pan
  • Patent number: 8866457
    Abstract: A voltage regulator has a phase compensation circuit which changes consumption current according to load current thereby to reduce consumption current. The phase compensation circuit includes: a first transistor having a drain connected to an output terminal of an error amplifier circuit; a second transistor having a drain connected to a gate of the first transistor and a gate connected to the gate of the first transistor; a current mirror circuit connected to the output terminal of the error amplifier circuit, a drain of the first transistor, and the drain of the second transistor; and a capacitor connected between the gate of the second transistor and a drain of an output transistor. Thereby, current consumed by the phase compensation circuit can be changed according to the load current, resulting in that the voltage regulator consumes less current.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: October 21, 2014
    Assignee: Seiko Instruments Inc.
    Inventors: Daiki Endo, Socheat Heng
  • Patent number: 8841890
    Abstract: A shunt regulator for an RFID tag chip is powered from split outputs from the RF rectifier, including a first output for providing a power delivery path to on-chip circuits and a second output for providing a discharge-regulation path. The shunt regulator includes a capacitor coupled between the first output and ground. The shunt regulator further includes an input node for receiving a power supply voltage from the rectifier split outputs, a first diode having an anode coupled to the input node, a second diode having an anode coupled to the input node, a resistor divider circuit and amplifier coupled between a cathode of the first diode and ground, transistor having a control terminal coupled to an output of the resistor divider and amplifier circuit, and a current path coupled between a cathode of the second diode and ground.
    Type: Grant
    Filed: June 6, 2012
    Date of Patent: September 23, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Agustin Ochoa, Howard Tang
  • Patent number: 8754617
    Abstract: A reverse shunt regulator includes a MOSFET connected between a cathode and an anode, a switch and a current source serially connected between the cathode and the anode, and an error amplifier having a positive input node to receive an internal reference voltage, a negative input node connected to the reference electrode, and an output node connected to a control electrode of the MOSFET. When the voltage of the reference electrode is within a range, the larger the voltage of the reference electrode is, the less the current of the MOSFET is. Application of this reverse shunt regulator to a flyback converter for output feedback will reduce the power loss in a green mode of the flyback converter.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: June 17, 2014
    Assignee: Richtek Technology Corp.
    Inventors: Chien-Fu Tang, Issac Y. Chen, Jiun-Hung Pan
  • Patent number: 8704503
    Abstract: A SEPIC converter with over-voltage protection includes a high-side inductor that connects a node Vw to a node Vx. The node Vx is connected, in turn to ground by a power MOSFET. The node Vx is also connected to a node Vy by a first capacitor. The node Vy is connected to ground by a low-side inductor. A rectifier diode further connects the node Vy and a node Vout and an output capacitor is connected between the node Vout and ground. A PWM control circuit is connected to drive the power MOSFET. An over-voltage protection MOSFET connects an input supply to the PWM control circuit and the node Vw. A comparator monitors the voltage of the input supply. If that voltage exceeds a predetermined value Vref the comparator output causes the over-voltage protection MOSFET to disconnect the node Vw and the PWM control circuit from the input supply.
    Type: Grant
    Filed: January 7, 2013
    Date of Patent: April 22, 2014
    Assignee: Advanced Analogic Technologies Incorporated
    Inventors: Richard K. Williams, Kevin D'Angelo, Charles Coles
  • Patent number: 8698472
    Abstract: An adjustable driver voltage source for a switching power supply uses a linear regulator to provide a driver voltage, and a modulator to adjust the driver voltage according to the loading change of the switching power supply. The modulator may lower the driver voltage at light load to reduce the switching loss and thereby increase the power efficiency of the switching power supply.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: April 15, 2014
    Assignee: Richtek Technology Corp.
    Inventors: Tsung-Hsi Yang, Shao-Hung Lu, Isaac Y. Chen, Wei-Haur Chan
  • Patent number: 8648578
    Abstract: A voltage regulator is provided having one or more discharger circuits that compensate for low on-chip output capacitance and a slow loop response time. In one embodiment, the voltage regulator includes an output transistor coupled to an output voltage line, an output voltage sensing arrangement coupled to the output voltage line for producing an output feedback voltage, and an error amplifier coupled to the output feedback voltage, the output transistor, and a reference voltage for applying feedback control to the output transistor. A first discharger circuit is coupled to the output voltage line and to a reference potential, the first discharger circuit being triggered by a steep-rise overvoltage condition. In another embodiment, a combination of fast and slow discharger circuits is used to improve the load step response—i.e., to stop the output voltage from jumping too high and to pull it back to stable value very quickly, such that the load circuits are protected.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: February 11, 2014
    Assignee: NXP, B.V.
    Inventors: Hui Zhao, Zhen Yang
  • Patent number: 8564263
    Abstract: A voltage regulator includes a constant voltage power circuit and an overcurrent protection circuit. The constant voltage power circuit generates an output voltage, an output current and a divided voltage. The overcurrent protection circuit includes a current sensing unit, a first mirroring unit, a voltage to current converting unit, a second mirroring unit, and a pull up unit. The current sensing unit generates a sensing current according to the output current. The first mirroring unit generates a first mirroring current. The first mirroring current is proportional to the output current. The voltage to current converting unit is used for converting the divided voltage into a first current. The second mirroring unit generates a second mirroring current. The second mirroring current is proportional to the second current. The pull up unit controls the output voltage and the output current according to the first mirroring current and the second mirroring current.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: October 22, 2013
    Assignee: Faraday Technology Corp.
    Inventor: Chi-Yang Chen
  • Patent number: 8552698
    Abstract: A voltage regulator circuit comprising a first circuit functioning as a voltage dependent resistor, the first circuit having an input coupled to a voltage source and an output and having a resistance dependent on the voltage applied across the circuit by the voltage source such that the resistance increases as the applied voltage increases; and a regulator coupled to the output of the first circuit for providing a regulated output voltage.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: October 8, 2013
    Assignee: International Rectifier Corporation
    Inventor: Melvin Kit Ho Chow
  • Patent number: 8471546
    Abstract: To provide a time constant circuit and the like capable of acquiring a characteristic of an output voltage that attenuates gradually after attenuating steeply, compared to a characteristic that attenuates monotonously. The time constant circuit includes: a series/parallel circuit formed by serially connecting a plurality of parallel circuits each formed with a resistance element and a capacitance element between a first terminal and a second terminal; and a voltage-dividing resistance element connected between a third terminal connected to the second terminal and a fourth terminal. A first parallel circuit is formed with a first resistance element and a first capacitance element, a second parallel circuit with a second resistance element and a second capacitance element, and an n-th parallel circuit with an n-th resistance element and an n-th capacitance element. Note that “n” is the number of the parallel circuits and it is an integer of 2 or larger.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: June 25, 2013
    Assignee: NLT Technologies, Ltd.
    Inventor: Kouichi Ooga
  • Patent number: 8461812
    Abstract: A shunt regulator includes a control circuit, a bypass circuit and a protection circuit. The control circuit is coupled between a first node and a ground, and generates a gate control signal in response to a voltage of the first node and a reference voltage. The bypass circuit forms a first current path between the first node and the ground in response to the gate control signal. The protection circuit has an MOS transistor that is fully turned on in response to a current flowing through the bypass circuit, and forms a second current path between the first node and the ground. Therefore, the shunt regulator occupies a relatively small area in an integrated circuit.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: June 11, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-Su Kim, Joo-Hyun Jeong
  • Patent number: 8400014
    Abstract: Systems and methods are disclosed for improving power efficiency in battery-charging DC power control systems when a power source input voltage is fluctuating. Power is received from the power sources in the form of AC or DC electrical energy and is controlled and regulated by the DC power control systems into DC voltages for charging batteries and/or for driving output loads. Input voltage from the power sources may fluctuate and may drop below a voltage level required to charge the batteries, resulting in a loss in power conversion efficiency. Embodiments of the present disclosure detect low input voltage, boost the low input voltage to a sufficient voltage level for charging the batteries, and manage the distribution of the battery power and input power to the loads to increase power efficiency while meeting load power demands.
    Type: Grant
    Filed: January 6, 2010
    Date of Patent: March 19, 2013
    Assignee: American Reliance, Inc.
    Inventors: Fu Yu Li, Kalvin Chen
  • Patent number: 8373395
    Abstract: A power source apparatus includes: a switch circuit to receive an input voltage; a control circuit to switch the switch circuit from a second state to a first state at a timing corresponding to a comparison result between a feedback voltage generated based on a first voltage corresponding to an output voltage and a reference voltage generated based on a standard voltage set in accordance with the output voltage; and a voltage generation circuit to add a compensation voltage generated by voltage-converting a time period in which the switch circuit switches from the second state to the first state to one of the first voltage and the standard voltage, to generate the feedback voltage, to add a slope voltage which changes at a slope to one of the first voltage and the standard voltage, and to generate the reference voltage.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: February 12, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Makoto Yashiki
  • Patent number: 8350546
    Abstract: A SEPIC converter with over-voltage protection includes a high-side inductor that connects a node Vw to a node Vx. The node Vx is connected, in turn to ground by a power MOSFET. The node Vx is also connected to a node Vy by a first capacitor. The node Vy is connected to ground by a low-side inductor. A rectifier diode further connects the node Vy and a node Vout and an output capacitor is connected between the node Vout and ground. A PWM control circuit is connected to drive the power MOSFET. An over-voltage protection MOSFET connects an input supply to the PWM control circuit and the node Vw. A comparator monitors the voltage of the input supply. If that voltage exceeds a predetermined value Vref the comparator output causes the over-voltage protection MOSFET to disconnect the node Vw and the PWM control circuit from the input supply.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: January 8, 2013
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: Richard K. Williams, Kevin D'Angelo, Charles Coles
  • Patent number: 8134349
    Abstract: A power supply circuit has a constant voltage circuit, a first MOS transistor, a second MOS transistor, a third MOS transistor, a first voltage dividing circuit that outputs a first divided voltage obtained by dividing the voltage of the output terminal by a first voltage dividing ratio, and a first differential amplifier circuit which is fed with a reference voltage and the first divided voltage and has an output connected to a gate of the second MOS transistor. The first differential amplifier circuit outputs a signal to turn on the second MOS transistor when the first divided voltage is higher than the reference voltage, and the first differential amplifier circuit outputs a signal to turn off the second MOS transistor when the first divided voltage is lower than the reference voltage.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: March 13, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidehiro Shiga, Shinichiro Shiratake, Daisaburo Takashima
  • Patent number: 8129967
    Abstract: A voltage regulator includes an amplifier and a regulation loop. The regulator includes a first PMOS transistor connected to a terminal supplying an input voltage, a second PMOS transistor connected in series with the first PMOS transistor. A node between those two transistors defines an output terminal. A first source of a first polarization current of fixed value is connected to the gate of the first transistor, and a second source of a second polarization current of fixed value connects the second transistor to ground. A third NMOS transistor is connected between the two current sources. A circuit is provided to modify automatically at least one of the polarization currents in relation to the load current.
    Type: Grant
    Filed: December 15, 2008
    Date of Patent: March 6, 2012
    Assignee: STMicroelectronics S.A.
    Inventors: Fabrice Blisson, Jean-Luc Moro, Marc Sabut
  • Patent number: 8072198
    Abstract: To provide a voltage regulator having improved response characteristics in case of overshoot. The voltage regulator includes: a transistor (303) for detecting an overshoot at an output terminal; and a current mirror circuit connected to the transistor (303). If the transistor (303) detects the overshoot, a control transistor (16) is turned ON to discharge a voltage of the output terminal.
    Type: Grant
    Filed: February 10, 2010
    Date of Patent: December 6, 2011
    Assignee: Seiko Instruments Inc.
    Inventor: Takashi Imura
  • Patent number: 7969127
    Abstract: A method and circuit for controlling the start-up of a shunt regulator that uses an error amplifier for normal operation in a linear range of a target value output voltage set by a reference voltage upon circuit start-up clamps the output voltage to a first level value below the target value, next applies regenerative positive feedback independent of the error amplifier to force the output voltage through a range where adverse conditions can occur to a second level value below the target value, and then releases the positive feedback near the target value where the error amplifier assumes control of the regulation.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: June 28, 2011
    Assignee: National Semiconductor Corporation
    Inventor: David James Megaw
  • Patent number: 7868596
    Abstract: A method of controlling a DC-DC step-up converter including at least one power switch and an energy storage inductor may include comparing a converter output voltage to a first threshold and generating a first comparison flag based on the converter output voltage comparison. The method may also include comparing a voltage across the energy storage inductor to a second threshold and generating a second comparison flag based on the second energy storage inductor voltage comparison. The method may further include controlling the at least one power switch as a function of a logic state of the first comparison flag and the second comparison flag, and stepwise adjusting the second threshold as a function of the first comparison flag and the second comparison flag to limit a ripple on the converter output voltage.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: January 11, 2011
    Assignee: STMicroelectronics S.R.L.
    Inventors: Agatino Antonino Alessandro, Calogero Ribellino
  • Patent number: 7859233
    Abstract: A synchronous switching voltage regulator circuit is provided. After the first PWM pulse or at the end of a soft-start, a gradual transition is made from asynchronous rectification to fully synchronous rectification. The gradual transition to synchronous rectification is made by gradually increasing the time that the synchronous switch is enabled to be on.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: December 28, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Faruk Jose Nome Silva, Kwok-Fu Chiu, Barry James Culpepper, Michael J. Wurtz
  • Patent number: 7859801
    Abstract: The present invention discloses a control apparatus for a linear compressor which can vary a cooling force and prevent an inrush current. The control apparatus for the linear compressor includes a coil winding body laminated on the linear compressor, a first capacitor connected in series to the coil winding body, a capacitance varying unit being formed in a parallel structure to the first capacitor, and having a capacitor switch, and a control unit for inducing an output change of the linear compressor, by varying the whole capacitance of the control apparatus by controlling the capacitor switch.
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: December 28, 2010
    Assignee: LG Electronics Inc.
    Inventors: Chulgi Roh, Jong-Kwon Kim, Jung-Wook Bae, Hee-Dong Kang
  • Patent number: 7859235
    Abstract: A first output transistor forms a first current path between an input and an output terminal and has a first control terminal applied with a first control signal. A second output transistor forms a second current path between the output and a ground terminal and has a second control terminal applied with a second control signal. A first comparator outputs the first control signal to decrease an ON-resistance of the first transistor when an output voltage from the output terminal is a predetermined value or less. A second comparator outputs the second control signal to render the second transistor conductive to decrease the output voltage when the output voltage is a predetermined value or more. An acceleration circuit accelerates charging of the first control terminal of the first transistor to a predetermined potential. The inhibition circuit inhibits the acceleration circuit operation according to a change of the second control signal.
    Type: Grant
    Filed: October 21, 2008
    Date of Patent: December 28, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takahiro Yamashita