Abstract: A DC-DC converter includes: a first switch; a second switch connected to the first switch; a mode selecting circuit to select a converting mode from one of at least a first mode and a second mode based on an input voltage; and a controller to generate a first switching control signal for controlling the first switch based on the converting mode, and a second switching control signal for controlling the second switch based on the converting mode.

Abstract: A multiphase converter provides an output voltage to a load. The multiphase converter receives a load event signal from the load and turns ON at a same time the phases of the multiphase converter to increase the output voltage in response to the load event signal indicating that a load current drawn by the load from the multiphase converter is about to increase. The multiphase converter increases an impedance of low-side switches of the multiphase converter in response to the load event signal indicating that the load current is about to decrease.

Abstract: A control circuit for controlling a DC-DC converter is provided. The control circuit comprises a first sensor, second sensor, error amplifier, signal conditioning circuit, first comparison circuit, second comparison circuit, and driver circuit. The error amplifier is configured to receive a feedback voltage and a reference voltage for generating a first voltage. The signal conditioning circuit is configured to receive the first voltage for generating a second voltage and a third voltage. The first comparison circuit is configured to make a comparison based on a first sensing signal from the first sensor and the second voltage for generating a first comparison signal. The second comparison circuit is configured to make a comparison based on a second sensing signal from the second sensor and the third voltage for generating a second comparison signal. The driver circuit is for driving a power stage according to the first and second comparison signals.

Abstract: Various methods and circuital arrangements for protection of a power amplifier from over voltage are presented. According to one aspect, a protection circuit coupled to a varying supply voltage of the power amplifier controls a biasing current to the power amplifier to limit a power dissipation through the power amplifier. An overvoltage protection circuit detects a level of the varying supply voltage and decreases the biasing current as a linear function of an increasing supply voltage once the supply voltage reaches a programmable voltage level. A slope of the linear function can be made programmable. Programmability of the voltage level and the slope can be used to control biasing currents to a plurality of power amplifiers operating at different times and having different requirements in terms of voltage limits and thermal breakdown. According to another aspect a voltage to current converter for use in the overvoltage protection circuit is presented.

Abstract: An LLC converter includes a switching stage including primary transistors, a resonant stage connected to the switching stage, a transformer including a primary winding connected to the resonant stage and a secondary winding coupled with the primary winding, a rectifying stage connected to the secondary winding of the transformer and providing an output voltage of the LLC converter, and a controller configured and/or programmed to, during start-up, control the output voltage by switching the primary transistors based on a first reference voltage that exponentially increases during start-up and a second reference voltage that is based on a resonant current of the resonant stage.

Abstract: A switched mode power supply (SMPS) includes a first switch, a second switch connected, at a switching node, in series with the first switch, and an inductor coupled between the switching node and an output node for providing an inductor current, at the output node. The SMPS also includes an oscillator circuit for providing a clock signal characterized by an oscillating frequency, an adaptive minimum duty-cycle circuit configured to receive an error voltage signal and to generate a current signal to vary the oscillating frequency of the clock signal in response to the error voltage signal, wherein the error voltage signal is based on an output signal at the output node, and a pulse-width modulation (PWM) circuit configured to receive the error voltage signal and the clock signal and to provide a switching control signal to control the first switch and the second switch.

Abstract: A calibration current load is selectively coupled to an output of a pulse frequency modulated (PFM) DC-DC converter during a calibration operation to increase charge supplied from a battery supplying an input voltage to the converter. A voltage across a sense resistor in series with the battery is integrated during a measurement interval while the calibration current load is coupled to the output. A charge drawn per pulse from the battery is determined based on the sense resistor, the integrated voltage and the number of pulses during the measurement interval. Alternatively, a first PFM frequency is determined with a first calibration current load coupled to the converter output. A second PFM frequency is determined with a second calibration current load. The charge drawn per pulse from the battery is determined based on the first and second PFM frequencies and the first and second calibration current loads.

Abstract: A control circuit for adaptive noise margin control for a constant on time (COT) converter comprises an input reference terminal, amplifier, first switch device, voltage divider, trigger circuit, and output reference terminal. The amplifier has an input terminal coupled to the input reference terminal receiving a reference voltage signal. The first switch device has a control terminal coupled to an output of the amplifier, a first conduction terminal for receiving a voltage source signal, and a second conduction terminal. The voltage divider is coupled to the second conduction terminal and another input terminal of the amplifier. The trigger circuit, coupled to the voltage divider, is for triggering voltage change of a modified reference voltage signal selectively according to a high-side control signal of the COT converter. The output reference terminal coupled to the second conduction terminal outputs the modified reference voltage signal.

Abstract: A novel power supply apparatus (10) includes a microcontroller (102) and a plurality of voltage converters (104). If the voltage converters (104) are in a boost mode and a plurality of duty cycles of the voltage converters (104) calculated by the microcontroller (102) are less than 0.5, the microcontroller (102) is configured to limit at least one of the duty cycles of the voltage converters (104) to 0.5. If the voltage converters (104) are in a buck mode and the duty cycles of the voltage converters (104) calculated by the microcontroller (102) are greater than 0.5, the microcontroller (102) is configured to limit at least one of the duty cycles of the voltage converters (104) to 0.5.

Abstract: In an example, a method includes storing a pending PWM pulse for a switching voltage regulator. The method also includes determining a switching voltage regulator is operating in a current limit mode, where an inductor current is above a current limit threshold. The method includes providing a predetermined number of PWM pulses in the current limit mode. The method also includes, responsive to providing the predetermined number of PWM pulses, ceasing storage of pending PWM pulses for the switching voltage regulator.

Abstract: Upon an input of an input signal that instructs to turn on a power semiconductor element, a pulse generation circuit generates a pulse. Upon reception of the pulse, a gated latch circuit holds an overcurrent detection state of an overcurrent detection circuit. In response to the input of the input signal and an overcurrent situation having been detected, an overcurrent mode switching circuit outputs an inverted or non-inverted oscillation signal, which is obtained by inverting or not inverting an oscillation signal generated by an oscillation signal generation circuit depending on the overcurrent situation being detected before or after the input of the input signal, and also outputs an inverted oscillation signal obtained by inverting the oscillation signal. A timing determination circuit periodically turns on the power semiconductor element based on the inverted oscillation signal and frequency divided signals obtained by frequency dividing the inverted or non-inverted oscillation signal.

Abstract: A switching regulator circuit has a high side (HS) transistor actuated during on time (TON) of a duty cycle. The output current of the switching regulator circuit is determined from sensing a transistor current flowing through the HS transistor during HS transistor on time (TON) and dividing the sensed transistor current by the duty cycle to generate an output signal indicative of the output current of the switching regulator circuit. The duty cycle is determined from a ratio of the on time (TON) and off time (TOFF) of the switching regulator circuit.

Abstract: A method for a switched mode power supply (SMPS) includes providing an error voltage signal based on a difference between a sampled output voltage of the SMPS and a target voltage, and generating a clock signal characterized by an oscillating frequency; generating a switching control signal based on the error voltage signal and the clock signal using pulse-width modulation (PWM). The method further includes varying the oscillating frequency of the clock signal according to the error voltage signal in a current generating circuit, and applying the switching control signal to control the power switches of the SMPS.

Abstract: A resonance control method for differentiated phase correction under asymmetric positive and negative bilateral frequency domains includes a differentiated phase correction resonance control link with an independent phase correction angle at each resonance point, a decoupling link and a delay compensation link. As a high power converter has the characteristic of asymmetric positive and negative bilateral frequency domains under resonance control with decoupling, stability margin of a control link is enhanced while a negative-sequence current suppression capability is realized by means of differentiated phase correction at positive and negative resonance poles.

Abstract: A display device includes a display panel including a plurality of pixels which display an image, a panel driver which generates a driving voltage based on a plurality of feedback voltages sensed from the display panel to drive the display panel, and a plurality of sensing lines which are connected to the pixels to sense the feedback voltages, respectively, and apply the sensed feedback voltages to the panel driver. The panel driver generates an average feedback voltage corresponding to an average of the feedback voltages and generates the driving voltage based on the average feedback voltage.

Abstract: A system includes a load and a switching converter coupled to the load. The switching converter includes at least one switching module and an output inductor coupled to a switch node of each switching module. The switching converter also includes a controller coupled to each switching module, where the controller is configured to adjust a pulse clock rate and a switch on-time for each switching module. The controller comprises a pulse truncation circuit configured to detect a voltage overshoot condition and to truncate an active switch on-time pulse in response to the detected voltage overshoot condition.

Abstract: A method for driving an output node includes driving a control node of an output device coupled to the output node according to an input signal and using a fixed regulated voltage and a variable regulated voltage. The method includes generating the fixed regulated voltage based on a first power supply voltage, a second power supply voltage, and a first reference voltage. The method includes generating the variable regulated voltage based on the first power supply voltage, the second power supply voltage, and a second reference voltage. The method includes generating the second reference voltage based on the first power supply voltage, the second power supply voltage, a reference current, and a predetermined target voltage level of the control node of the output device. In an embodiment of the method, generating the second reference voltage includes periodically calibrating the second reference voltage.

Abstract: A signal correction circuit and a server are provided. The circuit comprises: a first signal processing component receiving an input signal and positive power supply voltages and negative power supply voltages, generating a first control voltage, and outputting a first voltage, the first voltage being zero within a first time period; a second signal processing component generating a second control voltage according to the first control voltage, performing energy storage charging according to the second control voltage, controlling an energy storage charging voltage according to the second control voltage, and outputting a second voltage, and the second voltage being zero in the second time period; and an output component performing superposition processing on the first voltage and the second voltage to obtain an output signal.

Abstract: The invention relates to a system comprising several touch-sensitive control elements that are arranged next to each other. It is provided that the control elements are able to communicate with each other via a voltage-controlled peer-to-peer line and determine when a particular control element should actively respond to touches or is deactivated.

Abstract: An example circuit includes a supply comparator having a supply input, a supply reference input and a supply comparator output. The supply input is coupled to a supply input terminal, and the supply reference input is configured to receive a supply reference voltage. A controller has a comparator input, a high-side output and a low-side output. The comparator input is coupled to the supply comparator output. A high-side switch having a control input. The high-side switch is coupled between the supply input and a switch output terminal, and the high-side output is coupled to the control input of the high-side switch. A low-side switch has a control input. The low-side switch is coupled between the switch output terminal and a ground terminal, and the low-side output is coupled to the control input of the low-side switch.

Abstract: Provided is a DC/DC converter capable of providing overvoltage protection reliably without being affected by, for example, an external element connected to an output terminal. The DC/DC converter includes a comparator, an RS-FF circuit, a drive circuit, and an ON-timer circuit, and the ON-timer circuit includes: a current source circuit which provides an electric current based on a power supply voltage; a ripple generation circuit which generates a ripple voltage; an averaging circuit which averages the ripple voltage; a timer circuit which generates an ON-timer signal; and an overvoltage protection circuit (clamp circuit).

Abstract: A middle-range (mid) low dropout (LDO) voltage has both sinking and sourcing current capability. The mid LDO can provide a voltage reference in active mode and power mode for core only design to work in a Safe Operating Area (SOA). The output of mid LDO can track TO power and/or core power dynamically. The mid LDO can comprise a voltage reference generator and a power-down controller connected to an amplifier, which output is connected to a decoupling capacitor. The provision of a high ground signal allows the mid LDO provide the sinking and sourcing currents.

Abstract: A direct current-direct current conversion circuit includes: an input inductor, a first capacitor, a second capacitor, a flying capacitor, a first switch, a second switch, a first inductor, a first diode, a first buffer circuit, a third switch, a fourth switch, a second inductor, a second diode, and a second buffer circuit. A power supply, the input inductor, the first diode, the second diode, the first capacitor, and the second capacitor are sequentially connected in series. A first terminal of the flying capacitor is connected between the first diode and the second diode. A second terminal of the flying capacitor is connected between the first switch and the third switch, and the second terminal of the flying capacitor is further connected between the second switch and the second inductor.

Abstract: Systems and methods related to efficient system on chip (SoC) power delivery with adaptive voltage headroom control are described. A method for adaptively controlling voltage headroom for a system includes, in response to either a detection of a headroom violation by a per core voltage regulator headroom monitor or a detection of a voltage droop by a per core droop detector, independently throttle operating frequency of a respective core clock signal. The method further includes, in response to meeting a predetermined criterion: (1) lowering the operating frequency of the respective core clock signal, (2) monitoring headroom violation events and droop events at the lowered operating frequency, and (3) if monitored headroom violation events or monitored droop events continue to meet the predetermined criterion, changing the voltage set point associated with the motherboard voltage regulator to a second voltage set point corresponding to a higher voltage.

Abstract: An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes: 1) a main comparator; 2) a bias current source coupled to the main comparator and configured to provide a bias current to the main comparator; and 3) a dynamic biasing circuit coupled to the main comparator and configured to add a supplemental bias current to the bias current in 100% mode of the buck converter. The supplemental bias current varies depending on an input voltage (VIN) and an output voltage (VOUT) of the buck converter.

Abstract: An eFuse for use in high voltage applications is disclosed. In one embodiment, an apparatus includes a solid-state switch having source and drain terminals connected to switch a load current from a high voltage source through a high voltage load. The apparatus also includes a sense circuit that senses a voltage between the switch source and drain terminals and turns off the switch when the voltage exceeds a selected voltage level.

Abstract: Apparatus and associated methods relate to dynamic bandwidth control of a variable frequency modulation circuit by selective contribution of a crossover frequency tuning engine (XFTE) in response to a transient in a switching frequency. In an illustrative example, the XFTE may generate a transient control signal (Ctrans) in response to a transient in a control output signal (Cout) indicative of switching frequency and received from a feedback control circuit. The XFTE may generate Ctrans, for example, according to a predetermined relationship between a crossover frequency and the switching frequency of the modulation circuit. The feedback control circuit may, for example, generate Cout from a predetermined reference and a control input signal. Cout may, for example, correspond to a pulse-width modulated output delivered to a load through an inductor. Various embodiments may advantageously increase the effective bandwidth of the modulation circuit while maintaining desired frequency response characteristics.

Abstract: A load switch circuit includes a power transistor, the first terminal is configured to receive the power supply voltage, and the second terminal is the output terminal of the load switch circuit and is coupled with an external inductive load; a clamping module including at least a mutually coupled clamping unit and a driving unit; the clamping unit, including a voltage-current converter and a first resistor, the first resistor is coupled between the output terminal of the voltage-current converter and the second terminal of the power transistor, the output terminal of the drive unit is coupled to the control terminal of the power transistor when the difference between the power supply voltage and the output voltage of the power transistor is greater than or equal to the preset clamping threshold, and the clamping unit outputs an effective drive control signal to the driving unit.

Abstract: Described embodiments include a circuit for adapting the on time in a switching voltage converter that includes a first transistor having a current terminal coupled to an output voltage terminal and to its control terminal. A second transistor is coupled between the first transistor and a ground terminal, and has a control terminal coupled to the first transistor. A third transistor is coupled between the output voltage terminal and a capacitor, and has a third control terminal coupled to the first control terminal. A current source is configured to provide a current that varies linearly between a first value and a second value. A fourth transistor is coupled between terminals of the capacitor, and has a fourth control terminal. A comparator has a first comparator input coupled to the capacitor. A logic circuit has an input coupled to the comparator output, and an output coupled to the fourth control terminal.

Abstract: A power conversion circuit includes a first and a second power converters for generating a first and a second driving voltages respectively. The second power converter is a switching converter. In a short-circuit detection mode, the first driving voltage is regulated to the first driving level, and the second power converter is configured to operate in a pulse frequency modulation mode to regulate the second driving voltage to a short-circuit detection level, and when a switching frequency of the second power converter exceeds a threshold frequency, a short-circuit condition between the second driving voltage and the first driving voltage is determined.

Abstract: A sensor circuit for a power FET monitors current flowing through the FET and includes a regulator circuit regulating a first current flowing through a sense resistance, so voltage drop at the sense resistance corresponds to voltage drop between terminals of the FET. A measurement circuit provides a second current corresponding (or being proportional) to the first current. A first switch selectively applies the second current to a resistor based on a first control signal, and a low pass filter generates a low-pass filtered signal by filtering voltage at the resistor. A voltage follower generates a replica of the low-pass filtered signal, and a second switch selectively applies the replica to the resistor. When the FET is closed, a control circuit closes the first switch and opens the second electronic switch. When the FET is opened, the control circuit opens the first electronic switch and closes the second electronic switch.

Abstract: An electromagnetic interference regulator by use of capacitive parameters of the field-effect transistor for detecting the induced voltage and the induced current of the field-effect transistor to determine whether the operating frequency of the field-effect transistor is within the preset special management frequency of electromagnetic interference. When the basic frequency and the multiplied frequency exceed the limit, the content of the external capacitor unit can be adjusted to assist the products using field-effect transistors to maintain excellent electromagnetic interference adjustment capabilities under various loads, thereby optimizing the characteristics of electromagnetic interference.

Abstract: A dead time controller includes a phase detector, a filter circuit and an amplifying circuit. The phase detector generates a detection signal by detecting a phase difference between a first driving control signal applied to a first power transistor and a second driving control signal applied to a second power transistor, the detection signal being associated with a dead time corresponding to an overlapped deactivation interval between the first and second driving control signals. The filter circuit generates a DC voltage signal by filtering and averaging the detection signal based on a pulse-width modulation (PWM) signal. The PWM signal is generated by performing a PWM on an output voltage provided at an output node coupled to a second terminal of the inductor. The amplifying circuit generates an amplified voltage signal having a voltage level proportional to the dead time by amplifying the DC voltage signal.

Abstract: Hybrid control of switching power converters. One example embodiment is a method including: operating the switching power converter such that a charge control switch has a conduction time in each switching cycle; and making adjustments to the conduction time, the adjustments dominated by voltage-mode control when the switching power supply is in a first operational state, and the adjustments dominated by current-mode control when the switching power supply is in a second operational state distinct from the first operational state.

Abstract: A buck-boost circuit is provided. A first terminal of a first switch is connected to an anode of an input power supply, a first terminal of a second switch is connected to an anode of an output power supply, a first terminal of a third switch and a first terminal of a first inductor are connected to a second terminal of the first switch, a first terminal of a fourth switch is connected to a second terminal of the first inductor and a second terminal of the second switch, a fifth switch is connected between the input power supply and the output power supply, and a first terminal of a first capacitor is connected to the anode of the output power supply, and a second terminal of the first capacitor is connected to the anode and a cathode of the input power supply through switches, respectively.

Abstract: A mobile robot includes a robot including a robot arm, a motor that drives the robot arm by electric power supplied from a battery, a motor drive circuit that controls driving of the motor, and a voltage conversion unit that converts and outputs a voltage output by the battery to the motor drive circuit, and a vehicle for mounting robot having a movement mechanism and a coupling unit to which the robot is coupled, and moving the robot.

Abstract: A circuit is disclosed. The circuit includes a first transistor including a first drain terminal, a first gate terminal and a first source terminal, a depletion-mode transistor including a second drain terminal, a second gate terminal and a second source terminal, the second drain terminal connected to the first drain terminal, the depletion-mode transistor arranged to sense a first voltage at the first drain terminal and generate a second voltage at the second source terminal, and a comparator arranged to receive the second voltage, and transition the first transistor from an on state to an off state in response to the first transistor entering its saturation region of operation. In one aspect, the first transistor includes gallium nitride (GaN). In another aspect, the circuit further includes a logic circuit arranged to receive an output voltage generated by the comparator and to drive the first gate terminal.

Abstract: A single-stage battery charging system includes a hybrid converter comprising a plurality of first power switches connected in series, an inductor and a first flying capacitor, wherein the inductor is connected to a midpoint of the plurality of first power switches, a switched capacitor converter comprising a plurality of second power switches connected in series, and a second flying capacitor, and an isolation switch coupled between the midpoint of the plurality of first power switches and a midpoint of the plurality of second power switches.

Abstract: A control method improves the efficiency profile of a power supply across a wide range of output loading. The method includes obtaining a measure of output power for a power supply, which includes one or more output modules and an auxiliary power supply. The method determines whether a maximum power rating of the auxiliary power supply is sufficient to provide the measure of output power. Responsive to a determination that the maximum power rating of the auxiliary power supply is sufficient to provide the measure of output power, the controller of the power supply directs the auxiliary power supply to provide the output power.

Abstract: In an example, a method includes storing a pending PWM pulse for a switching voltage regulator. The method also includes determining a switching voltage regulator is operating in a current limit mode, where an inductor current is above a current limit threshold. The method includes providing a predetermined number of PWM pulses in the current limit mode. The method also includes, responsive to providing the predetermined number of PWM pulses, ceasing storage of pending PWM pulses for the switching voltage regulator.

Abstract: An apparatus includes a soft start manager such as implemented via hardware, software, or a combination of hardware and software. The soft start manager receives input parameter from a power supply; the input parameter (such as output voltage, duty cycle, input voltage, etc.) is associated with conversion of the input voltage into an output voltage that powers a load. The soft start manager monitors a magnitude of the input parameter. Based at least in part on the magnitude of the input parameter, the soft start manager controls a switching period applied to switch circuitry in the power supply.

Abstract: The invention relates to a method and a system for providing current from a DC power supply to pulsed loads in an array. The array comprises at least two electronic units. Each electronic unit comprises a regulator connected to an energy storage, to a pulsed load and to a charge control unit. The charge control unit is arranged to control the supply of DC current to the pulsed load connected to the electronic unit. The method comprises: selecting a pulse load pattern for the pulsed loads, selecting a charge control sequence by a control system connected to the electronic units and the DC power supply, starting the selected charge control sequence, starting the pulse load pattern, providing DC current from the DC power supply to each electronic unit at different times according to the selected charge control sequence set by the charge control unit.

Abstract: In an embodiment, a voltage converter includes: a first transistor coupled between a first rail configured to receive a supply voltage and a first node; and an inductance coupled between the first node and a second node configured to deliver an output voltage, wherein, at each operating cycle of the converter, the first transistor is maintained in the on state for a first time period proportional to the inverse of a voltage difference between the supply voltage and the output voltage.

Abstract: A converter system includes a first switch and a controller configured to switch the first switch between first and second states based on input and output voltages of the converter system, wherein the controller includes: a timer unit including a first timer configured to determine a first duration based on a target switching frequency of the converter system, and a second timer configured to determine a second duration based on a predetermined duration equal to or greater than a minimum duration of the first state of the first switch and the input and output voltages; and a control logic unit, configured to switch the first switch from the second state to the first state upon expiration of both the first and second durations.

Abstract: A method for determining a scheme for converting power in every power conversion control period and converting power according to the determined scheme may comprise the steps of: calculating average power in a transformer inductor at the time of power conversion according to an SPWM scheme in a control period; calculating average power in the transformer inductor at the time of power conversion according to a DPWM scheme in a control period; and converting power according to a scheme by means of which the calculated average power of the transformer inductor is greater. Here, in the step of calculating the average power in the transformer inductor at the time of power conversion according to the DPWM scheme, it is possible to select a DPWM scheme with the maximum duty in a step-up or step-down condition given in the control period.

Abstract: A voltage converter system includes a switch adapted to be coupled to an inductor, and configured to switch between first and second states responsive to a control signal. Calibration circuitry is configured to generate a calibration signal, including setting the calibration signal to a particular value for a particular time responsive to a transient from a first load condition of the voltage converter system to a second load condition of the voltage converter system. Control circuitry is coupled to the calibration circuitry and configured to generate the control signal based on a combination of a feedback voltage, a reference voltage, the calibration signal, and a periodic signal.

Abstract: The semiconductor device comprises a first ring oscillator and a second ring oscillator. An input of the first ring oscillator is an end output of the first ring oscillator and an output of the second ring oscillator and wherein an input of the second ring oscillator is an end output of the second ring oscillator and an output of the first ring oscillator.

Abstract: A signal generation circuit includes: a capacitor charged and discharged by a current proportional to an input voltage; a switch controlling charging and discharging of the capacitor based on an output signal of a comparator that compares a feedback voltage according to an output voltage and a predetermined first reference voltage; a reference voltage generation unit generating a second reference voltage that is generated by adding an offset voltage proportional to the input voltage to an output proportional voltage proportional to the output voltage; and a comparator comparing a terminal voltage of the capacitor and the second reference voltage, and generates an ON-time signal based on an output signal of the comparator.

Abstract: An embodiment electronic device includes a first circuit including first and second transistors series-coupled between a node of application of a power supply voltage and a node of application of a reference voltage, the first and second transistors being coupled to each other by a first node, and a second circuit, configured to compare a first voltage on the first node with first and second voltage thresholds.

Abstract: A control circuit for a power converter comprising switching transistors and an output inductor is disclosed. One terminal of the output inductor serves as an output node, and another terminal of the output inductor serves as a switching node. The control circuit is configured to generate a control signal for controlling switching transistors in the power converter. The control circuit includes: a RC oscillator network connected to two terminals of the output inductor, the RC oscillator network configured to generate an oscillation signal containing a feedback ramp slope compensation component in response to a change in a voltage across the terminals of the output inductor; a comparator; an on-time generation circuit; and a control signal generation circuit to generate the control signal for controlling the switching transistors in the power converter.