Variable Resistor Patents (Class 323/298)
  • Patent number: 11948708
    Abstract: To provide a resistance device which has a small temperature dependence, in which a resistance value is adjustable in a wide range of from a high resistance value to a low resistance value, and which has a small circuit area, and to provide a current detection circuit including the resistance device. The resistance device is to be connected between two terminals, and a resistance value thereof is variable, the resistance device including: a reference resistor; a series variable resistor circuitry including at least one parallel variable resistor circuit which is connected in series to each other, and which each includes a resistor and a trimming element connected in parallel to the resistor; and a parallel variable resistor circuitry including at least one series variable resistor circuit which is connected in parallel to each other, and which each includes a resistor and a trimming element connected in series to the resistor.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: April 2, 2024
    Assignee: ABLIC INC.
    Inventor: Kaoru Sakaguchi
  • Patent number: 11936301
    Abstract: A high-voltage (HV) power supply outputs an output voltage based on a control signal produced by a dual analog/digital feedback loop. The control signal is determined at least in part by an error amplifier that receives a measurement signal, proportionally attenuated from the output voltage, and a digital-to-analog converter (DAC) output signal. An analog-to-digital converter (ADC) also receives the measurement signal and transmits it in digitized form to a digital processor. The digital processor calculates a digital DAC data signal based on the measurement signal, and on a digital set-point input signal corresponding to a set-point voltage value of the output voltage desired to be outputted from the high-voltage source. A DAC receives the DAC data signal and converts it to the DAC output signal transmitted to the error amplifier.
    Type: Grant
    Filed: December 20, 2022
    Date of Patent: March 19, 2024
    Assignee: AGILENT TECHNOLOGIES, INC.
    Inventor: David Deford
  • Patent number: 11880728
    Abstract: This application relates to computing circuitry, and in particular to analogue computing circuitry suitable for neuromorphic computing. An analogue computation unit for processing data is supplied with a first voltage from a voltage regulator which is operable in a sequence of phases to cyclically regulate the first voltage. A controller is configured to control operation of the voltage regulator and/or the analogue computation unit, such that the analogue computation unit processes data during a plurality of compute periods that avoid times at which the voltage regulator undergoes a phase transition which is one of a predefined set of phase transitions between defined phases in said sequence of phases. This avoids performing computation operations during a phase transition of the voltage regulator that could result in a transient or disturbance in the first voltage, which could adversely affect the computing.
    Type: Grant
    Filed: April 5, 2023
    Date of Patent: January 23, 2024
    Assignee: Cirrus Logic Inc.
    Inventor: John Paul Lesso
  • Patent number: 11557974
    Abstract: A high-voltage (HV) power supply outputs an output voltage based on a control signal produced by a dual analog/digital feedback loop. The control signal is determined at least in part by an error amplifier that receives a measurement signal, proportionally attenuated from the output voltage, and a digital-to-analog converter (DAC) output signal. An analog-to-digital converter (ADC) also receives the measurement signal and transmits it in digitized form to a digital processor. The digital processor calculates a digital DAC data signal based on the measurement signal, and on a digital set-point input signal corresponding to a set-point voltage value of the output voltage desired to be outputted from the high-voltage source. A DAC receives the DAC data signal and converts it to the DAC output signal transmitted to the error amplifier.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: January 17, 2023
    Assignee: AGILENT TECHNOLOGIES, INC.
    Inventor: David Deford
  • Patent number: 10223320
    Abstract: The embodiments of the present disclosure identify a target chip from among multiple chips coupled to a shared bus and customize an optimization parameter for the particular chip. Stated differently, in a communication system where only one chip (or a subset of chips) on a shared bus is the intended target, the system can customize an optimization parameter for the specific location of the target chip on the bus. As new data is received that is intended for a different chip—i.e., the target chip changes—the system can dynamically change the parameter based on the location of the new target chip on the bus.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: March 5, 2019
    Assignee: International Business Machines Corporation
    Inventors: Layne A. Berge, Benjamin A. Fox, Wesley D. Martin, George R. Zettles, IV
  • Patent number: 10114788
    Abstract: The embodiments of the present disclosure identify a target chip from among multiple chips coupled to a shared bus and customize an optimization parameter for the particular chip. Stated differently, in a communication system where only one chip (or a subset of chips) on a shared bus is the intended target, the system can customize an optimization parameter for the specific location of the target chip on the bus. As new data is received that is intended for a different chip—i.e., the target chip changes—the system can dynamically change the parameter based on the location of the new target chip on the bus.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: October 30, 2018
    Assignee: International Business Machines Corporation
    Inventors: Layne A. Berge, Benjamin A. Fox, Wesley D. Martin, George R. Zettles
  • Patent number: 9960752
    Abstract: Multiple termination impedance values are provided in a switchable termination circuit so as to accommodate multiple transmission line characteristics. In one example, a termination matching circuit includes first and second nodes, a series interconnection of a first switch and a first impedance coupled between the first and second nodes, and another series interconnection of a second switch and a second impedance coupled between the first and second nodes. First and second control circuits respectively control the first and second switches such that a selectable impedance is provided between the first and second nodes through selective activation of the first and second switch devices by the first and second control circuits. In another example, additional nodes and resistors are provided to provide further termination impedance values.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: May 1, 2018
    Assignee: Linear Technology Corporation
    Inventors: Steven Tanghe, Ciaran J. Brennan
  • Patent number: 9618562
    Abstract: Disclosed herein is an apparatus that includes a first internal-potential generation circuit that generates a first internal potential from a power supply potential and that outputs the first internal potential to a first node, and an internal-potential force circuit that includes a first switch element provided between the first node and a second external terminal. The internal-potential force circuit causes the first switch element to enter into an off-state when the test signal supplied to a third external terminal is activated and a potential level of a first external terminal is a first level, and causes the first switch element to enter into an on-state when the test signal supplied to the third external terminal is activated and the potential level of the first external terminal is a second level different from the first level.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: April 11, 2017
    Assignee: Micron Technology, Inc.
    Inventor: Kiyohiro Furutani
  • Patent number: 9018929
    Abstract: A voltage regulator integrated circuit comprises a control circuit driving at least one power switch to provide a regulated voltage at an output of an inductor/capacitor (LC) circuit coupled to the at least one power switch; an error amplifier having a first input coupled to a feedback signal representative of the regulated output voltage and a second input coupled to a reference signal; and a compensation network coupled to an output of the error amplifier and configured to provide a compensation voltage. The compensation network includes at least one digitally programmable resistor array and at least one digitally programmable capacitor array. Each array provides a plurality of user selectable component values. The control circuit includes a pulse modulator configured to modulate an input voltage based on the compensation voltage.
    Type: Grant
    Filed: March 27, 2013
    Date of Patent: April 28, 2015
    Assignee: Intersil Americas LLC
    Inventor: Robert H. Isham
  • Patent number: 9000737
    Abstract: Provided is a maximum power extraction devices including: a battery; a voltage control unit adjusting a size of a first power outputted from the battery according to a resistor selected from a plurality of resistors, and generating a compare signal according to a size difference between an operating voltage adjusting the size of the first power depending on the selected resistor and a reference voltage; a switching unit connected between the battery and a load and adjusting a size of the operating voltage according to a size difference of the compare signal in response to first and second switching control signals; a switching control unit generating the first and second switching control signals to allow a size between the operating voltage according to the compare signal and the reference voltage to be within an error range; and a maximum power control unit measuring the number of first operations obtained by counting the occurrence number of the first or second switching control signals for a predetermined
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: April 7, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sewan Heo, Yil Suk Yang, Jong-Kee Kwon
  • Publication number: 20150077084
    Abstract: A protection circuit includes a first resistive element configured for coupling to a protected circuit. The first resistive element has a particular resistance value. The protection circuit also includes a voltage regulator coupled to the first resistive element. The particular resistance value is selected to enable a magnitude of a bias current provided to the protected circuit to remain within a first operating current range associated with the protected circuit and to remain below a latchup holding current value associated with the protected circuit.
    Type: Application
    Filed: September 17, 2013
    Publication date: March 19, 2015
    Applicant: The Boeing Company
    Inventors: Kay Chesnut, Robert M. Martinelli, Anthony C. Le, MaryAnne Dooley
  • Patent number: 8890504
    Abstract: A power adapter includes a processing circuit converting mains power to another alternating current (AC) power or a direct current (DC) power, a first output outputting the converted AC or DC power, a sense resistor connected between the processing circuit and the first output for sampling current flowing through the first output and converting the sampled current to a sampled voltage, an amplifying circuit connected to the sense resistor for amplifying the sampled voltage, and a metallic oxide semiconductor field effect transistor (MOSFET). A gate of the MOSFET is connected to the amplifying circuit. A drain of the MOSFET is connected to the first output through a first resistor and grounded through a second resistor. A source of the MOSFET is grounded. A node between the first and second resistors is connected to the processing circuit. The amplifying circuit makes the MOSFET work in a variable resistance region.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: November 18, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Ying-Bin Fu, Yuan-Xi Chen, Ya-Jun Pan
  • Patent number: 8860595
    Abstract: A system for scalable voltage ramp control for power supply systems. A system may comprise at least power supply circuitry, digital-to-analog (D/A) converter circuitry and a controller. The power supply circuitry may be configured to output a voltage to a load based on an input voltage provided by the D/A converter. The controller may be configured to control the D/A converter (e.g., to cause the D/A converter to provide the input voltage to the power supply circuitry) using a large range voltage ramp-up or a small range voltage ramp-up. Utilization of the large range voltage ramp-up or the small range voltage ramp-up by the controller may be based on, for example, a threshold voltage.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: October 14, 2014
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Siqiang Fan, Andrew Kameya, Bin Zhao
  • Patent number: 8766618
    Abstract: A circuit, use, and method for operating a circuit is provided that includes a regulated first voltage source for providing a supply voltage at an output of the first voltage source for a subcircuit, an adjustable second voltage source for providing an output voltage to supply the subcircuit, and an evaluation circuit, which is connected to an output of the second voltage source and to a control input of the second voltage source and to the output of the first voltage source. Wherein the evaluation circuit is formed to adjust the output voltage of the second voltage source by means of a control signal at the control input of the second voltage source with evaluation of the supply voltage at the output of the first voltage source, and wherein the evaluation circuit and/or the second voltage source have a memory for storing values of the adjustment.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: July 1, 2014
    Assignee: Atmel Corporation
    Inventors: Sven Jochmann, Lutz Dathe
  • Patent number: 8767419
    Abstract: A feedback circuit with feedback impedance modulation according to the present invention comprises a compare circuit, a counter and a switching resistor circuit. The compare circuit receives a feedback signal of a power converter to compare the feedback signal with a threshold signal for generating a control signal. The feedback signal is correlated to a load condition of the power converter. The counter is coupled to the compare circuit and generates a modulation signal in response to the control signal. The switching resistor circuit is coupled to the counter and a feedback loop of the power converter for modulating a feedback impedance of the power converter in response to the modulation signal. The feedback impedance is directly modulated from a lower resistance to a higher resistance when the load condition is reduced from a half/full-load to a no/light-load.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: July 1, 2014
    Assignee: System General Corp.
    Inventor: Wei-Hsuan Huang
  • Patent number: 8674675
    Abstract: An electronic device for optimizing the output power of a solar cell, the electronic device having: a variable resistor coupled in series between the solar cell and a load, a control unit that is configured to control the variable resistor, a sensor for measuring an output voltage and a sensor for measuring the output current of the solar cell, wherein the control unit is configured to vary the resistance of the series resistor over time such that the first order derivative of the output voltage over time has a constant value, to monitor the second order derivative of the output current over time simultaneously, to detect whether the second order derivative of the output current over time exceeds a predetermined threshold value and to identify the corresponding values of the output voltage and current as a maximum power point (MPP) of the solar cell.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: March 18, 2014
    Assignee: Texas Instruments Deutschland GmbH
    Inventor: Matthieu Chevrier
  • Publication number: 20140043006
    Abstract: Aspects include power supply systems. An error amplifier can generate an error voltage based on feedback associated with an output voltage to a reference voltage. A PWM generator can generate a PWM signal based on the error voltage. A power stage can generate the output voltage based on the PWM signal. The power stage can include a transconductance amplifier that generates a temperature-compensated sense current associated with a magnitude of an output current. An output voltage tuning circuit sets a desired magnitude of the output voltage based on at least one digital signal to adjust the reference voltage and the feedback voltage. An oscillator system generates a clock signal based on repeatedly charging and discharging a capacitor based on the clock signal and a comparator that compares the capacitor voltage and a second voltage having a magnitude that changes based on the state of the clock signal.
    Type: Application
    Filed: August 13, 2012
    Publication date: February 13, 2014
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: F. DONG TAN, Kwang M. Yi
  • Patent number: 8531168
    Abstract: An electronic device for DC-DC conversion of an input voltage into an output voltage is provided. The electronic device includes a current mode control loop for controlling a sensed current of the DC-DC conversion by comparing a voltage level indicating a magnitude of the sensed current with a reference voltage level indicating the maximum admissible magnitude of the sensed current. The reference voltage level is dynamically adjusted in response to a change of an input voltage level.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: September 10, 2013
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Franz Prexl, Juergen Neuhaeusler
  • Publication number: 20130193944
    Abstract: According to one embodiment, a voltage generator includes a step-up circuit and a limiter circuit. The step-up circuit outputs a first voltage to a first node. The limiter circuit includes first and second resistive elements, first and second capacitive elements, a switch element, and a comparator. The first resistive element is between the first node and a second node. The second resistive element is connected to the second node. The first capacitive element is between the first and second nodes. The switch element connects the second capacitive element to the second node at the same time that the first node is connected to a load. The comparator compares the potential at the second node with a reference potential.
    Type: Application
    Filed: September 5, 2012
    Publication date: August 1, 2013
    Inventor: Yoshinao SUZUKI
  • Patent number: 8493050
    Abstract: A control circuit which switches a power supply circuit includes: a first control circuit to suspend a switching operation based on an output voltage of the switching power supply circuit; and a second control circuit to change a magnitude of a first load coupled to an output of the switching power supply circuit based on a suspension period of the switching operation, wherein the second control circuit changes the magnitude of the first load in a first suspension period based on a second load, which is updated in a second suspension period prior to the first suspension period.
    Type: Grant
    Filed: November 26, 2010
    Date of Patent: July 23, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Toru Miyamae
  • Patent number: 8331117
    Abstract: A multiple power supplies balance system includes a plurality of power supply circuits on a circuit board each having a power output route. Each power supply circuit includes a power supply feedback unit which has a reference level terminal to determine output potential of the power supply circuit. The circuit board also has an output route electrically connected to the power output route to converge current sending to a load. Thus the circuit board contains multiple sets of power supply circuits coupled in parallel. The circuit board also has a proportion distribution circuit to correct output variations of each power supply circuit. The proportion distribution circuit includes a variable impedance element which is electrically connected to the reference level terminals and controllable to proportionally change equivalent impedance connected to each reference level terminal, thus change proportionally output potential of each power supply circuit.
    Type: Grant
    Filed: August 4, 2010
    Date of Patent: December 11, 2012
    Assignee: Zippy Technology Corp.
    Inventors: Tsun-Te Shih, Yu-Yuan Chang, Tien-Wei Chang
  • Publication number: 20120212206
    Abstract: An electronic device for optimizing the output power of a solar cell, the electronic device having: a variable resistor coupled in series between the solar cell and a load, a control unit that is configured to control the variable resistor, a sensor for measuring an output voltage and a sensor for measuring the output current of the solar cell, wherein the control unit is configured to vary the resistance of the series resistor over time such that the first order derivative of the output voltage over time has a constant value, to monitor the second order derivative of the output current over time simultaneously, to detect whether the second order derivative of the output current over time exceeds a predetermined threshold value and to identify the corresponding values of the output voltage and current as a maximum power point (MPP) of the solar cell.
    Type: Application
    Filed: January 30, 2012
    Publication date: August 23, 2012
    Applicant: Texas Instruments Deutschland GmbH
    Inventor: Matthieu Chevrier
  • Publication number: 20110316512
    Abstract: Embodiments are provided that include a memory die, memory devices, and methods, such as those comprising a voltage generator, including an output voltage and an adjustment circuit configured to cause adjustment of the output voltage based on a latch signal. Further one such method includes applying an input voltage to an input of a voltage generator, adjusting the input voltage to an adjusted voltage, comparing the adjusted voltage to a reference voltage, generating trim data based on the comparison and storing the trim data.
    Type: Application
    Filed: September 2, 2011
    Publication date: December 29, 2011
    Applicant: Micron Technology, Inc.
    Inventor: Toru Tanzawa
  • Patent number: 8076911
    Abstract: A voltage regulator includes a voltage regulator unit configured to output a step voltage and a damping resistance switching unit coupled between a load and an output node of the voltage regulator and configured to select an optimal damping resistance value based on a required load capacity.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: December 13, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Takuya Ariki
  • Patent number: 8020012
    Abstract: A power auto-detection apparatus is applied to a power supply of a personal computer or applied to an adapter of a notebook computer. The power auto-detection apparatus has a voltage stabilizing unit, an over-current protective unit, a voltage regulating unit, a signal processing unit, and a regulating resistor. The over-current protective unit provides an over-current protection for the power auto-detection apparatus. The voltage regulating unit electrically connects to a non-ground terminal of the regulating resistor and outputs a first regulating voltage and a second regulating voltage. The signal processing unit electrically connects the voltage regulating unit and receives the second regulating voltage to output a power detection signal to the computer system to automatically detect the output power of the power supply or the adapter.
    Type: Grant
    Filed: January 20, 2009
    Date of Patent: September 13, 2011
    Assignee: Chicony Power Technology Co., Ltd.
    Inventors: Fu-Sung Chen, Ming-Ho Huang
  • Publication number: 20110169473
    Abstract: A mix mode wide range divider is provided for dividing a first signal by a second signal to generate an output signal. A third signal is generated depending on the resistance of a first adjustable resistor, and a fourth signal is generated according to the third signal and a target value determined by the second signal, to adjust the resistance of the first adjustable resistor and the resistance of a second adjustable resistor. The resistance of the first adjustable resistor is so adjusted to make the third signal equal to the target value, and the resistance of the second adjustable resistor is so adjusted to maintain a ratio of the resistance of the second adjustable resistor to the resistance of the first adjustable resistor. The output signal is generated depending on the first signal and the resistance of the second adjustable resistor.
    Type: Application
    Filed: January 6, 2011
    Publication date: July 14, 2011
    Applicant: RICHTEK TECHNOLOGY CORP.
    Inventors: YUEH-MING CHEN, ISAAC Y. CHEN, SHAO-HUNG LU
  • Publication number: 20100164463
    Abstract: A voltage generator with current limiting generates a voltage to be fed to a load of which load current is limited. The voltage generator includes an operational amplifier; an output resistance connected between an output terminal of the operational amplifier and a load connecting terminal; a feedback resistor connected between the load connecting terminal and an inverting input terminal of the operational amplifier; a first clamper connected between the output terminal of the operational amplifier and the inverting input terminal of the operational amplifier; and a second clamper connected between the load connecting terminal and a non-inverting input terminal of the operational amplifier and configured with diodes. The first clamper generates a predetermined constant voltage, limits a current flowing into the output resistance, and varies the generated constant voltage. The first clamper has a predetermined abrupt current-voltage characteristic.
    Type: Application
    Filed: January 26, 2007
    Publication date: July 1, 2010
    Applicant: ADVANTEST CORPORATION
    Inventor: Shoji Kojima
  • Publication number: 20100127686
    Abstract: A power auto-detection apparatus is applied to a power supply of a personal computer or applied to an adapter of a notebook computer. The power auto-detection apparatus has a voltage stabilizing unit, an over-current protective unit, a voltage regulating unit, a signal processing unit, and a regulating resistor. The over-current protective unit provides an over-current protection for the power auto-detection apparatus. The voltage regulating unit electrically connects to a non-ground terminal of the regulating resistor and outputs a first regulating voltage and a second regulating voltage. The signal processing unit electrically connects the voltage regulating unit and receives the second regulating voltage to output a power detection signal to the computer system to automatically detect the output power of the power supply or the adapter.
    Type: Application
    Filed: January 20, 2009
    Publication date: May 27, 2010
    Inventors: Fu-Sung CHEN, Ming-Ho Huang
  • Publication number: 20100026269
    Abstract: An output voltage compensation device has a Bark converter, a current detection resistance, a sense resistance, a voltage feedback circuit and a Pulse Width Modulation (PWM) controller. The current detection resistance is series connected with an output end of the Bark converter. Voltage at a front end of the current detection resistance is detected by the sense resistance, and compares with actual output voltage. Based on the compared result, the PWM controller adjusts work cycle of the Bark converter for voltage compensation.
    Type: Application
    Filed: July 30, 2008
    Publication date: February 4, 2010
    Inventor: Jack Zhiang
  • Publication number: 20090218885
    Abstract: The present invention discloses a slope control device capable of predicting uniform-current-sharing level and method thereof which can be applied in a redundancy or distributed power system for providing better uniform-current-sharing ability. The device comprises a high linearity transconductor circuit, a slope adjusting circuit and an incremental output voltage circuit. The invention applies either a transductor parameter or a feedback resistor to increase the droop gain and therefore the current deviation between two power supply modules is reduced. The invention further raises the output voltage step by step to ensure that the output voltage meet the requirement of allowable minimum output voltage according to increment of load current.
    Type: Application
    Filed: February 28, 2008
    Publication date: September 3, 2009
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Hsin-Hsin Ho, Ke-Horng Chen, Chun-Yu Hsieh
  • Patent number: 7535124
    Abstract: The voltage stabilizer for stabilizing a voltage of a circuit includes a first resistor, a second resistor, a voltage controller, and a current supply unit. The voltage controller keeps a voltage of the first resistor constant. The current supply unit supplies a first current to between the first resistor and the second resistor when a second current in the circuit becomes equal to or larger than a predetermined value.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: May 19, 2009
    Assignee: Fujitsu Limited
    Inventor: Takahiro Miyazaki
  • Patent number: 7471047
    Abstract: At a primary power-supply board 40, a Vsus power supply and a Vadd power supply of prescribed voltages are derived and outputted to a plasma display panel 11. Secondary power supplies Vsub1, Vsub2, and Vsub3 are derived from prescribed voltage levels of a transformer 42 for deriving Vsus and Vadd power supplies at the primary power-supply board 40. The secondary power supplies Vsub1, Vsub2, and Vsub3 are outputted to a secondary power-supply board 20 which is a board different from the primary power-supply board 40. Vset, Ve, and Vscan power supplies which can be used by the plasma display panel 11 are derived by regulating the secondary power supplies Vsub1, Vsub2, and Vsub3. Thus, since the primary power-supply board 40 and the secondary power-supply board 20 are provided separately, the secondary power-supply board 20 alone can be replaced to cope with the changes of the plasma display panel 11.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: December 30, 2008
    Assignee: Funai Electric Co., Ltd.
    Inventor: Takahiro Ogawa
  • Publication number: 20080297129
    Abstract: The voltage at a spurious frequency is decreased while maintaining as much as possible the voltage at a resonance frequency of a piezoelectric transformer, thus controlling a wide voltage range with a comparatively low cost configuration. A high-voltage power supply apparatus includes a piezoelectric transformer that outputs a highest voltage at a predetermined resonance frequency, and a generating unit that generates a signal that oscillates at a drive frequency that drives the piezoelectric transformer, throughout a frequency range that includes the resonance frequency. Furthermore, the high-voltage power supply apparatus includes an output terminal connected to the piezoelectric transformer, and a constant-voltage element inserted in a path that couples the piezoelectric transformer and the output terminal.
    Type: Application
    Filed: May 28, 2008
    Publication date: December 4, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Osamu Nagasaki, Hiroshi Mano
  • Patent number: 7411375
    Abstract: An apparatus for issuance of at least one electrical output signal (Iout), wherein the desired electrical current level of the output signal (Iout) is predeterminable, including: at least one measuring resistor, at which the electrical current level of the output signal (Iout) is measurable; at least one adjuster, via which the electrical current level of the output signal (Iout) is settable; and at least one controller, which compares the electrical current level of the output signal (Iout) measured at the measuring resistor with the electrical current level desired for the output signal (Iout), and which controls the electrical current level of the output signal (Iout) via the adjuster; wherein the controller and the measuring resistor are connected with an electric base-potential (VGND); and wherein the base-potential (VGND) is a reference potential for the controller.
    Type: Grant
    Filed: April 20, 2006
    Date of Patent: August 12, 2008
    Assignee: Endress + Hauser Wetzer GmbH + Co. KG
    Inventors: Stephan Konrad, Thomas Haerle, Christian Schneid
  • Publication number: 20080174293
    Abstract: A control circuit is provided to generate a mode signal at light load of the power converter. The mode signal is coupled to disable the switching signal for saving power. The impedance of an input circuit is increased in response to the mode signal. Furthermore, a soft start circuit is initiated by the mode signal when switching signal is enabled. An external capacitor associates with the impedance of the input circuit determine the off period of the switching signal.
    Type: Application
    Filed: January 23, 2007
    Publication date: July 24, 2008
    Applicant: SYSTEM GENERAL CORP.
    Inventor: Ta-yung Yang
  • Publication number: 20080150509
    Abstract: The present invention discloses a voltage adjusting system and method for adjusting a driving voltage of a thermal print head by utilizing an electronic variable resistor. The voltage adjusting system includes a power converter, a voltage divider, an analog-to-digital converter (ADC), and a controller. The system and method of the present invention obtains a detecting voltage value through a feedback mechanism and the ADC, and then utilizes the detecting voltage value to control the electronic variable resistor implemented in the voltage divider to adjust the driving voltage of the thermal print head.
    Type: Application
    Filed: April 25, 2007
    Publication date: June 26, 2008
    Inventors: Kai-Hsiang Liu, Chia-Fu Chen
  • Publication number: 20080136396
    Abstract: A voltage regulator is operated by determining if the voltage output by the voltage regulator is within a desired operating region and adjusting a feedback resistance associated with the voltage regulator when the voltage output by the voltage regulator is outside the desired operating region.
    Type: Application
    Filed: December 6, 2006
    Publication date: June 12, 2008
    Inventor: Benjamin Heilmann
  • Patent number: 7269239
    Abstract: A two-wire communication protocol between a controller device and a controlled device, wherein both devices are coupled by a clock line and a data line. The controller device sends control signals comprising N bits, N being greater than or equal to two, to the controlled device via the data line. Each bit of said control signals is latched onto the controlled device on consecutive edges of a clock signal sent by the controller device to the controlled device on the clock line.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: September 11, 2007
    Assignee: EM Microelectronic-Marin SA
    Inventors: Daniel A Staver, Bruce Carl Wall, Tue Tran
  • Patent number: 7196570
    Abstract: Fuse circuit designs and the use thereof are disclosed. In one example, a fuse circuit providing predictable total resistances for multiple rounds of programming comprises a predetermined number of fuse stages coupled in series. Each stage comprises a first and a second connecting nodes, a fuse connected between the first and second connecting nodes, a first resistor with its first end connected to the first connecting node, and a second resistor with its first end connected to the second connecting node, wherein the first and second resistors connect to a third and a fourth connecting nodes, which are the first and second connecting nodes of a next fuse stage respectively, through their second ends.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: March 27, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Shine Chien Chung
  • Patent number: 7005837
    Abstract: A digital potentiometer is disclosed that includes first, second, and third signal terminals. A chain of series-connected impedance elements with multiple tap points is connected between the first and second signal terminals. A plurality of first switching devices are each connected to a respective one of the multiple tap points and to an internal wiper node. A configurable output stage is connected between the internal wiper node and the third signal terminal. The configurable output stage includes a buffer and a second switching device. The second switching device is operable to bypass the buffer. A switching circuit controls switching of the first switching devices. The switching circuit includes a Gray-code counter, a Gray-code decoder, and a make-before-break circuit that controls the timing of the switching of the wiper switches.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: February 28, 2006
    Assignee: Catalyst Semiconductor, Inc.
    Inventors: Cornel D. Stanescu, Adrian M. Tache, Horia Profeta, Radu H. Iacob, Adam P. Cosmin
  • Patent number: 6922046
    Abstract: An impedance network. The network includes a plurality of impedance elements, at least one end terminal, and a wiper terminal. The network also includes a first plurality of switching elements selectively providing tap positions to the at least one end terminal, selectable at a first specified increment of impedance elements in the plurality of impedance elements. The network further includes a second plurality of switching elements selectively providing a tap positions to the wiper terminal, selectable at a second specified increment of impedance elements in the plurality of impedance elements.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: July 26, 2005
    Assignee: Winbond Electronics Corporation
    Inventors: Chun-Mai Liu, Hagop A. Nazarian
  • Patent number: 6882136
    Abstract: An impedance network, which includes at least one end terminal, a wiper terminal, a center impedance element, and a first plurality of impedance elements. The wiper terminal provides a tap position at a selected impedance value of the impedance network, selectable at a specified increment value. The first plurality of impedance elements is configured to reduce resistance variation during switching from one tap position to another tap position. The first plurality of impedance element is connected in series in a mirrored configuration about the center impedance element.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: April 19, 2005
    Assignee: Winbond Electronics Corporation
    Inventors: Hagop A. Nazarian, William Tang, Zhan Duan, Chao-Ming Tsai, Lawrence D. Engh
  • Patent number: 6788042
    Abstract: An impedance network, which includes at least one end terminal, a wiper terminal, a center impedance element, and a first plurality of impedance elements. The wiper terminal provides a tap position at a selected impedance value of the impedance network, selectable at a specified increment value. The first plurality of impedance elements is configured to reduce resistance variation during switching from one tap position to another tap position. The first plurality of impedance elements is connected in series in a mirrored configuration about the center impedance element.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: September 7, 2004
    Assignee: Winbond Electronics Corporation
    Inventors: Hagop A. Nazarian, William Tang, Zhan Duan, Chao-Ming Tsai, Lawrence D. Engh
  • Patent number: 6771053
    Abstract: A digital potentiometer, configurable and programmable using nonvolatile memory is disclosed. A unity-gain configured, rail-to-rail operational amplifier, used as voltage follower of buffer, can be inserted, by programming, between an internal wiper terminal and an output terminal of the digital potentiometer. This way, in certain applications, it is possible to take advantage of the low output resistance given by an analog buffer. The operational amplifier can be shutdown and bypassed by a switching device to provide a circuit behavior similar to a digital potentiometer without an output buffer. Using a dual-writing circuitry, first the complemented data, then the data itself, are written in the nonvolatile memory, improving the reliability. A Gray-code counter having a single bit changed at one time and no decode glitch is present. A make-before-break circuitry gives a short overlap conduction time for any adjacent pair of switches; one being turned-off while the other is turned-on.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: August 3, 2004
    Assignee: Catalyst Semiconductor, Inc.
    Inventors: Cornel D. Stanescu, Adrian M. Tache, Horia Profeta, Radu H. Iacob, Adam P. Cosmin
  • Publication number: 20040108844
    Abstract: A digital potentiometer is disclosed that includes first, second, and third signal terminals. A chain of series-connected impedance elements with multiple tap points is connected between the first and second signal terminals. A plurality of first switching devices are each connected to a respective one of the multiple tap points and to an internal wiper node. A configurable output stage is connected between the internal wiper node and the third signal terminal. The configurable output stage includes a buffer and a second switching device. The second switching device is operable to bypass the buffer. A switching circuit controls switching of the first switching devices. The switching circuit includes a Gray-code counter, a Gray-code decoder, and a make-before-break circuit that controls the timing of the switching of the wiper switches.
    Type: Application
    Filed: November 26, 2003
    Publication date: June 10, 2004
    Inventors: Cornel D. Stanescu, Adrian M. Tache, Horia Profeta, Radu H. Iacob, Adam P. Cosmin
  • Patent number: 6744244
    Abstract: An impedance network. The network includes a plurality of impedance elements, at least one end terminal, and a wiper terminal. The network also includes a first plurality of switching elements selectively providing tap positions to the at least one end terminal, selectable at a first specified increment of impedance elements in the plurality of impedance elements. The network further includes a second plurality of switching elements selectively providing a tap positions to the wiper terminal, selectable at a second specified increment of impedance elements in the plurality of impedance elements.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: June 1, 2004
    Assignee: Winbond Electronics Corporation
    Inventors: Chun-Mai Liu, Hagop A. Nazarian
  • Publication number: 20030197430
    Abstract: A method and apparatus for reducing an impedance of a power supply path of an integrated circuit is provided. The power supply path includes a first power supply line and a second power supply line to provide power to the integrated circuit. At least one resistive element connected between the first power supply line and the second power supply line is adjusted to reduce the impedance of the power supply path.
    Type: Application
    Filed: April 9, 2002
    Publication date: October 23, 2003
    Inventors: Claude Gauthier, Brian Amick
  • Patent number: 6600297
    Abstract: A power supply unit having a series regulator that changes an input DC voltage input from a DC power supply into a stabilized output DC voltage lower than the input DC voltage, includes: a power consuming unit, provided on a direct current path between the DC power supply and the series regulator, including a parallel circuit formed by a first fixed resistor and a semiconductor device; and a current setting unit operable to set the amount of a current flowing between a current input and a current output of the semiconductor device, wherein the current input of the semiconductor device is arranged on the DC power supply side thereof, the current output of the semiconductor device is arranged on the series regulator side thereof, and a setting input of the semiconductor device is connected to a setting output of the current setting unit.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: July 29, 2003
    Assignee: Koito Manufacturing Co., Ltd.
    Inventors: Hitoshi Takeda, Tomokazu Suzuki, Masayasu Ito
  • Patent number: 6555996
    Abstract: Disclosed are solid-state potentiometers having high resolution and high accuracy. An exemplary potentiometer comprises a first main terminal, a second main terminal, a wiper terminal, and a resistor stack comprising a plurality M of resistors coupled in series to one another at a plurality of M−1 internal nodes. Each of the resistors in the stack has substantially the same value of RS ohms. The potentiometer further comprises a first variable resistance network coupled between one end of the resistor stack and the potentiometer's first main terminal, and a second variable resistance network coupled between the other end of the resistor stack and the potentiometer's second main terminal. The first variable resistance network has a variable resistance value R1 which varies between zero ohms and RP ohms. The second variable resistance network has a variable resistance value R2 which is maintained substantially at value of (RP−R1).
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: April 29, 2003
    Assignee: Xicor, Inc.
    Inventors: Joseph Drori, Allan Ming-Lun Lin
  • Patent number: 6552519
    Abstract: A variable impedance network for the use in building potentiometers and digital-to-analog converters (DAC) is disclosed. The impedance network is constructed such that it reduces the overhead circuits associated with it compared to conventional approach. The percent reduction of overhead circuitry including the wiper transistors increases exponentially as the number of the taps required for the potentiometer increases.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: April 22, 2003
    Assignee: Winbond Electronics Corporation
    Inventor: Hagop A. Nazarian