Abstract: Described embodiments include a circuit for controlling a voltage drop. The circuit includes a resistor coupled between an output voltage terminal and a reference voltage terminal. First, second and third switches each have respective first, second and third switch terminals. The respective second switch terminals are connected together and are coupled to the output voltage terminal. The respective third switch terminals are connected together and are coupled to the reference voltage terminal. A first transistor is coupled between a supply voltage terminal and the first switch. A second transistor is coupled between the supply voltage terminal and the second switch. A third transistor is coupled between the supply voltage terminal and the third switch. Control terminals of the first, second and third transistors are coupled to a gate control terminal.

Abstract: A control circuit, a power supply including a control circuit, and a method are disclosed. The control circuit is configured to activate a second output capacitor connected in parallel with a first output capacitor of a power supply when the power supply is in a normal operating mode, and deactivate the second output capacitor when the power supply is in a standby mode.

Abstract: A galvanic isolator circuit and method provide for galvanically isolating and current limiting a power source from a load. A direct current (DC) input voltage (“vin”) and an input current (“iin”) are received. A full- or half-bridge rectifier is switched to synthesize a first alternating voltage waveform that magnetically couples through a transformer to induce a second alternating voltage waveform with galvanic isolation from the first alternating voltage waveform, preventing potentially-faulted load from a source. The second alternating voltage waveform is rectified to produce a direct current (DC) output voltage (“vo”) having output current (“io”) through more than one drive transistor or diode. The more than one primary-side drive transistor is current limited to reduce or prevent brown-out, black-out, or protective race conditions in the non-faulted portions of DC power generation systems and DC distribution electrical power systems.

Abstract: A controller for a switching regulator receiving an input voltage and generating a regulated output voltage includes a buck control circuit and a boost control circuit. The controller activates the buck control circuit to generate the regulated output voltage having a first voltage value less than the input voltage. The controller activates the boost control circuit to return charges stored on the output capacitor at the output node to the input node, thereby driving the regulated output voltage to a second voltage value lower than the first voltage value. In some embodiments, in response to a command instructing the controller to allow the output voltage to decay, the controller operates in the boost mode using the boost control circuit to recycle the stored charge at the output node while ramping down the output voltage.

Abstract: In some examples, a circuit includes a state machine. The state machine is configured to operate in a first state in which the state machine gates a pulse width modulation (PWM) signal provided for control of a power converter according to a first signal provided by a voltage control loop. The state machine is configured to operate in a second state in which the state machine gates the PWM signal according to a second signal provided by a current limit comparator. The state machine is configured to transition from the first state to the second state responsive to the second signal being asserted after the first signal is asserted in a switching cycle of the power converter. The state machine is configured to transition from the current state to the first state responsive to the first signal being asserted after the second signal in a switching cycle of the power converter.

Abstract: Aspects of the invention relate to a high-power switching module for the direct pulse energy feeding of a consumer with a plurality of switching stages connected in series. A coupling element and an energy buffer store are provided, the coupling element coupling a primary circuit comprising a balancing capacitance and a semiconductor switch to a secondary circuit comprising the energy buffer store, the coupling element being provided and embodied for obtaining energy of the balancing capacitance and delivering this energy to the energy buffer store during the on phase of the semiconductor switch, and the energy buffer store being provided and embodied for delivering the obtained energy to an energy store of the driver assembly when the semiconductor switch is in the switched-off state.

Abstract: A switching converter circuit includes a voltage regulation loop configured to provide an output voltage (VOUT) based on an input voltage (VIN). The switching converter circuit also includes a 100% mode circuitry coupled to the voltage regulation loop, wherein the 100% mode circuitry is configured to apply an offset to VOUT in response to detecting that VIN is approaching VOUT.

Abstract: A standby circuit includes a power regulator configured to operate in an ON state and an OFF state; a power detecting circuit configured to detect power of a load; an integrated circuit module including two interfaces, each of the two interfaces configured to receive an ON operating command or an OFF operating command from a remote control device; and a proximity detection circuit configured to determine a proximity of each of the two interfaces to the remote control device.

Abstract: A voltage regulation circuit includes a node, a voltage regulator, a plurality of load units and a voltage feedback circuit. The node has a node voltage. The voltage regulator is electrically connected to the node. The load units are electrically connected to the voltage regulator via the node. The load units are driven by the node voltage and have at least one load state. The voltage feedback circuit is electrically connected between the voltage regulator and the node. The voltage feedback circuit includes a switch and receives the node voltage and a control signal. The control signal includes the at least one load state. The voltage feedback circuit controls the switch according to the at least one load state of the control signal to output a feedback voltage. The voltage regulator adjusts the node voltage according to the feedback voltage.

Abstract: Apparatus and methods for envelope tracking systems with automatic mode selection are provided herein. In certain configurations, a power amplifier system includes a power amplifier configured to provide amplification to a radio frequency signal and to receive power from a power amplifier supply voltage, and an envelope tracker including a signal bandwidth detection circuit configured to generate a detected bandwidth signal based on processing an envelope signal corresponding to an envelope of the radio frequency signal. The envelope tracker further includes a switch bank configured to receive a plurality of regulated voltages, a filter configured to filter an output of the switch bank to generate the power amplifier supply voltage, and a mode control circuit configured to control a filtering characteristic of the filter based on the detected bandwidth signal.

Abstract: A power supply architecture combines the benefits of a traditional single stage power delivery, when there are no additional power losses in the integrated VR with low VID and low CPU losses of FIVR (fully integrated voltage regulator) and D-LVR (digital linear voltage regulator). The D-LVR is not in series with the main power flow, but in parallel. By placing the digital-LVR in parallel to a primary VR (e.g., motherboard VR), the CPU VID is lowered and the processor core power consumption is lowered. The power supply architecture reduces the guard band for input power supply level, thereby reducing the overall power consumption because the motherboard VR specifications can be relaxed, saving cost and power. The power supply architecture drastically increases the CPU performance at a small extra cost for the silicon and low complexity of tuning.

Abstract: A controller for a power converter includes: a first sense terminal and a second sense terminal for sensing an output voltage of the power converter; a bridging circuit configured to electrically couple the first sense terminal to the second sense terminal in a first state and electrically decouple the first sense terminal from the second sense terminal in a second state; and control circuitry configured to set the bridging circuit in the first state during a portion of a voltage ramp of the power converter, and to determine whether an open or short fault condition is present at either the first sense terminal or the second sense terminal based on a voltage across the bridging circuit in the first state.

Abstract: There is provided a power conditioning circuit including positive and negative power input nodes. An inductor includes a first terminal connected to a positive power input node and a second terminal connected to a positive power output node, the inductor allowing the voltage at the positive power output node to be modulated by data that is sent through a communication interface. A first node is present between the second terminal of the inductor and the positive power output node, and a clamping circuit is connected at the first node to a second node. The clamping circuit is configured to clamp a voltage increase across the inductor to less than a maximum increase. The second node is configured to be continuously held at a voltage higher than the voltage of the first terminal of the inductor.

Abstract: A driving method and a driving device using the same are disclosed. The driving method controls a pulse transformer. The secondary winding of the pulse transformer is electrically connected to a control device. Firstly, positive charging electrical energy is delivered to the primary winding, thereby charging the control device. Then, the control device is disconnected from the secondary winding while the primary winding is in a high-impedance state. Finally, negative discharging electrical energy is delivered to the primary winding and the control device is electrically connected to the secondary winding, thereby discharging the control device, and the primary winding is in a low-impedance state after the step of delivering the negative discharging electrical energy to the primary winding.

Abstract: A soft-start control circuit is provided. The soft-start control circuit includes a load switch, a driving unit and a filtering unit. The first terminal of the load switch is configured to receive an input voltage. The control terminal of the load switch is configured to receive a switching signal and perform switching between on and off according to the switching signal, thereby performing a soft-start operation. The second terminal of the load switch is configured to provide a switched voltage. The driving unit is configured to provide a switching signal according to a control signal and release a parasitic charge stored in the load switch when the load switch is turned off. The filtering unit is configured to convert the switched voltage into an output voltage.

Abstract: A solid-state switch, comprising at least one switch controller. At least one switch having a first terminal coupled to a power source, a second terminal coupled to the power source and a control terminal coupled to the switch controller and configured to selectively conduct and block current flow from the first terminal to the second terminal. At least one power converter coupled to the first terminal and the second terminal and configured to convert power from the power source from a first voltage level to a second voltage level and to provide power at the second voltage level to the switch controller.

Abstract: A DC-DC converter includes clock generation circuitry generating first and second clock signals that are out of phase, and a control signal generator generating a switching control signal at an edge of the second clock signal based upon a comparison of an error voltage to a summed voltage. Boost circuitry charges an energy storage component during an on-phase and discharges the energy storage component during an off-phase to thereby generate an output voltage. The on-phase and off-phase are set as a function of the switching control signal. Sum voltage generation circuitry generates a ramp voltage in response to an edge of the first clock signal and generates the summed voltage at an edge of the second clock signal. The sum voltage represents a sum of the ramp voltage and a voltage representative of the current flowing in the energy storage component during the on-phase.

Abstract: A voltage supply system for supplying an electric consumer with an electric target voltage and an electric target energy, with a plurality of automotive traction battery modules. Each automotive traction battery module has an electric actual voltage and an electric actual energy. The automotive traction battery modules are interconnected dependent on the electric target voltage, the electric actual voltage, the electric target energy, and the electric actual energy in series connections and/or in a parallel connection to form at least one traction battery module group.

Abstract: An information handling system may include a processor, an information handling resource communicatively coupled to the processor, and an electrical margining module communicatively coupled to the processor. The electrical margining module may be configured to, during a boot of the information handling system, determine whether a condition has occurred for electrically re-margining the information handling resource, and responsive to determining that the condition has occurred, determine a new receiver equalization setting for receiving signals from the information handling resource and determine a new driver pre-emphasis setting for transmitting signals to the information handling resource.

Abstract: A tank circuit structure includes a first gate layer, a first substrate, a first shielding layer, a first conductive line and a first inter metal dielectric (IMD) layer. The first substrate is over the first gate layer. The first shielding layer is over the first substrate. The first conductive line is over the first shielding layer. The first IMD layer is between the first substrate and the first conductive line.

Abstract: An inductor and a shunt switch circuit are connected in parallel between an input node and an intermediate node. A first power transistor is connected between the intermediate node and a ground node. A second power transistor is connected between the intermediate node and an output node. The first and second power transistors are driven in response to a pulse width modulation (PWM) drive cycle having an on-time and an off-time. The input node receives a DC input voltage and a DC output voltage is generated at the output node. A control circuit senses the input and output nodes and determines whether the DC input voltage is within a threshold voltage of the DC output voltage. In response to that determination, the shunt switch circuit is turned on only during the off-time of the PWM drive cycle.

Abstract: A multiphase converter system includes a multiphase converter in which a plurality of converters are connected in parallel; a cooler in which a cooling medium flows so as to cool the multiphase converter; a temperature sensor configured to measure a temperature of the cooling medium; and a controller. The controller is configured to drive the converter for n phase or the converters for n phases when a target output of the multiphase converter is lower than a prescribed output threshold and the temperature of the cooling medium falls within a prescribed temperature range, and to drive the converters for m phases when the target output is lower than the prescribed output threshold and the temperature of the cooling medium is lower than the prescribed temperature range, m being larger than n.

Abstract: A circuit for operating a transistor device that acts as a switch is presented. The circuit includes the transistor device and a control circuit coupled to a gate of the transistor device. The control circuit is adapted to selectively apply at least a first voltage level, a second voltage level, and a third voltage level to the gate of the transistor device, wherein the first, second, and third voltage levels are distinct voltage levels. The disclosure further relates to a method of operating a transistor device that acts as a switch. The proposed circuit provides additional gate voltages, by contrast to conventional two-level gate drivers. By appropriate choice of the additional gate voltages, reverse mode conductance losses of the transistor device can be reduced and/or to the Safe Operating Area (SOA) of the transistor device can be improved.

Abstract: A single-phase four-level inverter circuit topology and a three-phase four-level inverter circuit topology. The single-phase four-level inverter circuit topology is adapted to be used with two series-connected direct current power sources, so as to enable a first direct current power source or a second direct current power source to supply power to a load of the four-level inverter circuit topology, alternatively, any one of two direct current power sources is first algebraically superimposed with a flying capacitor and then supplies the power to the load of the four-level inverter circuit topology (M), thereby making the four-level inverter circuit topology output four different levels.

Abstract: An electronic device has a first terminal for receiving power from a connected external device, a second terminal for obtaining information of the external device, and a GND terminal connected to the second terminal. The electronic device causes a resistance between the second terminal and the GND terminal to change, and determines a type of the external device based on a voltage of the first terminal after the resistance is caused to change.

Abstract: An arrangement includes at least one series circuit having at least two series-connected submodules and an inductor. At least one of the submodules in one or a plurality of the series circuits has a step-up/step-down converter and a storage module. A protective module with at least one actuator is electrically connected between the step-up/step-down converter and the storage module. A method for operating the arrangement is also provided.

Abstract: A solid-state switch, comprising at least one switch controller. At least one switch having a first terminal coupled to a power source, a second terminal coupled to the power source and a control terminal coupled to the switch controller and configured to selectively conduct and block current flow from the first terminal to the second terminal. At least one power converter coupled to the first terminal and the second terminal and configured to convert power from the power source from a first voltage level to a second voltage level and to provide power at the second voltage level to the switch controller.

Abstract: An electrical source control apparatus has a selecting device for selecting one switching element from at least two switching elements each of which constitutes predetermined arm element whose switching state should be changed to perform the electrical power conversion, when the electrical power converter performs the electrical power conversion with either one of the first and the second electricity storage apparatuses; and a controlling device for controlling the electrical power converter to change a switching state of the selected one switching element while keeping a switching state of another one switching element in an ON state, the selecting device newly selects the one switching element to reduce a difference between temperatures of the at least two switching elements each of which constitutes predetermined arm element.

Abstract: In electrical systems with DC-DC converters having synchronous rectification (SR) on the output stage, the input voltage can be monitored. When a potentially destructive transient occurs, the SR is rapidly turned on in a non-synchronous manner to “crowbar” the main power transformer. The resulting short circuit is reflected back to the DC input under current-limited pulse width modulation (PWM) control. In effect, the entire surge rating of the power train is applied to the potentially destructive input transient. The clamping capacity can be controlled accurately and is significantly more than what is available in prior art components and systems. When the input voltage is pulled down to safe levels, the clamp circuit disengages and the DC-DC converter returns to normal operation. DC output voltage regulation to the connected load is not maintained during this clamping event, but maintaining output voltage regulation during such destructive transients is not required.

Abstract: An AC switch circuit coupled between an AC input signal and an AC load has a first switch, a second switch, a driving circuit, and a power generation circuit. The first switch blocks a first half-cycle of the AC input signal when turned OFF, and the second switch blocks a second half-cycle of the AC input signal when turned OFF. The driving circuit provides a driving signal to control the first switch and the second switch based on an enable signal. The power generation circuit provides a voltage signal to power the driving circuit. The power generation circuit stores energy from the AC input signal when the first switch and the second switch are turned OFF, and the power generation circuit is disconnected from the AC input signal when the first switch and the second switch are turned ON.

Abstract: In one embodiment an Inductive buck-boost-converter has an input (In) to which an input voltage (Vin) is supplied, an output (Out) at which an output voltage (Vout) is provided as a function of the input voltage (Vin), an inductor (L) having a first and a second terminal (Lx1, Lx2), a first switch (A) which switchably connects the inductor's (L) first terminal (Lx1) to the input (In), a second switch (B) which switchably connects the inductor's (L) first terminal (Lx1) to a ground potential terminal (10), a third switch (C) which switchably connects the inductor's (L) second terminal (Lx2) to the ground potential terminal (10), a fourth switch (D) which switchably connects the inductor's (L) second terminal (Lx2) to the output (Out), and a control unit (CTL) coupled to respective control inputs of first, second, third and fourth switches (A, B, C, D). Therein the converter is operated in three phases (1, 2, 3) by the control unit (CTL).

Abstract: A five-level converting device includes a first switch module, a second switch module and a third switch modules each connects to a neutral point, a positive terminal and a negative terminal of a bus capacitor module. A first switch module includes a plurality of bidirectional switching circuits cascaded to each other, and each bidirectional switching circuit includes two first switching units reversely connected in series. Second switch module includes a plurality of second switching units connected in series. Third switch module includes a plurality of third switching units connected in series. A first flying capacitor unit is connected across the first switching module and a second switch module, and a second flying capacitor unit is connected across the first switching module and a third switching module. The first flying capacitor unit and the second flying capacitor unit are connected to different connection points between the first switch units respectively.

Abstract: A power supply includes an inputter including an input capacitor and configured to receive an input DC voltage, a converter including an output capacitor and configured to convert the input DC voltage and to output the converted DC voltage, and a controller configured to control the converter to output a voltage corresponding to a reference voltage.

Abstract: Disclosed herein are sinusoidal modulation control methods and circuits for PMSM. In one embodiment, a method can include: detecting rotor position information of the PMSM to obtain a rotor position signal and a rotor rotating speed measured value; comparing the rotating speed measured value against a reference rotating speed value to generate an error signal, and generating a first regulating voltage signal based on the error signal using a PI regulator; receiving the rotor position signal and the first regulating voltage signal, and generating a full-wave U-shaped modulation wave by using the rotor position signal as a time reference; generating a second U-shaped modulation wave by multiplying the full-wave U-shaped modulation wave with the first regulating voltage signal; comparing the second U-shaped modulation wave against a triangular wave to generate a PWM control signal that controls a switch of an inverter to regulate a current of the PMSM.

Abstract: A charging system is disclosed for charging a battery system of an electric vehicle. In one form, the charging system includes a first connector including a power control unit that is operable to selectively supply charging power from a power source. A second connector is connected with the first connector and includes a fault detection circuit. A controller is connected with the fault detection circuit and the power control unit. The controller is operable to control the power control unit to selectively supply charging power to a battery system if a fault is not detected from fault detection circuit. A cordset for use with the charging system is also disclosed that allows the cordset to perform certain electrical functions and connect the cordset to a connector of the vehicle in a breakaway manner.

Abstract: A high voltage direct current (HVDC) converter system includes a line commutated converter (LCC) configured to convert a plurality of AC voltages and currents to a regulated DC voltage of one of positive and negative polarity and a DC current transmitted in only one direction. The HVDC converter system also includes a buck converter configured to convert a plurality of AC voltages and currents to a regulated DC voltage of one of positive and negative polarity and a DC current transmitted in one of two directions. The LCC and the buck converter are coupled in parallel to an AC conduit and are coupled in series to a DC conduit. The HVDC converter system further includes a filtering device coupled in parallel to the buck converter through the AC conduit. The filtering device is configured to inject AC current having at least one harmonic frequency into the AC conduit.

Abstract: A cascode transistor includes: a first switch; a second switch that has a withstand voltage higher than that of the first switch and is cascade coupled to a drain of the first switch; and a circuit in which a third switch and a capacitor are coupled in series with each other and that is provided between a connection node and a source of the first switch, the connection node being a node at which the first switch and the second switch are coupled to each other.

Abstract: A power supply system may include a target device and an adapter. The target device may include an adapter connection switch that receives adapter recognition information to form a connection with the adapter, a voltage detection unit that receives an output voltage from an adapter, and a voltage-change-requesting unit that outputs a voltage to request a voltage change based on information on the output voltage from the adapter. The adapter may include a device information recognition unit that receives the voltage to request a voltage change, and an output-voltage-changing unit that changes the output voltage based on the voltage to request a voltage change.

Abstract: A power supply system includes a control unit comprising a detecting and converting unit that is operable to generate a detected current based on a difference between a set voltage and a voltage representative of a current flow through an energy storage member.

Abstract: Techniques for optimizing the trade-off between minimizing switching losses and minimizing conduction losses in a buck converter. In an aspect, each of a high-side switch and a low-side switch may be implemented as a plurality of parallel-coupled transistors, each transistor having an independently controllable gate voltage, allowing adjustment of the effective transistor size. In response to the target voltage of the buck converter corresponding to a relatively high voltage range, more high-side switch transistors and fewer low-side switch transistors may be selected. Similarly, in response to the target voltage corresponding to a relatively low voltage range, more low-side switch transistors and fewer high-side switch transistors may be selected. In an aspect, the techniques may be applied during a pulse-frequency modulation mode.

Abstract: A power source generation circuit includes a regulator circuit which receives an external power source voltage VDDA from an external power source, and generates a predetermined internal power source voltage on a given terminal VDD; and a charging circuit which connects the external power source and the given terminal when the external power source voltage VDDA supplied from the external power source is equal to or lower than a predetermined threshold voltage.

Abstract: An intelligent pulse width modulation (PWM) controller adapts a switch mode power supply (SMPS) system's operating parameters to optimize efficiency, remove hot spots and isolate faults by integrating a microcontroller, PWM digital circuits and analog circuits into a single integrated circuit, thereby reducing the number of external connections, silicon die area and integrated circuit packages. A communications interface is used to communicate with a host system for monitoring operating parameters of the SMPS, e.g., current, voltage, efficiency, operating temperature, diagnostics, etc. In addition, the communications interface may be used to alter the operating parameters (objectives) of the SMPS during operation thereof.

Abstract: Consistent with an example embodiment, there is a power regulator arrangement with variable current capacity providing power from a power supply to a load having variable demand. As a load, a high-performance microprocessor has several modes of operation. At the highest speed setting, it demands a lot of current. At slower clock speeds and during state retention, the processor has a very low current consumption. Using a single regulator, the current efficiency may be very low during long standby periods. To increase the efficiency even at lower load currents, a scheme is based on parallel operation of multiple regulators having different load ranges, for example, a “low, “medium,” and “high” range regulators. Having knowledge of the load current profile, the regulators can be adjusted such that the peak of the efficiency curve matches the load profile of the regulator. The efficiency of the power regulator arrangement is enhanced throughout the range of power demanded by the load.

Abstract: A DC-DC converter with low power consumption and high power conversion efficiency is provided. The DC-DC converter includes a first transistor and a control circuit. The control circuit includes an operational amplifier generating a signal that controls switching of the first transistor, a bias circuit generating a bias potential supplied to the operational amplifier, and a holding circuit holding the bias potential. The holding circuit includes a second transistor and a capacitor to which the bias potential is supplied. The first transistor and the second transistor include a first oxide semiconductor film and a second oxide semiconductor film, respectively. The first oxide semiconductor film and the second oxide semiconductor film each contain In, M (M is Ga, Y, Zr, La, Ce, or Nd), and Zn. The atomic ratio of In to M in the first oxide semiconductor film is higher than that in the second oxide semiconductor film.

Abstract: The present disclosure relates to methods, systems and a module for operating a power converter module, the power converter module comprises a voltage source, a remote control terminal configured to be connected to a voltage potential for remote control of the power converter module. A voltage converter is configured to send an alarm signal, determine the voltage potential of the remote control terminal, and control an output voltage of the voltage converter at an output terminal of the power converter module based on the determined voltage potential of the remote control terminal. An alarm branch is configured to change the voltage potential of the remote control terminal by a voltage source in response to an alarm signal from the voltage converter when the remote control terminal is connected to a voltage potential, thereby causing the voltage converter to control the output voltage at the output terminal.

Abstract: Disclosed is a DC-DC converter including: a switch unit controlling a flow of a current based on a buck-boost topology; a short circuit unit short circuited or opened according to an external setting to change a topology of the switch unit; an inductor storing a current induced by the switch unit; a topology selecting unit selecting a topology in response to an external input signal and generating a signal corresponding to the selected topology; a pulse width modulating unit generating a signal for determining an operation time of the switch unit; a reverse flow detecting unit detecting a reverse flow of a current flowing through the switch unit to generate a signal; and a switch control unit controlling the switch unit in response to signals of the topology selecting unit, the pulse width modulating unit and the reverse flow detecting unit.

Abstract: A peak current controlled switching voltage regulator system and method for providing a self-power down mode. An on-chip voltage regulator integrated into an on-chip digital logic circuit provides a core supply voltage to the on-chip digital logic circuit along with an off-chip inductor. An off-chip regulator connected to the on-chip digital logic circuit provides an external core supply voltage with respect to the on-chip digital logic circuit. A start-up circuit operates the on-chip voltage regulator in a self-power down mode for a pre-determined time period when the on-chip regulator is not connected to the off-chip inductor in order to maintain an equilibrium voltage supply with respect to the on-chip digital logic circuit.

Abstract: A power supply is disclosed herein. For example, a method for controlling the power supply can include dynamically programming a threshold voltage. The method can also include down-converting an input voltage to generate a down converted voltage at an output voltage node. Further, the method can include passing the input voltage to the output voltage node when a supply voltage exceeds the threshold voltage.

Abstract: An integrated circuit (IC) controller for a switching power supply has a selectable operating mode for supporting multiple switching power supply topologies. The IC controls current by controlling a cycle rate of the switching power supply to provide a constant or variable output current, which may be provided to lighting devices such as light-emitting diodes (LEDs). The selectable operating mode includes at least a buck converter operating mode and another operating mode, which may be a flyback converter operating mode.

Abstract: A DC-DC converter, capable of operation in either a boost or buck mode, includes a voltage source connected to an input switch through an inductive element such that a closed loop is formed. The DC-DC converter includes a switching network that receives one or more clock signals from an external clock source. The switching network has a first terminal connected to the inductive element, a second terminal connected to a first capacitor, and a third terminal connected to a second capacitor, wherein the switching network enables charging of the first capacitor and the second capacitor based on one or more clock signals such that the first capacitor and the second capacitor are charged alternately. The DC-DC converter includes a filter connected to a fourth terminal of the switching network, wherein the first capacitor and the second capacitor discharge alternately based on the one or more clock signals through the filter.