By Time Measuring Patents (Class 324/535)
  • Patent number: 10317389
    Abstract: A system to monitor and analyze a multi-strand rope includes a rope data sensor to collect data regarding the physical state of the rope; one or more usage sensors to collect data regarding the usage of the rope; a position measurement device to measure the position of the rope; and a computer system connected to the rope data sensor, the one or more usage sensors and the position measurement device to correlate the collected data and position measurement to give real-time data on the status of the rope at one or more sections.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: June 11, 2019
    Assignee: IHC Holland IE B.V.
    Inventors: Frederik Benjamin van der Woude, Jurgen Arjan Zijlmans
  • Patent number: 10242834
    Abstract: A method and device are disclosed for determining the direction of current flowing through a circuit breaker. An embodiment includes obtaining a sample value of current flowing through the circuit breaker and a differential value of current; obtaining a sample value of voltage at the circuit breaker; on the basis of a relationship between voltage and current in an equivalent circuit in which the circuit breaker lies at the present time and at a previous time, obtaining an equivalent resistance and an equivalent inductance in the equivalent circuit; if the equivalent resistance and equivalent inductance are both greater than zero, determining that the direction of current flowing through the circuit breaker is the same as the current reference direction, and if the equivalent resistance and equivalent inductance are both less than zero, determining that the direction of current flowing through the circuit breaker is opposite to the current reference direction.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: March 26, 2019
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Wei Gang Chen, Feng Du, Yue Zhuo
  • Patent number: 10234519
    Abstract: The present specification relates to an electric power converter, comprising at least a set of four controllable power switches, arranged in an H-bridge or a functionally equivalent circuit comprising two switching legs of two series switches connected to a voltage source, each power switch comprising an antiparallel diode, a controller configured for controlling the switches with a blanking time, a feedback loop for the load current, characterized by a first bias current injection circuit, coupled to the central point of the first leg of the H-bridge and a second bias current injection circuit, coupled to the central point of the second leg of the H-bridge. The specification further relates to a MRI scanner, provided with an electric power converter according to any of the preceding claims, for driving the gradient coils.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: March 19, 2019
    Assignee: Prodrive Technologies B.V.
    Inventors: Antonius Wilhelmus Hendricus Johannes Driessen, Noud Johan Hubert Slaats
  • Patent number: 9934670
    Abstract: An infrastructure monitoring system includes: a first monitoring device configured to detect and monitor a first condition of a first aspect of the infrastructure and transmit a data signal including data relating to the first condition; a second monitoring device configured to detect and monitor a second condition of a second aspect of the infrastructure and transmit a data signal including data relating to the second condition; a third monitoring device configured to detect and monitor a third condition of a third aspect of the infrastructure and transmit a data signal including data relating to the third condition; and an operations center communicatively coupled to each monitoring device, the operations center configured to receive the data signal from each monitoring device and determine whether the data included in the data signal received from any one of the monitoring devices indicates a problem within the infrastructure.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: April 3, 2018
    Assignee: Mueller International, LLC
    Inventors: Gregory E. Hyland, Robert Paul Keefe, Marietta Edmonds Zakas, Clayton Robert Barker, III
  • Patent number: 9766283
    Abstract: The transformer fault detection apparatus includes an integrated sensor unit for sensing signals through a plurality of sensors located on each of upper and lower drain valves in a transformer. A first possible discharge area calculation unit calculates a first possible discharge area estimated to be a location of a partial discharge source of the transformer, based on arrival times of signals sensed by different sensors located on the upper drain valve. A second possible discharge area calculation unit calculates a second possible discharge area estimated to be the location of the partial discharge source, based on arrival times of signals sensed by different sensors located on the lower drain valve. A final possible discharge area calculation unit calculates a final possible discharge area, based on an overlapping area between the first and second possible discharge areas.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: September 19, 2017
    Assignee: KOREA ELECTRIC POWER CORPORATION
    Inventors: Kison Han, Jinyul Yoon, Hyungjun Ju, Kijung Ann
  • Patent number: 9698844
    Abstract: The present invention detects, determines, and mitigates signal-path processing errors. An extracted and inverted reference signal is compared to the carrier signal produced by various functional components to determine the error introduced to that signal by functional components. After the signal has been processed by various signal-processing components, the signal can once again be compared to the inverted reference signal so that a signal-path processing bias can be determined. Using that determination, a signal modification can be initiated to substantially reduce or eliminate all signal-path processing error.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: July 4, 2017
    Assignee: Blue Line Engineering Company
    Inventor: Gregory Ames
  • Patent number: 9689910
    Abstract: An apparatus and method for detecting faults in a two-wire electric power line isolated from ground includes substantially identical high impedance voltage dividers connected between each of the two wires of the power line and ground, circuits for carrying the output voltages from each voltage divider, a circuit for comparing the output voltages, and outputting a fault signal indicative of a ground fault.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: June 27, 2017
    Assignee: Wabtec Holding Corp.
    Inventor: Carl L. Haas
  • Patent number: 9564945
    Abstract: A system and method to produce an electric network from estimated line impedance and physical line length among smart meter devices is provided using communication between the smart meters. The smart meters: (1) synchronize time using GPS pps signals, which provide an accurate time stamp; (2) send/receive an identifiable signal through the same phase of electric networks; (3) identify other smart meters on the same phase lines by listening to the information signal on the same phase lines; and (4) calculate time-of-arrival of an identifiable signal from other smart meters. The time of arrival information is used to calculate the line length, which is then used to calculate impedance of a line and topology of the electric network. The system then constructs an electric network by combining geo-spatial information and tree-like usual connection information.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: February 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Aanchal Goyal, Aleksandr Aravkin, Younghun Kim, Tarun Kumar
  • Patent number: 9404777
    Abstract: A method of locating a partial discharge emission zone and to the associated device. The method is characterized in that it comprises a step of measuring partial discharge signals by means of four identical measurement channels each including a VHF and/or UHF detector, the four VHF and/or UHF detectors being positioned at the four vertices of a square or rectangle in such a manner that the partial discharge emission zone is determined inside the square or rectangle.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: August 2, 2016
    Assignee: Alstom Technology Ltd.
    Inventors: Sebastien Louise, Gilbert Luna
  • Patent number: 9281854
    Abstract: The present invention detects, determines, and mitigates signal-path processing errors. An extracted and inverted reference signal is compared to the carrier signal produced by various functional components to determine the error introduced to that signal by functional components. After the signal has been processed by various signal-processing components, the signal can once again be compared to the inverted reference signal so that a signal-path processing bias can be determined. Using that determination, a signal modification can be initiated to substantially reduce or eliminate all signal-path processing error.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: March 8, 2016
    Assignee: Blue Line Engineering Company
    Inventor: Gregory Ames
  • Patent number: 9164065
    Abstract: Methods and apparatus for determining an estimated physical location of a fault in a pipeline or electrical transmission line using localization devices coupled thereto. In an embodiment, a first and second localization device each generate time values representing times when the respective localization device detected the fault. The estimated fault location is calculated, by one of the localization devices or a separate computing device, based upon the reported time values. In some embodiments, the calculation is further based upon characteristics of the pipeline or electrical transmission line, or based upon characteristics of matter transported through the pipeline. In some embodiments, the localization devices transmit time or sequence values to the other device, and the values received by the devices just before the detection of the fault may additionally be utilized to calculate the estimated physical location of the fault.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: October 20, 2015
    Assignee: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)
    Inventors: David Hood, Stefan Dahlfort
  • Patent number: 9046577
    Abstract: A method for diagnosing a fault in an electrical component using a diagnostic system having a plurality of sensors. The method includes positioning the electrical component in a predetermined position adjacent the diagnostic system and at a predetermined orientation with respect to the diagnostic system. The method also includes causing a predetermined level of electrical current to flow to the electrical component, the stationary sensors sensing electrical discharge emitted by the electrical component at an area of the fault, and the tangible computerized controller receiving sensor data from the sensors. The method further includes the tangible computerized controller executing the computer-readable instructions to process the sensor data to generate test information including a location of the electrical component at which the fault is occurring in at least two dimensions.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: June 2, 2015
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: John S. Agapiou, Daniel L. Simon, John Patrick Spicer, Edward Panozzo
  • Patent number: 8922224
    Abstract: An electronic system having a high speed signaling bus requiring training (calibration) of a calibrated item in a driver circuitry or a receiver circuitry for reliable operation. At manufacturing or in a secure location, secure calibration coefficients are determined for the electronic system and are stored in a non-volatile storage. During operation, the high speed signaling bus may be re-calibrated, resulting in a new currently active calibration coefficient for the calibrated item. A coefficient watchdog checks a new coefficient value selected by the re-calibration at present environmental conditions such as voltage and temperature against the secure calibration coefficients. If the new calibration coefficient value is the same as a calibration coefficient value in an acceptably close secure calibration coefficient, the new calibration coefficient is accepted; if not, a potentially probed warning is created by the coefficient watchdog.
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: December 30, 2014
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Ronald L. Billau, Roger J. Gravrok, Brian G. Holthaus, Darryl Solie
  • Patent number: 8823447
    Abstract: Systems, methods, and computer readable media that can mitigate the effects of semiconductor aging in a semiconductor device are described. Traditional methods of mitigating semiconductor aging can be wasteful since they overcorrect for aging using a high operational voltage. The approach discussed herein steps up the operational voltage for the electronic device with time based on predetermined aging models. This allows power consumption by the electronic device, particularly early in the designed operational life, to be much less than it would otherwise be.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: September 2, 2014
    Assignee: Broadcom Corporation
    Inventor: Anatoly Gelman
  • Patent number: 8786292
    Abstract: A power distribution monitoring system is provided that can include a number of features. The system can include a plurality of monitoring devices configured to attach to individual conductors on a power grid distribution network. In some embodiments, a monitoring device is disposed on each conductor of a three-phase network. The monitoring devices can be configured to measure and monitor, among other things, current and electric-field on the conductors. Methods of calibrating the monitoring devices to accurately measure electric-field are also provided. In one embodiment, a first monitoring device on a first conductor can transmit a calibration pulse to a second monitoring device on a second conductor. The second monitoring device can determine a degradation of the calibration pulse, and use that degradation to calibrate electric-field measurements around the conductor.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: July 22, 2014
    Assignee: Sentient Energy, Inc.
    Inventor: Mark A. Parsons
  • Patent number: 8717881
    Abstract: Devices, systems, methods, and other embodiments associated assigning signals to cable channels are described. One example device includes a networking device that includes a transceiver to connect to a cable and communicate signal over the cable to a remote terminal. The cable can include two or more cable channels to carry signals. If a cable channel fails to operate, a switching logic reassigns signals initially carried on the failed cable channel to another cable channel.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: May 6, 2014
    Assignee: Marvell International Ltd.
    Inventors: Joachim Schmalz, Olaf Mater
  • Patent number: 8710987
    Abstract: A secure data entry device including a housing, tamper sensitive circuitry located within the housing and tampering alarm indication circuitry arranged to provide an alarm indication in response to attempted access to the tamper sensitive circuitry, the tampering alarm indication circuitry including at least one conductor, a signal generator operative to transmit a signal along the at least one conductor and a signal analyzer operative to receive the signal transmitted along the at least one conductor and to sense tampering with the at least one conductor, the signal analyzer being operative to sense the tampering by sensing changes in at least one of a rise time and a fall time of the signal.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: April 29, 2014
    Assignee: Verifone, Inc.
    Inventors: Yuval Ben-Zion, Ofer Itshakey
  • Patent number: 8664950
    Abstract: A method for measuring longitudinal bias magnetic field in a tunnel magnetoresistive sensor of a magnetic head, the method includes the steps of: applying an external longitudinal time-changing magnetic field onto the tunnel magnetoresistive sensor; determining a shield saturation value of the tunnel magnetoresistive sensor under the application of the external longitudinal time-changing magnetic field; applying an external transverse time-changing magnetic field and an external longitudinal DC magnetic field onto the tunnel magnetoresistive sensor; determining a plurality of different output amplitudes under the application of the external transverse time-changing magnetic field and the application of different field strength values of the external longitudinal DC magnetic field; plotting a graph according to the different output amplitudes and the different field strength values; and determining the strength of the longitudinal bias magnetic field according to the graph and the shield saturation value.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: March 4, 2014
    Assignee: SAE Magnetics (H.K.) Ltd.
    Inventors: Siuman Mok, Hokei Lam, Cheukwing Leung, Juren Ding, Rongkwang Ni, Wanyin Kwan, Cheukman Lui, Chiuming Lueng
  • Patent number: 8648607
    Abstract: Disclosed are various embodiments for monitoring power usage. A plurality of power usage cycles are monitored using a controller. Each of the power usage cycles includes a plurality of current draw periods. Each of the current draw periods has a different average current draw. A current draw reading is determined to be abnormal when the current draw reading meets a threshold associated with one of the current draw periods, while the one of the current draw periods is predicted to be active. An action is performed when the current draw reading is determined to be abnormal.
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: February 11, 2014
    Assignee: Amperic, Inc.
    Inventor: Richard Pasek
  • Patent number: 8598887
    Abstract: A method and apparatus for determining the time of arrival of a fault wave at a measurement point of a power transmission system includes a measurement unit measuring a power quantity of the system at the measurement point (P1) for obtaining a measurement quantity being a potential fault wave, a time keeping unit, a storage unit storing the measurement quantity, a comparing unit comparing the measurement quantity with a threshold (T1) for detecting the presence of a fault wave (W1) and an analyzing unit. The analyzing unit analyzes measurements made before the fault wave presence was detected, determines the starting point (SP) of the fault wave based on the analysis and sets the time of the starting point to be the fault wave arrival time (T1).
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: December 3, 2013
    Assignee: ABB Technology AG
    Inventor: Hans Björklund
  • Patent number: 8461850
    Abstract: A test and measurement instrument and method for receiving a radio frequency (RF) signal, digitizing the RF signal using an analog-to-digital converter, downconverting the digitized signal to produce I (in-phase) and Q (quadrature) baseband component information, generating one or more IQ-based time-domain traces using the I and Q baseband component information, and measuring and displaying a variety of measurement values of the IQ-based time-domain traces. The IQ-based time-domain measurement values can be automatically generated and displayed, and/or transmitted to an external device.
    Type: Grant
    Filed: August 13, 2010
    Date of Patent: June 11, 2013
    Assignee: Tektronix, Inc.
    Inventors: Kenneth P. Dobyns, Gary J. Waldo
  • Patent number: 8405506
    Abstract: A secure data entry device including a housing, tamper sensitive circuitry located within the housing and tampering alarm indication circuitry arranged to provide an alarm indication in response to attempted access to the tamper sensitive circuitry, the tampering alarm indication circuitry including at least one conductor, a signal generator operative to transmit a signal along the at least one conductor and a signal analyzer operative to receive the signal transmitted along the at least one conductor and to sense tampering with the at least one conductor, the signal analyzer being operative to sense the tampering by sensing changes in at least one of a rise time and a fall time of the signal.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: March 26, 2013
    Assignee: Verifone, Inc.
    Inventors: Yuval Ben-Zion, Ofer Itshakey
  • Publication number: 20130021039
    Abstract: A method and apparatus for determining the time of arrival of a fault wave at a measurement point of a power transmission system includes a measurement unit measuring a power quantity of the system at the measurement point (P1) for obtaining a measurement quantity being a potential fault wave, a time keeping unit, a storage unit storing the measurement quantity, a comparing unit comparing the measurement quantity with a threshold (T1) for detecting the presence of a fault wave (W1) and an analyzing unit. The analyzing unit analyzes measurements made before the fault wave presence was detected, determines the starting point (SP) of the fault wave based on the analysis and sets the time of the starting point to be the fault wave arrival time (T1).
    Type: Application
    Filed: April 13, 2010
    Publication date: January 24, 2013
    Applicant: ABB TECHNOLOGY AG
    Inventor: Hans Björklund
  • Patent number: 8289028
    Abstract: A wireless communication device performing wireless communication by switching between transmission timing and reception timing in time division, controls to supply a heater or a fan with power supplied from a power supply unit in the reception timing period, and controls to suspend supplying the heater or the fan with the power supplied from the power supply unit in the transmission timing period, in case that a temperature detected by a temperature detector is outside a specified temperature range while a time-division switchover between the transmission timing and the reception timing is performed.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: October 16, 2012
    Assignee: Fujitsu Limited
    Inventors: Yasuhiro Shibuya, Hiroyuki Miura, Koji Hirai, Masayuki Oonuki, Manabu Miyamoto
  • Patent number: 8269505
    Abstract: One embodiment provides a method of locating a short circuit in a printed circuit board. Test signals may be injected at different test points on the circuit board. The distance between each test point and the short circuit may be determined according to how long it takes for a signal reflection at the short circuit to propagate back to each test point. The distances between the various test points and the short circuit can be used to narrow the possible locations of the short circuit or even to pinpoint the location of the short circuit.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: September 18, 2012
    Assignee: International Business Machines Corporation
    Inventors: Moises Cases, Bhyrav M. Mutnury, Terence Rodrigues
  • Patent number: 8242784
    Abstract: A test structure for testing electrical properties of a material comprises a first loop and a second loop, which are connected to form a closed test loop. A signal generator, for generating a test signal, is coupled to the first loop and the second loop. A signal propagation switching logic is coupled to the first loop and to the second loop for alternatingly flipping the test signal between the first and second loops, such that the test signal moves uninterrupted through the closed test loop. A probe logic detects any degradation of the test signal as the test signal travels along the closed test loop.
    Type: Grant
    Filed: December 7, 2009
    Date of Patent: August 14, 2012
    Assignee: International Business Machines Corporation
    Inventors: Vinh B. Lu, Bhyrav M. Mutnury, Terence Rodrigues
  • Patent number: 8217664
    Abstract: A time period of an event is determined by charging a known value capacitor from a constant current source during the event. The resultant voltage on the capacitor is proportional to the event time period and may be calculated from the resultant voltage and known capacitance value. Capacitance is measured by charging a capacitor from a constant current source during a known time period. The resultant voltage on the capacitor is proportional to the capacitance thereof and may be calculated from the resultant voltage and known time period. A long time period event may be measured by charging a first capacitor at the start of the event and a second capacitor at the end of the event, while counting clock times there between. Delay of an event is done by charging voltages on first and second capacitors at beginning and end of event, while comparing voltages thereon with a reference voltage.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: July 10, 2012
    Assignee: Microchip Technology Incorporated
    Inventor: James E. Bartling
  • Patent number: 8193818
    Abstract: A method of detecting partial corona discharge in a targeted circuit of an electrical apparatus, comprises the steps of: wrapping a Rogowski coil around a leg of the targeted circuit to produce a Rogowski coil signal that represents electrical current rate of change in the leg of the targeted circuit; coupling the Rogowski coil signal to a three-dimensional display device that may represent the dimension of time, the dimension of amplitude as a function of a time, and the dimension of duration of amplitude as a function of time in successive periods of that have a preselected duration; monitoring the display device to detect deviations of the duration of amplitude as a function of time from a normal waveform in the leg of the targeted circuit; and correlating ones of the detected deviations of the duration of amplitude as a function of time from a normal waveform that exceed a preselected deviation level as indicative of partial corona discharge within the targeted circuit.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: June 5, 2012
    Assignee: Hamilton Sundstrand Corporation
    Inventors: John Horowy, Neal D. Clements
  • Patent number: 8154303
    Abstract: Methods are disclosed for identifying and locating points of impairment in a cable plant, such as that used for cable television (CATV). The methods utilize both known characteristics of signals as well as propagation times in free space and within the cable in conjunction with accurate determination of locations at which measurements are taken. The methods can be applied to both RF cable leaks as well as points of ingress of interference.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: April 10, 2012
    Inventors: Ben Maxson, Daniel K. Chappell
  • Patent number: 8143899
    Abstract: A method of detecting partial discharge associated with at least a portion of an electrical system, wherein the electrical system includes at least one electrical machine electrically coupled within the electrical system, includes generating an electromagnetic field within the electrical machine. The method also includes collecting partial discharge data from at least a portion of the electrical system. The method further includes determining a first partial discharge inception voltage (PDIV) value of at least a portion of partial discharge activity within the electrical system. The method also includes generating at least one trending comparison of the first PDIV value and at least one second PDIV value of at least a portion of partial discharge activity within the electrical system. The method further includes outputting the results.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: March 27, 2012
    Assignee: General Electric Company
    Inventors: Abdelkrim Younsi, Ronald Irving Longwell, Sameh Ramadan Salem, Yingneng Zhou
  • Patent number: 8028210
    Abstract: An object of the present invention is to provide a semiconductor device capable of recognizing circuit malfunction in an actual operation and of specifying a point of the circuit malfunction, and the semiconductor device, which does not induce the malfunction in the circuit of a subsequent stage when restoring the malfunction. The present invention is the semiconductor device provided with a plurality of logic circuits and a plurality of judging circuits for judging malfunction based on data from the logic circuits, wherein each of the judging circuits is provided with a first register, delay unit, a second register, a comparator and scanning unit, which makes the second register a shift register to allow to transmit an error signal held in the second register to the subsequent stage, while allowing the comparator to hold a comparison result.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: September 27, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Masanori Kurimoto
  • Patent number: 8013614
    Abstract: A system and method for enhanced accuracy in cable diagnostics of cable length. Conventional cable diagnostics such as time domain reflectometry can be used to determine cable length. This conventional technique can have accuracy limitations in certain situation such as with perfectly terminated cable. A cable length can also be determined through the use of link delay measurements that are based on clock synchronization between nodes in a network. Notwithstanding the accuracy issues of these link delay measurements, overall accuracy can be increased through the combination of the two cable length delay measurements into a final estimate.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: September 6, 2011
    Assignee: Broadcom Corporation
    Inventor: Wael William Diab
  • Patent number: 8006156
    Abstract: Various exemplary embodiments provide methods and apparatuses for generating test conditions that efficiently detect delay faults while preventing overkill. According to an exemplary embodiment, i) test timing correcting block sets test timing faster than the actual operation timing of a logical circuit to be tested, ii) logical simulation block performs simulation by using delay times of signal paths corrected by adding minimum slack margin, and iii) when the simulation indicates that an end-side flip-flop cannot acquire data after an expected transition of logical value, masking block generates mask data that masks data held in the end-side flip-flop.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: August 23, 2011
    Assignee: Kawasaki Microelectronics, Inc.
    Inventor: Hiromi Kojima
  • Patent number: 8000913
    Abstract: A system, method and computer program product for processing utility data of a power grid is provided. In one embodiment, the system includes a datamart comprised of a plurality of physical databases storing utility data, a plurality of applications comprising an automated meter application configured to process power usage data from a plurality of automated meters, a power outage application configured to identify a location of a power outage, and a power restoration application configured to identify a location of a power restoration. The system may include an analysis engine comprising a plurality of analysis objects with each analysis object configured to process data to provide a specific analysis, wherein said analysis engine is accessible via one or more of the plurality of applications, and the system may include a report module configured to receive an output from the analysis engine and to output a report.
    Type: Grant
    Filed: January 17, 2009
    Date of Patent: August 16, 2011
    Assignee: Current Communications Services, LLC
    Inventors: David G. Kreiss, Daniel S. Brancaccio
  • Patent number: 7977951
    Abstract: A first physical layer (PHY) device includes an auto-negotiation module, a first cable-length measuring module, and a first control module. The auto-negotiation module exchanges data rates of the first PHY device and a second PHY device. The first PHY device is connected to the second PHY device by a cable. The first cable-length measuring module performs a first measurement of a length of the cable. The first control module selectively receives a second measurement of the length of the cable from the second PHY device, and selects a data rate of the first PHY device from the data rates of the first PHY device and the second PHY device based on (i) the first measurement of the length of the cable performed by the first cable-length measuring module of the first PHY device, or (ii) the second measurement of the length of the cable received from the second PHY device.
    Type: Grant
    Filed: October 4, 2010
    Date of Patent: July 12, 2011
    Assignee: Marvell International Ltd.
    Inventors: William Lo, Tak-Lap Tsui
  • Patent number: 7940056
    Abstract: The present invention provides a method of time domain reflectometry including transmitting a test signal along a cable under test from one end and sensing and recording a reflected signal from the cable at that end, using the recorded, reflected signal to estimate the distance, Ldist, from the one end to a discontinuity on the cable, separating a test signal component from the remainder, Vr, of the reflected signal; estimating the impedance, Zfault, of the discontinuity from known, predetermined values of the characteristic impedance, Zline, and of the characteristic gain, T, of a reference cable, and from the said separated test signal and reflected signal components, calculating the estimation error as a difference between the model reflection signal, Vrmod, expected of the cable under test based on the characteristic impedance and characteristic gain and the estimated impedance, Zfault and distance, Ldist, and the actual reflection signal Vr, choosing new estimated values of Ldist and Zfault in accordance
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: May 10, 2011
    Assignee: Radiodetection Limited
    Inventor: Stephen Maslen
  • Patent number: 7913139
    Abstract: An object of the present invention is to provide a semiconductor device capable of recognizing circuit malfunction in an actual operation and of specifying a point of the circuit malfunction, and the semiconductor device, which does not induce the malfunction in the circuit of a subsequent stage when restoring the malfunction. The present invention is the semiconductor device provided with a plurality of logic circuits and a plurality of judging circuits for judging malfunction based on data from the logic circuits, wherein each of the judging circuits is provided with a first register, delay unit, a second register, a comparator and scanning unit, which makes the second register a shift register to allow to transmit an error signal held in the second register to the subsequent stage, while allowing the comparator to hold a comparison result.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: March 22, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Masanori Kurimoto
  • Patent number: 7855561
    Abstract: A test circuit according to the present invention includes: a synthesis circuit that synthesizes a first test result signal output from a first test target circuit in response to a test instruction, and a second test result signal output from a second test target circuit in response to the test instruction; an inter-block delay generation circuit that delays the second test result signal with respect to the first test result signal; and a test result holding circuit that holds a synthesized test result signal every predetermined timing, the synthesized test result signal being output from the synthesis circuit.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: December 21, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Kenichi Itoh
  • Patent number: 7827454
    Abstract: An object of the present invention is to provide a semiconductor device capable of recognizing circuit malfunction in an actual operation and of specifying a point of the circuit malfunction, and the semiconductor device, which does not induce the malfunction in the circuit of a subsequent stage when restoring the malfunction. The present invention is the semiconductor device provided with a plurality of logic circuits and a plurality of judging circuits for judging malfunction based on data from the logic circuits, wherein each of the judging circuits is provided with a first register, delay unit, a second register, a comparator and scanning unit, which makes the second register a shift register to allow to transmit an error signal held in the second register to the subsequent stage, while allowing the comparator to hold a comparison result.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: November 2, 2010
    Assignee: Renesas Electronics Corporation
    Inventor: Masanori Kurimoto
  • Patent number: 7808226
    Abstract: A method, device, and apparatus for tracing a conductive line and locating any concealed surveillance devices coupled to the line uses a signal generator to produce a test signal having a fundamental frequency which is coupled to the line under test. The test signal flowing through the line under test creates electromagnetic waves that propagate through the atmosphere away from the line. A portable locator probe is used to detect the radiated signal and thus the conductive line by detecting the magnitude of the radiated signal. As the locator probe is moved closer to the line, the amplitude of the detected signal increases. In addition, the portable locator probe detects harmonic signals radiated from nonlinear junctions coupled to the line at harmonic frequencies of the fundamental test signal.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: October 5, 2010
    Assignee: Research Electronics International
    Inventors: Bruce R. Barsumian, Thomas H. Jones, Sean M. Kelly
  • Patent number: 7808249
    Abstract: A physical layer (PHY) device of a network device includes a first module, a first cable-length measuring (CLM) module, and a first control module. The first module determines whether a remote PHY that communicates with the PHY device over a cable is capable of measuring a length of the cable. The first CLM module measures a first length of the cable. The first control module causes the first length to be transmitted to the remote PHY, receives a second length of the cable measured by the remote PHY, and adjusts an operating parameter of the PHY based on at least one of the first and second lengths.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: October 5, 2010
    Assignee: Marvell International Ltd.
    Inventors: William Lo, Tak-Lap Tsui
  • Patent number: 7679371
    Abstract: A cable testing system that tests cable includes a pulse generation module that transmits a first pulse on a first communications channel of the cable. A sampling module waits a predetermined time period after the pulse generation module transmits the first pulse and then detects a first amplitude of a reflected signal on a second communications channel of the cable. A time domain reflection (TDR) module receives the first amplitude and verifies proper operation of the cable based on the first amplitude. The predetermined time period corresponds with an estimated roundtrip propagation delay of the first pulse when the first pulse is reflected back to the cable testing system after traveling a first predetermined distance along the cable. The sampling module incrementally increases the predetermined time period during subsequent iterations of a cable test in order to verify proper operation of a predetermined segment of the cable.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: March 16, 2010
    Assignee: Marvell International Ltd.
    Inventor: William Lo
  • Patent number: 7630853
    Abstract: Line anomalies on a line under test are detected by generating a test signal at a first power level and coupling the test signal to the line under test. A response level is received from the line under test at a second and third harmonic frequency of the first test signal. A second test signal is generated at an increased power level and coupled to the line under test and a response level from the line is received at a second and third harmonic frequency of the second test signal. The process is repeated by raising the power level of the test signal until a current level supplied to the line by a test signal exceeds an acceptable threshold level. The response levels are compared to stored data to locate any line anomalies present. The stored data represents harmonic response data obtained from the same line at a previous time. A graphical or mathematical representation of the response data is produced such that the response data can be easily compared to locate any anomalies.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: December 8, 2009
    Assignee: Research Electronics International, LLC
    Inventors: Bruce R. Barsumian, Thomas H. Jones
  • Patent number: 7622931
    Abstract: Non-contact reflectometry for testing a signal path is described. The technique includes using capacitive coupling to inject a test signal into the signal path and extract a response signal from the signal path. Reflectometry techniques are used to determine characteristics of the signal path from the response signal. The technique is compatible with performing testing of a signal path carrying an operational signal.
    Type: Grant
    Filed: October 3, 2006
    Date of Patent: November 24, 2009
    Assignee: University of Utah Research Foundation
    Inventors: Shang Wu, Cynthia Furse, Chet Lo
  • Patent number: 7554334
    Abstract: Embodiments of a method of calculating the equivalent series resistance of a matching network using variable impedance analysis and matching networks analyzed using the same are provided herein. In one embodiment, a method of calculating the equivalent series resistance of a matching network includes the steps of connecting the matching network to a load; measuring an output of the matching network over a range of load impedances; and calculating the equivalent series resistance of the matching network based upon a relationship between the measured output and the load resistance. The load may be a surrogate load or may be a plasma formed in a process chamber.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: June 30, 2009
    Assignee: Applied Marterials, Inc.
    Inventors: Steven C. Shannon, Daniel J. Hoffman, Steven Lane, Walter R. Merry, Jivko Dinev
  • Patent number: 7538560
    Abstract: A system and method is presented for component failure protection. In one embodiment, the system includes an operational circuit configured to operate in a first operational state, wherein the first operational state is in proximity of a circuit failure threshold. Additionally, the system may include a canary circuit configured to mimic the operational characteristics of the operational circuit, wherein the canary circuit is configured to operate in a second operational state, and wherein the second operational state is in closer proximity of a circuit failure threshold than the proximity of the of the first operational state. The system may also include a variable input control coupled to the operational circuit and the canary circuit, wherein the variable input control is configured to monitor the second operational state and adjust an input to the operational circuit based on the proximity of the second operational state to the circuit failure threshold.
    Type: Grant
    Filed: March 7, 2007
    Date of Patent: May 26, 2009
    Assignee: International Business Machines Corporation
    Inventors: David Frank Hepner, Andrew Dale Walls
  • Patent number: 7424417
    Abstract: A method and system are disclosed, in a simulation of a design of a digital integrated circuit chip, to limit a number of scan test clocks and chip ports used for testing the chip. Clock domains are identified within the design of the chip that are independent of each other. The independent clock domains are grouped together, within said chip design, to form clock domain groups. A timing analysis is performed on the design of the chip by clocking the clock domain groups each with an independent scan test clock. The scan test clocks originate externally to the design and by-pass, within the chip design, the corresponding internal clocks. Capture mode violations are recorded from the timing analysis and are used to go back and form new clock domain groups, thereby repeating the method until no capture mode violations are generated.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: September 9, 2008
    Assignee: Broadcom Corporation
    Inventor: Amar Guettaf
  • Patent number: 7400150
    Abstract: Systems and methods for remotely monitoring and detecting faults in power distribution systems. In one embodiment, a remote fault monitoring system comprises a plurality of remote fault detection devices distributed on a power distribution network, and a monitoring station. Each remote detect device includes a first electrical parameter measurement circuit electrically or electromagnetically coupled to a neutral power distribution circuit conductor, and a second electrical parameter measurement circuit electrically or electromagnetically coupled to a power distribution circuit ground conductor. The monitoring station receives measurements transmitted by the remote fault detection devices and determines from the measurements whether a fault intermediate a pair of adjacent remote fault detection devices has occurred.
    Type: Grant
    Filed: January 19, 2006
    Date of Patent: July 15, 2008
    Assignee: Cannon Technologies, Inc.
    Inventor: Michael Cannon
  • Patent number: 7355412
    Abstract: Remote indication devices are each a combination of electrical parameter measurement circuitry, a CPU, and a communication device. Each remote indication device is electrically or electromagnetically coupled to a power distribution circuit conductor to monitor the current flowing in the conductor. The monitored conductor may be an energized power line (“phase”), or a current return line (“neutral”). In either case, the direction of power transfer at each measurement point can also be monitored by each remote indication device. Each remote indication device processes the monitored electrical current information to convert it into a form suitable for data transmission. The information is then presented to a monitoring station. The monitoring station collects and analyzes the electrical current information from the plurality of remote indication devices and is programmed to identify one or more particular power line segments that appear to have a fault.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: April 8, 2008
    Assignee: Cannon Technologies, Inc.
    Inventor: Michael Cannon
  • Patent number: 7292044
    Abstract: In a first embodiment of the invention there is provided an electronic chip for use with an automatic testing equipment device testing a device under test. The device under test has a plurality of pins and the electronic chip is placed in a channel of a test card that is associated with one of the pins. An input signal is provided to a pin of the device under test and the resulting output is provided to the pin electronics for the channel of the test card. In most embodiments, the output signal is a voltage signal. One purpose for the electronic chip is to measure jitter based upon timing measurements performed by the electronic chip. Jitter measurements are particularly important for high-speed serial devices. The electronic chip includes an integrating time measurement circuit for receiving the input signal and producing an output signal including a timing measurement of at least a portion of the input signal.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: November 6, 2007
    Assignee: Analog Devices, inc.
    Inventor: James Frame